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Introduction To Distributed Operating Systems
Introduction To Distributed Operating Systems
Introduction To Distributed Operating Systems
Credits:4
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Distributed File Systems, Distributed File System Design, Distributed File System
implementation, Trends in Distributed File System.
TEXT BOOK:
Distributed Operating Systems, Andrew S.
Tanenbaum
REFERENCE BOOK:
Advanced Concepts in Operating Systems,
Makes Singhal and Niranjan G.Shivaratna.
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Extremely Fast
Reaction Time
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Un-reliability of communication
Lack of global knowledge
Lack of synchronization & casual ordering
Concurrency control
Failure of recovery
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Resource Sharing
High Performance
Scalability
Fault Tolerance
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Item Description
Economics Microprocessors offer a better
price/performance than
mainframes
Speed A distributed system may have
more total computing power than
a mainframe
Inherent Distribution Some applications involve spatially
separated machines
Reliability If one machine crashes, the system
as a whole can still survive
Incremental Growth Computing power can be added in
small increment
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Item Description
Data Sharing Allow many users access to a
common data base
Device Sharing Allow many users to share
expensive peripherals like color
printers
Communication Make human-to-human
communication easier, for
example, by electronic mail
Flexibility Spread the workload over the
available machines in the most
effective way
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Flynn’s Classification
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SISD
MISD
SIMD
MIMD
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a. Crossbar Switch
b. Omega Switch
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Bus-Based Multicomputers
easy to build
communication volume much smaller
relatively slow speed LAN (10-100 MIPS,
compared to 300 MIPS and up for a
backplane bus)
Switched Multicomputers
interconnection networks: E.g., grid,
Hypercube
Hypercube: n-dimensional cube bus)
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Three types:
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NFS Architecture
– Server exports directories
– Clients mount exported directories
NSF Protocols
– For handling mounting
– For read/write: no open/close, stateless
Ideal definition:
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Transparency
Flexibility
Reliability
Performance
Scalability
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If n=1024,
How many switched stages will be there ?
How many will be the total switches stages
(CPU to Memory & Memory –CPU) ?
If a RISC processor is running at 100MIPS in
then, How much would be the instruction
execution time?
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