2

SKEE 2263
Part A (Answer 2 out of 3 questions)

Q.1 (a) Analyze the circuit in Figure Q.1(a)-i and the corresponding timing diagram in
Figure Q1(a)-ii. The carry in and carry out of the adder are not used. Complete the
timing diagram by filling in the values for Q[3..0] in hexadecimal and drawing the
waveform for Z. Write your answer by filling out Figure Q.1(a)-ii in page 12.
Detach and submit page 12 together with your answer booklet.
(10 marks)

Figure Q.1(a)-i.

1 0 F E 5 4 3 2 1 0

1 1 1 1 1 1 1 1 1 1
Figure Q.1(a)-ii.

(b) Implement the function Z =2X - Y using 24× 4 ROM as shown in Figure Q.1(b).
X[1:0] and Y[1:0] are unsigned 2-bit numbers. Z[3:0] is in two’s complement
format. Write the content at each memory location in binary for the ROM.
(10 marks)
 3
SKEE 2263

A3 A2 A1 A0 D3 D2 D1 D0 2x-y
0 0 0 0 0 0 0 0 0
0 0 0 1 1 1 1 1 -1
0 0 1 0 1 1 1 0 -2
0 0 1 1 1 1 0 1 -3
0 1 0 0 0 0 1 0 2
0 1 0 1 0 0 0 1 1
0 1 1 0 0 0 0 0 0
0 1 1 1 1 1 1 1 -1
1 0 0 0 0 1 0 0 4
1 0 0 1 0 0 1 1 3
1 0 1 0 0 0 1 0 2
1 0 1 1 0 0 0 1 1
1 1 0 0 0 1 1 0 6
1 1 0 1 0 1 0 1 5
1 1 1 0 0 1 0 0 4
1 1 1 1 0 0 1 1 3
2 2 2 2 2
 2
SKEE 2263

Q2. (a)

RSI
LSI

(i)

CLK
D[3..0] C B A 9 8 7 6 5 4 3 2

RSI

LSI
S[2..0] 3 2 2 3 2 2 0 3 1 1 0

Q[3..0] 0 C 6 3 9 C 6 6 5 A 4 4
1 1 1 1 1 1 1 1 1 1
(ii)
Figure Q.2a
(10 marks)
Q2(b)-i

Q2(b)-ii
Q3.(a) Find the critical path delay in the circuit shown in Figure Q1 by filling Table Q1.

a d f
3ns
b 5ns

y
c e g 4ns
5ns 2ns

Figure Q1

Table Q1

Path Delay (ns)

a/b-d-f-y 12 2
c/b-e-f-y 14 2
c/b-e-g-y 11 2
The critical path delay is 14ns 4

(10 marks)
Q3.(b)

Figure Q.2b(i)

1 n
Y[3..0] 0
1
1 X[3..0]
n
1
Min(X,Y)

1
n=4
X[3..0]

comparator
L(X<Y)
L(X<Y) 1
1 Y[3..0] n
1 X[3..0]
n
0
1
Max(X,Y)
n
1 Y[3..0] 1

L(X<Y) 1

Figure Q.2b(ii)

(10 marks)
Each state 1 mark (including input and output)