X542UN X542URV r1.0

SYSTEM PAGE REF.
PAGE
001_Block Diagram
Content
VINAFIX.COM
X542UN/URV SCHEMATIC Revision 1.0 BLOCK DIAGRAM
002_System Setting
003_CPU_DISPLAY
004_CPU_DDR3
005_CPU_LPC,SPI,SMB,CLINK （N16：DGPU = Nvidia N16S-GMR, 930MX）
006_CPU_POEWR
（N17：DGPU = Nvidia N17S-G1, MX150）
007_
008_CPU_MISC,JTAG
009_CPU_CFG,RSVD
Non Connected Standby
010_CPU_POWER_CAP Power
011_
012_ +VCCGT
013_DDR3L_TERMINATION +VCCCORE
+VCCSA
014_DDR3L_ON-BOARD_A(1)
Page 80 & 81
015_DDR3L_ON-BOARD_A(2)
016_DDR3L SO-DIMM_B
DDR4 so-dimm +1.0VSUS / +1.8VSUS
017_
eDP Page 83
018_ eDP Panel DDR4
2100MHz
019_DDR3L_CA_DQ_VOLTAGE Page 45
DDR4 DDR4 so-dimm +1.35V / +0.675VS
020_CPU_PCH_CSI2,EMMC DDI_2 DDI_2 CPU 2100MHz Page 86
021_CPU_PCH_CGPIO, LPIO, MISC HDMI type A
022_CPU_PCH_AUDIO,SDIO,SDXC Page 48
DDI_1 KabeLaker-R-U Page 13~15, 19
Page 3~9
SMB +3VADSW/+5VSUS
023_CPU_PCH_PCIE,USB,SATA
SML1 Page 87
024_CPU_PCH_CLOCK SIGNALS,RTC
025_CPU_PCH_SYS_POWER DDI to VGA DDI_1
026_CPU_PCH_POEWR,GND
D-SUB PCIE
PCIE_1~4 Nvidia 930M/1040 Load Switch
2 lans
Page 47 RTD2166-VAS-CG Page 88
027_CPU_PCH_POEWR,GND
Page 47
N16V-GMR1
028_PCH-SPI ROM,OTH SPI
Finger Print Page 70~ 79
Charger
029_
I2C1 Page 89
030_KBC_IT8995E/AX
Touchpad
031_KB, TouchPad & FingerPrint
PS2
LPC PCIE_5
GigaLAN RJ45 +NVVDD
032_RST_Reset Circuit Page 31 Debug Conn.
Page 28
RTL8402 Page 34 Page 91
033_LAN_RTL8111GUX-CG Page 33
034_LAN RJ45 Keyboard
+FBVDDQ
035_ Page 31 EC PCIE_6
SMB0 WLAN + BT Page 93
036_AUD_CODEC ALC3288
IT8995E
037_AUD_Smart Amp. 5766L & SKP Charger Page 30 USB 2.0 USB 2.0_8
038_ Page 88 PCH
SPI SPI ROM SPI Page 53
039_ Wildcat_Point
CPU SMB1
040_ Thermal Sensor W25Q64FVSSIQ
Page 28 USB 2.0_6
041_ Page 50 CMOS Camera
042_
DIMM Page 45
043_ Thermal Sensor MCP
044_ Page 14 Page 20~28
USB 3.0 USB 3.0_1
045_eDP_LVDS USB 3.0 Standard Conn.

USB 2.0_1
Port 1
046_
047_eDP to VGA & CRT D-SUB Page 52
048_HDMI-type A M.2 SSD SATA_2 SATA
Gen3 USB 3.0_4
049_
Page 54
USB 3.0 Type-A
050_FAN_Thermal Sensor USB 2.0_3
Port 2
051_SATA_ODD & HDD B to B CONN. SATA_1
Page 53
052_USB 3.0 port1/port2 ODD Gen3
053_MINICARD(WLAN) USB 3.0_2
USB 3.0_3
Page 51
054_SSD_key M
USB 3.1 Type-C
055_USB 3.1 MB Type-C USB 2.0_2
056_ iSST Page 55

057_DSG_Discharge
058_PRO_Protect USB 2.0_3
059_Power & LID INT. DMIC HDA Azalia 30 Pin
060_DC_DC & BAT IN
Audio Codec FPC Conn.
Page 45 USB 2.0_4
061_ To IO BD.
ALC3288
062_ INT. AMIC
063_ Page 45 Page 36
064_DB_SATA HDD HP & MIC
065_ME_Conn & Skew Hole
I2S Page 68
066_DB_IO_USB & CR & LED & JACK Speaker L/R SMART AMP
067_ Page 37 FPC
068_IO_FPC_CONN. TI_TAS5766L
SATA_0
Page 37
069_EMI Gen3
070_VGA_nVIDIA_N16V/S_PCIE HDD
071_VGA_nVIDIA_N16V/S_FB-IF
20 Pin 20 Pin Audio Jack 30 Pin
BtoB Conn. BtoB Conn. SATA_1 FPC Conn.
072_VGA_nVIDIA_N16V/S_FB-DDR3 To HDD DB. To MB To MB
073_VGA_nVIDIA_N16V/S_VDD CardReader
074_VGA_nVIDIA_N16V/S_DISPLAY
075_VGA_nVIDIA_N16V/S_ROM,XTAL AU6465RB63-GCF-GR USB 2.0_7
076_VGA_nVIDIA_N16V/S_GPIO Page 52 Page 64 Page 66

077_VGA_nVIDIA_N16V/S_POWER USB 2.0 Conn. USB 2.0_4
078_VGA_ HDD DB. IO DB.
079_VGA_
080_PW_SKYLAKE-U (1)
081_PW_SKYLAKE-U (2)
082_PW_
083_PW_+1.0VSUS/+1.8VSUS
084_PW_
084_PW_
086_PW_+1.2V/+VTT/+2.5V
087_PW_+3VADSW/+5VSUS CPU XDP Discharge Circuit DC & BATT. Conn. PWM Fan
088_PW_LOAD SWITCH Page 7 Page 57 Page 60 Page 50
089_PW_CHARGER
090_PW_PROTECTION Reset Circuit Skew Holes
091_PW_+NVVDD (1) Page 32 Page 65
092_PW_
093_PW_+FBVDDQ
094_PW_
095_PW_
096_PW_
097_PW_
098_PW_
099_PW_FLOW CHART
100_Power On Timing--AC mode

101_Power On Timing--DC mode
102_History
BOM
Project Name Rev
X542UN/URV R1.0
Title : Block Diagram

Size
Custom
Dept.: NB2_RD1_EE1 Engineer: Andy_Tang
Date: Tuesday, June 20, 2017 Sheet 1 of 102
vinafix.com
VINAFIX.COM
Power on Int.& Ext Power on Int.& Ext

PCH_IBEX GPIO Default States Pull up / down Power PCH_IBEX GPIO Default States Pull up / down Power EC Pin Name Config Signal Name Default status Ext Pull up / down Power
PCH_CPT Use As Signal Name Use As Signal Name
Design IP Source:
RC_IN# EXT PU 10K N/A IT8995 GPA0 O PWR_LED
GPIO GPP_A0 Native1 +3VS PU at EC GPP_D23 GPO
GPIO
LOW
GPP_A1 Native1 LPC_AD0 GPP_E0 GPO N/A GPA1 OD CHG_LED# HIGH EXT 10K PU +3VA_EC
SM_BUS ADDRESS :
GPP_A2 Native1 LPC_AD1 GPP_E1 GPO N/A GPA2 OD CHG_FULL_LED# HIGH EXT 10K PU +3VA_EC PCH Master
GPP_A3 Native1 LPC_AD2 For SSD GPP_E2 GPI MSATA_MPCIE_DET# EXT PU 10K +3VS GPA3 Alt FAN_PWM_GPU(N/A) LOW SM-Bus Device SM-Bus Address
REF: UX390 no PU
GPP_A4 Native1 LPC_AD3 GPP_E3 GPO N/A GPA4 O CLICK_WAKE#/WLAN_WAKE#_EC(N/A) LOW EXT 10K PU +3VA_EC
綠色:
新增function GPP_A5 Native1 LPC_FRAME# GPP_E4 GPO SATA0_DEVSLP HDD EXT PU 10K +3VS GPA5 Alt FAN0_PWM LOW
GPP_A6 Native1 INT_SERIRQ EXT PU 10K +3VS GPP_E5 GPO SATA1_PHYSLP NA EXT PU 10K +3VS GPA6 Alt KB_LED_PWM HIGH
紅色:
待再確認 GPP_A7 GPO NA GPP_E6 GPO SATA2_DEVSLP SSD EXT PU 10K +3VS GPA7 O OS_LED# (N/A) HIGH
GPP_A8 Native PM_CLKRUN# EXT PU 8.2K +3VS GPP_E7 GPO N/A GPB0 Alt AC_IN_OC# HIGH EXT 10K PU +3VA
藍色:
額外標示 GPP_A9 Native1 CLK_KBCPCI_PCH GPP_E8 NATIVE SATA_LED# EXT PU 10K +3VS GPB1 I LID_SW# HIGH EXT 10K PU +3VA
GPP_A10 Native CLK_DEBUG GPP_E9 NATIVE USB_OC_1_2# EXT PU 10K +3VSUS GPB2 OD (N/A) LOW EXT 10K PU +3VA_EC
灰色:
預留不上件 GPP_A11 GPO NA GPP_E10 GPI USB_OC_3_4# EXT PU 10K +3VSUS GPB3 I PWR_SW# HIGH EXT 10K PU +3VA
GPP_A12 GPO NA GPP_E11 GPI USB_OC_5_6# EXT PU 10K +3VSUS GPB4 O PS_ON HIGH EC Master (SMB1) SM-Bus Address
GPP_A13 Native1 SUSWARN# EXT PU 10K +3VSUS GPP_E12 GPI USB_OC_7_8# EXT PU 10K +3VSUS GPB5 O A20GATE (N/A) LOW EXT 10K PU +3VS SM-Bus Device
GPP_A14 Native1 PCH_SUS_STAT# GPP_E13 NATIVE DDPB_HPD_PCH EXT PD 100K PD at DDI to VGA GPB6 OD RC_IN# HIGH EXT 10K PU +3VS DIMM TEMP. 9Ah
GPP_A15 Native1 PCH_SUSACK# GPP_E14 NATIVE HDMI_HP EXT PU 1M +3VS PU at HDMI conn GPC0 O (N/A) LOW CPU Thermal Sensor 90h
GPP_A16 GPO NA GPP_E15 GPO EXT_SMI# EXT PU 10K +3VS GPC1 Alt SMB1_CLK LOW EXT 4.7K PU +3VA_EC
GPP_A17 GPO NA GPP_E16 GPI EXT_SCI# EXT PU 10K +3VS GPC2 Alt SMB1_DAT LOW EXT 4.7K PU +3VA_EC USB3 Port
GPP_A18 GPO NA GPP_E17 NATIVE EDP_HPD_CON EXT PD 100K PD at LVDS conn GPC3 O PM_PWRBTN# HIGH EXT 10K PU +3VSUS USB3_1 USB 3.0 Port 0
EXT PU 10K +3VS
GPP_A19 GPO NA GPP_E18 NATIVE DDPB_SCL_PCH EXT PU 10K +3VS GPC4 I DGPU_FB_CLAMP_GPIO HIGH EXT 10K PD USB3_2 USB 3.1 Type C
GPP_A20 GPO NA GPP_E19 NATIVE DDPB_SDA_PCH EXT PU 10K +3VS GPC5 I PM_SUSC# HIGH EXT 100K PD USB3_3 USB 3.1 Type C
GPP_A21 GPO NA GPP_E20 NATIVE DDPC_SCL_PCH EXT PU 2.2K +3VS PU at HDMI conn GPC6 Alt BAT1_IN_OC# HIGH EXT 10K PD
PCI Express
USB3_4 USB 3.0 Port 1
GPP_A22 GPO NA GPP_E21 NATIVE DDPC_SDA_PCH EXT PU 2.2K +3VS PU at HDMI conn GPC7 I (N/A) LOW PCIE 1
GPP_A23 GPO NA GPP_E22 GPO N/A GPD0 I PCH_SLP_S0# HIGH PCIE 2

DGPU
GPP_B0 Native VCCPRIM_VID0 NA EXT PU 10K +3VS GPP_E23 GPO N/A GPD1 O ME_AC_PRESENT LOW EXT 100K PU +3VA_DSW PCIE 3
GPP_B1 Native VCCPRIM_VID1 NA EXT PU 10K +3VS GPP_F0 GPO N/A GPD2 Alt BUF_PLT_RST# HIGH EXT 100K PD PCIE 4
GPP_B2 GPO NA GPP_F1 GPO N/A GPD3 OD EXT_SCI# HIGH EXT 10K PU +3VS PCIE 5 GLAN
GPP_B3 GPO NA GPP_F2 GPO N/A GPD4 OD EXT_SMI# HIGH EXT 10K PU +3VS PCIE 6 WLAN SATA Port
GPP_B4 GPO NA GPP_F3 GPO N/A GPD5 O OP_SD# HIGH SATA 0 HDD
GPP_B5 Native CK_REQ_P0# DGPU EXT PU 10K +3VS GPP_F4 GPO N/A GPD6 Alt FAN0_TACH LOW EXT 10K PU +3VS SATA 1 ODD / 2nd HDD
GPP_B6 Native CK_REQ_P1# NA EXT PU 10K +3VS GPP_F5 GPO N/A GPD7 Alt (N/A) LOW EXT 10K PU +3VS PCIE 9 SSD PCIE3
GPP_B7 Native CK_REQ_P2# NA EXT PU 10K +3VS GPP_F6 GPO N/A GPE0 O SUSB_EC# HIGH EXT 10K PD PCIE 10 SSD PCIE2
GPP_B8 Native CK_REQ_P3# NA EXT PU 10K +3VS GPP_F7 GPO N/A GPE1 O SUSC_EC# HIGH EXT 10K PD PCIE 11 SSD PCIE1
GPP_B9 Native CK_REQ_P4# GLAN EXT PU 10K +3VS GPP_F8 GPO N/A GPE2 O 1.2V_ON
LOW PCIE 12 SSD PCIE0 SATA 2 SSD SATA
GPP_B10 Native CK_REQ_P5# WLAN EXT PU 10K +3VS GPP_F9 GPO N/A GPE3 O (N/A) HIGH
GPP_B11 Native MPHY_PWREN NA EXT PU 20K
Check PU can be removed?
+3VSUS GPP_F10 GPO N/A GPE4 O (N/A) HIGH
PCI CLK
GPP_B12 Native PCH_SLP_S0# GPP_F11 GPO N/A GPE5 I PM_SUSB# LOW EXT 100K PD
CLK0 DGPUx4
GPP_B13 Native PLT_RST# GPP_F12 GPO N/A GPE6 OD CAP_LED# HIGH
CLK1 SSD
GPP_B14 GPO NA GPP_F13 GPO N/A GPE7 OD THRO_CPU# HIGH EXT 1K PU +VCCSTG
CLK2
For FingerPrint GPP_B15 GPO FP_GSPI0_CS# EXT PU 49.9K +3VS GPP_F14 GPO N/A GPF0 O 5VSUS_ON LOW EXT 10K PU/ 1M PD +3VA_EC
CLK3
For FingerPrint GPP_B16 GPO FP_GSPI0_CLK EXT PU 49.9K +3VS GPP_F15 GPO N/A GPF1 O VSUS_ON LOW EXT 100K PU +3VA_EC
CLK4 LAN
For FingerPrint GPP_B17 GPO FP_GSPI0_MISO EXT PU 10K +3VS GPP_F16 GPO N/A GPF2 Alt SMB0_CLK HIGH EXT 4.7K PU +3VA_EC
CLK5 WLAN
For FingerPrint GPP_B18 GPI FP_GSPI0_MOSI EXT PU 10K +3VS GPP_F17 GPO N/A GPF3 Alt SMB0_DATA HIGH EXT 4.7K PU +3VA_EC
GPP_B19 GPO BT_ON/OFF# GPP_F18 GPO N/A GPF4 Alt TP_CLK HIGH EXT 4.7K PU +3VS
GPP_B20 GPO GPU_EVENT# EXT PU 10K +3VSG GPP_F19 GPO N/A GPF5 Alt TP_DAT HIGH EXT 4.7K PU +3VS
EXT PD 10K USB Port

GPP_B21 GPI DGPU_FB_CLAMP_GPIO
EXT PU 10K +3VSG
PD at DGPU GPP_F20 GPO N/A GPF6 Alt PECI_EC LOW
USB 1 USB 2.0 Port USB 3.0 Port 0
GPP_B22 GPO NA GPP_F21 GPO N/A GPF7 O PCH_SPI_OV LOW
USB 2 USB 2.0 Port USB 3.1 Type C
GPP_B23 Native SML1ALERT# EXT PU 150K +3VSUS GPP_F22 GPO N/A GPG0 O DGPU_LIMIT LOW
USB 3 USB 2.0 Port USB 3.0 Port 1
GPP_C0 Native SMB_CK DIMM & TP EXT PU 2.2K +3VSUS GPP_F23 GPO N/A GPG1 O PCH_SUSACK# HIGH
USB 4 USB 2.0 Port USB 2.0
GPP_C1 Native SMB_DATA DIMM & TP EXT PU 2.2K +3VSUS GPP_G0 GPO SDIO_CMD N/A GPG2 I PWRLIMIT_EC# HIGH EXT 100K PU +3VA_EC
USB 5
GPP_C2 GPO NA GPP_G1 GPO SDIO_D0 N/A GPG6 O (N/A)
LOW
USB 6 CAMERA
GPP_C3 Native SML0_CK EXT PU 2.2K +3VSUS GPP_G2 GPO SDIO_D1 N/A GPH0 Alt PM_CLKRUN# HIGH EXT 8.2K PU +3VS
USB 7 CARD READER
GPP_C4 Native SML0_DATA EXT PU 2.2K +3VSUS GPP_G3 GPO SDIO_D2 N/A GPH1 Alt SMB3_CLK N/A HIGH
USB 8 WLAN/BT
GPP_C5 GPO NA GPP_G4 GPO SDIO_D3 N/A GPH2 Alt SMB3_DAT N/A HIGH
USB 9
GPP_C6 Native SML1_CK EXT PU 2.2K +3VSUS GPP_G5 GPO SDIO_CD# N/A GPH3 O PM_RSMRST# HIGH EXT 10K PD
USB 10
GPP_C7 Native SML1_DATA EXT PU 2.2K +3VSUS GPP_G6 GPO SDIO_CLK N/A GPH4 O DPWROK_EC LOW EXT 10K PD
GPP_C8 GPO NA GPP_G7 GPO SDIO_WP N/A GPH5 O PM_PWROK

LOW EXT 100K PD
GPP_C9 GPO NA GPD0 Native PM_BATLOW_R# EXT PU 8.2K +3VA_DSW GPH6 O PM_SYSPWROK
LOW EXT 10K PD Device Identification
GPP_C10 GPO NA GPD1 Native ME_AC_PRESENT_PCH EXT PU 100K +3VA_DSW GPH7 O LCD_BACKOFF# HIGH CPU Thermal Senser
GPP_C11 GPO NA GPD2 GPI PCH_GPD2# EXT PU 10K +3VA_DSW GPI0 I PM_SLP_SUS# HIGH EXT 10K PU/ 100K PD +3VA_EC 1st 06G023123010 NCT7717U
GPP_C12 GPI DIMM_SEL0 EXT PU 10K +3VSUS GPD3 Native PM_PWRBTN# EXT PU 10K +3VSUS GPI1 I 3VSUS_PWRGD LOW 2nd
GPP_C13 GPI DIMM_SEL1 EXT PU 10K +3VSUS GPD4 Native PM_SUSB# EXT PD 100K PD at EC GPI2 I ALL_SYSTEM_PWRGD LOW EXT 10K PU +3VS
GPP_C14 GPI DIMM_SEL2 EXT PU 10K +3VSUS GPD5 Native PM_SUSC# EXT PD 100K PD at EC GPI3 I IMVP8_PWRGD LOW EXT 10K PU +3VS
GPP_C15 GPO NA GPD6 Native PM_SLP_A_R# N/A GPI4 I 3VA_DSW_PWRGD LOW EXT 100K PU +3VA_DSW
GPP_C16 GPO NA GPD7 GPO WLAN_ON# EXT PU 10K +3VA_DSW GPI5 I ME_SusPwrDnAck_EC LOW
GPP_C17 GPO NA GPD8 Native SUS_CK EXT PD 1K GPI6 Alt A/D_MAX_POWER LOW EXT 0 PD
GPP_C18 Native I2C1_SDA_TCH_PAD EXT PU 4.7K +3VS GPD9 Native PCH_SLP_WLAN# N/A GPI7 Alt MB_MAX_POWER LOW EXT 100K PU/93.1K PD +3VACC
GPP_C19 Native I2C1_SCL_TCH_PAD EXT PU 4.7K +3VS GPD10 Native SLP_S5# N/A GPJ0 I EC_WAKE_SCI N/A
LOW
GPP_C20 GPI DGPU_PWROK EXT PU 10K +3VS PU at DGPU GPD11 Native LAN_PWREN N/A GPJ1 O 3VADSW_ON EXT 100K PU +3VA_EC
LOW
GPP_C21 GPO GPU_RST# EXT PD 10K For Smart Amp. GPJ2 Alt REST_AMP# LOW
EXT PU 10K +3VS
GPP_C22 GPO DGPU_PWR_EN# EXT PU 10K +3VSUS GPJ3 O PCH_SUS_STAT# N/A LOW
GPP_C23 GPO N/A EXT PU 10K +3VS For Smart Amp. GPJ4 Alt AMP_SLEEP#
LOW
GPP_D0 GPO N/A GPJ5 I EC_GPJ5 N/A LOW
GPP_D1 GPO N/A GPJ6 I N/A LOW +3VS
GPP_D2 GPO N/A GPJ7 O N/A HIGH

GPP_D3 GPO N/A
GPP_D4 GPO N/A
GPP_D5 GPO SATA_ODD_PWRGT EXT PU 10K +3VS PU at ODD

GPP_D6 GPI SATA_ODD_DA# EXT PU 10K +3VS *1: EC config GPI; Function output
For FingerPrint GPP_D7 GPI FP_RST# EXT PU 10K +3VS
For FingerPrint GPP_D8 GPO FP_INT# EXT PU 10K +3VS
GPP_D9 GPI PCB_ID0 EXT PD 10K
EXT PU 10K +3VS
PCB_ID1 EXT PD 10K
GPP_D10 GPI EXT PU 10K +3VS
GPP_D11 GPO N/A
GPP_D12 GPO N/A
GPP_D13 GPI TOUCHPAD_INTR# EXT PU 10K +3VS

GPP_D14 GPO WLAN_LED_R EXT PD 10K at LED
EXT PU 10K +3VSUS
GPP_D15 GPO N/A
GPP_D16 GPO N/A
GPP_D17 GPO N/A
GPP_D18 GPO N/A
GPP_D19 GPO N/A
GPP_D20 GPO N/A

BOM
GPP_D21 GPO N/A
Project Name Rev
GPP_D22 GPO N/A
X542UN/URV R1.0
Title : System Setting

Size
D
vinafix.com
Main Board
VINAFIX.COM
Intel Version ASUS P/N

Display Port
pre-ES
A EDP
B VGA
C HDMI
U0301A
E55 C47
47 VGA_LANE0_DN DDI1_TXN[0] EDP_TXN[0] EDP_TXN0 45
F55 C46
47 VGA_LANE0_DP DDI1_TXP[0] EDP_TXP[0] EDP_TXP0 45
E58 D46
47 VGA_LANE1_DN DDI1_TXN[1] EDP_TXN[1] EDP_TXN1 45
F58 C45
47 VGA_LANE1_DP DDI1_TXP[1] EDP_TXP[1] EDP_TXP1 45
F53 A45
DDI1_TXN[2] EDP_TXN[2] EDP_TXN2 45
G53 B45
DDI1_TXP[2] EDP_TXP[2] EDP_TXP2 45
F56 A47
DDI1_TXN[3] EDP_TXN[3] EDP_TXN3 45
G56 B47
DDI1_TXP[3] EDP_TXP[3] EDP_TXP3 45
C50 E45
48 HDMI_DATA2N_PCH DDI2_TXN[0] DDI EDP
EDP_AUXN EDP_AUXN 45
D50 F45
48 HDMI_DATA2P_PCH DDI2_TXP[0] EDP_AUXP EDP_AUXP 45
C52
48 HDMI_DATA1N_PCH DDI2_TXN[1]
D52 B52 R0302 @ 0Ohm
48 HDMI_DATA1P_PCH DDI2_TXP[1] EDP_DISP_UTIL
A50 DP_UTIL 1 2
48 HDMI_DATA0N_PCH DDI2_TXN[2] +3VS
B50 G50
48 HDMI_DATA0P_PCH DDI2_TXP[2] DDI1_AUXN DDPB_AUXN_PCH 47
D51 F50
48 HDMI_CLKN_PCH DDI2_TXN[3] DDI1_AUXP DDPB_AUXP_PCH 47
C51 E48
48 HDMI_CLKP_PCH DDI2_TXP[3] DDI2_AUXN T0301
F48 DDI2_AUX_DN 1
DDI2_AUXP T0302
G46 DDI2_AUX_DP 1 R0303 @ 10KOhm
DISPLAY SIDEBANDS DDI3_AUXN eDP_HDP
F46 EDP_HPD_CON R0305 1 2 10KOhm
DDI3_AUXP
L13 EXT_SMI# R0306 1 2 10KOhm
GPP_E18/DDPB_CTRLCLK
DDPB_SCL_PCH L12 L9 EXT_SCI#_X1 1 2
GPP_E19/DDPB_CTRLDATA GPP_E13/DDPB_HPD0 DDPB_HPD_PCH 47
DDPB_SDA_PCH L7 R0304 10KOhm
GPP_E14/DDPC_HPD1 HDMI_HP 48
N7 L6 DDPB_SCL_PCH R0307 1 2 10KOhm
48 DDPC_SCL_PCH GPP_E20/DDPC_CTRLCLK GPP_E15/DDPD_HPD2 EXT_SMI# 30 VGA
N8 N9 EXT_SMI# SL0304 1 2 DDPB_SDA_PCH 1 2
48 DDPC_SDA_PCH GPP_E21/DDPC_CTRLDATA GPP_E16/DDPE_HPD3 0402 EXT_SCI# 30
L10 EXT_SCI#_X1
GPP_E17/EDP_HPD EDP_HPD_CON 45
N11 EDP_HPD_CON
PDG#543016 DDI1 mapping DDPB GPP_E22/DDPD_CTRLCLK
N12 R12 SL0301 1 2
DDI2 mapping DDPC GPP_E23/DDPD_CTRLDATA EDP_BKLTEN 0402 L_BKLT_EN 45
R11 LCD_BACKEN_PCH_X1 SL0302 1 2
EDP_BKLTCTL 0402 EDP_BRIGHTNESS 45
E52 U13 L_BKLTCTL_PCH_X1 SL0303 1 2
EDP_RCOMP EDP_VDDEN 0402 L_VDDEN_PCH 45
EDP_COMP L_VDDEN_PCH_X1
SKL-ULT
+VCCIO_CPU
2
R0301
24.9Ohm
1%
1
EDP_COMP
COMPENSATION PU FOR DP
BOM
Project Name Rev
X542UA/UV R2.0
Title : CPU_DISPLAY
Size
Dept.: NB2_RD1_EE1 Engineer: Joach_Wang
Custom
vinafix.com
VINAFIX.COM Main Board
512M x 8bit x 8
For On Board (A) For SO-DIMM (B)
U0301C
U0301B
16 M_A_DQ[63:0] 17 M_B_DQ[63:0]
IL/NIL
AU53 AF65 AN45
DDR0_CKN[0] M_A_CLK_DDR#0 16 DDR1_DQ[0]/DDR0_DQ[16] DDR1_CKN[0] M_B_CLK_DDR#0 17
AL71 AT53 M_B_DQ0 AF64 AN46
DDR0_DQ[0] DDR0_CKP[0] M_A_CLK_DDR0 16 DDR1_DQ[1]/DDR0_DQ[17] DDR1_CKN[1] M_B_CLK_DDR#1 17
M_A_DQ0 AL68 AU55 M_B_DQ1 AK65 AP45
DDR0_DQ[1] DDR0_CKN[1] M_A_CLK_DDR#1 16 DDR1_DQ[2]/DDR0_DQ[18] DDR1_CKP[0] M_B_CLK_DDR0 17
M_A_DQ1 AN68 AT55 M_B_DQ2 AK64 AP46
DDR0_DQ[2] DDR0_CKP[1] M_A_CLK_DDR1 16 DDR1_DQ[3]/DDR0_DQ[19] DDR1_CKP[1] M_B_CLK_DDR1 17
M_A_DQ2 AN69 M_B_DQ3 AF66
DDR0_DQ[3] DDR1_DQ[4]/DDR0_DQ[20]
M_A_DQ3 AL70 BA56 M_B_DQ4 AF67 AN56
DDR0_DQ[4] DDR0_CKE[0] M_A_CKE0 16 DDR1_DQ[5]/DDR0_DQ[21] DDR1_CKE[0] M_B_CKE0 17
M_A_DQ4 AL69 BB56 M_A_CKE0 M_B_DQ5 AK67 AP55 M_B_CKE0
DDR0_DQ[5] DDR0_CKE[1] M_A_CKE1 16 DDR1_DQ[6]/DDR0_DQ[22] DDR1_CKE[1] M_B_CKE1 17
M_A_DQ5 AN70 AW56 M_A_CKE1 1 T0403 M_B_DQ6 AK66 AN55 M_B_CKE1 1 T0401
DDR0_DQ[6] DDR0_CKE[2] DDR1_DQ[7]/DDR0_DQ[23] DDR1_CKE[2]
M_A_DQ6 AN71 AY56 M_A_CKE2 1 T0402 M_B_DQ7 AF70 AP53 M_B_CKE2 1 T0404
DDR0_DQ[7] DDR0_CKE[3] DDR1_DQ[8]/DDR0_DQ[24] DDR1_CKE[3]
M_A_DQ7 AR70 M_A_CKE3 M_B_DQ8 AF68 M_B_CKE3
M_A_DQ8 AR68 AU45 M_B_DQ9 AH71 BB42
DDR0_DQ[9] DDR0_CS#[0] M_A_CS#0 16 DDR1_DQ[10]/DDR0_DQ[26] DDR1_CS#[0] M_B_CS#0 17
M_A_DQ9 AU71 AU43 M_B_DQ10 AH68 AY42
DDR0_DQ[10] DDR0_CS#[1] M_A_CS#1 16 DDR1_DQ[11]/DDR0_DQ[27] DDR1_CS#[1] M_B_CS#1 17
M_A_DQ10 AU68 AT45 M_B_DQ11 AF71 BA42
DDR0_DQ[11] DDR0_ODT[0] M_A_ODT0 16 DDR1_DQ[12]/DDR0_DQ[28] DDR1_ODT[0] M_B_ODT0 17
M_A_DQ11 AR71 AT43 M_B_DQ12 AF69 AW42
DDR0_DQ[12] DDR0_ODT[1] M_A_ODT1 16 DDR1_DQ[13]/DDR0_DQ[29] DDR1_ODT[1] M_B_ODT1 17
M_A_DQ12 AR69 DDR3L/LPDDR3/DDR4 M_B_DQ13 AH70 DDR3L/LPDDR3/DDR4
M_A_DQ13 AU70 BA51 M_B_DQ14 AH69 AY48
DDR0_DQ[14] DDR0_MA[5] /DDR0_CAA[0]/DDR0_MA[5] M_A_A[13:0] 16 DDR1_DQ[15]/DDR0_DQ[31] DDR1_MA[5] /DDR1_CAA[0]/DDR1_MA[5]
M_A_DQ14 AU69 BB54 M_A_A5 M_B_DQ15 AT66 AP50 M_B_A5
DDR0_DQ[15] DDR0_MA[9] /DDR0_CAA[1]/DDR0_MA[9] DDR1_DQ[16]/DDR0_DQ[48] DDR1_MA[9] /DDR1_CAA[1]/DDR1_MA[9]
M_A_DQ15 BB65 BA52 M_A_A9 M_A_A0 M_B_DQ16 AU66 BA48 M_B_A9
DDR0_DQ[16]/DDR0_DQ[32] DDR0_MA[6] /DDR0_CAA[2]/DDR0_MA[6] DDR1_DQ[17]/DDR0_DQ[49] DDR1_MA[6] /DDR1_CAA[2]/DDR1_MA[6]
M_A_DQ16 AW65 AY52 M_A_A6 M_A_A1 M_B_DQ17 AP65 BB48 M_B_A6
M_A_DQ17 AW63 AW52 M_A_A8 M_A_A2 M_B_DQ18 AN65 AP48 M_B_A8
DDR0_DQ[18]/DDR0_DQ[34] DDR0_MA[7] /DDR0_CAA[4]/DDR0_MA[7] DDR1_DQ[19]/DDR0_DQ[51] DDR1_MA[7] /DDR1_CAA[4]/DDR1_MA[7] M_B_A[13:0] 17
M_A_DQ18 AY63 AY55 M_A_A7 M_A_A3 M_B_DQ19 AN66 AP52 M_B_A7
DDR0_DQ[19]/DDR0_DQ[35] DDR0_BA[2] /DDR0_CAA[5]/DDR0_BG[0] M_A_BG0 16 DDR1_DQ[20]/DDR0_DQ[52] DDR1_BA[2] /DDR1_CAA[5]/DDR1_BG[0] M_B_BG0 17
M_A_DQ19 BA65 AW54 M_A_A4 M_B_DQ20 AP66 AN50 M_B_A0
M_A_DQ20 AY65 BA54 M_A_A12 M_A_A5 M_B_DQ21 AT65 AN48 M_B_A12 M_B_A1
M_A_DQ21 BA63 BA55 M_A_A11 M_A_A6 M_B_DQ22 AU65 AN53 M_B_A11 M_B_A2
DDR0_DQ[22]/DDR0_DQ[38] DDR0_MA[15] /DDR0_CAA[8]/DDR0_ACT# M_A_ACT# 16 DDR1_DQ[23]/DDR0_DQ[55] DDR1_MA[15] /DDR1_CAA[8]/DDR1_ACT# M_B_ACT# 17
M_A_DQ22 BB63 AY54 M_A_A7 M_B_DQ23 AT61 AN52 M_B_A3
DDR0_DQ[23]/DDR0_DQ[39] DDR0_MA[14] /DDR0_CAA[9]/DDR0_BG[1] M_A_BG1 16 DDR1_DQ[24]/DDR0_DQ[56] DDR1_MA[14] /DDR1_CAA[9]/DDR1_BG[1] M_B_BG1 17
M_A_DQ23 BA61 M_A_A8 M_B_DQ24 AU61 M_B_A4
DDR0_DQ[24]/DDR0_DQ[40] DDR1_DQ[25]/DDR0_DQ[57]
M_A_DQ24 AW61 AU46 M_A_A9 M_B_DQ25 AP60 BA43 M_B_A5
DDR0_DQ[25]/DDR0_DQ[41] DDR0_MA[13] /DDR0_CAB[0]/DDR0_MA[13] DDR1_DQ[26]/DDR0_DQ[58] DDR1_MA[13] /DDR1_CAB[0]/DDR1_MA[13]
M_A_DQ25 BB59 AU48 M_A_A13 M_A_A10 M_B_DQ26 AN60 AY43 M_B_A13 M_B_A6
DDR0_DQ[26]/DDR0_DQ[42] DDR0_CAS# /DDR0_CAB[1]/DDR0_MA[15] M_A_CAS# 16 DDR1_DQ[27]/DDR0_DQ[59] DDR1_CAS# /DDR1_CAB[1]/DDR1_MA[15] M_B_CAS# 17
M_A_DQ26 AW59 AT46 M_A_A11 M_B_DQ27 AN61 AY44 M_B_A7
DDR0_DQ[27]/DDR0_DQ[43] DDR0_WE# /DDR0_CAB[2]/DDR0_MA[14] M_A_WE# 16 DDR1_DQ[28]/DDR0_DQ[60] DDR1_WE# /DDR1_CAB[2]/DDR1_MA[14] M_B_WE# 17
M_A_DQ27 BB61 AU50 M_A_A12 M_B_DQ28 AP61 AW44 M_B_A8
DDR0_DQ[28]/DDR0_DQ[44] DDR0_RAS# /DDR0_CAB[3]/DDR0_MA[16] M_A_RAS# 16 DDR1_DQ[29]/DDR0_DQ[61] DDR1_RAS# /DDR1_CAB[3]/DDR1_MA[16] M_B_RAS# 17
M_A_DQ28 AY61 AU52 M_A_A13 M_B_DQ29 AT60 BB44 M_B_A9
DDR0_DQ[29]/DDR0_DQ[45] DDR0_BA[0] /DDR0_CAB[4]/DDR0_BA[0] M_A_BA0 16 DDR1_DQ[30]/DDR0_DQ[62] DDR1_BA[0] /DDR1_CAB[4]/DDR1_BA[0] M_B_BA0 17
M_A_DQ29 BA59 AY51 M_B_DQ30 AU60 AY47 M_B_A10
M_A_DQ30 AY59 AT48 M_A_A2 M_B_DQ31 AU40 BA44 M_B_A2 M_B_A11
DDR0_DQ[31]/DDR0_DQ[47] DDR0_BA[1] /DDR0_CAB[6]/DDR0_BA[1] M_A_BA1 16 DDR1_DQ[32]/DDR1_DQ[16] DDR1_BA[1] /DDR1_CAB[6]/DDR1_BA[1] M_B_BA1 17
M_A_DQ31 AY39 AT50 M_B_DQ32 AT40 AW46 M_B_A12
M_A_DQ32 AW39 BB50 M_A_A10 M_B_DQ33 AT37 AY46 M_B_A10 M_B_A13
M_A_DQ33 AY37 AY50 M_A_A1 M_B_DQ34 AU37 BA46 M_B_A1
M_A_DQ34 AW37 BA50 M_A_A0 M_B_DQ35 AR40 BB46 M_B_A0
DDR0_DQ[35]/DDR1_DQ[3] DDR0_MA[3] DDR1_DQ[36]/DDR1_DQ[20] DDR1_MA[3]
M_A_DQ35 BB39 BB52 M_A_A3 M_B_DQ36 AP40 BA47 M_B_A3
DDR0_DQ[36]/DDR1_DQ[4] DDR0_MA[4] DDR1_DQ[37]/DDR1_DQ[21] DDR1_MA[4]
M_A_DQ36 BA39 M_A_A4 M_B_DQ37 AP37 IL/NIL M_B_A4
DDR0_DQ[37]/DDR1_DQ[5] DDR1_DQ[38]/DDR1_DQ[22]
M_A_DQ37 BA37 AM70 M_B_DQ38 AR37 AH66
DDR0_DQ[38]/DDR1_DQ[6] DDR0_DQSN[0] DDR1_DQ[39]/DDR1_DQ[23] DDR1_DQSN[0]/DDR0_DQSN[2]
M_A_DQ38 BB37 AM69 M_A_DQS#0 M_B_DQ39 AT33 AH65 M_B_DQS#0
DDR0_DQ[39]/DDR1_DQ[7] DDR0_DQSP[0] M_A_DQS[7:0] 16 DDR1_DQ[40]/DDR1_DQ[24] DDR1_DQSP[0]/DDR0_DQSP[2] M_B_DQS[7:0] 17
M_A_DQ39 AY35 AT69 M_A_DQS0 M_B_DQ40 AU33 AG69 M_B_DQS0
DDR0_DQ[40]/DDR1_DQ[8] DDR0_DQSN[1] DDR1_DQ[41]/DDR1_DQ[25] DDR1_DQSN[1]/DDR0_DQSN[3]
M_A_DQ40 AW35 AT70 M_A_DQS#1 M_B_DQ41 AU30 AG70 M_B_DQS#1
DDR0_DQ[41]/DDR1_DQ[9] DDR0_DQSP[1] M_A_DQS#[7:0] 16 DDR1_DQ[42]/DDR1_DQ[26] DDR1_DQSP[1]/DDR0_DQSP[3] M_B_DQS#[7:0] 17
M_A_DQ41 AY33 BA64 M_A_DQS1 M_B_DQ42 AT30 AR66 M_B_DQS1
DDR0_DQ[42]/DDR1_DQ[10] DDR0_DQSN[2]/DDR0_DQSN[4] DDR1_DQ[43]/DDR1_DQ[27] DDR1_DQSN[2]/DDR0_DQSN[6]
M_A_DQ42 AW33 AY64 M_A_DQS#2 M_B_DQ43 AR33 AR65 M_B_DQS#2
DDR0_DQ[43]/DDR1_DQ[11] DDR0_DQSP[2]/DDR0_DQSP[4] DDR1_DQ[44]/DDR1_DQ[28] DDR1_DQSP[2]/DDR0_DQSP[6]
M_A_DQ43 BB35 AY60 M_A_DQS2 M_B_DQ44 AP33 AR61 M_B_DQS2
M_A_DQ44 BA35 BA60 M_A_DQS#3 M_B_DQ45 AR30 AR60 M_B_DQS#3
DDR0_DQ[45]/DDR1_DQ[13] DDR0_DQSP[3]/DDR0_DQSP[5] DDR1_DQ[46]/DDR1_DQ[30] DDR1_DQSP[3]/DDR0_DQSP[7]
M_A_DQ45 BA33 BA38 M_A_DQS3 M_B_DQ46 AP30 AT38 M_B_DQS3
M_A_DQ46 BB33 AY38 M_A_DQS#4 M_B_DQ47 AU27 AR38 M_B_DQS#4
DDR0_DQ[47]/DDR1_DQ[15] DDR0_DQSP[4]/DDR1_DQSP[0] DDR1_DQ[48] DDR1_DQSP[4]/DDR1_DQSP[2]
M_A_DQ47 AY31 AY34 M_A_DQS4 M_B_DQ48 AT27 AT32 M_B_DQS4
DDR0_DQ[48]/DDR1_DQ[32] DDR0_DQSN[5]/DDR1_DQSN[1] DDR1_DQ[49] DDR1_DQSN[5]/DDR1_DQSN[3]
M_A_DQ48 AW31 BA34 M_A_DQS#5 M_B_DQ49 AT25 AR32 M_B_DQS#5
DDR0_DQ[49]/DDR1_DQ[33] DDR0_DQSP[5]/DDR1_DQSP[1] DDR1_DQ[50] DDR1_DQSP[5]/DDR1_DQSP[3]
M_A_DQ49 AY29 BA30 M_A_DQS5 M_B_DQ50 AU25 AR25 M_B_DQS5
DDR0_DQ[50]/DDR1_DQ[34] DDR0_DQSN[6]/DDR1_DQSN[4] DDR1_DQ[51] DDR1_DQSN[6]
M_A_DQ50 AW29 AY30 M_A_DQS#6 M_B_DQ51 AP27 AR27 M_B_DQS#6
DDR0_DQ[51]/DDR1_DQ[35] DDR0_DQSP[6]/DDR1_DQSP[4] DDR1_DQ[52] DDR1_DQSP[6]
M_A_DQ51 BB31 AY26 M_A_DQS6 M_B_DQ52 AN27 AR22 M_B_DQS6
DDR0_DQ[52]/DDR1_DQ[36] DDR0_DQSN[7]/DDR1_DQSN[5] DDR1_DQ[53] DDR1_DQSN[7]
M_A_DQ52 BA31 BA26 M_A_DQS#7 M_B_DQ53 AN25 AR21 M_B_DQS#7
DDR0_DQ[53]/DDR1_DQ[37] DDR0_DQSP[7]/DDR1_DQSP[5] DDR1_DQ[54] DDR1_DQSP[7]
M_A_DQ53 BA29 M_A_DQS7 M_B_DQ54 AP25 M_B_DQS7
DDR0_DQ[54]/DDR1_DQ[38] DDR1_DQ[55]
M_A_DQ54 BB29 IL/NIL AW50 M_B_DQ55 AT22 AN43
DDR0_DQ[55]/DDR1_DQ[39] DDR0_ALERT# M_A_ALERT# 16 DDR1_DQ[56] DDR1_ALERT# M_B_ALERT# 17
M_A_DQ55 AY27 AT52 M_B_DQ56 AU22 AP43
DDR0_DQ[56]/DDR1_DQ[40] DDR0_PAR M_A_PAR 16 DDR1_DQ[57] DDR1_PAR M_B_PAR 17
M_A_DQ56 AW27 M_B_DQ57 AU21 AT13
DDR0_DQ[57]/DDR1_DQ[41] DDR1_DQ[58] DRAM_RESET#
M_A_DQ57 AY25 AY67 M_B_DQ58 AT21 AR18 DRAMRST#
DDR0_DQ[58]/DDR1_DQ[42] DDR_VREF_CA SA_DIMM_VREFCA 18 DDR1_DQ[59] DDR_RCOMP[0]
M_A_DQ58 AW25 AY68 M_B_DQ59 AN22 AT18 SM_RCOMP_0
DDR0_DQ[59]/DDR1_DQ[43] DDR0_VREF_DQ DDR1_DQ[60] DDR_RCOMP[1]
M_A_DQ59 BB27 DDR CH - A BA67 M_B_DQ60 AP22 AU18 SM_RCOMP_1
DDR0_DQ[60]/DDR1_DQ[44] DDR1_VREF_DQ SB_DIMM_VREFCA 18 DDR1_DQ[61] DDR_RCOMP[2]
M_A_DQ60 BA27 M_B_DQ61 AP21 SM_RCOMP_2
DDR0_DQ[61]/DDR1_DQ[45] DDR1_DQ[62]
M_A_DQ61 BA25 AW67 M_B_DQ62 AN21 DDR CH - B
DDR0_DQ[62]/DDR1_DQ[46] DDR_VTT_CNTL DDR1_DQ[63]
M_A_DQ62 BB25 DDR_VTT_CTRL M_B_DQ63
DDR0_DQ[63]/DDR1_DQ[47]
M_A_DQ63
SKL-ULT
SKL-ULT IL/NIL REV=<REV>
REV=<REV>
+1.2V
DDR0_Vref_DQ - Not in use in DDR4, DDR4 COMPENSATION SIGNALS
DDR_VTT_CTRL: DDR1_Vref_DQ = DDR4_CA_ch1,
System Memory Power Gate Control: DDR_Vref_CA = DD4_CA_ch0
1
Disables the pla orm memory VTT regulator R0401
in C8 and deeper and S3. 470Ohm R0403 1 2 121Ohm 1%
Ref:544924_544924_Skylake_EDS_Vol_1_Rev0.9.pdf P.120 SL0401 1% SM_RCOMP_0
R0402 1 2 80.6Ohm 1%
2
1 2 SM_RCOMP_1
0402 DDR4_DRAMRST# 16,17 1 2
DRAMRST# R0406 100Ohm 1%
1
2016/10/11 X542UA_#32, Modify 0401 circuit follow X456U P14. U1405 C0401 EMI SM_RCOMP_2
2017/01/19 X542UA_#11, R0404 modify PU to +3VS & RES 200K 100PF/50V
/EMI PDG #543016 P.181
2
2017/02/06 X542UA_R1.1 #26, EMI solution
VTT Enable
+1.2V +3VS GND
1
1
SL0409 2 1 C0402 R0404

0402
DDR_VTT_CTRL 0.1UF/16V 200KOhm
U0401
2
1 NC 5
VCC
R0407 @ 0Ohm 2 A
1 2 DDR_PG_CTRL_RR 3 Y 4
GND DDR_PG_CTRL 86
74AUP1G07GW
BOM
Project Name Rev
X542UA/UV R2.0
Title : CPU_DDR3
Size
C
vinafix.com
Main Board
U0301E
SPI - FLASH
SMBUS, SMLINK TO DIMM / VGA / TP
R0503 1 2 15Ohm AV2 R7
28
28
28 SPI_CLK_SPI_2
SPI_SO_SPI_2
SPI_SI_SPI_2
R0510 1
R0509 1
2
2
15Ohm
15Ohm
SPI_CLK_SPI_2_X1
SPI_SO_SPI_2_X1
AW3
AV3
SPI0_CLK
SPI0_MISO
SPI0_MOSI
VINAFIX.COM GPP_C0/SMBCLK
GPP_C1/SMBDATA
GPP_C2/SMBALERT#
R8
R10
SMB_CK
SMB_DATA
R0539 1 2 15Ohm SPI_SI_SPI_2_X1 AW2
28 PCH_SPI_DQ2 SPI0_IO2
R0540 1 2 15Ohm PCH_SPI_DQ2_X1 AU4 R9
28 PCH_SPI_DQ3 SPI0_IO3 GPP_C3/SML0CLK
SL0501 1 2 PCH_SPI_DQ3_X1 AU3 W2 SML0_CK
28 SPI_CS#0_SPI_2 0402 SPI0_CS0# GPP_C4/SML0DATA
SPI_CS#0_SPI_2_X1 AU2 W1 SML0_DATA
SPI0_CS1# GPP_C5/SML0ALERT#
2017/02/02 X542UA_R1.1 #24, 0ohm modify to SL AU1
SPI0_CS2#
W3
GPP_C6/SML1CLK
V3 SML1_CK
SPI - TOUCH GPP_C7/SML1DATA
2016/10/20 X542UA_#50, Add SPI for FingerPrint AM7 SML1_DATA
GPP_B23/SML1ALERT#/PCHHOT#
M2 SML1ALERT#
GPP_D1/SPI1_CLK
M3
GPP_D2/SPI1_MISO
J4
GPP_D3/SPI1_MOSI
V1
GPP_D21/SPI1_IO2
V2
GPP_D22/SPI1_IO3
M1 LPC AY13
GPP_D0/SPI1_CS# GPP_A1/LAD0/ESPI_IO0 LPC_AD0 28,30
BA13
GPP_A2/LAD1/ESPI_IO1 LPC_AD1 28,30
BB13
C LINK GPP_A3/LAD2/ESPI_IO2 LPC_AD2 28,30
AY12
GPP_A4/LAD3/ESPI_IO3 LPC_AD3 28,30
T0502 1 G3 BA12
CL_CLK GPP_A5/LFRAME#/ESPI_CS# LPC_FRAME# 28,30
T0501 1 CL_CK G2 BA11
CL_DATA GPP_A14/SUS_STAT#/ESPI_RESET# T0506
T0503 1 CL_DATA G1 PCH_SUS_STAT# 1 2016/10/27 X542UA_R1.0 #53, Remove PCH_SUS_STAT# & reserve test point for measure
CL_RST#
CL_RST#
AW9 R0512 1 2 33Ohm
GPP_A9/CLKOUT_LPC0/ESPI_CLK CLK_KBCPCI_PCH 30
AW13 AY9 CLK_KBCPCI_PCH_X1 R0514 1 2 22Ohm
30 RC_IN# GPP_A0/RCIN# GPP_A10/CLKOUT_LPC1 CLK_DEBUG 28
AW11 CLK_TPMPCI_PCH_X1
GPP_A8/CLKRUN# PM_CLKRUN# 30
AY11 PM_CLKRUN#
30 INT_SERIRQ GPP_A6/SERIRQ
INT_SERIRQ
SKL-ULT
REV=<REV>
+3VSUS +3VS
+12VS
3
+3VS RN0504A RN0504B
3
RN0503A RN0503B 2.2KOhm 2.2KOhm
2.2KOhm 2.2KOhm
R0522 8.2KOhm
2 1 PM_CLKRUN#
4
2
4
R0519 1 2 10KOhm
2
INT_SERIRQ
SMB_CK_S3 16,17,47
SMB_CK SMB_CK_S3
6 1
Q0501A
EM6K1-G-T2R
+3VSUS TO DIMM / VGA
5
R0508 1 2 150KOHM
SMB_DATA_S3 16,17,47
SML1ALERT# SMB_DATA 3 4 SMB_DATA_S3
RN0501B 3 4
2.2KOhm Q0501B
SML1_CK
RN0501A 1 2 EM6K1-G-T2R
2.2KOhm
SML1_DATA
RN0502B 3 4
2.2KOhm
SML0_CK
RN0502A 1 2
2.2KOhm
SML0_DATA
2016/10/27 X542UA_#58, Remove GPP_C2/GPP_C5 & remove R0506/R0507
Transport Layer Security (TLS) Confidentiality
GPP_C5: weak internal pull down GPP_C2: weak internal pull down BOM
Project Name Rev

PU SPI BUS PU Enable
X542UA/UV R2.0
Disable Intel ME TLS ipher suite
PD LPC is selected for EC (Default) PD ( no confodentiality)(Default) Title : CPU_LPC,SPI,SMB,CLINK
Size
Custom
vinafix.com
VINAFIX.COM +VCCGT +VCCGT +1.2V
U0301M +VCCIO_CPU
+VCCCORE +VCCCORE +1.2V U0301N
CPU POWER 2 OF 4
+1.0V_VCCST C PU POWER 3 OF 4
N70
VCCGT56
U0301L R1.0-3 A48 N71 SL0610 1 2 AU23 AK28
VCCGT1 VCCGT57 0603 VDDQ_AU23 VCCIO1
U42_CORE_2_U22_GT A53 R63 +VDDQ_CPU_CLK AU28 AK30
CPU POWER 1 OF 4 VCCGT2 VCCGT58 VDDQ_AU28 VCCIO2
1
U42_CORE_2_U22_GT A58 R64 AU35 AL30
VCCGT3 VCCGT59 VDDQ_AU35 VCCIO3
2
A30 G32 A62 R65 C0615 AU42 AL42
VCC_A30 VCC_G32 VCCGT4 VCCGT60 VDDQ_AU42 VCCIO4
A34 G33 R0606 A66 R66 BB23 AM28
VCC_A34 VCC_G33 SVID DATA VCCGT5 VCCGT61 10UF/6.3V VDDQ_BB23 VCCIO5
2
A39 G35 100Ohm AA63 R67 BB32 AM30
VCC_A39 VCC_G35 VCCGT6 VCCGT62 VDDQ_BB32 VCCIO6
A44 G37 AA64 R68 BB41 AM42 +VCCSA
VCC_A44 VCC_G37 VCCGT7 VCCGT63 VDDQ_BB41 VCCIO7
AK33 G38 1% AA66 R69 BB47
VCC_AK33 VCC_G38 VCCGT8 VCCGT64 VDDQ_BB47
1
AK35 G40 AA67 R70 BB51 AK23
VCC_AK35 VCC_G40 VCCGT9 VCCGT65 VDDQ_BB51 VCCSA1
AK37 G42 AA69 R71 AK25
VCC_AK37 VCC_G42 VCCGT10 VCCGT66 VCCSA2
AK38 J30 SL0609 1 2 AA70 T62 +1.0V_VCCST G23
VCC_AK38 VCC_J30 0402 P_SVID_DATA_50OHM_X2 80 VCCGT11 VCCGT67 VCCSA3
AK40 J33 P_SVID_DATA_X3 AA71 U65 AM40 G25
VCC_AK40 VCC_J33 VCCGT12 VCCGT68 VDDQC VCCSA4
AL33 J37 AC64 U68 +VDDQ_CPU_CLK G27
VCC_AL33 VCC_J37 VCCGT13 VCCGT69 VCCSA5
AL37
VCC_AL37 VCC_J40
J40
20151230 LAUOYUT 此3組訊號請將 SVID ALERT 擺中間 AC65
VCCGT14 VCCGT70
U71 +VCCSTG A18
VCCST VCCSA6
G28
AL40 K33 AC66 W63 J22
VCC_AL40 VCC_K33 VCCGT15 VCCGT71 VCCSA7
AM32 K35 +1.0V_VCCST AC67 W64 +1.2V +VCCPLL_OC A22 J23
VCC_AM32 VCC_K35 VCCGT16 VCCGT72 VCCSTG_A22 VCCSA8
AM33 K37 AC68 W65 J27
VCC_AM33 VCC_K37 VCCGT17 VCCGT73 VCCSA9
AM35 K38 AC69 W66 R0633 1 @ 2 0Ohm AL23 K23
VCC_AM35 VCC_K38 VCCGT18 VCCGT74 VCCPLL_OC VCCSA10
AM37 K40 AC70 W67 nbs_r0603_h24_000s +1.0V_VCCPLL K25
VCC_AM37 VCC_K40 VCCGT19 VCCGT75 VCCSA11
2
AM38 K42 AC71 W68 K20 K27
VCC_AM38 VCC_K42 VCCGT20 VCCGT76 VCCPLL_K20 VCCSA12
1
G30 K43 R0605 J43 W69 C0663 K21 K28
VCC_G30 VCC_K43 SVID ALERT 56Ohm U42_CORE_2_U22_GT J45
VCCGT21
VCCGT22
VCCGT77
VCCGT78
W70
VCCPLL_K21 VCCSA13
VCCSA14
K30
K32 E32 U42_CORE_2_U22_GT J46 W71 1UF/6.3V
RSVD_K32 VCC_SENSE P_VCCCORE_VCCSENSE_50OHM 80 VCCGT23 VCCGT79
2
E33 U42_CORE_2_U22_GT J48 Y62 AM23
VSS_SENSE P_VCCCORE_VSSSENSE_50OHM 80 VCCGT24 VCCGT80 VCCIO_SENSE
1
AK32 U42_CORE_2_U22_GT J50 AM22
RSVD_AK32 VCCGT25 VSSIO_SENSE
B63 U42_CORE_2_U22_GT J52
VIDALERT# VCCGT26
AB62 A63 P_SVID_ALERT#_X3 R0604 1 2 220Ohm U42_CORE_2_U22_GT J53 AK42 H21
VCCOPC_AB62 VIDSCK P_SVID_ALERT#_50OHM_X2 80 VCCGT27 VCCGTX_AK42 VSSSA_SENSE P_VCCSA_VSSSENSE_50OHM 80
P62 D64 P_SVID_CLK_X3 +VCCSTG P_SVID_ALERT#_X3 J55 AK43 U42_CORE_1_U22_GTx H20
VCCOPC_P62 VIDSOUT VCCGT28 VCCGTX_AK43 VCCSA_SENSE P_VCCSA_VCCSENSE_50OHM 80
V62 P_SVID_DATA_X3 J56 AK45 U42_CORE_1_U22_GTx
VCCOPC_V62 VCCGT29 VCCGTX_AK45
G20 J58 AK46 U42_CORE_1_U22_GTx
VCCSTG_G20 VCCGT30 VCCGTX_AK46
H63 J60 REV=<REV> AK48 U42_CORE_1_U22_GTx SKL-ULT
VCC_OPC_1P8_H63 VCCGT31 VCCGTX_AK48
K48 AK50 U42_CORE_1_U22_GTx REV= <REV>
VCCGT32 VCCGTX_AK50
G61 U42_CORE_2_U22_GT K50 AK52 U42 & U22 無使用
U42_CORE_1_U22_GTx
U42_RSVD_U22_GTx,
VCC_OPC_1P8_G61 VCCGT33 VCCGTX_AK52
U42_CORE_2_U22_GT K52 AK53
AC63 REV=<REV>
VCCOPC_SENSE
SVID CLOCK U42_RSVD_U22_GT K53
VCCGT34
VCCGT35
VCCGTX_AK53
VCCGTX_AK55
AK55
AE63 K55 AK56
VSSOPC_SENSE VCCGT36 VCCGTX_AK56
K56 AK58
VCCGT37 VCCGTX_AK58
AE62 K58 AK60
VCCEOPIO_1 VCCGT38 VCCGTX_AK60
AG62 K60 AK70
VCCEOPIO_2 VCCGT39 VCCGTX_AK70
L62 AL43
VCCGT40 VCCGTX_AL43
AL63 SL0617 1 2 L63 AL46 U42_CORE_1_U22_GTx
VCCEOPIO_SENSE 0402 P_SVID_CLK_50OHM_X2 80 VCCGT41 VCCGTX_AL46
AJ62 P_SVID_CLK_X3 L64 AL50 U42_CORE_1_U22_GTx
VSSEOPIO_SENSE VCCGT42 VCCGTX_AL50
L65 AL53 U42_CORE_1_U22_GTx
VCCGT43 VCCGTX_AL53
L66 AL56
VCCGT44 VCCGTX_AL56
SKL-ULT L67 AL60
CPU W/OPC L68
VCCGT45
VCCGT46
VCCGTX_AL60
VCCGTX_AM48
AM48
L69 AM50 U42_CORE_1_U22_GTx
VCCGT47 VCCGTX_AM50
L70 AM52 U42_CORE_1_U22_GTx +1.2V
VCCGT48 VCCGTX_AM52
L71 AM53 U42_CORE_1_U22_GTx
M62
VCCGT49 VCCGTX_AM53
AM56 2A
CPU - VDDQ DECAPS- Place close to the package
VCCGT50 VCCGTX_AM56
N63 AM58
VCCGT51 VCCGTX_AM58
N64 AU58
VCCGT52 VCCGTX_AU58
N66 AU63
VCCGT53 VCCGTX_AU63
N67 BB57
VCCGT54 VCCGTX_BB57
N69 BB66
VCCGT55 VCCGTX_BB66
1
@ @ @
J70 AK62 C0662 C0618 C0603 C0606 C0614 C0658 C0648
80 P_VCCGT_VCCSENSE_50OHM VCCGT_SENSE VCCGTX_SENSE
J69 AL61 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V
VSSGT_SENSE VSSGTX_SENSE
2
80 P_VCCGT_VSSSENSE_50OHM nbs_c0603_h39_000s nbs_c0603_h39_000s nbs_c0603_h39_000s
2016/12/05 X542UA_R1.0 #96,VCORE sense & VCCGT sense modify
SKL-ULT
+VCCST
+VCCIO +VCCSTG +1.0V_VCCST +VCCST +1.0V_VCCPLL
SL0630 1 2 0.04A
CPU - VCCGT DECAPS- Underneath the package SL0634 1 2 120mA SL0602 1 2 120mA
0603 0603 0603
+VCCGT
1
31A 2+2 C0616 C0602
1UF/6.3V 1UF/6.3V
Volume Segment
2
+VCCIO is supplied +1.0VS (shared with +VCCSTG)
1
C0601 C0604 C0620 C0607 C0608 C0609 C0610 C0611 C0626 C0617 C0660 C0659
10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V
2
@ @ @ @ @ @ @ @ @
+VCCIO +VCCIO_CPU
CPU - VCCIO DECAPS- Place close to the package
1
C0628 C0629 C0630 C0631 C0632 C0652 C0643 C0654 C0636 C0666 C0638 SL0601 1 2 3.1A
0805
1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V
@ @ @ @ @ @ @ @ @ 1UF/6.3V 1UF/6.3V
1
2016/10/07 X542UA_R1.0 #27, Add R0601/R0602/R0607/R0608 for U42 & U22 Option C0605
2016/10/17 X542UA_R1.0 #47, Modify R0602/R0607/R0608 from 0603 to 0805 for intel suggestion SL0603 1 2 C0619 1UF/6.3V C0621 C0622
0805
2017/03/16 X542UA_R2.0 #01, JP0601/02/03/04 change to RSE R0607/08/09/10 (special RES) 1UF/6.3V @ 1UF/6.3V 1UF/6.3V
2
KBL-R U42 & U22 co-lay, 在CPU 下方
1
C0640 C0613 C0656 C0667
1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V
2
+VCCGT
/U22 1 pin
R0607 1 2 0Ohm
RES 0 OHM 1/2W(0805) JUMPER U42_RSVD_U22_GT
10114-00193000 +VCCSA
/U22
R0608 1 2 0Ohm
RES 0 OHM 1/2W(0805) JUMPER 5.1A CPU - VCCSA DECAPS- Underneath the package
10114-00193000 10 pin 2017/01/23 X542UA_R1.1 #19, VccSA Caps modify in list
+VCCCORE
U42_CORE_2_U22_GT
5A
/U42
R0609 1 2 0Ohm
RES 0 OHM 1/2W(0805) JUMPER
10114-00193000
/U42 12 pin
R0610 1 2 0Ohm
RES 0 OHM 1/2W(0805) JUMPER U42_CORE_1_U22_GTx
5A
10114-00193000
1
C0635 C0637 C0655 C0657
10UF/6.3V 1UF/6.3V 0.47UF/6.3V 1UF/6.3V
@
2
nbs_c0603_h37_000s
+VCCSA
CPU - VCCSA DECAPS- Place close to the package
JP鋼板測試, 共20顆 PR remove
1
C0639
22UF/6.3V
2
nbs_c0805_h57_000s
Simulation team suggestion

For X542U
+VCCSA
5.1A
@ @ @
1
C0612 C0624 C0627 C0634 C0642 C0644 C0645
2
1UF/6.3V 4.7UF/6.3V 10UF/6.3V 4.7UF/6.3V 4.7UF/6.3V 4.7UF/6.3V 4.7UF/6.3V
1
2
2
nbs_c0603_h37_000s
nbs_c0603_h37_000s
nbs_c0603_h37_000s
nbs_c0603_h37_000s
nbs_c0603_h37_000s
nbs_c0603_h37_000s
@ @
1
C0641 C0625 C0633 C0661 C0665 C0669 C0670 C0671
2
1UF/6.3V 2.2UF/10V 1UF/6.3V 4.7UF/6.3V 4.7UF/6.3V 4.7UF/6.3V 1UF/6.3V 0.47UF/6.3V
1
2
2
nbs_c0603_h37_000s
nbs_c0603_h37_000s
nbs_c0603_h37_000s
BOM
Project Name Rev
X542UA/UV R2.0
Title : CPU_POEWR
Size
D
vinafix.com
VINAFIX.COM Main Board
+1.0V_VCCST
U0301D
T0801 1 D63
CATERR#
H_CATERR# A54
30 PECI_EC PECI
PECI_EC C65 JTAG
PROCHOT#
R0802 1 1% 2 1KOhm H_PROCHOT_D# C63
THERMTRIP#
THERMTRIP# A65 B61
SKTOCC# PROC_TCK
CPU MISC D60 XDP_TCLK_CPU
PROC_TDI
C55 A61 XDP_TDI_CPU
BPM#[0] PROC_TDO
D55 C60 XDP_TDO_CPU
BPM#[1] PROC_TMS
T0803 1 B54 B59 XDP_TMS_CPU
BPM#[2] PROC_TRST#
T0804 1 XDP_BPM2 C56 XDP_TRST_CPU#
BPM#[3]
XDP_BPM3 B56 1 T0802
PCH_JTAG_TCK
A6 D59 PCH_JTAG_TCK
GPP_E3/CPU_GP0 PCH_JTAG_TDI
A7 A56 PCH_JTAG_TDI
GPP_E7/CPU_GP1 PCH_JTAG_TDO
BA5 C59 PCH_JTAG_TDO
GPP_B3/CPU_GP2 PCH_JTAG_TMS
AY5 C61 PCH_JTAG_TMS
GPP_B4/CPU_GP3 PCH_TRST#
A59 PCH_TRST#
JTAGX
AT16 XDP_TCK_JTAGX
PROC_POPIRCOMP
AU16
PCH_OPIRCOMP
H66
OPCE_RCOMP
H65
OPC_RCOMP
2 SKL-ULT
2
REV=<REV>
R0813 R0812 R0811 R0810 20160218 X541UV
49.9Ohm 49.9Ohm 49.9Ohm 49.9Ohm R0803,R0804,R0805,R0807,R0814,R0820,R0806 unstuff +VCCSTG
1% 1% 1% 1%
1
1
@ @
R0803 1 2 0Ohm R0820 1 2 51Ohm
XDP_TCLK_CPU XDP_TCK_JTAGX XDP_TDO_CPU
R0804 1 @ 2 0Ohm
XDP_TDI_CPU PCH_JTAG_TDI
@
R0805 1 @ 2 0Ohm R0806 1 2 51Ohm
XDP_TDO_CPU PCH_JTAG_TDO XDP_TCLK_CPU
R0807 1 @ 2 0Ohm
20150108 XDP_TMS_CPU PCH_JTAG_TMS
CPU SIDEBAND SIGNALS +VCCSTG

Checking
R0814 1 @ 2 0Ohm
SL0801~0803 near device side
XDP_TRST_CPU# PCH_TRST#
1
R0809
1KOhm OD
2
R0808
1 2 2 1 SL0802
0402 THRO_CPU# 30
H_PROCHOT_D# H_PROCHOT_D#_R
499OHM 2 1 SL0801
0402 IMVP8_VRHOT# 80
1
C0801 @ 2 1 SL0803
0402 PWRLIMIT#_CPU 89
43PF/50V
2
BOM
Project Name Rev
X542UA/UV R2.0
Title : CPU_MISC,JTAG,CLK
Size
B
vinafix.com
Main Board
VINAFIX.COM
U0301S U0301T
RESERVED SIGNALS-1 SPARE
E68 BB68 AW69 F6

CFG[0] RSVD_TP_BB68 RSVD_AW69 RSVD_F6
B67 BB69 AW68 E3
CFG[1] RSVD_TP_BB69 RSVD_AW68 RSVD_E3
D65 AU56 C11 XTAL24_IN_U42
CFG[2] RSVD_AU56 RSVD_C11
D67 AK13 AW48 B11
CFG[3] RSVD_TP_AK13 RSVD_AW48 RSVD_B11
E70 AK12 C7 A11
CFG[4] RSVD_TP_AK12 RSVD_C7 RSVD_A11
CFG4 C68 XTAL24_OUT_U42 U12 D12
CFG[5] RSVD_U12 RSVD_D12
D68 BB2 U11 C12
CFG[6] RSVD_BB2 RSVD_U11 RSVD_C12
C67 BA3 H11 F52
CFG[7] RSVD_BA3 RSVD_H11 RSVD_F52
1
F71
CFG[8]
G69 C0901 C0902
CFG[9]
F70 AU5 1UF/6.3V 1UF/6.3V
CFG[10] TP5
2
G68 AT5 @ @
CFG[11] TP6
H70 REV=<REV> REV=<REV>
SKL-ULT
CFG[12]
G71
CFG[13]
H69 D5
CFG[14] RSVD_D5
G70 D4
CFG[15] RSVD_D4
B2
RSVD_B2
E63 C2
CFG[16] RSVD_C2
F63 2016/10/05 X542UA_R1.0 #01, Add 24MHz parts for KBL-R U42
CFG[17]
B3
RSVD_B3
E66 A3
CFG[18] RSVD_A3
F66
CFG[19]
AW1 XTAL 24MHz
RSVD_AW1 C0903
E60 /U42
CFG_RCOMP
E1
RSVD_E1
E8 E2 XTAL24_IN_U42 1 2
ITP_PMODE RSVD_E2
3
X0901
27PF/50V
AY2 BA4 R0903 24Mhz
1
RSVD_AY2 RSVD_BA4
AY1 BB4 1MOhm
RSVD_AY1 RSVD_BB4
/U42 /U42 4
2
D1 A4
RSVD_D1 RSVD_A4
R0902 D3 C4 2
2
RSVD_D3 RSVD_C4
49.9Ohm 07009-00063100 C0904
1% K46 BB5 /U42
RSVD_K46 TP4
1
K45
RSVD_K45
1
A69 XTAL24_OUT_U42 1 2
RSVD_A69
AL25 B69
RSVD_AL25 RSVD_B69 27PF/50V
AL27 GND
RSVD_AL27
AY3
RSVD_AY3
C71
RSVD_C71
B70 D71
2nd source:
1
RSVD_B70 RSVD_D71
C70 SL0901
RSVD_C70 07009-00062000 (未測)
2040
F60
RSVD_F60 07009-00063200 (未測)
C54
RSVD_C54
A52 D54
2
RSVD_A52 RSVD_D54
BA70 AY4
RSVD_TP_BA70 TP1
BA68 BB3
RSVD_TP_BA68 TP2
J71 AY71
RSVD_J71 VSS_AY71
J68 AR56
RSVD_J68 ZVM#
1
F65 AW71 SL0902
2040
VSS_F65 RSVD_TP_AW71
G65 AW70
VSS_G65 RSVD_TP_AW70
F61 AP56 @ R0905
2
RSVD_F61 MSM#
E61 C64
RSVD_E61 PROC_SELECT# +1.0V_VCCST
1 2
100KOhm
SKL-ULT
CFG STRAPS
R0901 1 2 1KOhm
CFG4
1 0 NOTE
BOM
STALL RESET SEQUENCE Project Name Rev

AFTER PCU PLL LOCK
CFG0 NO STALL STALL UNTIL DE-ASSERTED X542UA/UV R2.0
Title : CPU_CFG,RSVD
Size
CFG4 DISABLE ENABLE eDP ENABLE Dept.: NB2_RD1_EE1 Engineer: Joach_Wang
Custom
vinafix.com
CPU - VCC DECAPS- Underneath the package Simulation team suggestion
For X542U
+VCCCORE
+VCCCORE
28A 2+2
VINAFIX.COM 5.1A
1
C1057 C1058 C1059 C1060 C1069
10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V
2
nbs_c0603_h37_000s
nbs_c0603_h37_000s
nbs_c0603_h37_000s
nbs_c0603_h37_000s
nbs_c0603_h37_000s
CAP above 22UF move to PWR page
1
C1070 C1071 C1073 C1074
10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V
2
nbs_c0603_h37_000s
nbs_c0603_h37_000s nbs_c0603_h37_000s
nbs_c0603_h37_000s
1
C1037 C1038
2.2UF/10V 2.2UF/10V
2
1
1
C1028 C1030 C1031 C1034 C1036
1UF/6.3V 1UF/6.3V 2.2UF/10V 2.2UF/10V 1UF/6.3V
@ @
2
2017/01/23 X542UA_R1.1 #20, VCCCORE Caps modify in list
CPU - VCC DECAPS- Place close to the package
+VCCCORE
CAP above 22UF move to PWR page
BOM
Project Name Rev
X542UA/UV R2.0
Title : CPU_POWER_CAP
Size
C
vinafix.com
VINAFIX.COM
<Variant Name>
Project Name Rev
X542UA/UV R2.0
Title : DDR4_TERMINATION_A
Size
C
Dept.: Engineer: Joach_Wang
vinafix.com
2016/11/23 X542UA_#86, Add SO-DIMM (ChA), remove P13, P14 & P15 DRAM
2016/12/05 X542UA_R1.0 #98, DDR SWAP

2016/12/07 X542UA_R1.0 #A3, DDR SWAP
M_A_DQ[63:0] 4
SWAP
+1.2V +VTT +2.5V +3VS
J1601A
137 8
4 M_A_CLK_DDR0 CK0_T DQ0 J1601B
4
4
4
M_A_CLK_DDR#0
M_A_CLK_DDR1
M_A_CLK_DDR#1
139
138
140
CK0_C
CK1_T
CK1_C
DQ1
DQ2
DQ3
7
20
21
M_A_DQ0
M_A_DQ1
M_A_DQ2
VINAFIX.COM
D0
20161205 swap 163
160
VDD19
VDD18
VTT
258
4 M_A_DQ3 159
DQ4 VDD17
109 3 M_A_DQ5 154 259
4 M_A_CKE0 CKE0 DQ5 VDD16 VPP2
110 16 M_A_DQ4 153 257
4 M_A_CKE1 CKE1 DQ6 VDD15 VPP1
17 M_A_DQ6 148
DQ7 VDD14
149 28 M_A_DQ7 147
4 M_A_CS#0 S0* DQ8 VDD13
157 29 M_A_DQ12 142
4 M_A_CS#1 S1* DQ9 VDD12 SL1604
41 M_A_DQ8 141
DQ10 VDD11
155 42 M_A_DQ10 20161205 swap 136 255 1 2 2017/02/02 X542UA_R1.1 #24, 0ohm modify to SL
4 M_A_ODT0 ODT0 DQ11 D1 VDD10 VDDSPD 0402
161 24 M_A_DQ14 135
4 M_A_ODT1 ODT1 DQ12 VDD9
1
25 M_A_DQ13 130 C1628 C1627
DQ13 VDD8
115 38 M_A_DQ9 129 0.1UF/10V 2.2UF/10V
4 M_A_BG0 BG0 DQ14 VDD7
113 37 M_A_DQ11 124
4 M_A_BG1 BG1 DQ15 VDD6
2
150 50 M_A_DQ15 123
4 M_A_BA0 BA0 DQ16 VDD5
145 49 M_A_DQ17 118
4 M_A_BA1 BA1 DQ17 VDD4
62 M_A_DQ21 117 GND GND
4 M_A_A[13:0] DQ18 VDD3
144 63 M_A_DQ16 112
A0 DQ19 D2 20161205 swap VDD2
M_A_A0 133 46 M_A_DQ23 111
A1 DQ20 VDD1
M_A_A1 132 45 M_A_DQ18
A2 DQ21
M_A_A2 131 58 M_A_DQ20
A3 DQ22
M_A_A3 128 59 M_A_DQ19 263 2017/02/02 X542UA_R1.1 #24, 0ohm modify to SL
A4 DQ23 NP_NC1
M_A_A4 126 70 M_A_DQ22 264 2017/03/16 X542UA_R2.0 #03, Modify SA0 to pull down
A5 DQ24 NP_NC2
M_A_A5 127 71 M_A_DQ28
A6 DQ25
M_A_A6 122 83 M_A_DQ29 261 +3VS +3VS +3VS
A7 DQ26 MT1
M_A_A7 125 84 M_A_DQ31 262
A8 DQ27 D3 20161205 swap MT2
M_A_A8 121 66 M_A_DQ25
A9 DQ28
M_A_A9 146 67 M_A_DQ24 251 252
A10_AP DQ29 VSS1 VSS48
2
M_A_A10 120 79 M_A_DQ27 247 248
A11 DQ30 VSS2 VSS49
M_A_A11 119 80 M_A_DQ30 243 244 R1601 R1609 R1602
A12 DQ31 VSS3 VSS50
M_A_A12 158 174 M_A_DQ26 239 238 @ @ @
A13 DQ32 VSS4 VSS51 0Ohm 0Ohm 0Ohm
+1.2V M_A_A13 151 173 M_A_DQ35 235 234
4 M_A_WE# A14_WE* DQ33 VSS5 VSS52
156 187 M_A_DQ37 231 230
4 M_A_CAS# A15_CAS* DQ34 VSS6 VSS53
1
152 186 M_A_DQ38 227 226
4 M_A_RAS# A16_RAS* DQ35 D4 20161205 swap VSS7 VSS54
2
170 M_A_DQ34 223 222 M_A_DIMM0_SA2
DQ36 VSS8 VSS55
169 M_A_DQ32 217 218 M_A_DIMM0_SA1
DQ37 VSS9 VSS56
R1605 114 183 M_A_DQ36 213 214 M_A_DIMM0_SA0
4 M_A_ACT# ACT* DQ38 VSS10 VSS57
M_A_VREFCA 240Ohm 182 M_A_DQ39 209 210
DQ39 VSS11 VSS58
143 195 M_A_DQ33 205 206
1 4 M_A_PAR PARITY DQ40 VSS12 VSS59
2
116 194 M_A_DQ56 201 202
4 M_A_ALERT# ALERT* DQ41 VSS13 VSS60
134 207 M_A_DQ60 197 196 SL1603 SL1602 SL1601
EVENT* DQ42 VSS14 VSS61
0402
0402
0402
M_A_DIMM0_EVENT# 108 208 M_A_DQ63 20161207 swap 193 192
4,17 DDR4_DRAMRST# RESET* DQ43 D7 VSS15 VSS62
191 M_A_DQ62 189 188
DQ44 VSS16 VSS63
164 190 M_A_DQ61 185 184
VREFCA DQ45 VSS17 VSS64
1
203 M_A_DQ57 181 180
DQ46 VSS18 VSS65
Place close to SO-DIMM
1
C1617 C1612 254 204 M_A_DQ58 175 176

5,17,47 SMB_DATA_S3 SDA DQ47 VSS19 VSS66
0.1UF/10V 2.2UF/10V 253 216 M_A_DQ59 171 172
5,17,47 SMB_CK_S3 SCL DQ48 VSS20 VSS67
215 M_A_DQ44 167 168 GND GND GND
DQ49 VSS21 VSS68
2
166 228 M_A_DQ45 107 106

SA2 DQ50 VSS22 VSS69
M_A_DIMM0_SA2 260 229 M_A_DQ47 20161207 swap 103 102 WRITE ADDRESS: 0X
SA1 DQ51 D5 VSS23 VSS70
GND GND M_A_DIMM0_SA1 256 211 M_A_DQ46 99 98
M_A_DIMM0_SA0 212 M_A_DQ41 93 94
DQ53 VSS25 VSS72
224 M_A_DQ40 89 90
Place close to SO-DIMM DQ54
225 M_A_DQ42 85
VSS26 VSS73
86
DQ55 VSS27 VSS74
92 237 M_A_DQ43 81 82
CB0_NC DQ56 VSS28 VSS75
91 236 M_A_DQ52 77 78
101 249 M_A_DQ48 73 72
105 250 M_A_DQ51 20161207 swap 69 68
CB3_NC DQ59 D6 VSS31 VSS78
88 232 M_A_DQ55 65 64
87 233 M_A_DQ53 61 60
100 245 M_A_DQ49 57 56
104 246 M_A_DQ54 51 52
M_A_DQ50 47 48
M_A_DQS[7:0] 4 VSS36 VSS83
+1.2V 12 13 43 44
DM0*/DBI0* DQS0_T VSS37 VSS84
33 34 M_A_DQS0 39 40
54 55 M_A_DQS1 20161207 swap 35 36 +VTT +2.5V
75 76 M_A_DQS2 31 30 nbs_c0603_h37_000s nbs_c0603_h37_000s
178 179 M_A_DQS3 27 26
199 200 M_A_DQS4 23 22
1
220 221 M_A_DQS7 19 18 C1622 C1607 C1615
241 242 M_A_DQS5 15 14 C1603 C1619 0.1UF/16V C1608 C1604 0.1UF/16V 0.1UF/16V
96 97 M_A_DQS6 9 10 10UF/6.3V 10UF/6.3V /EMI 10UF/6.3V 10UF/6.3V /EMI /EMI
2
5 6 @ @
M_A_DQS#[7:0] 4 VSS46 VSS93
11 1 2
DQS0_C VSS47 VSS94
32 M_A_DQS#0 GND GND GND GND GND GND GND
DQS1_C
53 M_A_DQS#1 20161207 swap DDR4_DIMM_260P nbs_c0603_h37_000s nbs_c0603_h37_000s
DQS2_C
74 M_A_DQS#2
DQS3_C Place close to SO-DIMM Socket Place close to SO-DIMM Socket
177 M_A_DQS#3
DQS4_C (+VTT Pin) (+VPP Pin)
198 M_A_DQS#4 GND GND
DQS5_C
219 M_A_DQS#7 2017/02/06 X542UA_R1.1 #26, EMI solution 2017/02/06 X542UA_R1.1 #26, EMI solution
DQS6_C
240 M_A_DQS#5
For ECC DQS7_C +1.2V
95 M_A_DQS#6
DQS8_C
T1601 1 162
S2*/C0
T1602 1 M_A_DIMM0_S2 165
S3*/C1
M_A_DIMM0_S3
DDR4_DIMM_260P
1
12002-00083500 + CE1601
330UF/2V
2nd source: 11020-0035Z000
2
12002-00082100 @
12002-00082000
GND Place close to SO-DIMM Socket (VDD Pin)
1
'EVENT_N': INDICATES THERMAL EVENT ON DIMM.
1
NON-ECC DIMM: NOT CONNECTED C1606 C1618 C1613 C1626 C1614 C1610 C1602 C1620
10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V
2
2
2
EVENT# ON ECC DIMM: KEEP A PULL UP IF NO PIN IN PCH @ @ @ /EMI
GND GND GND GND GND GND GND GND

nbs_c0603_h37_000s nbs_c0603_h37_000s nbs_c0603_h37_000s nbs_c0603_h37_000s
1
C1616 C1605 C1621 C1624
0.1UF/16V 0.1UF/16V C1611 C1625 0.1UF/16V 0.1UF/16V C1609 C1623
/EMI /EMI 1UF/6.3V 1UF/6.3V /EMI /EMI 1UF/6.3V 1UF/6.3V
2
BOM
Project Name Rev
X542UA/UV R2.0
Title : DDR3_ON-BOARD_B_L32
Size
C
vinafix.com
2016/12/05 X542UA_R1.0 #99, DDR SWAP
2016/11/16 X542UA_#78, Remove R1709
M_B_DQ[63:0] 4
J1701A
VINAFIX.COM
SWAP
+1.2V +VTT +2.5V +3VS
137 8
4 M_B_CLK_DDR0
139
CK0_T DQ0
7 M_B_DQ10
J1701B
4 M_B_CLK_DDR#0 CK0_C DQ1
138 20 M_B_DQ12 163 258
4 M_B_CLK_DDR1 CK1_T DQ2 VDD19 VTT
140 21 M_B_DQ13 20161205 swap 160
4 M_B_CLK_DDR#1 CK1_C DQ3 D1 VDD18
4 M_B_DQ11 159
DQ4 VDD17
109 3 M_B_DQ15 154 259
4 M_B_CKE0 CKE0 DQ5 VDD16 VPP2
110 16 M_B_DQ8 153 257
4 M_B_CKE1 CKE1 DQ6 VDD15 VPP1
17 M_B_DQ9 148
DQ7 VDD14
149 28 M_B_DQ14 147
4 M_B_CS#0 S0* DQ8 VDD13
157 29 M_B_DQ1 142
4 M_B_CS#1 S1* DQ9 VDD12 SL1704
41 M_B_DQ5 141
DQ10 VDD11
155 42 M_B_DQ7 20161205 swap 136 255 1 2 2017/02/02 X542UA_R1.1 #24, 0ohm modify to SL
4 M_B_ODT0 ODT0 DQ11 D0 VDD10 VDDSPD 0402
161 24 M_B_DQ2 135
4 M_B_ODT1 ODT1 DQ12 VDD9
1
25 M_B_DQ0 130 C1705 C1709
DQ13 VDD8
115 38 M_B_DQ4 129 0.1UF/10V 2.2UF/10V
4 M_B_BG0 BG0 DQ14 VDD7
113 37 M_B_DQ3 124
4 M_B_BG1 BG1 DQ15 VDD6
2
150 50 M_B_DQ6 123
4 M_B_BA0 BA0 DQ16 VDD5
145 49 M_B_DQ21 118
4 M_B_BA1 BA1 DQ17 VDD4
62 M_B_DQ20 117 GND GND
4 M_B_A[13:0] DQ18 VDD3
144 63 M_B_DQ18 20161205 swap 112
A0 DQ19 D2 VDD2
M_B_A0 133 46 M_B_DQ22 111
A1 DQ20 VDD1
M_B_A1 132 45 M_B_DQ16
A2 DQ21
M_B_A2 131 58 M_B_DQ17
A3 DQ22
M_B_A3 128 59 M_B_DQ19 263
A4 DQ23 NP_NC1
M_B_A4 126 70 M_B_DQ23 264 2017/02/02 X542UA_R1.1 #24, 0ohm modify to SL
A5 DQ24 NP_NC2
M_B_A5 127 71 M_B_DQ30
A6 DQ25
M_B_A6 122 83 M_B_DQ24 261 +3VS +3VS +3VS
A7 DQ26 MT1
M_B_A7 125 84 M_B_DQ26 262
A8 DQ27 D3 20161205 swap MT2
M_B_A8 121 66 M_B_DQ27
A9 DQ28
M_B_A9 146 67 M_B_DQ29 251 252
A10_AP DQ29 VSS1 VSS48
2
M_B_A10 120 79 M_B_DQ25 247 248
A11 DQ30 VSS2 VSS49
M_B_A11 119 80 M_B_DQ31 243 244 R1703 SL1702 R1704
A12 DQ31 VSS3 VSS50
0402
M_B_A12 158 174 M_B_DQ28 239 238 @ 0Ohm @ 0Ohm
A13 DQ32 VSS4 VSS51
+1.2V M_B_A13 151 173 M_B_DQ37 235 234
4 M_B_WE# A14_WE* DQ33 VSS5 VSS52
156 187 M_B_DQ36 231 230
4 M_B_CAS# A15_CAS* DQ34 VSS6 VSS53
1
152 186 M_B_DQ39 227 226
4 M_B_RAS# A16_RAS* DQ35 D4 20161205 swap VSS7 VSS54
2
170 M_B_DQ35 223 222 M_B_DIMM0_SA2
DQ36 VSS8 VSS55
169 M_B_DQ33 217 218 M_B_DIMM0_SA1
DQ37 VSS9 VSS56
R1707 114 183 M_B_DQ32 213 214 M_B_DIMM0_SA0
4 M_B_ACT# ACT* DQ38 VSS10 VSS57
M_B_VREFCA 240Ohm 182 M_B_DQ34 209 210
DQ39 VSS11 VSS58
143 195 M_B_DQ38 205 206
4 M_B_PAR PARITY DQ40 VSS12 VSS59
2
116 194 M_B_DQ44 201 202
4 M_B_ALERT# ALERT* DQ41 VSS13 VSS60
134 207 M_B_DQ40 197 196 SL1703 R1701 SL1701
EVENT* DQ42 VSS14 VSS61
0402
0402
M_B_DIMM0_EVENT# 108 208 M_B_DQ42 193 192 @
4,16 DDR4_DRAMRST# RESET* DQ43 D5 20161205 swap VSS15 VSS62 0Ohm
191 M_B_DQ46 189 188
DQ44 VSS16 VSS63
164 190 M_B_DQ45 185 184
VREFCA DQ45 VSS17 VSS64
1
203 M_B_DQ41 181 180
DQ46 VSS18 VSS65
Place close to SO-DIMM
1
C1704 1 C1701
5,16,47 SMB_DATA_S3
254
SDA DQ47
204 M_B_DQ43 175
VSS19 VSS66
176
0.1UF/10V 2.2UF/10V 253 216 M_B_DQ47 171 172
5,16,47 SMB_CK_S3 SCL DQ48 VSS20 VSS67
215 M_B_DQ49 167 168 GND GND GND
DQ49 VSS21 VSS68
2
166 228 M_B_DQ52 107 106

M_B_DIMM0_SA2 260 229 M_B_DQ50 20161205 swap 103 102 WRITE ADDRESS: 0XA4
SA1 DQ51 D6 VSS23 VSS70
GND GND M_B_DIMM0_SA1 256 211 M_B_DQ48 99 98
M_B_DIMM0_SA0 212 M_B_DQ54 93 94
DQ53 VSS25 VSS72
224 M_B_DQ53 89 90
Place close to SO-DIMM DQ54
225 M_B_DQ55 85
VSS26 VSS73
86
DQ55 VSS27 VSS74
92 237 M_B_DQ51 81 82
91 236 M_B_DQ56 77 78
101 249 M_B_DQ58 73 72
105 250 M_B_DQ60 20161205 swap 69 68
CB3_NC DQ59 D7 VSS31 VSS78
88 232 M_B_DQ63 65 64
87 233 M_B_DQ59 61 60
100 245 M_B_DQ57 57 56
104 246 M_B_DQ62 51 52
M_B_DQ61 47 48
M_B_DQS[7:0] 4 VSS36 VSS83
+1.2V 12 13 43 44
33 34 M_B_DQS1 20161205 swap 39 40
54 55 M_B_DQS0 35 36 +VTT +2.5V
75 76 M_B_DQS2 31 30 nbs_c0603_h37_000s nbs_c0603_h37_000s
178 179 M_B_DQS3 27 26
199 200 M_B_DQS4 23 22
1
220 221 M_B_DQS5 19 18 C1717
241 242 M_B_DQS6 15 14 C1711 C1726 0.1UF/16V C1725 C1710 C1727 C1721
96 97 M_B_DQS7 9 10 10UF/6.3V 10UF/6.3V /EMI 10UF/6.3V 10UF/6.3V 1UF/6.3V 1UF/6.3V
2
5 6 @ @ @ @
M_B_DQS#[7:0] 4 VSS46 VSS93
11 1 2
DQS0_C VSS47 VSS94
32 M_B_DQS#1 20161205 swap GND GND GND GND GND GND GND
DQS1_C
53 M_B_DQS#0 DDR4_DIMM_260P nbs_c0603_h37_000s nbs_c0603_h37_000s
DQS2_C
74 M_B_DQS#2
DQS3_C Place close to SO-DIMM Socket Place close to SO-DIMM Socket
177 M_B_DQS#3
DQS4_C (+VTT Pin) (+VPP Pin)
198 M_B_DQS#4 GND GND
DQS5_C
219 M_B_DQS#5 2017/02/06 X542UA_R1.1 #26, EMI solution
DQS6_C
240 M_B_DQS#6 +1.2V
For ECC DQS7_C
95 M_B_DQS#7
DQS8_C
T1702 1 162
S2*/C0
T1701 1 M_B_DIMM0_S2 165
S3*/C1
M_B_DIMM0_S3
DDR4_DIMM_260P 12002-00082600
1
+ CE1701
2nd source: 330UF/2V
'EVENT_N': INDICATES THERMAL EVENT ON DIMM. 12002-00082400 11020-0035Z000
2
NON-ECC DIMM: NOT CONNECTED 12002-00082500 @
GND Place close to SO-DIMM Socket (VDD Pin)
EVENT# ON ECC DIMM: KEEP A PULL UP IF NO PIN IN PCH
1
1
1
C1712 C1715 C1707 C1722 C1719 C1703 C1716 C1706
10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V
2
2
2
/EMI /EMI /EMI /EMI

1
C1718 C1723
C1708 0.1UF/16V C1702 C1714 0.1UF/16V C1724 C1720 C1713
1UF/6.3V /EMI 1UF/6.3V 1UF/6.3V /EMI 1UF/6.3V 1UF/6.3V 1UF/6.3V
2
@ @
(3895.00 3358.00)
EMI DDR4_DRAMRST#
1
C1730
100PF/50V
<Variant Name>
/EMI
2
2017/02/06 X542UA_R1.1 #26, EMI solution Project Name Rev
X542UA/UV R2.0
GND
Title : DDR4_SO-DIMM_1
Size
C
vinafix.com
VINAFIX.COM
All Vref trace must be 20 mils width
2017/02/21 X542UA_R1.1 #32, Modify R1812/18/21 to SO-DIMM setting
+1.2V M_B_VREFCA +1.2V M_A_VREFCA
2
20160218 X541UV
20160218 X541UV R1822 R1805->SL1805 for cost R1821
R1827->SL1827 for cost 1KOhm 1KOhm
1% 1%
1
SL1827 nbs_r0603_h39_000s SL1805 nbs_r0603_h39_000s
1 2 1 2 1 2 1 2
4 SB_DIMM_VREFCA 0603 4 SA_DIMM_VREFCA 0603
SB_DIMM_VREFCA_C R1807 2.2Ohm SA_DIMM_VREFCA_C R1812 2.2Ohm
1% 1%
1
C1803
1
C1801
0.022UF/16V
2
0.022UF/16V
2
R1820 R1818
2
2
1KOhm 1KOhm
+V_VREF_RC1 1% +V_VREF_CA_RC
1%
1
R1806
1
1
R1810
1
24.9Ohm
1% 24.9Ohm
1%
2
Close to SO-DIMM Close to SO-DIMM
2
GND
GND
<Variant Name>
Project Name Rev
X542UA/UV R2.0
Title : DDR4 CA VOLTAGE

Size
C
vinafix.com
U0301I
CSI-2
A36
B36
CSI2_DN0 VINAFIX.COM
CSI2_CLKN0
C37
D37
CSI2_DP0 CSI2_CLKP0
C38 C32
CSI2_DN1 CSI2_CLKN1
D38 D32
CSI2_DP1 CSI2_CLKP1
C36 C29
CSI2_DN2 CSI2_CLKN2
D36 D29
CSI2_DP2 CSI2_CLKP2
A38 B26
CSI2_DN3 CSI2_CLKN3
B38 A26
CSI2_DP3 CSI2_CLKP3
C31 E13 R2002 @ 100Ohm

CSI2_DN4 CSI2_COMP
D31 B7 2 1
CSI2_DP4 GPP_D4/FLASHTRIG
C33
CSI2_DN5
D33
CSI2_DP5 EMMC
A31
CSI2_DN6
B31 AP2 GND
CSI2_DP6 GPP_F13/EMMC_DATA0
A33 AP1
CSI2_DN7 GPP_F14/EMMC_DATA1
B33 AP3
AN3
GPP_F16/EMMC_DATA3
A29 AN1
B29 AN2
C28 AM4
D28 AM1
A27
REV = <REV>
CSI2_DN10
B27 AM2
CSI2_DP10 GPP_F21/EMMC_RCLK
C27 AM3
CSI2_DN11 GPP_F22/EMMC_CLK
D27 AP4
CSI2_DP11 GPP_F12/EMMC_CMD
AT1 R2001 1 @ 2 200Ohm

EMMC_RCOMP
SKL-ULT
GND
BOM
Project Name Rev
X542UA/UV R2.0
Title : CPU_PCH_CSI2,EMMC
Size
B
vinafix.com
VINAFIX.COM
Main Board
U0301F
LPSS ISH
2016/10/21 X542UA_#52, Add GSPI0 for FingerPrint & PU to +3VS 2017/01/23 X542UA_R1.1 #16, emove FP_RST#, R2117 PU & unstuff R2119/R2126
AN8 P2
31 FP_GSPI0_CS# GPP_B15/GSPI0_CS# GPP_D9
AP7 P3 PCB_ID0
31 FP_GSPI0_CLK GPP_B16/GSPI0_CLK GPP_D10
AP8 P4 PCB_ID1
FingerPrint 31 FP_GSPI0_MISO
AR7
GPP_B17/GSPI0_MISO GPP_D11
P1 +3VS
31 FP_GSPI0_MOSI GPP_B18/GSPI0_MOSI GPP_D12
SL2138 1 2 AM5 M4
53 BT_ON/OFF# 0402 GPP_B19/GSPI1_CS# GPP_D5/ISH_I2C0_SDA SATA_ODD_PWRGT 51
GSPI1_CS_R# AN7 N3 R2117 @/FPrint 4.7KOhm
76 GPU_EVENT# GPP_B20/GSPI1_CLK GPP_D6/ISH_I2C0_SCL SATA_ODD_DA# 51
AP5 FP_RST#_GPIO 1 2
30,76,77 DGPU_FB_CLAMP_GPIO GPP_B21/GSPI1_MISO
AN5 N1 R2118 @/FPrint 10KOhm
GPP_B22/GSPI1_MOSI GPP_D7/ISH_I2C1_SDA
N2 FP_INT# 1 2
GPP_D8/ISH_I2C1_SCL
AB1
GPP_C8/UART0_RXD
AB2 AD11
GPP_C9/UART0_TXD GPP_F10/I2C5_SDA/ISH_I2C2_SDA
W4 AD12
GPP_C10/UART0_RTS# GPP_F11/I2C5_SCL/ISH_I2C2_SCL
AB3
GPP_C11/UART0_CTS#
AD1 U1
24,77 DGPU_PWROK GPP_C20/UART2_RXD GPP_D13/ISH_UART0_RXD /SML0BDATA/I2C4B_SDA TOUCHPAD_INTR# 31,69
AD2 U2
70 GPU_RST# GPP_C21/UART2_TXD GPP_D14/ISH_UART0_TXD /SML0BCLK/I2C4B_SCL WLAN_LED_R 68
AD3 U3 WLAN_LED_R
69,77 DGPU_PWR_EN# GPP_C22/UART2_RTS# GPP_D15/ISH_UART0_RTS#
AD4 U4
GPP_C23/UART2_CTS# GPP_D16 /ISH_UART0_CTS#/SML0BALERT# FP_INT# 31
AC1
GPP_C12/UART1_RXD/ISH_UART1_RXD
U7 AC2 DIMM_SEL0
GPP_C16/I2C0_SDA GPP_C13/UART1_TXD/ISH_UART1_TXD
U6 AC3 DIMM_SEL1
GPP_C17/I2C0_SCL GPP_C14 /UART1_RTS#/ISH_UART1_RTS#
AB4 DIMM_SEL2
GPP_C15 /UART1_CTS#/ISH_UART1_CTS# FP_RST#_GPIO 31
U8
GPP_C18/I2C1_SDA
I2C1_SDA_TCH_PAD U9 AY8
GPP_C19/I2C1_SCL GPP_A18/ISH_GP0
I2C1_SCL_TCH_PAD BA8
GPP_A19/ISH_GP1
AH9 BB7
GPP_F4/I2C2_SDA GPP_A20/ISH_GP2
AH10 BA7
GPP_F5/I2C2_SCL GPP_A21/ISH_GP3
REV = <REV> AY7
GPP_A22/ISH_GP4
AH11 AW7
GPP_F6/I2C3_SDA GPP_A23/ISH_GP5
AH12 AP13
GPP_F7/I2C3_SCL GPP_A12/BM_BUSY#/ISH_GP6
AF11
GPP_F8/I2C4_SDA
AF12 +3VS
GPP_F9/I2C4_SCL
SKL-ULT
R2196 10KOhm
2016/10/27 X542UA_R1.0 #59, Remove TOUCHPAD_ID/TOUCH_PANEL_ID & remove R2111/R2137/R2139/R2140 SATA_ODD_DA# 1 2
R2154 10KOhm
TOUCHPAD_INTR# 1 2
Touch Panel ID Touch Pad ID NFC ID Onboard Memory PCB-ID: R2102 @/VGA 10KOhm
GPU_RST# 1 2
GPP_D12 GPP_D11 GPP_A21
MEM ID GPP_12 => DIMM_SEL0
GPP_13 => DIMM_SEL1 +3VSUS R2101 /VGA 10KOhm
1 2
GPP_14 => DIMM_SEL2
2016/10/11 X542UA_R1.0 #35, R2101 staff follow X456U
20151223 X541UV
Del NFC ID SEL0 (GPIO18) SEL1 (GPIO19) SEL2 (GPIO20) NOTE
2
0 0 0 03012-00010200 512*8 = 4G R2181 R2183 R2185
SAMSUNG/K4A4G085WE-BCPB R2168 @ 10KOhm
10KOhm 10KOhm 10KOhm
0 0 1 03012-00010000 512*8 = 4G GSPI1_CS_R# 1 2
HYNIX/H5AN4G8NAFR-TFC /MEMID_H0 /MEMID_H1 /MEMID_H2
1
0 1 0 03012-00010300 512*8 = 4G
MICRON/MT40A512M8RH-083E:B
H: no NFC 0 1 1 DIMM_SEL0 DIMM_SEL1 DIMM_SEL2
2
L: NFC 1 0 0 03012-00030000 1024*8 = 8G
SAMSUNG/K4A8G085WB-BCPB R2180 R2182 R2184
1 0 1 03012-00030300 1024*8 = 8G 10KOhm 10KOhm 10KOhm 2016/10/27 X542UA_R1.0 #60, Remove SNSR_HUB_PWREN & remove R2153
HYNIX/H5AN8G8NMFR-TFC
/MEMID_L0 /MEMID_L1 /MEMID_L2
1 1 0 03012-00030100 1024*8 = 8G
1
MICRON/MT40A1G8WE-083E:B
1 1 1 +3VSUS
R2150 @ 10KOhm
WLAN_LED_R 1 2
+3VS +3VS R2122 @/VGA 10KOhm
DGPU_PWR_EN# 1 2
2
R2120 R2123
PCB ID1 GPP_D10
PCB ID0 GPP_D9 @
10KOhm
@
10KOhm
PCB ID Boundary Scan TP (PCH)

1
PCB_ID0 PCB_ID1 PCB_ID1(GPP_D10) PCB_ID0(GPP_D09) NOTE

2
0 0
R2121 R2124 1 T2110
10KOhm 10KOhm 0 1 DIMM_SEL2 1 T2111
TOUCHPAD_INTR#
1 0
1
1 1
No Reboot Boot BIOS Strap Bit BBS

I2C1 SELECTION FOR I2C 1.8V FROM LPSS RA AND
+3VSUS
RB SHOULD BE UNSTUFFED AND RC
AND RD SHOULD BE STUFFED
1
+3VS R2125
10KOhm
2016/10/27 X542UA_R1.0 #57, Remove PCH_GPPB22 & remove R2160/R2161
@
Near U0301
2
1
C2101 PCH_GPPB18
1
R2155 R2158 1UF/6.3V

EMI
1
2
4.7KOhm 4.7KOhm R2149 GPU_RST# DGPU_PWROK

1KOhm
1
C2102 C2103
2
@
1000PF/50V 1000PF/50V
2
/VGA/EMI /VGA/EMI
I2C1_SCL_TCH_PAD 31
I2C1_SCL_TCH_PAD NOTE: Enable No Reboot
2
PCH will disable the TCO
Timer system reboot feature.
This function is useful when running ITP/XDP.
I2C1_SDA_TCH_PAD 31
I2C1_SDA_TCH_PAD
GND GND
PCH_GPPB18: weak internal pull down PCH_GPPB22: weal internal pull down
PU Enable PU LPC
PD Disable PD SPI (Default)
<Variant Name>
Project Name Rev
X542UA/UV R2.0
Title : CPU_CFG,RSVD,GND
Size
Custom
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VINAFIX.COM
ACZ_BCLK_AUD and ACZ_SDOUT_AUD
Total Trace match < 500 mile
HD Audio U0301G
AUDIO
RN2201 near PCH
BA22
HDA_SYNC/I2S0_SFRM
ACZ_SYNC_AUD_X1 AY22
HDA_BLK/I2S0_SCLK
5 6 RN2201C ACZ_BCLK_AUD_X1 BB22 SDIO/SDXC
36 ACZ_BCLK_AUD 33OHM HDA_SDO/I2S0_TXD
3 4 RN2201B ACZ_BCLK_AUD_X1 ACZ_SDOUT_AUD_X1 BA21
36 ACZ_SYNC_AUD 33OHM 36 ACZ_SDIN0_AUD HDA_SDI0/I2S0_RXD
1 2 RN2201A ACZ_SYNC_AUD_X1 AY21 AB11
36 ACZ_RST#_AUD 33OHM HDA_SDI1/I2S1_RXD GPP_G0/SD_CMD
7 8 RN2201D ACZ_RST#_AUD_X1 AW22 AB13
36 ACZ_SDOUT_AUD 33OHM HDA_RST#/I2S1_SCLK GPP_G1/SD_DATA0
ACZ_SDOUT_AUD_X1 ACZ_RST#_AUD_X1 J5 AB12
GPP_D23/I2S_MCLK GPP_G2/SD_DATA1
AY20 W12
I2S1_SFRM GPP_G3/SD_DATA2
@ 1 AW20 W11
T2209 I2S1_TXD GPP_G4/SD_DATA3
C2201 10PF/50V I2S_SDO_BT W10
GPP_G5/SD_CD#
ACZ_BCLK_AUD 1@ 2 AK7 W8
GPP_F1/I2S2_SFRM GPP_G6/SD_CLK
C2202 15PF/50V AK6 W7
GPP_F0/I2S2_SCLK GPP_G7/SD_WP
ACZ_SDIN0_AUD 1 2 AK9
GPP_F2/I2S2_TXD
AK10 BA9
RF requirement GND
GPP_F3/I2S2_RXD GPP_A17/SD_PWR_EN#/ISH_GP7
BB9
GPP_A16/SD_1P8_SEL
H5 AB7
45 DMIC_CLK_PCH GPP_D19/DMIC_CLK0 SD_RCOMP
D7
45 DMIC_DAT_PCH GPP_D20/DMIC_DATA0
2016/12/05 X542UA_R1.0 #A1, Reserve DMIC_CODEC & DMIC_PCH D8 AF13

GPP_D17/DMIC_CLK1 GPP_F23
C8
GPP_D18/DMIC_DATA1
AW5 REV = <REV>

GPP_B14/SPKR
SKL-ULT
UX303 0809
Top Swap Override

+VCCPAZIO +3VSUS
1
R2202 R2201
3.3KOHM @ 1KOhm
2
ACZ_SDOUT_AUD_X1 2016/10/27 X542UA_R1.0 #56, Remove PCH_GPPB14 & remove R2210/R2211
2
20160113 X541UV modify net
R2203
ACZ_SDOUT:(1) PCH: Internal PD 20k 330Ohm
ohm, VIL=0.35V, VIH=0.65~3.3V (2)
ALC269:VIL<0.35*3.3V, VIH>0.65*3.3V
1
Q2201_D
3
D
Q2201
PCH_GPPB14: weak internal pull down
2N7002K
1
30 PCH_SPI_OV
G
S PU Enable
ACZ_SDOUT is a signal used for Flash
2
Descriptor security Override/ME debug mode PD Disable (default)
HIGH : get overrideen, LOW : disable override
GND
BOM
Project Name Rev
X542UA/UV R2.0
Title : CPU_PCH_AUDIO,SDIO,SDXC
Size
C
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VINAFIX.COM
U0301H
USB 2.0 Mapping USB 3.0
SSIC / USB3 1 USB 2.0 Port 1 USB 3.0 Port0
PCIE/USB3/SATA
H8
USB3_1_RXN U3_U3RXDN1 52 2 USB 2.0 Port 2 USB 3.0 Port1 Type-C
G8
USB3_1_RXP U3_U3RXDP1 52
H13 C13 3 3
PCIE1_RXN/USB3_5_RXN USB3_1_TXN U3_U3TXDN1 52 USB 3.0 Port0 USB 2.0 Port USB 3.0 Port2 Type-C
/VGA PCIENB_RXN0 G13 D13
PCIE1_RXP/USB3_5_RXP USB3_1_TXP U3_U3TXDP1 52
CX2304 1 2 0.22UF/6.3V PCIENB_RXP0 B17
PCIE1_TXN/USB3_5_TXN 4 USB 2.0 Port 4 USB 3.0 Port1
PCIEG_RXN0 CX2303 1 2 0.22UF/6.3V PCIENB_TXN0 A17 J6
PCIE1_TXP/USB3_5_TXP USB3_2_RXN/SSIC_1_RXN U3_U3RXDN2 55
PCIEG_RXP0 PCIENB_TXP0 H6 5
USB3_2_RXP/SSIC_1_RXP U3_U3RXDP2 55
/VGA G11 B13
PCIE2_RXN/USB3_6_RXN USB3_2_TXN/SSIC_1_TXN U3_U3TXDN2 55
F11 A13
/VGA PCIENB_RXN1
PCIE2_RXP/USB3_6_RXP USB3_2_TXP/SSIC_1_TXP U3_U3TXDP2 55
6 CAMERA
CX2306 1 2 0.22UF/6.3V PCIENB_RXP1 D16
70 PCIENB_RXN[3:0] PCIE2_TXN/USB3_6_TXN USB 3.0 Type C
PCIEG_RXN1 CX2310 1 2 0.22UF/6.3V PCIENB_TXN1 C16 J10 7 SD CARD
70 PCIENB_RXP[3:0] PCIE2_TXP/USB3_6_TXP USB3_3_RXN/SSIC_2_RXN U3_U3RXDN3 55
PCIEG_RXP1 PCIENB_TXP1 H10
USB3_3_RXP/SSIC_2_RXP U3_U3RXDP3 55
/VGA H16 B15
PCIE3_RXN USB3_3_TXN/SSIC_2_TXN U3_U3TXDN3 55
8 WLAN / BT combo
/VGA PCIENB_RXN2 G16 A15
PCIE3_RXP USB3_3_TXP/SSIC_2_TXP U3_U3TXDP3 55
CX2308 1 2 0.22UF/6.3V PCIENB_RXP2 D17
70 PCIEG_RXN[3:0] PCIE3_TXN
PCIEG_RXN2 CX2305 1 2 0.22UF/6.3V PCIENB_TXN2 C17 E10
70 PCIEG_RXP[3:0] PCIE3_TXP USB3_4_RXN U3_U3RXDN4 52
PCIEG_RXP2 PCIENB_TXP2 F10
/VGA USB3_4_RXP U3_U3RXDP4 52
G15 C15
PCIE4_RXN USB3_4_TXN U3_U3TXDN4 52 USB 3.0 Port1
/VGA PCIENB_RXN3 F15 D15
PCIE4_RXP USB3_4_TXP U3_U3TXDP4 52
CX2309 1 2 0.22UF/6.3V PCIENB_RXP3 B19
PCIE4_TXN
PCIEG_RXN3 CX2307 1 2 0.22UF/6.3V PCIENB_TXN3 A19 AB9
PCIE4_TXP USB2N_1 USB_PN1 52 USB 3.0 Port0
PCIEG_RXP3 PCIENB_TXP3 AB10
/VGA USB2P_1 USB_PP1 52
F16
33 PCIE_RXN_GLAN_C REV = <REV>
PCIE5_RXN
E16 AD6
33 PCIE_RXP_GLAN_C PCIE5_RXP USB2N_2 USB_PN2 55
C2309 0.1UF/16V C19 AD7
33 PCIE_TXN_GLAN PCIE5_TXN USB2P_2 USB_PP2 55 USB 3.0 Type C
C2310 1 2 0.1UF/16V PCIE_TXN_GLAN_C D19
33 PCIE_TXP_GLAN PCIE5_TXP
1 2 PCIE_TXP_GLAN_C AH3
USB2N_3 USB_PN3 52
G18 AJ3
53 PCIE_RXN_WLAN PCIE6_RXN USB2P_3 USB_PP3 52 USB 3.0 Port1
F18
53 PCIE_RXP_WLAN PCIE6_RXP
C2301 0.1UF/10V D20 AD9
53 PCIE_TXN_WLAN PCIE6_TXN USB2N_4 USB_PN4 68
C2302 1 2 0.1UF/10V PCIE_TXN_WLAN_C C20 AD10
USB 2.0 Port
53 PCIE_TXP_WLAN PCIE6_TXP USB2P_4 USB_PP4 68
1 2 PCIE_TXP_WLAN_C
F20 AJ1
51 SATA0_HDD_RX_DN PCIE7_RXN/SATA0_RXN USB2N_5
E20 AJ2
51 SATA0_HDD_RX_DP PCIE7_RXP/SATA0_RXP USB2P_5
B21 USB2
51 SATA0_HDD_TX_DN PCIE7_TXN/SATA0_TXN
A21 AF6
51 SATA0_HDD_TX_DP PCIE7_TXP/SATA0_TXP USB2N_6 USB_PN6 45
AF7
USB2P_6 USB_PP6 45 CAMERA
G21
51 SATA1_ODD_RX_DN PCIE8_RXN/SATA1A_RXN
F21 AH1
51 SATA1_ODD_RX_DP PCIE8_RXP/SATA1A_RXP USB2N_7 USB_PN7 68
D21 AH2
51 SATA1_ODD_TX_DN PCIE8_TXN/SATA1A_TXN USB2P_7 USB_PP7 68 SD CARD
C21
51 SATA1_ODD_TX_DP PCIE8_TXP/SATA1A_TXP
AF8
USB2N_8 USB_PN8 53
E22 AF9
PCIE9_RXN USB2P_8 USB_PP8 53 WLAN / BT combo
E23
PCIE9_RXP
B23 AG1
PCIE9_TXN USB2N_9
A23 AG2
PCIE9_TXP USB2P_9
F25 AH7
PCIE10_RXN USB2N_10
2016/11/30 X542UA_R1.0 #93, Remove PCIE to SSD E25 AH8
PCIE10_RXP USB2P_10 USB2_ID R2321
D23 2017/02/02 X542UA_R1.1 #24, 0ohm modify to SL
PCIE10_TXN PD 1K: OTG
C23 AB6 R2315 1 2 113Ohm
PCIE10_TXP USB2_COMP PD 0ohm: non OTG
AG3 USBCOMP SL2301 1 2 +3VSUS
USB2_ID 0402
F5 AG4 USB2_ID R2322 1 2 1KOhm
PCIE_RCOMPN USB2_VBUSSENSE
1 2 PCIE_RCOMPN E5 USB2_VBUSSENSE
PCIE_RCOMPP
R2316 100Ohm PCIE_RCOMPP A9 5 6 RN2301C
GPP_E9/USB2_OC0# 10KOHM
D56 C9 USB_OC_1_2# USB_OC_1_2# 3 4 RN2301B
PCIE RCOMP 100 OHM 1% PROC_PRDY# GPP_E10/USB2_OC1# 10KOHM
D61 D9 USB_OC_3_4# USB_OC_3_4# 7 8 RN2301D
PROC_PREQ# GPP_E11/USB2_OC2# 10KOHM
BB11 B9 USB_OC_5_6# USB_OC_5_6# 1 2 RN2301A
GPP_A7/PIRQA# GPP_E12/USB2_OC3# 10KOHM
2016/10/27 X542UA_R1.0 #65, Modify PCIE CAPs to P54 & add SATA RX CAPs USB_OC_7_8# USB_OC_7_8#
E28 J1 20161207_SWAP
PCIE11_RXN/SATA1B_RXN GPP_E4/DEVSLP0 SATA0_DEVSLP 51
E27 J2 SATA0_DEVSLP
PCIE11_RXP/SATA1B_RXP GPP_E5/DEVSLP1
D24 J3 SATA1_PHYSLP
PCIE11_TXN/SATA1B_TXN GPP_E6/DEVSLP2 SATA2_DEVSLP 54
C24 SATA2_DEVSLP
PCIE11_TXP/SATA1B_TXP
E30 H2
54 SATA2_SSD_RX_DN PCIE12_RXN/SATA2_RXN GPP_E0/SATAXPCIE0/SATAGP0
請BIOS 設定MSATA_MPCIE_DET# Control PCIE12/SATA2

PCIE12_RX, For SATA, DP/DN & For PCIE, Revirse F30 H3
54 SATA2_SSD_RX_DP PCIE12_RXP/SATA2_RXP GPP_E1/SATAXPCIE1/SATAGP1
A25 G4
54 SATA2_SSD_TX_DN PCIE12_TXN/SATA2_TXN GPP_E2/SATAXPCIE2/SATAGP2 MSATA_MPCIE_DET# 54
54 SATA2_SSD_TX_DP
B25
PCIE12_TXP/SATA2_TXP
H1
MSATA_MPCIE_DET#
Follow M.2 device SATA→GND & PCIE→NC
GPP_E8/SATALED# SATA_LED# 68
SATA_LED#
SKL-ULT
+3VS
UX303 0823 UX303C1 0520
R2310 @ 10KOhm
SATA0_DEVSLP 1 2
R2308 @ 10KOhm
SATA1_PHYSLP 1 2
PCIE USAGE R2309 @ 10KOhm
SATA2_DEVSLP 1 2
PCI-E* X1 DEFAULT/OPTION Co-lay Clock
R2307 1 2 10KOhm
DGPU Port0 SATA_LED#
PCIE 1
DGPU
PCIE 2
DGPU
PCIE 3
DGPU
PCIE 4
GLAN Port4
PCIE 5
WLAN Port5
PCIE 6
HDD
PCIE 7/SATA 0
ODD & 2nd HDD
PCIE 8/SATA 1A
SSD PCIE3
PCIE 9
SSD PCIE2
PCIE 10
SSD PCIE1
PCIE 11/SATA 1B
SSD PCIE0 & SATA Port1
PCIE 12/SATA 2
SATA USAGE
SATA PORT DEFAULT/OPTION
PORT 0 HDD
PORT 1 ODD & 2nd HDD
PORT 2 N/A OPTION PCIE
PORT 3 SSD OPTION PCIE
BOM
Project Name Rev
X542UA/UV R2.0
Title : CPU_PCH_PCIE,USB,SATA
Size
C
vinafix.com
VINAFIX.COM
U0301J
R2423 @ 1KOhm
CLOCK SIGNALS SUS_CK 1 2
D42
70 CLK_PCIE_PEG#_PCH CLKOUT_PCIE_N0
C42
DGPU 70 CLK_PCIE_PEG_PCH AR10
CLKOUT_PCIE_P0
GPP_B5/SRCCLKREQ0#
CK_REQ_P0#
B42
CLKOUT_PCIE_N1
A42 F43 1
CLKOUT_PCIE_P1 CLKOUT_ITPXDP_N T2402
AT7 E43 CLK_ITP_BCLK_PCH# 1
GPP_B6/SRCCLKREQ1# CLKOUT_ITPXDP_P T2403
2016/11/30 X542UA_#93, Remove PCIE to SSD CK_REQ_P1# CLK_ITP_BCLK_PCH
D41 BA17
CLKOUT_PCIE_N2 GPD8/SUSCLK SUS_CK 53
C41 SUS_CK +1.0VSUS_PCH
CLKOUT_PCIE_P2
AT8 E37
GPP_B7/SRCCLKREQ2# XTAL24_IN
CK_REQ_P2# E35 XTAL24_IN
XTAL24_OUT
D40 XTAL24_OUT Close E42 R2417
CLKOUT_PCIE_N3
C40
CLKOUT_PCIE_P3 XCLK_BIASREF
E42 1 2 change 2.71k ohm 0.5%/ 接1V check
AT10 XCLK_BIASREF
GPP_B8/SRCCLKREQ3#
CK_REQ_P3# AM18 2.7KOhm
RTCX1
B40 AM20 RTC_X1
33 CLK_PCIE_GLAN# CLKOUT_PCIE_N4 RTCX2
A40 RTC_X2
GLAN 33 CLK_PCIE_GLAN AU8
CLKOUT_PCIE_P4
AN18
33 CLKREQ_GLAN# GPP_B9/SRCCLKREQ4# SRTCRST#
CK_REQ_P4# AM16 SRTC_RST#
RTCRST#
E40 RTC_RST#
53 CLK_PCIE_WLAN# CLKOUT_PCIE_N5
E38
WLAN 53 CLK_PCIE_WLAN AU7
CLKOUT_PCIE_P5
53 CLKREQ_WLAN# GPP_B10/SRCCLKREQ5#
CK_REQ_P5#
SKL-ULT
REV=<REV>
CHECK PCIEG CLK

2017/01/13 X542UA_R1.1 #06, C2401&C2402 modify to 27pF for X542UQ SR PCB
+3VS XTAL 24MHz

UX303 0826 RTC CRYSTAL 32.768KHz C2401
/U22
20150325
1 2 RN2401A SRC0 R1.1 modify to port 0 1 2 XTAL24_IN 1 2
10KOHM
3
CK_REQ_P0# RTC_X1 X2401
27PF/50V
C2404 GND R2407 24Mhz
SRC1
1
77,93 +FBVDDQ_PWRGD
3 4 RN2401B CK_REQ_P0# 1MOhm
1
10KOHM R2418 X2402 15PF/50V
CK_REQ_P1# 4
/U22 /U22
1
10MOhm 32.768Khz
5 6 RN2401C SRC4 Q2401 5% 2
2
3
10KOHM D
CK_REQ_P4# 2N7002K 07009-00112000 07009-00063100
2
5
2
C2405 C2402
/VGA/N16 /U22
SRC5
1
7 8 RN2401D 1 4 3 15PF/50V
10KOHM 21,77 DGPU_PWROK 70 PEX_CLKREQ#
CK_REQ_P5# G CK_REQ_P0# 1 2 XTAL24_OUT 1 2
S
UM6K1N RTC_X2
SRC2
2
27PF/50V
1 2 RN2402A Q2402B GND GND
10KOHM
CK_REQ_P2#
3 4 RN2402B SRC3 GND 2nd source: 2nd source:

10KOHM
CK_REQ_P3# 07009-00110100 (未測) 07009-00062000
07009-00113600 07009-00063200 (未測)
07009-00112500
2016/10/19 X542UA_R1.0 #49, Modify CK_REQ_Px# setting P2 & P3 same group
According to checklist：
2
Any un-used, disabled, and non-mapped SRCCLKREQ# signal must be left as no connects at the PCH side on the platform.
1 6
Q2402A
+3VA_RTC UM6K1N
2016/10/06 X542UA_R1.0 #15, Modify RTC circuit follow X456U
+3VA +3VA_DSW
R2421 2 1
20KOhm 1% SRTC_RST#
nbs_r0402_h16_000s
1
R2401 R2402
1.5KOhm @ 0Ohm +3VA_RTC
1
JRST2401 1%
1
1
C2407 SGL_JUMP
2
@
2
D2401
JA - SRTC RST_N 1UF/6.3V
JA
2
2
SAVE ME RTC REGISTER -(1-X) DEFAULT 1

CLEAR ME RTC REGISTER - (1-2) 3.3A_RTC_D 3
2
1
GND GND 20150409 R2432 C2403
R1.1 R2426 由45K改成45.3K 45.3KOhm
BAT54CW
1UF/10V
An RC delay circuit with a
R2420 2 1 time delay in the range of 1%
2
20KOhm 1% RTC_RST# 18 ms to 25 ms should be
provided.
1
nbs_r0402_h16_000s
GND
1
JRST2402 GND
1
1
C2406 SGL_JUMP
@
2
JB - RTC REST_N 1UF/6.3V

JB
2
2
CLEAR CMOS - (1-2)

SAVE CMOS - (1-X) DEFAULT
GND GND
+V3.3A_RTC GENERATION
BOM
Project Name Rev
X542UA/UV R2.0
Title : CPU_PCH_CLOCK SIGNALS,RTC

Size
C
vinafix.com
VINAFIX.COM
Main Board
U0301K
SYSTEM POWER MANAGEMENT
AT11 2 1 SL2513
GPP_B12/SLP_S0# PCH_SLP_S0# 30
AP15 PCH_SLP_S0_R# 2 0402 1 SL2514
GPD4/SLP_S3# PM_SUSB# 30,58,88
AN10 BA16 SLP_S3_R# 2 0402 1 SL2515
GPP_B13/PLTRST# GPD5/SLP_S4# 0402 PM_SUSC# 30,57,86
PLT_RST# B5 AY16 SLP_S4_R# 1
SYS_RESET# GPD10/SLP_S5# T2502
PM_SYSRST_R# AY17 SLP_S5#
RSMRST#
PM_RSMRST#_PCH AN15
SLP_SUS# PM_SLP_SUS# 30
T2505 1 A68 AW15 1 T2506
PROCPWRGD SLP_LAN#
R2507 2 60.4Ohm 1 H_CPUPWRGD_R B65 BB17 SLP_LAN# 1 T2501
58 VCCST_PWRGD_PCH VCCST_PWRGD GPD9/SLP_WLAN#
VCCST_PWRGD_R AN16 PCH_SLP_WLAN# 1 T2507
GPD6/SLP_A#
B6 PM_SLP_A_R#
SYS_PWROK
PM_SYSPWROK_PCH BA20 BA15 SL2518 1 2
PCH_PWROK GPD3/PWRBTN# 0402 PM_PWRBTN# 30
1 2 SL2553 PM_PWROK_PCH BB20 AY15
30,58 DPWROK_EC 0402 DSW_PWROK GPD1/ACPRESENT
DPWROK_R AU13 ME_AC_PRESENT_PCH
GPD0/BATLOW#
1 2 SL2512 AR13 PM_BATLOW_R# +3VSUS
30 SUSWARN# 0402 GPP_A13/SUSWARN#/SUSPWRDNACK
2016/10/27 X542UA_R1.0 #55, Remove reserve RES R2514 & R2554 1 2 SL2501 ME_SusPwrDnAck_R AP11
30 PCH_SUSACK# 0402 GPP_A15/SUSACK#
SUSACK_R# AU11 1 T2508 R2527 1 @ 2 10KOhm
GPP_A11/PME#
1 2 SL2517 BB15 AP16 PCI_PME# SLP_LAN#
33,53,54 PCIE_WAKE# 0402 WAKE# INTRUDER#
PCIE_WAKE#_R AM15 SM_INTRUDER# 1 2 RN2501A
GPD2/LAN_WAKE# 10KOhm
1 PCH_GPD2# AW17 AM10 SUSWARN#
T2503 GPD11/LANPHYPC GPP_B11/EXT_PWR_GATE#
LAN_PWREN AT15 AM11 MPHY_PWREN 3 4 RN2501B
53 WLAN_ON# GPD7/RSVD GPP_B2/VRALERT# 10KOhm
PM_SYSRST_R#
R2506 1 2 20KOhm
SKL-ULT MPHY_PWREN
+3VA_RTC
REV=<REV>
2016/10/11 X542UA_R1.0 #36, U2502 circuit BOM follow X456U
Check: R2506 can be remove?
R2559 1 2 1MOhm
+3V SM_INTRUDER#
+3VA_DSW
U2502 R2512 8.2KOhm

PM_BATLOW_R# 1 2
1 5 R2523 1KOhm
INB VCC
2 PCIE_WAKE# 1 2
INA
PLT_RST# 3 4
GND OUTY BUF_PLT_RST# 30,33,53,54,68,70
5 6 RN2501C
10KOhm
74LVC1G08GW PCH_GPD2#
GND
1
R2501 7 8 RN2501D
10KOhm
1 @ 2 100KOhm LAN_PWREN
R2518 0Ohm UX303CN 0311 Intel Review 1221
2
R2555 @ 10KOhm
WLAN_ON# 1 2
PLT_RST# 32
GND
+3VSUS +3VA_DSW
R2505
R2504
R2502
R2503
1 2 RN2502A
10KOHM
09'MoW04: PM_RSMRST#_PCH
2
3 4
2
Optional if ME FW is RN2502B
10KOHM
Ignition FW DPWROK_EC
10KOhm
10KOhm
10KOhm
100KOhm
1
R2534 1 @ 2 10KOhm
PM_PWROK_PCH
UX303 0809
@ @ @
2 1
30 PM_SYSPWROK
R2540 1KOhm PM_SYSPWROK_PCH
R2530 @ 0OHM
30,58,80 ALL_SYSTEM_PWRGD
ALL_SYSTEM_PWRGD 1 2
2 1
30 PM_PWROK
R2552 1KOhm PM_PWROK_PCH
2 1
30 PM_RSMRST#
R2542 1KOhm PM_RSMRST#_PCH
2 @ 1
30 ME_AC_PRESENT
R2541 10KOhm ME_AC_PRESENT_PCH
D2207: Prevent EC drive hign, D2505 2 1 1N4148WS

1
SUS_PWRGD sink low in S5-->G3. R2538 R2539

10KOhm 100KOhm
2
D2501
1
30,80 IMVP8_PWRGD
3
GND GND 2
3VA_DSW_PWRGD
BAT54AW
UX303C1 0620
D2503 2 1 1N4148WS
DPWROK_R
D2502
2014/04/09-1
2
30,58,87 3VA_DSW_PWRGD
3VA_DSW_PWRGD 3
1
Power failure solution (S0-->G3,S5-->G3):
BAT54CW
/EMI
C2501 1000PF/50V
ALL_SYSTEM_PWRGD 2017/02/06 1X542UA_R1.1
2 #26, EMI solution
/EMI
C2502 1000PF/50V
3VA_DSW_PWRGD 2017/02/06 1X542UA_R1.1
2 #26, EMI solution
/EMI
/EMI C2504 1000PF/50V
C2503 1000PF/50V PM_SYSPWROK_PCH 2017/02/06 1X542UA_R1.1
2 #26, EMI solution
PM_PWROK_PCH 2017/02/06 1X542UA_R1.1
2 #26, EMI solution EMI solution
Close D2501
BOM
Project Name Rev

GND
X542UA/UV R2.0
2013/03/15 Paul :For EMI resevered
Title : CPU_PCH_SYS_POWER
Size
C
vinafix.com
VINAFIX.COM
Checking
20150318
cost 考量被改SL
+1.0VSUS_PCH U0301O 如果用eSPI 要移除
CPU POWER 4 OF 4
+VCCPGPPA
AB19 +VCCPGPP
VCCPRIM_1P0_1
+1.0VSUS AB20 AK15 +VCCPGPP
VCCPRIM_1P0_2 VCCPGPPA
P18 AG15 +VCCPGPP +3VSUS +VCCPGPPA +1.8VSUS
VCCPRIM_1P0_3 VCCPGPPB
2.6A Y16 +VCCPGPP
VCCPGPPC
AF18 Y15 +VCCPGPPF R2606 @/eSPI 0Ohm
VCCPRIM_CORE1 VCCPGPPD
AF19 T16 +VCCPGPP SL2607 1 2 1 2
VCCPRIM_CORE2 VCCPGPPE 0603
V20 AF16 nbs_r0603_h24_000s
VCCPRIM_CORE3 VCCPGPPF
1
V21 AD15
VCCPRIM_CORE4 VCCPGPPG
C2617 +3VSUS
1UF/6.3V DCPDSW +1.0VSUS_PCH AL1 V19 +1.0VSUS_VCCDTS
DCPDSW_1P0 VCCPRIM_3P3_V19
2
@
1
K17 T1 +1.8VSUS
VCCMPHYAON_1P0_1 VCCPRIM_1P0_T1
C2602 +VCCMPHYG L1
VCCMPHYAON_1P0_2
1UF/6.3V AA1 +3VSUS
VCCATS_1P8
2
N15 +3VSUS +VCCPGPP
VCCMPHYGT_1P0_N15
N16 AK17
VCCMPHYGT_1P0_N16 VCCRTCPRIM_3P3
N17 +3VA_RTC
VCCMPHYGT_1P0_N17
P15 AK19 SL2603 1 2
VCCMPHYGT_1P0_P15 VCCRTC_AK19 0603
+1.0VM_VCCAMPHYPLL P16 BB14
VCCMPHYGT_1P0_P16 VCCRTC_BB14
1
K15 BB10 C2628 C2622 C2613
VCCAMPHYPLL_1P0_1 DCPRTC
1
+1.0VSUS_VCCAPLL L15 DCPRTC +1.0VSUS_PCH 1UF/6.3V 1UF/6.3V 1UF/6.3V
VCCAMPHYPLL_1P0_2
2
A14 C2610 C2608 C2609 @ @ @
VCCCLK1
V15 +1.0VSUS_VCCCLK2 0.1UF/16V 1UF/6.3V 0.1UF/16V
VCCAPLL_1P0
2
+1.0VSUS_PCH K19
VCCCLK2
AB17 +1.0VSUS_PCH
VCCPRIM_1P0_AB17 Place close to the AK19
+3VDSW_VCCPDSW Y18 L21 +1.8VSUS +VCCPGPPF
VCCPRIM_1P0_Y18 VCCCLK3
+1.0VSUS_VCCCLK4
AD17 N20
VCCDSW_3P3_AD17 VCCCLK4
AD18 +1.0VSUS_VCCCLK5
VCCDSW_3P3_AD18
+1.8VS AJ17 L19 0.48A SL2608 1 2
VCCDSW_3P3_AJ17 VCCCLK5 0603
+VCCPAZIO REV=<REV> +1.0VSUS_VCCCLK6 +3VS
1
SL2602 1 2 AJ19 A10
0603 VCCHDA VCCCLK6
2017/01/11 X542UA_R1.1 #03, +3VSUS_VCCPAZIO +3VSUS C2605
modify to +VCCPAZIO & change from +3VS to +1.8VSUS AJ16 AN11 R2601 @ 10KOhm SL2601 1 2 1UF/6.3V
VCCSPI GPP_B0/CORE_VID0
2
AN13 1 2 0402
+VCCMPHYG VCCPRIM_VID0 R2602 @ 10KOhm Place close to the AA1
GPP_B1/CORE_VID1
2017/02/02 X542UA_R1.1 #24, 0ohm modify to SL AF20 VCCPRIM_VID1 1 2
VCCSRAM_1P0_1
2017/03/20 X542UA_R2.0 #05, VCCHDA change to +1.8VS AF21
VCCSRAM_1P0_2
T19
VCCSRAM_1P0_3
+3VSUS T20
VCCSRAM_1P0_4
+1.0VSUS_PCH AJ21
VCCPRIM_3P3_AJ21
+VCCMPHYG AK20
VCCPRIM_1P0_AK20
N18
VCCAPLLEBB
1
C2604 SKL-ULT
1UF/6.3V
2
+1.0VSUS +VCCMPHYG
+1.0VSUS +1.0VSUS_PCH +3VA_DSW +3VDSW_VCCPDSW
0.09A
SL2623 1 2 SL2614 1 2
0805 0603
1
1 +VCCMPHYG +1.0VM_VCCAMPHYPLL
C2601
1UF/6.3V C2611 +3VSUS 3.5A
2
1UF/6.3V SL2632 1 2
2
@ 0603
1
0.46A @
C2612 C2603 C2615 C2614
22UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V
2
nbs_c0603_h39_000s @ @
1
+1.0VSUS_VCCDTS C2606 C2607 C2618
2 1UF/6.3V 0.1UF/16V 1UF/6.3V
2
SL2609 1 2 @
0603
+1.0VSUS_VCCAPLL
SL2613 1 2
0603
1
C2623
22UF/6.3V
2
+1.0VSUS_VCCCLK6
SL2622 1 2
0603
1
C2616
1UF/6.3V
2
@ +1.0VSUS_PCH +1.0VSUS_VCCCLK5
+1.0VSUS_VCCCLK2 SL2631 1 2
0603
1 2
1
SL2629
0603
C2626
22UF/6.3V
2
1
@
C2624
22UF/6.3V
2
+1.0VSUS_VCCCLK4
SL2630 1 2
0603
1
C2625
22UF/6.3V
2
BOM
Project Name Rev
X542UA/UV R2.0
Title : CPU_PCH_POEWR,GND
Size
C
vinafix.com
VINAFIX.COM
U0301P U0301Q
U0301R
GND 1 OF 3 GND 2 OF 3
GND 3 OF 3
A5 AL65 AT63 BA49 F8 L18
VSS1 VSS71 VSS141 VSS209 VSS278 VSS319
A67 AL66 AT68 BA53 G10 L2
A70 AM13 AT71 BA57 G22 L20
AA2 AM21 AU10 BA6 G43 L4
AA4 AM25 AU15 BA62 G45 L8
AA65 AM27 AU20 BA66 G48 N10
AA68 AM43 AU32 BA71 G5 N13
AB15 AM45 AU38 BB18 G52 N19
AB16 AM46 AV1 BB26 G55 N21
AB18 AM55 AV68 BB30 G58 N6
AB21 AM60 AV69 BB34 G6 N65
AB8 AM61 AV70 BB38 G60 N68
AD13 AM68 AV71 BB43 G63 P17
AD16 AM71 AW10 BB55 G66 P19
AD19 AM8 AW12 BB6 H15 P20
AD20 AN20 AW14 BB60 H18 P21
AD21 AN23 AW16 BB64 H71 R13
AD62 AN28 AW18 BB67 J11 R6
AD8 AN30 AW21 BB70 J13 T15
AE64 AN32 AW23 C1 J25 T17
AE65 AN33 AW26 C25 J28 T18
AE66 AN35 AW28 C5 J32 T2
AE67 AN37 AW30 D10 J35 T21
AE68 AN38 AW32 D11 J38 T4
AE69 AN40 AW34 D14 J42 U10
AF1 AN42 AW36 D18 J8 U63
AF10 AN58 AW38 D22 K16 U64
AF15 AN63 AW41 D25 K18 U66
AF17 AP10 AW43 D26 K22 U67
AF2 SKL-ULT AP18 AW45 D30 K61 U69
AF4 AP20 AW47 SKL-ULT D34 K63 SKL-ULT U70
AF63 AP23 AW49 D39 K64 V16
AG16 AP28 AW51 D44 K65 V17
AG17 AP32 AW53 D45 K66 V18
AG18 AP35 AW55 D47 K67 W13
AG19 AP38 AW57 D48 K68 W6
AG20 AP42 AW6 D53 K70 W9
AG21 AP58 AW60 D58 K71 Y17
AG71 AP63 AW62 D6 L11 Y19
AH13 AP68 AW64 D62 L16 Y20
AH6 AP70 AW66 D66 L17 Y21
AH63 AR11 AW8 D69
VSS42 VSS112 VSS182 VSS250
AH64 AR15 AY66 E11
AH67 AR16 B10 E15
AJ15 AR20 B14 E18
AJ18 AR23 B18 E21
AJ20 AR28 B22 E46
AJ4 AR35 B30 E50
AK11 AR42 B34 E53
AK16 AR43 B39 E56
AK18 AR45 B44 E6
AK21 AR46 B48 E65
AK22 AR48 B53 E71
AK27 AR5 B58 F1
AK63 AR50 B62 F13
AK68 AR52 B66 F2
AK69 AR53 B71 F22
AK8 AR55 BA1 F23
AL2 AR58 BA10 F27
AL28 AR63 BA14 F28
AL32 AR8 BA18 F32
AL35 AT2 BA2 F33
AL38 AT20 BA23 F35
AL4 AT23 BA28 F37
AL45 AT28 BA32 F38
AL48 AT35 BA36 F4
AL52 AT4 F68 F40
AL55 AT42 BA45 F42
AL58 AT56 BA41
VSS69 VSS139 VSS277
AL64 AT58
VSS70 VSS140
BOM
REV=<REV> REV=<REV> Project Name Rev

REV=<REV>
X542UA/UV R2.0
Title : CPU_PCH_POEWR,GND
Size
B
vinafix.com
VINAFIX.COM
SPI PCH Pow er 2016/10/07 X542UA_#28, Modify SPI PCH power follow X456U
+3VSUS +3VSUS_SPI System Management Interface

+12VS +3VS
D2801
1
3
2
1
R2814 R2815
BAT54CW Q2802A 4.7KOhm 4.7KOhm
UM6K1N
2
R2816 2 @ 1 0Ohm
30,78,90 SMB1_CLK 6 1 SMB1_CLK_S 50,76
Q2802B
EC UM6K1N Thermal Sensor
5
2nd PCH SPI +3VSUS_SPI
30,78,90 SMB1_DAT 3 4 SMB1_DAT_S 50,76
+3VA_DSW
+5VSUS
1
1
R2834 R2832 C2802 R2817 R2818
1KOhm 1KOhm 0.1UF/10V 4.7KOhm 4.7KOhm
/SMAP /SMAP
2
Q2803A
+3VA_DSW
2
1
1
U2801 UM6K1N
2
/SMAP
1 8 GND
CS# VCC 30 SMB3_CLK SMB1_CLK_SA 37
SPI_CS#0_SPI_2_CON 2 7 6 1
DO(IO1) HOLD#(IO3) PCH_SPI_DQ3 5
SPI_SO_SPI_2_CON 3 6
WP#(IO2) CLK
SPI_WP# 4 5 SPI_CLK_SPI_2_CON Q2803B
GND DI(IO0)
SPI_SI_SPI_2_CON UM6K1N Smart Amp
5
1
W25Q64FVSSIQ C2803 /SMAP
5 PCH_SPI_DQ2
05006-00010500 10PF/50V
30 SMB3_DAT SMB1_DAT_SA 37
GND @/EMI 3 4
2
(64Mb)
2nd : GND
05006-00012700
05006-00013400
20151225
5 SPI_CLK_SPI_2
SL2805 2 1 LPC Debug Port 12G183301208-->12018-00102700
更換Debug port 樣式 FFC 正/正
2 1 0402 +3V
SL2807 SPI_CLK_SPI_2_CON
5 SPI_CS#0_SPI_2 0402
SPI_CS#0_SPI_2_CON
SL2806 2 1
30 EC_SCK_PCH 0402
SL2808 2 1
30 EC_SCE#_PCH 0402
1
C2801
0.1UF/10V
/DEBUG
2
SL2803 2 1 SL2801 2 1
5 SPI_SO_SPI_2 0402 5 SPI_SI_SPI_2 0402
SPI_SO_SPI_2_CON SPI_SI_SPI_2_CON GND
SL2804 2 1 SL2802 2 1
30 EC_SO_PCH 0402 30 EC_SI_PCH 0402
JDEBUG2801
1
1
5,30 LPC_AD0 2 SIDE1
2 13
3
3
5,30 LPC_AD1 4
4
5
5
5,30 LPC_AD2 6
6
7
7
5,30 LPC_AD3 8
8
9
9
5,30 LPC_FRAME# 10
10
11 SIDE2
11 14
5 CLK_DEBUG 12
12
GND FPC_CON_12P GND

/DEBUG
12018-00102700
<Variant Name>
Project Name Rev
X542UA/UV R2.0
Title : 28_PCH-SPI ROM,OTH
Size
C
vinafix.com
VINAFIX.COM
SPI PCH Pow er 2016/10/07 X542UA_#28, Modify SPI PCH power follow X456U
+3VSUS +3VSUS_SPI System Management Interface

+12VS +3VS
D2801
1
3
2
1
R2814 R2815
BAT54CW Q2802A 4.7KOhm 4.7KOhm
UM6K1N
2
R2816 2 @ 1 0Ohm
30,78,90 SMB1_CLK 6 1 SMB1_CLK_S 50,76
Q2802B
EC UM6K1N Thermal Sensor
5
2nd PCH SPI +3VSUS_SPI
30,78,90 SMB1_DAT 3 4 SMB1_DAT_S 50,76
+3VA_DSW
+5VSUS
1
1
R2834 R2832 C2802 R2817 R2818
1KOhm 1KOhm 0.1UF/10V 4.7KOhm 4.7KOhm
/SMAP /SMAP
2
Q2803A
+3VA_DSW
2
1
1
U2801 UM6K1N
2
/SMAP
1 8 GND
CS# VCC 30 SMB3_CLK SMB1_CLK_SA 37
SPI_CS#0_SPI_2_CON 2 7 6 1
DO(IO1) HOLD#(IO3) PCH_SPI_DQ3 5
SPI_SO_SPI_2_CON 3 6
WP#(IO2) CLK
SPI_WP# 4 5 SPI_CLK_SPI_2_CON Q2803B
GND DI(IO0)
SPI_SI_SPI_2_CON UM6K1N Smart Amp
5
1
W25Q64FVSSIQ C2803 /SMAP
5 PCH_SPI_DQ2
05006-00010500 10PF/50V
30 SMB3_DAT SMB1_DAT_SA 37
GND @/EMI 3 4
2
(64Mb)
2nd : GND
05006-00012700
05006-00013400
20151225
5 SPI_CLK_SPI_2
SL2805 2 1 LPC Debug Port 12G183301208-->12018-00102700
更換Debug port 樣式 FFC 正/正
2 1 0402 +3V
SL2807 SPI_CLK_SPI_2_CON
5 SPI_CS#0_SPI_2 0402
SPI_CS#0_SPI_2_CON
SL2806 2 1
30 EC_SCK_PCH 0402
SL2808 2 1
30 EC_SCE#_PCH 0402
1
C2801
0.1UF/10V
/DEBUG
2
SL2803 2 1 SL2801 2 1
5 SPI_SO_SPI_2 0402 5 SPI_SI_SPI_2 0402
SPI_SO_SPI_2_CON SPI_SI_SPI_2_CON GND
SL2804 2 1 SL2802 2 1
30 EC_SO_PCH 0402 30 EC_SI_PCH 0402
JDEBUG2801
1
1
5,30 LPC_AD0 2 SIDE1
2 13
3
3
5,30 LPC_AD1 4
4
5
5
5,30 LPC_AD2 6
6
7
7
5,30 LPC_AD3 8
8
9
9
5,30 LPC_FRAME# 10
10
11 SIDE2
11 14
5 CLK_DEBUG 12
12
GND FPC_CON_12P GND

/DEBUG
12018-00102700
<Variant Name>
Project Name Rev
X542UA/UV R2.0
Title : 28_PCH-SPI ROM,OTH
Size
C
vinafix.com
EC 8585 Power VINAFIX.COM
Only 3V Torlence +3VS +3VA_EC +3VPLL +3VA_EC +3VACC
GPB[0,1,2,3,4,5,6] SL3005 SL3006

GPC[3,4,5,6,7] 1 2 1 2
GPD[0,4,6,7] 0603
SHORTPIN +3VA
GPE[4]
1
C3002 C3003 C3006 C3004 C3005 C3007 nbs_r0603_shorted_000s C3001
GPF[6,7] 0.1UF/16V 10UF/6.3V 10UF/6.3V 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V R3007 1 2 10KOhm
nbs_c0603_h37_000s nbs_c0603_h37_000s SL3007 PWR_SW# R3008 1 2 10KOhm
GPH[7]
2
1 2 LID_SW# R3009 1 2 10KOhm
GPI [0 :7] SHORTPIN AC_IN_OC#
GPJ[0:7] nbs_r0603_shorted_000s
EC_AGND
+5VS
RN3002B 4.7KOhm @
+3VS TP_DAT RN3002A 3 4 +3VS
Can be adjusted to 4.7KOhm @
TP_CLK 1 2
Open-Drain for port: 2017/02/02 X542UA_R1.1 #24, 0ohm modify to SL RN3004A 1 2
4.7KOhm
RN3004B 3 4
1
4.7KOhm
SL3004
GPA0~GPA3
0402
GPB0~GPB7
LCD_BACKOFF# 45
GPD0~GPD7 +3VA_EC +3VPLL
2
GPE0~GPE7 +3VACC +3VA_EC
GPF0~GPF7
GPH0~GPH6 RN3003B 3 4
GPJ0~GPJ5 U3001 SMB1_DAT RN3003A 1
4.7KOHM
2
121
127
4.7KOHM
114
26
50
92
74
11
SMB1_CLK RN3003C 5 6
3
4.7KOHM
1 2 RN3001A 10 24 SMB0_DAT RN3003D 7 8
5,28 LPC_AD0 PWR_LED 68
VSTBY1
VSTBY2
VSTBY3
VSTBY4
VSTBY5
GPH7
EIO0/LAD0/GPM0
VCC
AVCC
VSTBY(PLL)
47OHM PWM0/GPA0 4.7KOHM
3 4 RN3001B LPC_AD0_R 9 25 SMB0_CLK RN3005A 1 2
5,28 LPC_AD1 47OHM EIO1/LAD1/GPM1 PWM1/GPA1 CHG_LED# 68 4.7KOhm
5 6 RN3001C LPC_AD1_R 8 28 CHG_LED# 0324 SWAP SMB3_DAT RN3005B 3 4
5,28 LPC_AD2 47OHM EIO2/LAD2/GPM2 PWM2/GPA2 CHG_FULL_LED# 68 4.7KOhm
7 8 RN3001D LPC_AD2_R 7 29 1 T3010 SMB3_CLK
5,28 LPC_AD3 47OHM EIO3/LAD3/GPM3 PWM3/GPA3
LPC_AD3_R 13 30 EC_GPA3 1 T3011 R3063 100KOhm
5 CLK_KBCPCI_PCH ESCK/LPCCLK/GPM4 PWM4/GPA4
CLK_KBCPCI_PCH 6 31 EC_GPA4 PWRLIMIT_EC# 1 2
EC Require 5,28 LPC_FRAME# ECS#/LFRAME#/GPM5 PWM5/GPA5 FAN0_PWM 50
22 32 R3001 1 2 10KOhm
25,33,53,54,68,70 BUF_PLT_RST# ERST#/LPCRST#/GPD2 PWM6/SSCK/GPA6 KB_LED_PWM 31
5 34 1 T3013 EC_GPB2
UX303 0809
5 INT_SERIRQ ALERT#/SERIRQ/GPM6 PWM7/RIG1#/GPA7
LPC
15 EC_GPA7
3 EXT_SMI# ECSMI#/GPD4 UX303 0926
23 108 Need external PU R3017 100KOhm
3 EXT_SCI# ECSCI#/GPD3 AC_IN#/GPB0 AC_IN_OC# 76,89
T3005 1 126 109 Need external PU 3VADSW_ON 1 2
GA20/GPB5 LID_SW#/GPB1 LID_SW# 59
A20GATE 4 123 1 T3003 R3015 1 2 10KOhm
5 RC_IN# KBRST#/GPB6 CTX0/TMA0/GPB2
14 112 EC_GPB2 2 1 SL3017
32 EC_RST# WRST# VSTBY0 0402 +3VA
FLASH ROM
3VA_ALW R3061 1 2 1MOhm
125 113 1
T3016 5VSUS_ON
76 DGPU_LIMIT SSCE1#/GPG0 CRX0/GPC0
R3024 1 2 15Ohm 105 EC_GPC0
2016/11/16 X542UA_R1.0 #79, Remove PM_EXTTS#0 & R3091
28 EC_SCK_PCH FSCK/GPG7
T3009 1 EC_SCK_PCH_X1 119 120 2 1 SL3002
DSR0#/GPG6 TMRI0/GPC4 0402 DGPU_FB_CLAMP_GPIO 21,76,77
R3028 1 2 15Ohm EC_GPG6 103 EC_GPC4
2016/11/16 X542UA_R1.0 #77, Add DGPU_FB_CLAMP_GPIO to GPC4 (GC6_EN to EC) R3060 100KOhm
28 EC_SO_PCH FMISO/GPG5
R3010 1 2 15Ohm EC_SO_PCH_X1 102 124 2 1 SL3018 1 2
28 EC_SI_PCH FMOSI/GPG4 TMRI1/GPC6 0402 BAT1_IN_OC# 89
SL3025 2 1 EC_SI_PCH_X1 101 16 EC_GPC6 1 T3018 R3036 1 2 1MOhm
28 EC_SCE#_PCH FSCE#/GPG3 RXD/SIN0 /PWUREQ#/BBO/SMCLK2ALT/GPC7
SL3016 2 0402 1 EC_SCE#_PCH_X1 100 EC_GPC7 VSUS_ON
89 PWRLIMIT_EC# 0402 SSCE0#/GPG2
EC_GPG2 18 2 1 SL3009 2017/01/16 X542UA_R1.1 #09, Stuff R3036, DC S0 to
RI1#/GPD0 PCH_SLP_S0# 25
58 21 EC_GPD0 2 0402 1 SL3010 S5, EC powr latch VSUS_ON will floating & VSUS will turn on
31 KSI0 KSI0/STB# RI2#/GPD1 ME_AC_PRESENT 25
59 33 EC_GPD1 2 0402 1 SL3013
31 KSI1 KSI1/AFD# GINT/CTS0#/GPD5 0402 OP_SD# 36
60 47 EC_GPD5
31 KSI2 KSI2/INIT# TACH0A/GPD6 FAN0_TACH 50
61 48 1 T3019 R3021 1 @ 2 10KOhm
C3022 31 KSI3 KSI3/SLIN# TACH1A/TMA1/GPD7
62 EC_GPD7 CHG_FULL_LED# R3022 1 @ 2 10KOhm
31 KSI4 KSI4 UX303 1003
63 19 2 1 SL3003 CHG_LED# R3016 1 @ 2 10KOhm
31 KSI5 KSI5 L80HLAT/BAO/GPE0 SUSB_EC# 57,77,88
1 2
EC_RST# 64 82 EC_GPE0 2 0402 1 SL3012 THRO_CPU# R3018 1 @ 2 10KOhm
31 KSI6 KSI6 EGAD/GPE1 0402 SUSC_EC# 52,57,68,88
65 84 EC_GPE1 PM_SLP_SUS#
1000PF/50V 31 KSI7 KSI7 EGCLK/GPE3
83 R3020 @ 100KOhm
EGCS#/GPE2 1.2V_ON 86
/EMI 36 107 1 T3020 1 2
GPIO
31 KSO0 KSO0/PD0 BTN#/GPE4
KBMX
37 35 EC_GPE4
31 KSO1 KSO1/PD1 RTS1#/GPE5 PM_SUSB# 25,58,88
38 17 1 T3017
31 KSO2 KSO2/PD2 TXD/SOUT0/LPCPD#/GPE6
2013/03/15 Paul :For EMI resevered 39 20 CAP_LED#
31 KSO3 KSO3/PD3 L80LLAT/GPE7 THRO_CPU# 8
40
31 KSO4 KSO4/PD4
41
31 KSO5 KSO5/PD5
42 122
31 KSO6 KSO6/PD6 DTR1#/SBUSY/GPG1/ID7 PCH_SUSACK# 25
43 +3VSUS
31 KSO7 KSO7/PD7
44 R3019 1 @ 2 10KOhm
31 KSO8 KSO8/ACK#
45 PM_PWRBTN#
31 KSO9 KSO9/BUSY
46 106 SL3019 1 2
31 KSO10 KSO10/PE VFSPI 0402 +3VA_EC
51 +3VS
31 KSO11 KSO11/ERR#
52 93 2017/02/22 X542UA_R2.0 #01, Add SMB3 for Samrt Amp & contact to P28 Q2803
31 KSO12 KSO12/SLCT CLKRUN#/GPH0/ID0 PM_CLKRUN# 5
53 94
ITE Version ASUS P/N 31 KSO13 54
KSO13 CRX1/SIN1/SMCLK3/GPH1/ID1
95 SMB3_CLK
SMB3_CLK 28
R3085 1 2 10KOhm
31 KSO14 55
KSO14 CTX1/SOUT1/SMDAT3/GPH2/ID2
96 SMB3_DAT
SMB3_DAT 28 R1.0-6 IMVP8_PWRGD UX303C1 0718
IT8995E/AX 06037-00050400 31 KSO15 56
KSO15 GPH3/ID3
97
PM_RSMRST# 25
R3074 1 @ 2 10KOhm
25 PM_PWRBTN# KSO16/SMOSI/GPC3 GPH4/ID4 DPWROK_EC 25,58
57 98 A20GATE
IT8995E-128/CX 06037-00050500 25,57,86 PM_SUSC# KSO17/SMISO/GPC5 GPH5/ID5
99
PM_PWROK 25
R3075 1 2 10KOhm
GPH6/ID6 PM_SYSPWROK 25
T3024 1 128 RC_IN#
GPJ6
T3008 1 EC_GPJ6 2 66
GPJ7 ADC0/GPI0 PM_SLP_SUS# 25
EC_GPJ7 67 PM_SLP_SUS# UX303C1 0520
ADC1/GPI1 3VSUS_PWRGD 58
PS/2
85 68 R3032 1 @ 2 10KOhm
57,87 5VSUS_ON PS2CLK0/TMB0/CEC/GPF0 ADC2/GPI2 ALL_SYSTEM_PWRGD 25,58,80
86 69 PM_RSMRST#
57,83,88 VSUS_ON PS2DAT0/TMB1/GPF1 ADC3/GPI3 IMVP8_PWRGD 25,80
87 70 IMVP8_PWRGD UX303 0918 R3065 1 2 10KOhm
60,89 SMB0_CLK SMCLK0/GPF2 ADC4/GPI4 3VA_DSW_PWRGD 25,58,87
Battery 88 71 SL3001 1 2 SUSB_EC# R3066 1 2 10KOhm
60,89 SMB0_DAT SMDAT0/GPF3 ADC5/DCD1#/GPI5 0402 SUSWARN# 25
89 72 ME_SusPwrDnAck_EC SUSC_EC#
31 TP_CLK PS2CLK2/GPF4 ADC6/DSR1#/GPI6 A/D_MAX_POWER 89
90 73
31 TP_DAT PS2DAT2/GPF5 ADC7/CTS1#/GPI7 MB_MAX_POWER 89
R3069 1 @ 2 10KOhm
2 1 SL3008 110 76 1 T3023 EC_SCK_PCH_X1 R3068 1 @ 2 10KOhm
31,32,59 PWR_SW# 0402 PWRSW/GPB3 TACH2/GPJ0
SMBus
EC_GPB3 111 77 EC_GPJ0 EC_SCE#_PCH_X1 R3030 1 @ 2 10KOhm
32 PS_ON_EC XLP_OUT/GPB4 GPJ1 3VADSW_ON 87
115 78 1 T3012 EC_SO_PCH_X1 R3031 1 @ 2 10KOhm
28,78,90 SMB1_CLK SMCLK1/GPC1 DAC2/TACH0B/GPJ2
Thermal sensor 116 79 EC_GPJ2 1 T3015 2016/10/27 X542UA_R1.0 #54, Remove PCH_SUS_STAT# EC_SI_PCH_X1
28,78,90 SMB1_DAT SMDAT1/GPC2 DAC3/TACH1B/GPJ3
VCORE
R3033 1 2 43Ohm 117 80 EC_GPJ3 1 T3007 R3006 @ 100KOhm
8 PECI_EC SMCLK2/PECI/GPF6 DAC4/DCD0#/GPJ4
AVSS
VSS1
VSS2
VSS3
VSS4
VSS5
PECI_EC_R 118 81 EC_GPJ4 1 T3014 MB_MAX_POWER R3002 1 2 100KOhm
22 PCH_SPI_OV SMDAT2/PECIRQT#/GPF7 DAC5/RIG0#/GPJ5
EC_GPJ5 PM_SUSC# R3003 1 2 100KOhm
IT8995E-128/CX PM_SUSB# 1 2
1
12
27
49
91
104
75
EMI solution
06037-00050500
EC_12
PM_SYSPWROK
+3VA_EC
1
EC_AGND C3023 Checking
BAT1_IN_OC#
1
@ 0.1UF/6.3V
可拆→接到BAT
C3019 15PF/50V C3008 @/EMI 不可拆→PD
2
EC_SCK_PCH 1 2 0.1UF/16V
2
@ R3047 1 @/in-BAT 2 10KOhm for X455

C3020 33PF/50V BAT1_IN_OC# R3048 1 2 10KOhm internal battery always PD
EC_SI_PCH 1 2 PM_PWROK /in-BAT
1
@ C3024
C3021 33PF/50V 0.1UF/6.3V
EC_SCE#_PCH 1 2 @/EMI
2
Near U3001
DPWROK_EC
1
C3025
0.1UF/6.3V
EMI 3VA_DSW_PWRGD IMVP8_PWRGD RC_IN#
@/EMI
2
@
1
C3018 10PF/50V C3028 C3029 C3030
CLK_KBCPCI_PCH 1 2 UX303 1202 EMI 1000PF/50V 1000PF/50V 1000PF/50V
@ ALL_SYSTEM_PWRGD @/EMI @/EMI @/EMI
C3013
2
1
C3011 0.01UF/16V
BAT1_IN_OC# 1 2 C3026
UX303 1002 SUSB_EC#
1 2
1000PF/50V
C3012 0.01UF/16V GND GND GND
2
1000PF/50V
PWR_SW# 1 2 /EMI
/EMI C3014 /EMI 0.1UF/16V
C3009 1000PF/50V SUSC_EC# 1 2
BOM
BUF_PLT_RST# 2017/02/06 1X542UA_R1.1
2 #26, EMI solution @/EMI 3VSUS_PWRGD
1
C3015 0.1UF/16V Project Name Rev
LID_SW# 1 2 C3027
@/EMI 1000PF/50V X542UA/UV R2.0
Title :
2
/EMI IT8995E-128/CX
Size
C
vinafix.com
Internal Keyboard VINAFIX.COM
2016/10/28 X542UA_#66, Add BL CONN. J3104 & circuit
EMI
J3101
27
1
1
2 KSO7
KSO7 30
KSO7
1
3
33PF/50V
2
4
CN3101A
CN3101B
@/EMI
@/EMI
KB BL CON
GND1 2 KSO0 30 33PF/50V
3 KSO0 KSO0 5 6 CN3101C @/EMI
3 KSI1 30 33PF/50V
4 KSI1 KSI1 7 8 CN3101D @/EMI
4
5 KSI7
KSI7 30
KSI7
33PF/50V 343mA
5 KSO9 30
6 KSO9 1 2 CN3102A @/EMI
6 KSI6 30 33PF/50V
7 KSI6 KSO9 3 4 CN3102B @/EMI +5VS
7 KSI5 30 33PF/50V /KL
8 KSI5 KSI6 5 6 CN3102C @/EMI
8 KSO3 30 33PF/50V
9
9 KSO3
KSI4 30
KSI5 7
33PF/50V
8 CN3102D @/EMI J3104 25 mils 無提供KBL pin define, 預留SL 做為預防跳線用
10 KSI4 KSO3 1 2 SL3106
10 KSI2 30 SIDE1 1 0603
11 KSI2 1 2 CN3103A @/EMI 5 1
11 KSO1 30 33PF/50V 2
12 KSO1 KSI4 3 4 CN3103B @/EMI 2 1 2 SL3107
12 KSI3 30 33PF/50V 3 0603
13 KSI3 KSI2 5 6 CN3103C @/EMI 3
13 KSI0 30 33PF/50V SIDE2 4
1
14 KSI0 KSO1 7 8 CN3103D @/EMI 6 4 @/EMI @/KL
2
14 KSO13 30 33PF/50V
15 KSO13 KSI3 C3108 C3105
15 KSO5 30 FPC_CON_4P
16 KSO5 1 2 CN3104A @/EMI 0.1UF/16V 10UF/6.3V
1
16 KSO2 30 33PF/50V
2
17 KSO2 KSI0 3 4 CN3104B @/EMI
17 KSO4 30 33PF/50V 12018-00081800
18 KSO4 KSO13 5 6 CN3104C @/EMI
18 KSO8 30 33PF/50V
19 KSO8 KSO5 7 8 CN3104D @/EMI
19 KSO6 30 33PF/50V
20 KSO6 KSO2
20 KSO11 30
21 KSO11 1 2 CN3105A @/EMI /KL
21 KSO10 30 33PF/50V
7
6
5
2
1
22 KSO10 KSO4 3 4 CN3105B @/EMI
22 KSO12 30 33PF/50V
23 KSO12 KSO8 5 6 CN3105C @/EMI D Q3101
23 KSO14 30 33PF/50V
24 KSO14 KSO6 7 8 CN3105D @/EMI RF4E080BNTB
24 KSO15 30 33PF/50V
28 25 KSO15 KSO11 3
GND2 25 KB_LED_PWM 30
26 1 2 CN3106A @/EMI
26 PWR_SW# 30,32,59 33PF/50V S G
KSO10 3 4 CN3106B @/EMI 07005-01430000
33PF/50V
KSO12 5 6 CN3106C @/EMI
33PF/50V
8
4
FPC_CON_26P KSO14 7 8 CN3106D @/EMI
33PF/50V
12018-00200600 20150602 X540UJ DEL KSO15
2nd source:
12018-00200700 GND
12018-00200500
Touch PAD +3VS_TP

1 T3101
+3VS_TP
+3VS
1 T3103 1 2
TP_CLK_C 0402
1 T3104 SL3101
1
TP_DAT_C C3101
0.1UF/16V
請將測點至於TOP面
@/EMI
2
1 T3106
R2.0 新增_Tim_20150820
D3101
I2C1_SDA_TCH_C
2016/11/22 X542UA_#85, J3102 (Touch Pad) modify pin define to STD 1 T3107
I2C1_CLK_TCH_C 1 6
1 T3108 TP_CLK_C I/O1 I/O4 I2C1_SDA_TCH_C
GND
TOUCHPAD_INTR#
J3102 2 5
GND +3VS
GND VDD
1 +3VS_TP
1
SIDE1 2
9 2 R3101 2 @ 1 0Ohm
3 TP_CLK 30
1
3 TP_CLK_C R3102 2 @ 1 0Ohm C3102
4 TP_DAT 30
4 TP_DAT_C 0.1UF/16V 3 4
5
5 SL3104 1 2 @/EMI TP_DAT_C I/O2 I/O3 I2C1_CLK_TCH_C
6 I2C1_SDA_TCH_PAD 21
2
6 I2C1_SDA_TCH_C 1 0402 2
SL3105
SIDE2 7 0402 I2C1_SCL_TCH_PAD 21
10 7 I2C1_CLK_TCH_C
8 AZC099-04SP
8 TOUCHPAD_INTR# 21,69
GND 2nd source:
FPC_CON_8P 07024-00200200 07G022006330
12018-00212200 TP_CLK TP_DAT
@/EMI
1
C3104
1
C3103 10PF/50V
10PF/50V @/EMI
2
2nd source: @/EMI
2
12018-00211200 GND
12018-00212400
GND GND
Fingerprint 2017/01/23 X542UA_R1.1 #17, FP power modfiy from +3VS to +3VSUS
+3VS +3VS_FP Close J3103

+3VS_FP
R3106 1 @/FPrint 2 49.9KOHM

1 2 FP_GSPI0_CS#
0402 R3107 1 @/FPrint 2 49.9KOHM
SL3102 FP_GSPI0_CLK
1
C3107 2017/01/23 X542UA_R1.1 #18, Remove reserve RES & add curcrit for RST# R3104 @/FPrint 4.7KOhm
0.1UF/16V FP_GSPI0_MISO 1 2
@/EMI R3105 @/FPrint 4.7KOhm
2
FP_GSPI0_MOSI 1 2
2016/10/20 X542UA_R1.0 #51, Add J3103 for FingerPrint
GND
+3VS_FP +5VS 2017/02/16 X542UA_R1.1 #31, For AW FP reserve GPIO for reset pin
J3103
8
8
10 7 R3103 1 /FPrint 2 0Ohm
SIDE2 7 FP_RST#_GPIO 21
6 FP_RST#
6 FP_GSPI0_MOSI 21
5
2
5 FP_INT# 21
4
4 FP_GSPI0_MISO 21
3 1 6
3 FP_GSPI0_CS# 21
9 2 FP_CS#
SIDE1 2 FP_GSPI0_CLK 21
1
1 Q3102A
FPC_CON_8P UM6K1N
12018-00212200 R3108 2 @/FPrint 1 0Ohm

5
2nd source:
12018-00211200 4 3
BOM
12018-00212400 GND
Project Name Rev
Q3102B
UM6K1N X542UA/UV R2.0
Title : EC-IT8995_KB,TP
Size
C
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Thermal Policy +3VS
2016/10/07 X542UA_#29, Modify GPU_THERM# follow X456U
1
R3207
10KOhm
@
2
R3206
0Ohm
/VGA
1 2
GPU_THERM#
SL3201 2 1 +3VA_EC
50 CPU_THERM# 0402
IT8752 has built-in level detection for
R3202 power-on reset circuit
100KOhm
1 2
1
25 PLT_RST#
2 Q3203A D3201
T3201 1 UM6K1N 1N4148WS
+VDD_AON
6
2 1
1 T3202
1
EC_RST# 30
R3209
0Ohm
1
@/VGA C3201 C3202
1UF/6.3V 0.1UF/10V
2
nbs_c0603_h37_000s
2
R3210
1 2
70,76 DGPU_PEX_RST#
0Ohm Output Signal
Q3203B GND GND
/VGA
UM6K1N
5
4 3
76,77 GPU_THERM#_GPU
GPU_THERM#
battery embedded (press pwr_sw 10sec, then reset ec )
R3211 0Ohm
1 2
6
Q3201B Q3201A
5 UM6K1N 2 UM6K1N
1
2016/11/11 X542UA_R1.0 #72, Modify reference Design IP IT8995 KABYLAKE_EC_RST
+3VA_EC
GND BAT54CTB
1
D3202 3
1
R3204 EC_RST#_R 2 EC_RST#
2MOhm
R3203 @
3
1KOhm Q3202B
2
1 2 5 UM6K1N
4
6
1
Q3202A C3203
<Variant Name>
2 UM6K1N 10UF/6.3V R3208 1 2 10KOhm
30,31,59 PWR_SW# PS_ON_EC 30
nbs_c0603_h37_000s Project Name Rev
1
PS_ON 57,88 X542UA/UV R2.0

GND GND GND
Title : 32_RST_Reset Circuit
Size
B
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2017/01/13 X542UA_R1.1 #07, C3344&C3345 modify to 12pF for X542UQ SR PCB

The distance from u3301.36 to L3301 within 200 mil.
X2_LAN
GND
The distance from L3301 to +1.05V_LAN_C within 200 mil. X3301

L3301 1 3
4.7UH X1_LAN
1
1 2 R3305
1
wider:60 mil +1.05V_LAN
wider:60 mil 2.49KOhm 25.00MHZ C3311
4
1
1% C3345 12PF/50V
1
12PF/50V
2
C3347 C3309 +1.05V_LAN_C
2
4.7UF/6.3V 0.1UF/16V X1_LAN
+3VSUS_LAN
2
2
+3VSUS_LAN
nbs_c0603_h37_000s 2016/10/06 X542UA_R1.0 #17, LAN chip change solution to RTL8411 follow X456U X2_LAN
GND 07G010272501 GND
1KOhm 2 1
R3321
2nd source:
GND 07G010952500
GND 07G010X92501
34
33
32
31
30
29
28
27
26
25
U3301
LED1/GPO
GND2
GND1
RSET
AVDD33_2
AVDD10_3
CKXTAL2
CKXTAL1
LED0
LED2
1 24
34 L_TRDP0 MDIP0 REGOUT
+1.05V_LAN_C 2 23 +1.05V_LAN
34 L_TRDM0 MDIN0 VDDREG
3 22 VDD_REG
AVDD10_1 DVDD10
1
1
@ @ @ @ @ @ +1.05V_LAN_C 4 21 +1.05V_LAN_C SL3301 1 2
34 L_TRDP1 MDIP1 LANWAKEB 0402 PCIE_WAKE# 25,53,54
C3343 C3326 C3327 C3328 C3331 C3333 C3332 5 20
34 L_TRDM1 MDIN1 ISOLATEB
0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 6 19 LAN_ISOLATE SL3312 2 1
34 L_TRDP2 MDIP2 PERSTB BUF_PLT_RST# 25,30,53,54,68,70
2
2
7 18 0402
34 L_TRDM2 MDIN2 HSON PCIE_RXN_GLAN_C 23
8 17 PCIE_RXN3_GLAN 0.1UF/16V 2 1 C3334
AVDD10_2 HSOP PCIE_RXP_GLAN_C 23
REFCLK_N
REFCLK_P
2 1
AVDD33_1
+1.05V_LAN_C PCIE_RXP3_GLAN 0.1UF/16V C3335
CLKREQB
MDIN3
MDIP3
HSIN
HSIP
GND
RTL8111GUX-CG +3VS
9
10
11
12
13
14
15
16
2
34 L_TRDP3
R3307
34 L_TRDM3
The distance from U3301.34, U3301.35 , VDD_REG net to 1KOhm
SL3303 within 200 mil. +3VSUS_LAN
24 CLKREQ_GLAN#
23 PCIE_TXP_GLAN PCIE Tx,Rx方向是以南橋為觀點
1
wider>40 mil SL3303
23 PCIE_TXN_GLAN
1 2 LAN_ISOLATE
0805 24 CLK_PCIE_GLAN chip pin Tx,Rx是以chip為觀點
2
VDD_REG
24 CLK_PCIE_GLAN#
SHORTPIN R3322
1
15KOhm
C3348 C3310 1%
4.7UF/6.3V 0.1UF/16V
1
2
nbs_c0603_h37_000s
RTK建議3V_LAN raise time >0.5ms GND
GND
+3VSUS +3VSUS_LAN
+3VSUS_LAN JP3301
1MM_OPEN_5MIL
1 2
1 2
1
@ @ @ @ @ C3341
C3337 C3338 C3339 C3340 C3342 0.1UF/16V
0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V
2
Q3304
PMN45EN
GND 1 6
2 D 5
3 S 4
G
@
R3328 +12VSUS
100KOhm
1 1% 2
@
1
BOM
1
R3331
200KOhm @ @ C3355 Project Name Rev
0.1UF/16V
X542UA/UV
2
R2.0
2
GND GND Title : LAN_RTL8111

Size
B
vinafix.com
VINAFIX.COM
RJ45 con.
2016/10/06 X542UA_R1.0 #18, Transformer & RJ45 follow X456U
+3VSUS +3VSUS
R2.2 [Chip]
Del R3401 for 非繞線式Transformer 1020G
L_TRDP1 L_TRDP0 L_TRDP3 L_TRDP2
I/O4
I/O4
I/O3
I/O3
VDD
VDD
6
4
D3401 D3402 RN3401A 1 2
75Ohm
AZC099-04SP AZC099-04SP L_CMT1 RN3401B 3 4 GND_LAN_T
75Ohm
L_CMT0 RN3401C 5 6
75Ohm
/EMI /EMI L_CMT2 RN3401D 7 8
75Ohm
L_CMT3
1
07024-00200200 07024-00200200
C3404
1000PF/2KV
2
I/O2
I/O2
I/O1
I/O1
GND
GND
GND_LAN_T 上禁止加任何零件
L_TRDM1 L_TRDM0 L_TRDM3 L_TRDM2 LAN_GND
GND GND
SL3401B 3 2R4P
4
L_TRLP0 L_TRLP0_C
@/EMI
2
90Ohm/100Mhz
L3401
U3401
3
25 L_TRLM0 L_TRLM0_C
GND
1 24 SL3401A 1 2
TCT1 NC4 2R4P
LAN_VDDCT 2 23 L_CMT0
33 L_TRDP0 TD1+ MX1+
L_TRDP0 3 22 L_TRLP0
33 L_TRDM0 TD1- MX1-
L_TRDM0 4 21 L_TRLM0 GND
TC2 NC3
5 20 L_CMT1
L_TRDP1 6 19 L_TRLP1 SL3402B 3 4
33 L_TRDM1 TD2- MX2- 2R4P
L_TRDM1 7 18 L_TRLM1
TC3 NC2
8 17 L_CMT2
L_TRDP2 9 16 L_TRLP2 L_TRLP1 L_TRLP1_C TOP、In1、In2、In2、In3、Bottom層需鋪Lan-Gnd
L_TRDM2 10 15 L_TRLM2 @/EMI
2
TC4 NC1 90Ohm/100Mhz
11 14 L_CMT3
33 L_TRDP3
L_TRDP3 12
TD4+ MX4+
13 L_TRLP3 L3402 J3401
L_TRDM3 L_TRLM3 1
3
1
實掛料是FCE 的料 L_TRLP0_C 2
2
N-1020G 09200-00050500 非AJOHO09200-00050900 L_TRLM1 L_TRLM1_C L_TRLM0_C 3
3 P_GND1
9
SL3402A 1 2 L_TRLP1_C 4 10
2R4P 4 P_GND2
L_TRLP2_C 5 11
2nd source: 5 P_GND3
L_TRLM2_C 6 12
09G051059A20 6 P_GND4
L_TRLM1_C 7
R2.2 [Chip] 7
U3401 change to 25pin footprint SL3403A 1 2 L_TRLP3_C 8
2R4P 8
1
1
C3406 C3405 L_TRLM3_C

1UF/10V 0.1UF/10V LAN_JACK_8P
@ L_TRLM2 L_TRLM2_C
12014-00363100
2
@/EMI
3
90Ohm/100Mhz
L3403
0619 C3407 mount for EA LAN common voltage Andy
GND GND
2
LAN_GND
C3403 FOR EMI C3409 L_TRLP2 L_TRLP2_C
0.1UF/16V 0.1UF/16V SL3403B 3 2R4P
4
C3407
1 2 0.1UF/16V 1 2
@ C3402 @/EMI
0.1UF/16V 1 2
/EMI SL3404B 3 2R4P
4
1 2 1 2
(142,1682)
(464,1934) C3410
1 2 0.1UF/16V L_TRLM3 L_TRLM3_C
(328,2482)
C3408 20161207_SWAP
2
@/EMI
0.1UF/16V L3404
BOM
GND LAN_GND 1 2 90Ohm/100Mhz
@/EMI
C3411 @/EMI Project Name
3
Rev
Place near chassis GND GND LAN_GND 0.1UF/16V
L_TRLP3 L_TRLP3_C R2.0
@/EMI
LAN_GND SL3404A 1 2
GND 2R4P
Title : LAN_AR8171_RJ45
Place near chassis GND Size
B
vinafix.com
VINAFIX.COM
+5VS
Digital
MOAT
1
SL3616
2
Analog
+5VS_AUDIO
+5VS
SL3618 1
2017/02/02 X542UA_R1.1 #24, 0ohm modify to SL
0603
2
PVDD
Audio Cdeco ALC3288
0603
1
C3613 C3614 C3615 C3616 C3617 C3623 2016/12/15 X542UA_R1.0 #A4, Modify Codec from ALC295 to ALC3288
0.1UF/10V 10UF/6.3V 0.1UF/10V 10UF/6.3V 0.1UF/10V 10UF/6.3V
2
GND GND
close pin 41 close pin 46
+1.8VS +1.8VS_AUDIO
Digital SL3614
Analog
1 2 +1.8VS AUD_DVDD
0603
R3607 1 @ 2 0Ohm
+3VS nbs_r0603_h24_000s
MOAT
1
SL3615 1 2 C3603 C3606
0603
0.1UF/10V 10UF/6.3V
2
R3621 1 2 0Ohm 2017/02/02 X542UA_R1.1 #24, 0ohm modify to SL
R3625 1 2 0Ohm +1.8VS AUD_DVDD_IO

GND 2016/12/05 X542UA_R1.0 #A1, Reserve DMIC_CODEC & DMIC_PCH
SL3617 1 2 2017/01/11 X542UA_R1.1 #02, AUD_VDD_IO modify to +1.8VS
+3VS 0603 2017/02/02 X542UA_R1.1 #24, 0ohm modify to SL
TO IO DMIC
1
R3619 1 @ 2 0Ohm R3646 1 2 22Ohm @/DMIC_CODEC
DMIC_CLK_B 45
GND GND_AUDIO nbs_r0603_h24_000s C3604 C3607 DMIC_CLK R3601 1 2 0Ohm @/DMIC_CODEC
DMIC_DAT_B 45
0.1UF/10V 10UF/6.3V DMIC_DATA
2
+5VS_AUDIO
1
C3627
For EMI request 10PF/50V
@/DMIC_CODEC
2
GND LDO1_CAP
1
C3622 C3621 R3602
0.1UF/6.3V 10UF/6.3V 100KOhm C3619
2
nbs_r0201_h12_000s 10UF/6.3V GND
nbs_c0201_h13_000s,c0201
2
2016/11/10 X542UA_R1.0 #70, Reserve R3526/R3627/R3631/R3632 for Smart Amp. SPK co-lay
1
2017/03/22 X542UA_R2.0 #06, R3626/27/31/32 change to 0603 & RC filter
2017/04/13 X542URV_R1.1 R3626/27/31/32 change to 0603 BEAD 09G013120114 GND_AUDIO
GND_AUDIO
L3601 1 2 120Ohm/100Mhz N/A PVDD
37
37
H_SPKL+_CON
H_SPKL-_CON
L3602
L3603
1
1
2
2
120Ohm/100Mhz
120Ohm/100Mhz
N/A
N/A
H_SPKL+_C
H_SPKL-_C
HP Detection
37 H_SPKR-_CON AUD_DVDD
L3604 1 2 120Ohm/100Mhz N/A H_SPKR-_C
37 H_SPKR+_CON
H_SPKR+_C
PVDD
2
LINE2_R
LINE2_L
1
1
C3637 C3635 HPOUT_JD R3611
1000PF/50V 1000PF/50V 100KOhm
@/nonSMAP @/nonSMAP
2
1
1
C3638 C3636 GND 1% R3605
1
1000PF/50V 1000PF/50V
U3601 Analog HP_JD1 68
50
49
48
47
46
45
44
43
42
41
40
39
38
37
@/nonSMAP @/nonSMAP HPOUT_JD 1 2
2
AUD_DVDD
1
200KOhm
PVSS2
PVSS1
PVDD2
PVDD1
AVDD1
LDO1-CAP
HP/LINE1-JD(JD1)
I2S-IN/I2S-OUT-JD(JD3)
SPK-OUT-R+
SPK-OUT-R-
SPK-OUT-L-
SPK-OUT-L+
LINE2-R(PORT-E-R)
LINE2-L(PORT-E-L)
C3626
GND GND GND GND
Digital 1%
0.1UF/10V
2
1
1
GND
C3610 C3612
0.1UF/10V 2.2UF/10V
2
GND +3VA
T3611 1
I2C1_EN
1
2
I2S-EN/SPDIF-OUT/DMIC-DATA34 /EAPD/DMIC-CLK-IN VREF
36
35
GND_AUDIO HP Jack Signal
PDB AVSS1
DLY_OP_SD# 3 34 MIC2_VREFO_L
DVDD LINE1-L(PORT-C-L)
4 33 LINE1_L MIC2_VREFO_R
2016/12/05 X542UA_R1.0 #A2, Modify int. AMIC & Audio Jack MIC
GPIO0/DMIC-DATA12 LINE1-R(PORT-C-R)
DMIC_DATA 5 32 LINE1_R
GPIO1/DMIC-CLK 5VSTB/AUX_MODE
T3601 1 DMIC_CLK 6 31
1
I2C-DATA MIC2-CAP
T3607 1 I2C1_SDA_AUD 7 30 R3622 R3623 R3635
I2C-CLK MIC2-R(PORT-F-R)/SLEEVE
R3633 1 2 33Ohm 2016/12/05 X542UA_R1.0 #97, Add DIN to P37 Smart Amp I2C1_SCL_AUD 8 29 MIC2_R_SLEEVE 2.2kOHM 2.2kOHM 2.2kOHM
37 DIN I2S-IN MIC2-L(PORT-F-L)/RING2
1
R3629 1 2 22Ohm I2C1_IN 9 28 MIC2_L_RING2 @
37 DOUT I2S-OUT1 MIC2-VREFO-R
R3628 1 2 22Ohm DOUT_C 10 27 MIC2_VREFO_R C3608
2
37 I2S_BCLK I2S-BCLK MIC2-VREFO-L
1
R3616 1 2 22Ohm I2S_BCLK_C 11 26 MIC2_VREFO_L 10UF/6.3V

37 I2S_MCLK I2S-MCLK/I2S-OUT2 HPOUT-L(PORT-I-L) N/A N/A MIC2_R_SLEEVE 68
2
C3609 R3630 1 2 22Ohm I2S_MCLK_C 12 25 HPOUT_L MIC2_R_SLEEVE
37 I2S_LRCLK I2S-LRCK HPOUT-R(PORT-I-R) MIC2_L_RING2 68
22PF/50V I2S_LRCLK_C HPOUT_R MIC2_L_RING2 0Ohm 1 2 R3617
AUDIOLINK_SDATA-OUT
HP_R_2 68
2
1
HPOUT_R 0Ohm 1 2 R3618
AUDIOLINK_SDATA-IN
HP_L_2 68
GND_AUDIO HPOUT_L
AUDIOLINK_SYNC
AUDIOLINK_BCLK
GND 3634 3633 3632 3631 C3628 4.7UF/10V
CPVDD/AVDD2
2C
2C
2C
2C
22PF/50V 22PF/50V 22PF/50V 22PF/50V 2 1

PCB trace width of
LDO3-CAP
LDO2-CAP
@ @ @ @ LINE1_L 2 1
Ring2 & SLEEVE at least 40 mil
DVDD-IO
LINE1_R C3630 4.7UF/10V
CPVEE
AVSS2
CBN
CBP
GND GND GND GND
ALC3288-CG
13
14
15
16
17
18
19
20
21
22
23
24
06103-00360000
2016/12/15 X542U5_R1.0 #A7, Reserve R3635 / R3637 / C3631 / C3632 / C3633 / C3634
TO INTERNAL MIC(Port C)
1
R3603 1 2 22Ohm
22 ACZ_BCLK_AUD
C3629 @ 10PF/50V ACZ_BCLK_AUD_C C3601 C3620
GND
1 2 2.2UF/10V 2.2UF/10V LDO1_CAP MIC2_VREFO_R
22 ACZ_SYNC_AUD
2
/AMIC @
1
1
R3604 1 2 22Ohm R3614 R3637
22 ACZ_SDIN0_AUD
ACZ_SDIN0_AUD_C C3611 GND_AUDIO 4.7KOhm 4.7KOhm
10UF/6.3V /AMIC nbs_r0201_h12_000s nbs_r0201_h12_000s
22 ACZ_SDOUT_AUD
2
R3615
2
C3625 2 1 2.2UF/10V 1 2
AMIC_L 45
AUD_DVDD_IO LINE2_L AMIC_CLK_IO2 2016/12/05 X542UA_R1.0 #A2, Modify int. AMIC & Audio Jack MIC
GND_AUDIO /AMIC 1KOhm
1
1
1
C3624 2 1 2.2UF/10V /AMIC
FOR ICH ACZ BUS =1.8V nbs_r0201_h12_000s R3634
MUTE CONTROL C3602 +1.8VS_AUDIO LINE2_R C3648 6.2KOhm
1 R3613 2
10UF/6.3V /AMIC 1000PF/16V @/AMIC 0Ohm
AMIC_GND 45
2
AUD_DVDD_IO /AMIC
2
nbs_c0201_h13_000s
GND
2
GND_AUDIO GND_AUDIO
1
R3609 GND_AUDIO
10KOhm C3618 C3605
0.1UF/10V 10UF/6.3V
2
1
B
GND_AUDIO
Q3602
PMBS3904 AUD_DVDD
22 ACZ_RST#_AUD
E
FROM PCH
R3608
FOR ICH ACZ BUS =3.3V 10KOhm
D3601
0Ohm 1 @ 2 R3612 1
1
3
DLY_OP_SD# 37
2 DLY_OP_SD#
30 OP_SD#
2
FROM EC BAT54AW R3610

<Variant Name>
10KOhm
@
Title :
AUD_ALC3288
1
NB2_RD1_EE1
Engineer: Joach_Wang
GND Size Project Name Rev
C X542UA/UV R2.0
vinafix.com
VINAFIX.COM
SMART AMP. & SPK
+5VS
2
R3723 reserve base on #95 2016/12/01 X542UA_R1.0#95, Add Q3701 circuit for SKP protectin & modify Ra & Rb for Switching loss
1 6 2016/12/05 X542UA_R1.0 #97, Add DIN to P37 Smart Amp 2017/01/19 X542UA_R1.1 #10, Remove Q3701 & modify
36 DIN
DIN_GPIO3
/SMAP +3VA_AMP +3VA_AMP
Q3701A 36 I2S_MCLK
+3VA_DSW /SMAP 65mA +3VA_AMP UM6K1N
36 I2S_BCLK
L3701 +5VS DLY_OP_SD#
1
1 2 R3720 R3723
1
36 DOUT
100KOhm 100KOhm
120Ohm/100Mhz @/SMAP /SMAP R3730
5
36 I2S_LRCLK
1
nbs_l0402_h22_000s C3745 C3746 1KOhm
2
10UF/6.3V 0.1UF/10V 4 3 /SMAP
2
36 DLY_OP_SD#
/SMAP /SMAP DLY_OP_SD#_L
2
/SMAP ADR2 ADR1 GPIO1
nbs_c0603_h37_000s Q3701B
1
UM6K1N R3721 R3724 R3729
2017/03/22 X542UA_R2.0 #06, Add Q3701 for DIN & DLY_OP_SD# leakage 0Ohm 0Ohm 100KOhm
ADR2
/SMAP @/SMAP /SMAP
GND DIN 預防漏電 (X542UQ ER 沒問題)，參考EC Ray 提供B9440 設計
2
1
1
DLY_OP_SD# 在X542UQ ER 有漏電(EC code 001)，故留相同設計防S4/S5 漏電
LDOO
ADR1
TI_TAS5766L GND
GND
I2C Slave Address:
U3701 1001 100X (98)
50
49
48
47
46
45
44
43
42
41
40
39
0X98 (ADDR2/ADDR1=0)
0X9A (ADDR2=0/ADDR1=1)
LDOO
DIN
GND11
GND10
GND9
ADR1
GPIO3
ADR2
XSMT/UVP
LRCLK
BCLK
SCLK
AC_BAT_SYS
+3VA_AMP
/SMAP 1 38
60mils
L3705
Close PIN13/14 60mils
2
DVDD GPIO2
37
CPVDD GPIO1
1 2 3 36 GPIO1 SL3701 1 2
CAPP SCL 0402 SMB1_CLK_SA 28
PVCC CAPP 4 35 SMB_CLK_SA SL3703 1 2
GND GND1 SDA 0402 +3VA_AMP SMB1_DAT_SA 28
120Ohm/100Mhz 5 34 SMB_DAT_SA
CAPM GND8 GND
1
C3743 CAPM 6 33
Irat=3A VNEG AVDD
1
C3701 C3711 C3707 C3708 1UF/6.3V VNEG 7 32
DACL DACR
1
nbs_l0603_h26_000s 10UF/25V 10UF/25V 1UF/25V 1UF/25V /SMAP DACL 8 31 DACR C3710
INPL INPR
2
/SMAP /SMAP /SMAP /SMAP INPL 9 30 INPR 1UF/6.3V
INNL INNR
2
nbs_c0603_h39_000s nbs_c0603_h37_000s nbs_c0603_h37_000s
nbs_c0603_h39_000s INNL 10 29 INNR /SMAP
GND GND2 GND7 GND
2
11 28
FAULT# GAIN/FSW
DLY_OP_SD# 12 27 GAIN/FSW
AVCC GVDD
PVCC 13 26 GVDD GND
PVCC1 PVCC2
GND 14 25 PVCC
GND GND3 GND6
OUTNR
OUTPR
OUTNL
OUTPL
GND4
GND5
BSNR
BSPR
BSNL
BSPL
1
C3714
1UF/25V
C3702
C3703
/SMAP TAS5766L /SMAP
15
16
17
18
19
20
21
22
23
24
2
nbs_c0603_h37_000s
06040-01160100
0.22UF/6.3V
0.22UF/6.3V
Max = 4W / Channel = 8W
1
GND
Power Efficiency:85% -> 9.5 W /SMAP/SMAP
2
I=1.05A@9V 0.8 A@12V 0.5A@19V
H_SPKR+
H_SPKL+
H_SPKR-
H_SPKL-
C3704
C3705
Max = 4W / Channel
0.22UF/6.3V
0.22UF/6.3V
I = 0.7 A (@Speaker : 8 Ohm)
2
/SMAP/SMAP
1
GND
MLCC 0.22UF/25V (0603) X7R 10%
靠近Amp
L3702/L3702/L3704/L3706
與R3626/R3627/R3631/R3632 co-lay
請近量靠近或少殘線
INTERNAL SPK Conn.
2017/03/23 X542UA_R2.0 #08, Remove SPK EMI reserve RES & CAPs
/SMAP
Check
L3702 1 2 30Ohm/100Mhz 2016/11/10 X542UA_R1.0 #69, Update SPK CONN. pin define ADR1 & GND pin
Irat=5A nbs_l0603_h37_000s
40mils
H_SPKL+_CON 2016/12/19 X542UA_R1.0 #A8, J3701 Pin define modify: R+, R-, L+, L-
J3701
6 8
6 SIDE2
ADR1 5
GND 5
4
Fixed by TI 36 H_SPKL-_CON 4
1
H_SPKL-_CON 3
36 H_SPKL+_CON 3
C3722 H_SPKL+_CON 2
36 H_SPKR-_CON 2
GVDD 1000PF/2KV H_SPKR-_CON 1 7
36 H_SPKR+_CON 1 SIDE1
2
/SMAP H_SPKR+_CON
WtoB_CON_6P
/SMAP /SMAP
12G17100006F
N/A
1
C3715 C3717
R3722 2nd source:
2 1 2 1 Rb 51KOhm GND
CAPP CAPM DACL INPL /SMAP
GND
2
1UF/6.3V 1UF/6.3V
1
C3716
/SMAP C3723 SPK L+ L- R+ R- trace width
1
1000PF/2KV
Speaker 4 ohm ==> 60mils
2
2 1 GAIN/FSW C3747 /SMAP
DACR INPR 1UF/6.3V
2
/SMAP H_SPKL+ /SMAP

1
1UF/6.3V
R3719 L3703 1 2 30Ohm/100Mhz 40mils
Ra 51KOhm H_SPKL- Irat=5A nbs_l0603_h37_000s H_SPKL-_CON
/SMAP /SMAP
L3704 1 2 30Ohm/100Mhz 40mils
2
VNEG INNL INNR LDOO H_SPKR- Irat=5A nbs_l0603_h37_000s H_SPKR-_CON

1
C3718 C3719 C3720 C3721

1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V H_SPKR+
2
1
/SMAP /SMAP /SMAP /SMAP
C3724
GND 1000PF/2KV
2
GND GND GND GND /SMAP
GND
1
C3729
1000PF/2KV <Variant Name>
2
/SMAP
Project Name Rev
/SMAP
L3706 1 2 30Ohm/100Mhz X542UA/UV R2.0
Irat=5A nbs_l0603_h37_000s H_SPKR+_CON
40mils Title : AUD_AMP & SPKR
Size
C
vinafix.com
VINAFIX.COM
eDP (LVDS) Panel LCD Backlight Ctrl
2017/01/20 X542UA_R1.1 #13, R4566 modify to 150K ohm for Panel sequence SL4506 2 1
3 EDP_BRIGHTNESS 0402 EDP_BRIGHTNESS_CON
20160218 X541UV
eDP Panel 3V power
1
R4510 is selected by Panel spec R4505 R4506->SL4506 for cost
100KOhm
+3V_EDP +3VA_DSW
R4566 1 2 150Ohm
2
UX303 1009 GND
+3V_EDP
U4503
R4503 1 6
VOUT VIN +3V_EDP
1KOhm 2 5
1
GND ILIM
2 1 3 4 R4504
3 L_VDDEN_PCH EN/FLAG# DSG
1KOhm
1
UX303C1 0520 NCT3527U
1
C4507 R4510 D4501
2
1
R4581 4.7UF/6.3V 10KOhm C4555 1
3 L_BKLT_EN
1
100KOhm nbs_c0603_h37_000s @ 3
UX303C1 0520 1UF/6.3V C4576 C4550 2 BL_EN_C
2
30 LCD_BACKOFF#
2
0.1UF/6.3V 1UF/6.3V
2
GND BAT54AW
GND GND
GND
GND
R4515 & R4533 pin 1 盡量靠近

R4516 & R4532 pin 1 盡量靠近
CHECK HPD WITH P20 (AMIC/DMIC 只會選一組上件)
AC_BAT_SYS +LED_VCC_INV
UX303 0830
L4506 SL4503
1 2 2 1
3 EDP_HPD_CON 0402 DMIC to Codec
+LED_VCC_INV EDP_HPD_CON_X1 R4506 2 33Ohm 1 @/DMIC_CODEC R4533 @/DMIC 0Ohm
36 DMIC_CLK_B
@ T4504 1 80Ohm/100Mhz R4507 0Ohm @/DMIC_CODEC R4532 2 @/DMIC 1 0Ohm DMIC_CLK_AMIC_AGND
36 DMIC_DAT_B
@ T4502 1 2 1 2 1 DMIC_DATA_AMIC_L
1
1
TPC26T C4568
@ T4503 1 R4521 2016/12/05 X542UA_#A1, Reserve DMIC_CODEC & DMIC_PCH
TPC26T @
@ T4501 1 100KOhm R4518 2 33Ohm 1 @/DMIC_PCH
TPC26T 5PF/50V 22 DMIC_CLK_PCH
2016/12/01 X542UA_R1.0 #94, Del Q4501 circuit. R4517 2 33Ohm 1 @/DMIC_PCH
2
TPC26T 22 DMIC_DAT_PCH
2
DMIC to PCH
GND
2016/10/05 X542UA_#10, Del DMIC R457/R4518 & Modify AMIC Option: N/A & Modify netname
A/D Codec
R4515 0Ohm /AMIC
36 AMIC_GND
R4516 2 33Ohm 1 /AMIC DMIC_CLK_AMIC_AGND
36 AMIC_L
DMIC_DATA_AMIC_L
1
@ @
C4501 C4502
0.1UF/16V 0.1UF/16V
2
GND GND
eDP Panel differential signals
C4504 0.1UF/16V SLN4502B 3 2R4P

4
3 EDP_TXN0
C4505 1 2 0.1UF/16V EDP_L0_N_R SLN4502A 1 2R4P
2 EDP_L0_N_C
3 EDP_TXP0
1 2 EDP_L0_P_R EDP_L0_P_C
2
L4509 +3VS +3V_CAM
90Ohm/100Mhz
@/EMI
3
C4585 0.1UF/16V SLN4503B 3 4
J4501
3 EDP_TXN1
C4586 1 2 0.1UF/16V EDP_L1_N_R SLN4503A 1
2R4P
2 EDP_L1_N_C Camera USB Port SL4502
3 EDP_TXP1 2R4P SIDE1
1 2 EDP_L1_P_R EDP_L1_P_C 1 2 41
0603 1
SLN4504A 1 2 1
23 USB_PP6 2R4P 2 SIDE3
1
SLN4504B 3 4 USB_PP6_R USB_PN6_R 2 43
1
2
23 USB_PN6 2R4P 3
L4510 USB_PN6_R C4574 C4573 USB_PP6_R 3
4
90Ohm/100Mhz 10UF/6.3V 10PF/50V 4
1
5
2
4
3
@/EMI @ DMIC_DATA_AMIC_L 5
4
@/RF 6
L4501 DMIC_CLK_AMIC_AGND 6
7
90Ohm/100Mhz GND GND 7
8
@/EMI EDP_L3_N_C 8
9
2
C4506 0.1UF/16V SLN4501A 1 2 EDP_L3_P_C 9
3 EDP_AUXN 2R4P 10
C4508 1 2 0.1UF/16V EDP_AUXN_R SLN4501B 3 4 EDP_AUXN_C 10
3 EDP_AUXP 2R4P 11
1 2 EDP_AUXP_R EDP_AUXP_C EDP_L2_N_C 11
12
2016/10/06 X542UA_R1.0 #11, Del Touch Panel R4582~R4595/SLN4507/L4502 & C4517 EDP_L2_P_C 12
13
4
13
14
L4504 2016/10/06 X542UA_R1.0 #12, Del EMI reserve C4591/C4592/C4593 EDP_L1_N_C 14
15
90Ohm/100Mhz EDP_L1_P_C 15
16
@/EMI 16
17
1
EDP_L0_N_C 17
18
EDP_L0_P_C 18
19
19
20
EDP_AUXP_C 20
21
EDP_AUXN_C 21
+3V_EDP 22
22
23
23
24
C4587 0.1UF/16V SLN4505B 3 4 24
3 EDP_TXN2 2R4P 25
C4588 1 2 0.1UF/16V EDP_L2_N_R SLN4505A 1 2 EDP_L2_N_C 25
3 EDP_TXP2 2R4P 26
1 2 EDP_L2_P_R EDP_L2_P_C 26
27
27
28
28
1
29
L4511 EDP_HPD_CON_X1 29
30
90Ohm/100Mhz 30
31
@/EMI 31
4
32
32
33
33
34
C4589 0.1UF/16V SLN4506B 3 4 BL_EN_C 34
3 EDP_TXN3 2R4P 35
C4590 1 2 0.1UF/16V EDP_L3_N_R SLN4506A 1 2 EDP_L3_N_C EDP_BRIGHTNESS_CON 35
3 EDP_TXP3 2R4P 36
1 2 EDP_L3_P_R EDP_L3_P_C 36
37
+LED_VCC_INV 37
@/EMI 38
38
1
90Ohm/100Mhz 39
39
L4512 40 SIDE4
40 44
SIDE2
20161207_SWAP 42
Near J4501
4
WTOB_CON_40P
EMI 12017-00181800
BL_EN_C EDP_BRIGHTNESS_CON GND
2nd source: GND
12017-00181600
1
1
C4511 C4512
BOM
10PF/50V 10PF/50V
@/EMI @/EMI Project Name Rev
2
2
X542UA/UV R2.0
GND GND Title : LCD Panel_CMOS_DMIC

Size
C
vinafix.com
VINAFIX.COM
CRT D-SUB
+5VS +5VS_HDMI_CRT
eDP to VGA
1
D4701
SS0540
@
SL4703 F4701
2
2016/10/12 X542UA_#43, Change DP to VGA solution from RTD2168 to RTD2166 1 2 1 2
+5VS_CRT_CON 0805 +5VS_CRT
@
1.5A/6V
1
C4707
20150105 0.1UF/16V
Checking 0314-3 EMI ADD SL4703, SL5201, SL5202 @
2
L4704 & L4705 change to R4718 & R4720
C4729 0.1UF/16V GND

3 DDPB_AUXN_PCH +3VS
1 2 RXAUX_DN
C4736 0.1UF/16V
3 DDPB_AUXP_PCH
1 2 RXAUX_DP
SL4704 1 2
C4737 0.1UF/16V nbs_r0603_shorted_000s AVCC33
3 VGA_LANE0_DP
1 2 DPRX0P SHORTPIN
C4731 0.1UF/16V
3 VGA_LANE0_DN
1 2 DPRX0N +3VS
CRT Connector
C4714 0.1UF/16V
3 VGA_LANE1_DP
1 2 DPRX1P SL4705 1 2 L4701
C4713 0.1UF/16V nbs_r0603_shorted_000s VDD_DAC_33 1 2
3 VGA_LANE1_DN
1 2 DPRX1N SHORTPIN CRT_R_PCH CRT_RED_L
J4701
16
0.082UH
1
R4723
3 DDPB_HPD_PCH
DDPB_HPD_PCH 75Ohm C4701 C4702
1% 10PF/50V 10PF/50V 6
2
R4708 1 11
2
CRT_RED_L 7
100KOhm 2 12
GND GND GND CRT_GREEN_L 8 DDC_DATA_CON
2
3 13
L4702 CRT_BLUE_L 9 HSYNC_CON
+5VS_CRT_CON
GND 1 2 4 14
CRT_G_PCH CRT_GREEN_L 10 VSYNC_CON
1
0.082UH C4712 5 15
1
R4719 0.1UF/16V DDC_CLK_CON
75Ohm C4703 C4704 @/EMI
2
1% 10PF/50V 10PF/50V
2
D_SUB_CON_15P
17
12010-00143200
GND
2 1 SL4708 GND GND GND 2nd source:
5,16,17 SMB_DATA_S3 0402
+3VS 12010-00144100
2 1 SL4702 L4703
5,16,17 SMB_CK_S3 0402 1 2
CRT_B_PCH CRT_BLUE_L
1
0.082UH GND
1
C4727 R4721
0.1UF/16V 75Ohm C4705 C4706
2
1% 10PF/50V 10PF/50V
2
2
GND
DDPB_HPD_PCH
GND GND GND
VCCK_V12
CFG_SDA
CFG_SCL
1
C4723 C4722
0.1UF/16V 2.2UF/10V
2
U4701
34
33
32
31
30
29
28
27
26
25
GND
GND
SMB_SDA
LDO_RSTB
GND3
GND2
HPD
EXT1.2V_CTRL
SMB_SCL
EXT_CLK_IN
PVCC_33
VCCK_12
D4702
CRT_DATA_PCH
1 24 CRT_CLK_PCH
AVCC_33 GND1
AVCC33 2 23 1 6
AUX_P RED_P
RXAUX_DP 3 22 CRT_R_PCH R4704 1 2 36Ohm CRT_GREEN_L I/O1 I/O4 CRT_BLUE_L
AUX_N GREEN_P
RXAUX_DN 4 21 CRT_G_PCH CRT_HSYNC_PCH HSYNC_CON
AVCC_12 BLUE_P
1
VCCK_V12 5 20 CRT_B_PCH
LANE0_P VDD_DAC_33
1
DPRX0P 6 19 VDD_DAC_33 GND CRT_HSYNC_PCH C4708
LANE0_N HSYNC +5VS
To VGA
1
C4726 DPRX0N 7 18 CRT_HSYNC_PCH C4717 CRT_VSYNC_PCH 10PF/50V 2 5

LANE1_P VSYNC +3VS
2
DPRX1P 8 17 CRT_VSYNC_PCH 0.1UF/16V GND VDD
LANE1_N
POL1/SPI_CEB
HVSYNC_PWR
2
GPI1/SPI_CLK
0.1UF/16V DPRX1N
GPI3/SPI_SO
GPI2/SPI_SI
2
1
VGA_SDA
VGA_SCL
VCC_33
C4715 C4725 CRT_R_PCH GND

POL2
4.7UF/6.3V 0.1UF/16V GND CRT_G_PCH 3 4

2
2
nbs_c0603_h37_000s CRT_B_PCH R4705 1 2 36Ohm CRT_RED_L I/O2 I/O3
06106-00330000
GND RTD2166-VAS-CG CRT_VSYNC_PCH VSYNC_CON
9
10
11
12
13
14
15
16
1
GND GND
TVLST2304AD0
C4709
+3VS 10PF/50V @/EMI
2
0428-1 EMI D3401, D3402, D4702, D5201, PD6001
1
CRT_DATA_PCH
CRT_CLK_PCH
R4709 GND change P/N to 07G028176010

4.7KOhm
+3VS
2
POL2_SCL
POL1_SDA
D4703
Q4701A
1
R4712 +3VS UM6K1N

4.7KOhm 1 6 1 6
@ CRT_DATA_PCH DDC_DATA_CON DDC_CLK_CON I/O1 I/O4 DDC_DATA_CON
1
R4717
2
1
4.7KOhm C4710
2
22PF/25V
GND @ 2 5
2
+3VS +5VS
2
GND VDD
5
4 3
CRT_CLK_PCH DDC_CLK_CON 3 4
VSYNC_CON I/O2 I/O3 HSYNC_CON
Q4701B
1
C4711
UM6K1N 22PF/25V
TVLST2304AD0
@
2
@/EMI
FOR EMI
Dean, 0217
CRT_R_PCH CRT_G_PCH CRT_B_PCH 3 4 RN4701B 0307-7 Dean change D4708 pin5 to +5VS
+3VS 2.2KOHM
CRT_DATA_PCH
1
1 2 RN4701A
2.2KOHM
C4734 C4728 C4719 CRT_CLK_PCH
10PF/50V 10PF/50V 10PF/50V
2
5 6 RN4701C
@/EMI @/EMI @/EMI +5VS_HDMI_CRT 2.2KOHM
DDC_DATA_CON
7 8 RN4701D
2.2KOHM
DDC_CLK_CON
GND GND GND
Checking
For RTD2168 modify PU to 2.2K
BOM
Project Name Rev
X542UA/UV R2.0
Title : CRT D-SUB

Size
Custom
vinafix.com
HDMI type-A VINAFIX.COM
+12VS
R1.2_對GND電容,修改為GS電容預留
1
R4801
C4814 100KOhm
0.01UF/25V
@
2
2 1 +5VS_HDMI_CRT
+5VS Q4802
Close to CONNECTOR 2N7002
1
1
G
F4801 1.5A/6V
Near CON J4801 2 3 1 2
3
+5VSHDMI
D
S
07013-00220000
1
C4815 C4809
UX303 0917 2nd source 4.7UF/6.3V 0.1UF/10V
Close J4801 07013-00220100 @
2
2
2017/02/14 X542UA_R1.1 #30, RN4801/02/03/04 modify to SLN4801/02/03/04
nbs_c0603_h37_000s
1 2 RN4801A +3VS +3VS

3 HDMI_DATA2N_PCH 10OHM
C4801 1 2
0.1UF/16V
HDMI_DATA2N_PCH_X1 HDMI_DATA2N_PCH_X2 GND
2
20161207_SWAP
1
L4801 R4803
@ 180Ohm
90Ohm/100Mhz
HDMI CON.
3
RN4811A RN4811B
3
1
RN4810A RN4810B 2.2KOhm 2.2KOhm
3 4 RN4801B 2.2KOhm 2.2KOhm
3 HDMI_DATA2P_PCH 10OHM
C4802 1 2
0.1UF/16V
HDMI_DATA2P_PCH_X1 HDMI_DATA2P_PCH_X2
J4801
4
19 20
4
19 P_GND1
Q4807A HDMI_HP_X1 18 22
18 P_GND3
UM6K31N +5VSHDMI 17
2
17
16
16
1 2 RN4802A 1 6 15
3 HDMI_DATA1N_PCH 10OHM 3 DDPC_SCL_PCH 15
C4803 1 2
0.1UF/16V HDMI_DATA1N_PCH_X1 HDMI_DATA1N_PCH_X2 DDPC_SCL_PCH_X1 14
14
Q4807B 13
5
13
2
20161207_SWAP UM6K31N 12
1
12
L4802 R4804 4 3 HDMI_CLKN_PCH_X2 11
3 DDPC_SDA_PCH 11
@ 180Ohm DDPC_SDA_PCH_X1 10
10
90Ohm/100Mhz HDMI_CLKP_PCH_X2 9
4
9
HDMI_DATA0N_PCH_X2 8
8
1
7
7
3 4 RN4802B HDMI_DATA0P_PCH_X2 6
3 HDMI_DATA1P_PCH 10OHM 6
C4804 1 2
0.1UF/16V
HDMI_DATA1P_PCH_X1 HDMI_DATA1P_PCH_X2 HDMI_DATA1N_PCH_X2 5
5
4
4
HDMI_DATA1P_PCH_X2 3
3
HDMI_DATA2N_PCH_X2 2 23
2 P_GND4
1 21
1 P_GND2
HDMI_DATA2P_PCH_X2
+3VS HDMI_CON_19P
1 2 RN4803A R4861
3 HDMI_DATA0N_PCH
C4810 1 2
0.1UF/16V HDMI_DATA0N_PCH_X1
10OHM
HDMI_DATA0N_PCH_X2 1 2 12022-00092900
GND
2
20161207_SWAP 1MOhm GND
1
G
L4803 R4805 2nd source:
1
@ 2 1 SL4802 2 3 C4805 C4806 C4807
180Ohm
3 HDMI_HP 0402 12022-00097200
S
90Ohm/100Mhz HDMI_HP_X1 22PF/25V 22PF/25V 22PF/25V
D
3
4
@/EMI @/EMI @/EMI
1
1
2
R4826
3 4 Q4804
RN4803B 20KOhm
3 HDMI_DATA0P_PCH 10OHM 2N7002K
C4811 1 2
0.1UF/16V HDMI_DATA0P_PCH_X1 HDMI_DATA0P_PCH_X2
2
20150707 EMI預留
GND
1 2 RN4804A
3 HDMI_CLKN_PCH 10OHM
C4812 1 2
0.1UF/16V HDMI_CLKN_PCH_X1 HDMI_CLKN_PCH_X2
HDMI HPD
2
2 20161207_SWAP
1
L4804 R4806
@ 180Ohm
90Ohm/100Mhz
3
1
3 4 RN4804B
3 HDMI_CLKP_PCH 10OHM
C4813 1 2
0.1UF/16V HDMI_CLKP_PCH_X1 HDMI_CLKP_PCH_X2
R4831 1 1% 2 470Ohm
R4836 1 1% 2 470Ohm HDMI_DATA2P_PCH_X1 2017/02/06 X542UA_R1.1 #25, U4802/03/U5202/03/U5506/07 add 07G028076030
HDMI_DATA2N_PCH_X1 UX303 1016 SWAP
R4832 1 1% 2 470Ohm U4802
R4833 1 1% 2 470Ohm HDMI_DATA1P_PCH_X1 1
Line-1
HDMI_DATA1N_PCH_X1 HDMI_DATA2P_PCH_X2 2 9
Line-2 NC4
R4834 1 1% 2 470Ohm HDMI_DATA2N_PCH_X2 3 8 HDMI_DATA2P_PCH_X2
GND NC3
R4835 1 1% 2 470Ohm HDMI_DATA0P_PCH_X1 4 7 HDMI_DATA2N_PCH_X2
Line-3 NC2
HDMI_DATA0N_PCH_X1 HDMI_DATA0P_PCH_X2 5 6 HDMI_DATA0P_PCH_X2
Line-4 NC1
R4838 1 1% 2 470Ohm HDMI_DATA0N_PCH_X2 HDMI_DATA0N_PCH_X2
R4837 1 1% 2 470Ohm HDMI_CLKP_PCH_X1 AZ1045-04F /EMI 2nd source:
HDMI_CLKN_PCH_X1 07024-00760000
GND
07G028076030
07024-00960000
3
D
+3VS Q4801
2N7002K U4803
1 1
Line-1
G HDMI_DATA1P_PCH_X2 2 9
S Line-2 NC4
HDMI_DATA1N_PCH_X2 3 8 HDMI_DATA1P_PCH_X2
2
GND NC3
UX303 0917 follow design guide R2.2 4 7 HDMI_DATA1N_PCH_X2
Line-3 NC2
HDMI_CLKP_PCH_X2 5 6 HDMI_CLKP_PCH_X2
Line-4 NC1
GND HDMI_CLKN_PCH_X2 HDMI_CLKN_PCH_X2
AZ1045-04F /EMI 2nd source: BOM
07G028076030 07024-00760000
GND 07024-00960000 Project Name Rev
X542UA/UV R2.0
Title : HDMI-type D
Size
C
vinafix.com
VINAFIX.COM
CPU Thermal Sensor
+3VS
1
R5001
14KOHM
U5001
2
1 2R4P
2 SLN5001A 1 5 4 2R4P
3 SLN5001B
28,76 SMB1_CLK_S SCL SDA SMB1_DAT_S 28,76
SML1_CLK_TH 2 SML1_DAT_TH
GND
3 4
32 CPU_THERM# ALERT# VDD +3VS
1
O/D NCT7717U C5001
0.1UF/10V
2
GND GND
Route CPU_THRM_DA , CPU_THRM_DC and on

the same layer
SL5001 ------------------OTHER SIGNALS

SHORT_LAND 10 mils
1 2
+5VS +5V_FAN ===============GND
10 mils
=========H_THERMDA(10 mils)
DC FAN Control 10 mils
=========H_THERMDC(10 mils)
10 mils
=========GND
10 mils
---------------------OTHER SIGNALS
Avoid FSB,Power
+3VS +5V_FAN
1
1
R5002 C5003 C5002
10KOhm 10UF/6.3V 0.1UF/10V
@
J5001
2
2
4 6
4 SIDE2
GND GND 3
30 FAN0_PWM 3
2
2
1 5
30 FAN0_TACH 1 SIDE1
1
C5004 C5005 WTOB_CON_4P

100PF/50V 100PF/50V
12017-00071600
2
2nd source:
GND GND GND GND
1 T5004
+5V_FAN
1 T5003
FAN0_PWM
1 T5001
FAN0_TACH
<Variant Name>
Project Name Rev
請將測點至於TOP面 X542UA/UV R2.0

R2.0 新增_Tim_20150820 Title : 50_FAN_Thermal Sensor
Size
B
vinafix.com
VINAFIX.COM
SATA ODD CONN.

2016/10/06 X542UA_#13, Add SATA ODD CONN. & SATA HDD FPC CONN. circuit
+3VS +12VS +5VS +5VS_ODD

J5101
2 @ 1
P6
2
R5101 0Ohm P6
1
NP_NC2 P5
R5102 R5103 nbs_r0805_h24_000s 2 P5 1 2 SL5101
P4 0402 SATA_ODD_DA# 21
10KOhm 1MOhm P4 SATA_ODD_DA#_R
P_GND2 P3
@ 4 P3 1 2 SL5102
P2
P2 1 T5101 0805 +5VS_ODD 2A
2
P1
1
P1 1 2 SL5103
5
D 0805
Q5101
PEA28BA
4
+5VS_ODD_EN G S
S7
S7 C5101 1 2 0.01UF/16V
S6 SATA1_ODD_RX_DP 23
S6 SATA_RXP1_C C5102 1 2 0.01UF/16V
1
2
3
S5 SATA1_ODD_RX_DN 23
S5 SATA_RXN1_C
S4
S4 C5103 1 2 0.01UF/16V
3
3D P_GND1 S3 SATA1_ODD_TX_DN 23
3 S3 SATA_TXN1_C C5104 1 2 0.01UF/16V
S2 SATA1_ODD_TX_DP 23
S2 SATA_TXP1_C
NP_NC1 S1
1 S1
1 1
21 SATA_ODD_PWRGT SATA_CON_13P
1
G C5108 C5105 C5106 C5107
2
1000PF/50V 22UF/6.3V 10UF/6.3V 0.1UF/16V GND 12015-00042700 GND
nbs_c0805_h57_000s nbs_c0603_h37_000s
1
2 S
2
2N7002K @ 2nd source:
Q5102 12015-00047200
2
GND GND GND
2016/11/16 X542UA_R1.0 #82, Remove J5102

2016/11/28 X542UA_R1.0 #91, Add J5102 B to B CONN. from MB to HDD DB
SATA HDD BtoB CONN.

J5102
23
24
GND
2 SIDE3 1
SIDE4
2 1 +3VS
4 3
23 SATA0_HDD_TX_DP
6
4 3
5
1A
23 SATA0_HDD_TX_DN 6 5
8 7
8 7 +5VS
10 9
23 SATA0_HDD_RX_DN
12
10 9
11
2A
23 SATA0_HDD_RX_DP 12 11
14 13
14 13
16 15
23 SATA0_DEVSLP 16 15
18 17
SIDE1
SIDE2
18 17
20 19
20 19
12G160H00208
BTOB_CON_20P
21
22
BOM
2nd source:
Project Name Rev
X542UA/UV R2.0
GND GND GND Title : SATA ODD

Size
B
vinafix.com
USB3.0_Port 0
VINAFIX.COM
+5V_USB +5V_USB_CON1
2 1 SLN5213A
23 USB_PN1
4
2R4P
3 SLN5213B USB_U1-
J5201
2R4P
23 USB_PP1
USB_U1+ 1 2 SL5201 1
0805 VBUS
2
D-
3
L5233 USB_U1- 3
D+
1
90Ohm/100Mhz C5215 C5216 USB_U1+ 4
GND
@/EMI 22UF/6.3V 22UF/6.3V C5234 + CE5202 5
STDA_SSRX-
nbs_c0805_h57_000s nbs_c0805_h57_000s 0.1UF/16V 100UF/6.3V U3_U3RXDN1_R 6
STDA_SSRX+
2
@ U3_U3RXDP1_R 7
@ GND_DRAIN
2
nbs_c3528_h83_000s 8
STDA_SSTX-
U3_U3TXDN1_R 9
nbs_choke_4p_011c STDA_SSTX+
U3_U3TXDP1_R
L5206 10
1
P_GND1
90Ohm/100Mhz GND GND GND GND 11
P_GND3
@/EMI 12
P_GND4
13
4
P_GND2
USB_CON_9P
12013-00150200
C5209 2 1 0.1UF/16V 4 3 SLN5215B GND
23 U3_U3TXDP1 2R4P
C5210 2 1 0.1UF/16V U3_U3TXDP1_R1 2 2R4P
1 SLN5215A U3_U3TXDP1_R
23 U3_U3TXDN1
U3_U3TXDN1_R1 U3_U3TXDN1_R 2nd source:
12013-00151700
4 2R4P
3 SLN5216B
23 U3_U3RXDP1
2 2R4P
1 SLN5216A U3_U3RXDP1_R 2016/10/12 X542UA_R1.0 #40, Modify U5201 circuit & change OC from 3.2A to 2.5A
23 U3_U3RXDN1
U3_U3RXDN1_R 2017/03/23 X542UA_R2.0 #09, U5201 change spec from 2.5A to 3.2A
+5V_USB_CON1
USB3.0 Power SW for Power Protect
4
USB_U1- USB_U3-
L5209
90Ohm/100Mhz
I/O4
I/O3
VDD
@/EMI
4
+5VSUS +5V_USB
D5202
U5202 AZC099-04SP U5201 T5201
1 1
Line-1 30,57,68,88 SUSC_EC# EN#/EN OC#
U3_U3RXDN1_R 2 9 /EMI 4 5
Line-2 NC4 IN2 OUT3
U3_U3RXDP1_R 3 8 U3_U3RXDN1_R 3 6
GND NC3 IN1 OUT2
4 7 U3_U3RXDP1_R 07024-00200200 2 7
Line-3 NC2 GND OUT1
U3_U3TXDN1_R 5 6 U3_U3TXDN1_R 1 8
Line-4 NC1
1
U3_U3TXDP1_R U3_U3TXDP1_R C5208 BD82046FVJ-GE2 C5207
2
1
3
I/O2
I/O1
GND
AZ1045-04F /EMI 2nd source: 10UF/25V C5206 22UF/6.3V
@ 1UF/25V 06016-01290000
07024-00760000
1
07G028076030
2
GND 07024-00960000 nbs_c0805_h49_000s
2017/02/06 X542UA_R1.1 #25, U4802/03/U5202/03/U5506/07 add 07G028076030

USB_U1+ USB_U3+
GND GND GND GND GND
USB3.0_Port 1
2 2R4P
1 SLN5201A
23 USB_PN3
4 2R4P
3 SLN5201B USB_U3-
23 USB_PP3
USB_U3+
4
L5201
90Ohm/100Mhz
@/EMI
1
+5V_USB +5V_USB_CON2
nbs_choke_4p_011c J5202
L5202 1 2 SL5202 1
2
0805 VBUS
90Ohm/100Mhz 2
D-
@/EMI USB_U3- 3
D+
1
C5212 C5211 USB_U3+ 4
3
GND
22UF/6.3V 22UF/6.3V C5213 + CE5203 5
STDA_SSRX-
nbs_c0805_h57_000s nbs_c0805_h57_000s 0.1UF/16V 100UF/6.3V U3_U3RXDN4_R 6
STDA_SSRX+
2
@ U3_U3RXDP4_R 7
@ GND_DRAIN
2
C5204 2 1 0.1UF/16V 4 3 SLN5202B nbs_c3528_h83_000s 8
23 U3_U3TXDP4 2R4P STDA_SSTX-
C5205 2 1 0.1UF/16V U3_U3TXDP4_R1 2 1 SLN5202A U3_U3TXDP4_R U3_U3TXDN4_R 9
23 U3_U3TXDN4 2R4P STDA_SSTX+
U3_U3TXDN4_R1 U3_U3TXDN4_R U3_U3TXDP4_R
10
P_GND1
GND GND GND GND 11
P_GND3
4 3 SLN5203B 12
23 U3_U3RXDP4 2R4P P_GND4
2 1 SLN5203A U3_U3RXDP4_R 13
23 U3_U3RXDN4 2R4P P_GND2
U3_U3RXDN4_R
USB_CON_9P
12013-00150200
GND
3
L5203 2nd source:

90Ohm/100Mhz 12013-00151700
@/EMI
2
U5204
1
Line-1
U3_U3RXDN4_R 2 9
Line-2 NC4
U3_U3RXDP4_R 3 8 U3_U3RXDN4_R
GND NC3
4 7 U3_U3RXDP4_R
Line-3 NC2
U3_U3TXDN4_R 5 6 U3_U3TXDN4_R
Line-4 NC1
U3_U3TXDP4_R U3_U3TXDP4_R
BOM
AZ1045-04F /EMI 2nd source:
07G028076030 07024-00760000 Project Name Rev
GND 07024-00960000
X542UA/UV R2.0
Title : USB 3.0 + 2.0 CONN.

Size
C
vinafix.com
VINAFIX.COM
WLAN CONN.
2016/10/07 X542UA_R1.0 #25, Change WLAN CONN. to NGFF, follow X456U
+3VSUS_WLAN +3VS +3VSUS_WLAN
R5311 1 @ 2 0Ohm
nbs_r0603_h24_000s
+3VSUS
1
C5301 C5307 C5308
33PF/50V 0.1UF/16V 10UF/25V SL5301
@ 1 2
2
0603
2016/11/14 X542UA_R1.0 #74, WLAN power modify to +3VSUS for wake on WLAN
GND
+3VSUS_WLAN
J5301
78
79
76
77
GND
NP_NC1
NP_NC2
GND11
SIDE1
SIDE2
1
3.3Vaux4 USB_D+ USB_PP8 23
2 3
3.3Vaux3 USB_D- USB_PN8 23
1 4 5
T5301 LED#1(I)/(OD) GND10
WLAN_LDE# 6 7
PCM_CLK(OI)/(0/1.8V) SDIO_CLK(O)/(0/1.8V)
8 9
PCM_SYNC(OI)/(0/1.8V) SDIO_CMD(IO)/(0/1.8V)
10 11
PCM_IN(I)/(0/1.8V) SDIO_DAT0(IO)/(0/1.8V)
12 13
PCM_OUT/(O)/(0/1.8V) SDIO_DAT1(IO)/(0/1.8V)
1 14 15
T5303 LED#2(I)/(OD) SDIO_DAT2(IO)/(0/1.8V)
BT_LDE# 16 17
+3VSUS_WLAN GND1 SDIO_DAT3(IO)/(0/1.8V)
18 19
UART/Wake(I)/(0/3.3V) SDIO_Wake(I)/(0/1.8V)
20 21
UART/Rx(I)/(0/1.8V) SDIO_Reset(O)/(0/1.8V)
22 23
1
R5306
UART/Tx(O)/(0/1.8V) GND9
10KOhm 32 33
UART/CTS(I)/(0/1.8V) PETP0 PCIE_TXP_WLAN 23
34 35
5% UART/RTS(O)/(0/1.8V) PETn0 PCIE_TXN_WLAN 23
36 37
2
RESERVED7 GND8
38 39
RESERVED6 PERp0 PCIE_RXP_WLAN 23
D5301 40 41
RESERVED5 PERn0 PCIE_RXN_WLAN 23
BAT54CW 42 43
COEX3/(0/1.8V) GND7
1 44 45
COEX2/(0/1.8V) REFCLKP0 CLK_PCIE_WLAN 24
3 46 47
21 BT_ON/OFF# COEX1/(0/1.8V) REFCLKN0 CLK_PCIE_WLAN# 24
2 BT_ON_NGFF 48 49
24 SUS_CK SUSCLK(32kHz)/(O)(0/3.3V) GND6
50 51
25,30,33,54,68,70 BUF_PLT_RST# PERST0#(O)/(0/3.3V) CLKREQ0#(IO)/(0/3.3V) CLKREQ_WLAN# 24
52 53
Reserved/W_DISABLE#2(O)/ (0/3.3V) PEWake0#(IO)/(0/3.3V) PCIE_WAKE# 25,33,54
BT_ON_NGFF 54 55
W_DISABLE#1(O)/(0/3.3V) GND5
@ WLAN_ON_NGFF 56 57
I2C/DATA(IO)/(0/3.3) Reserved/2nd_Lane_PETp1
0Ohm 2 1 R5309 58 59
I2C/CLK(O)/(0/3.3) Reserved/2nd_Lane_PETn1
60 61
ALERT(I)/(0/3.3) GND4
62 63
RESERVED4 Reserved/2nd_Lane_PERp1
20150804 64 65
Reserve D5301, R5301 & R5304 for BT-ON_PCH, prevent +3VS leakage at S3/S4/S5 RESERVED3 Reserved/2nd_Lane_PERn1
66 67
RESERVED2 GND3
68 69
RESERVED1 RESERVED9
70 71
3.3Vaux2 RESERVED8
2017/01/12 X542UA_R1.1 #05, Modify BT_ON & WLAN_ON circuit 72 73
3.3Vaux1 GND2
74 75
MINI_PCI_75P
12003-00076000
WLAN_ON_NGFF
GND
Q5301 GND
3
D
2N7002K
1
25 WLAN_ON#
G
S
07G005000B12
2
2nd = 07G005000N11
GND
@
0Ohm 2 1 R5310
<Variant Name>
20150813 Project Name Rev

Reserve Q5301, R5302, R5503 & R5305 for WLAN_ON_PCH, prevent +3VS leakage
X542UA/UV R2.0
Title : MINICARD(WLAN)
Size
B
vinafix.com
VINAFIX.COM
Main Board
SSD CONN.
+3VS +3VS_SSD
2016/10/06 X542UA_#24, Add SSD circuit follow T303UA SL5401 1.5A

1 2
0603
1
C5401 C5408 C5405
0.1UF/16V C5407 C5409 C5406 C5404 10UF/6.3V 10UF/6.3V
@/EMI 0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V
2
GND GND
6/8 Jacky add 0.1UF for ESD

SATA DEVSLP.
+3VS_SSD
SL5402 1 2
23 SATA2_DEVSLP 0402 SATA2_DEVSLP_R
1
1007-11 Dean R5401
0Ohm
J5401
@/PCIESSD 2 1
3.3V_1 GND/CONFIG_3
4 3 2016/10/27 X542UA_R1.0 #65, Modify PCIE CAPs to P54 & add SATA RX CAPs
2
3.3V_2 GND1
6 5 2016/11/30 X542UA_R1.0 #93, Remove PCIE to SSD
NC1 PERN3
8 7
NC2 PERP3
T5407 1 10 9
DAS/DSS#(OD) GND2
GND NGFF_DAS/DSS# 12 11
3.3V_3 PETN3
14 13
3.3V_4 PETP3
16 15
3.3V_5 GND3
18 17
3.3V_6 PERN2
20 19
PCIE Wake-up. 22
NC3
NC4
PERP2
GND/CONFIG_0
21
+3VS_SSD 24 23
NC5 PETN2
1006-6 Dean 26 25
NC6 PETP2
28 27
1019-4 Dean NC7 GND4
30 29
1026-5 Dean NC8 PERN1
32 31
1
NC9 PERP1
R5405 34 33
NC10 GND5
@/PCIESSD 10KOhm 36 35
NC11 PETN1
Q5401A @/PCIESSD 38 37
DEVSLP(0/3.3V) PETP1
R5404 EM6K1-G-T2R SATA2_DEVSLP_R 40 39
2
NC12 GND6
1 2 42 41 C5416 1 2 0.01UF/16V
25,33,53 PCIE_WAKE# nbs_r0201_h12_000s NC13 PERN0/SATA-B+ SATA2_SSD_RX_DP 23
0Ohm 6 1 NGFF_PEWAKE# 44 43 SATA2_RX_DP_C C5417 1 2 0.01UF/16V PCIE12_RX, For SATA, DP/DN & For PCIE, Revirse
NC14 PERP0/SATA-B- SATA2_SSD_RX_DN 23
@/PCIESSD 46 45 SATA2_RX_DN_C
NC15 GND7
48 47 C5418 1 2 0.01UF/16V
NC16 PETN0/SATA-A-
2
SATA2_SSD_TX_DN 23
SL5404 1 2 50 49 SATA2_TX_DN_C C5419 1 2 0.01UF/16V
+3VS_SSD 25,30,33,53,68,70 BUF_PLT_RST# 0402 PERST#(0/3.3V)/NC PETP0/SATA-A+ SATA2_SSD_TX_DP 23
T5411 1 NGFF_PERST# 52 51 SATA2_TX_DP_C
CLKREQ#(IO)(0/3.3V)/NC GND8
NGFF_CLK# 54 53
PEWAKE#(IO)(0/3.3V)/NC REFCLKN
T5408 1 NGFF_PEWAKE# 56 55
NC/MFG1 REFCLKP
T5409 1 NGFF_MFG1 58 57
NC/MFG2 GND9
NGFF_MFG2
T5410 1 68 67
R1.2 For PCIE/SATA select SUS_CK_IO 70
SUSCLK(32KHZ)/(0/3.3V)
3.3V_7 PEDET
NC17
/NC-PCIo/GND-SATA)/CONFIG_1
69
72 71 NGFF_CONFIG1
3.3V_8 GND10
+3VS_SSD 74 73
1006-6 Dean 3.3V_9 GND11
NP_NC1
NP_NC2
75
SIDE1
SIDE2
GND/CONFIG_2
1105-1 EMI MINI_PCI_75P_REMOVE8

1
76
77
78
79
R5409
1
10KOhm R5408
@/PCIESSD 10KOhm NGFF_PERST#
@/PCIESSD
2
1
C5402 2017/01/23 X542UA_R1.1 #15, J5401 modify to 12003-00162200
2
23 MSATA_MPCIE_DET# nbs_r0201_h12_000s
100PF/50V 12003-00162200
nbs_r0201_h12_000s
@/PCIESSD @/EMI
2
3
Q5401B 2nd source:

EM6K1-G-T2R GND
5
NGFF_CONFIG1
4
@/PCIESSD GND
C5403 M.2 SSD I/F
0.1UF/16V PCIE : N.C
2
SATA : GND
GND GND
R5411 1 2 0Ohm
MSATA_MPCIE_DET# NGFF_CONFIG1
2016/10/27 X542UA_R1.0 #64, Add R5411 & unstaff Q5401 & R5408
<Variant Name>
Title : OTH_KB+TP+Camera
NB2_RD1_EE1
Engineer: Joach_Wang
Size Project Name Rev
C X542UA/UV R2.0
vinafix.com
VINAFIX.COM
USB 3.0 TypeC CONN.

+USB_C_VBUS
2016/10/06 X542UA_#24, Add SSD circuit follow T303UA
3A = 120 mils
1
C5503 C5502 C5505 C5504
0.1UF/16V 47UF/6.3V 22UF/6.3V 22UF/6.3V
2
@ @
20161207_SWAP GND GND GND GND J5501
4
USB3.0 Bus @/EMI/USB3.0
90Ohm/100MHz 2017/02/06 X542UA_R1.1 #25, U4802/03/U5202/03/U5506/07 add 07G028076030 A1 B1
GND1 GND4
L5504 A2 B2
3
SSTXp1 SSTXp2
U3_U3TXDP2_C A3 B3 U3_U3TXDP3_C
SSTXn1 SSTXn2
U3_U3TXDN2_C A4 B4 U3_U3TXDN3_C
USB3.0 ESD-Protection A5
VBUS1 VBUS4
B5
4
CC1 CC2
@/EMI/USB3.0 USB_C_CC1 A6 B6 USB_C_CC2
Dp1 Dp2
90Ohm/100MHz U2DP_AB_C A7 B7 U2DP_AB_C
L5506 U5506 U2DM_AB_C A8
Dn1 Dn2
B8 U2DM_AB_C
2016/06/14
3
1 A9
SUB1 SUB2
B9 X456UQK R1.4 Note 2
Line-1 VBUS2 VBUS3
U3_U3TXDP3_C 2 9 A10 B10
Line-2 NC4 SSRXn2 SSRXn1
SLN5501A 1 2 U3_U3TXDN3_C 3 8 U3_U3TXDP3_C U3_U3RXDN3_C A11 B11 U3_U3RXDN2_C
23 U3_U3RXDP2 2R 4P GND NC3 SSRXp2 SSRXp1
SLN5501B 3 4 U3_U3RXDP2_C 4 7 U3_U3TXDN3_C U3_U3RXDP3_C A12 B12 U3_U3RXDP2_C
23 U3_U3RXDN2 2R 4P Line-3 NC2 GND3 GND2
0.1UF/16V C5508 SLN5502B 3 4 U3_U3RXDN2_C U3_U3RXDP3_C 5 6 U3_U3RXDP3_C
23 U3_U3TXDP2 2R 4P Line-4 NC1
0.1UF/16V 2 1 C5509 U3_U3TXDP2_L SLN5502A 1 2 U3_U3TXDP2_C U3_U3RXDN3_C U3_U3RXDN3_C 1 3
23 U3_U3TXDN2 2R 4P NP_NC1 P_GND1
2 1 U3_U3TXDN2_L U3_U3TXDN2_C AZ1045-04F /EMI 2 4 2017/01/20 X542UA_R1.1 #12, Type-C U3 modify
2nd source: NP_NC2 P_GND2
07024-00760000 5
L5505 20161207_SWAP GND
07G028076030 P_GND3
6
07024-00960000
4
USB3.0 Bus 90Ohm/100MHz
P_GND4
7
@/EMI/USB3.0 USB2.0 ESD-Protection P_GND5
P_GND6
8
3
ESD chip should be 5V tolerance USB_CON_24P
3
L5503
20161207_SWAP +USB_C_VBUS
90Ohm/100MHz
@/EMI/USB3.0 U2DM_AB_C 12013-00111000
I/O4
I/O3
VDD
GND 2nd source: GND
4
SLN5503A 1 2 12013-00116300
23
23
U3_U3RXDP3
U3_U3RXDN3
0.1UF/16V C5506
SLN5503B
SLN5504A
3
2R 4P
2R 4P
4
1 SHORT_LAND_2R4P
2
U3_U3RXDP3_C
U3_U3RXDN3_C
USB3.0 ESD-Protection 12013-00119300
23 U3_U3TXDP3 2R 4P
0.1UF/16V 2 1 C5507 U3_U3TXDP3_L SLN5504B 3 SHORT_LAND_2R4P
4 U3_U3TXDP3_C
23 U3_U3TXDN3 2R 4P
2 1 U3_U3TXDN3_L SHORT_LAND_2R4P U3_U3TXDN3_C D5501 U5507
SHORT_LAND_2R4P AZC099-04SP 1
Line-1
U3_U3TXDN2_C 2 9
Line-2 NC4
/EMI U3_U3TXDP2_C 3 8 U3_U3TXDN2_C
GND NC3
4 7 U3_U3TXDP2_C
Line-3 NC2
U3_U3RXDP2_C 5 6 U3_U3RXDP2_C
07024-00200200 Line-4 NC1
SLN5505A 1 2R4P
2 U3_U3RXDN2_C U3_U3RXDN2_C
23 USB_PN2
SLN5505B 3 4 U2DM_AB_C AZ1045-04F /EMI
23 USB_PP2 2R4P 2nd source:
3
I/O2
I/O1
GND
U2DP_AB_C 07024-00760000
GND
07G028076030
07024-00960000
4
L5501 U2DP_AB_C
90OHM
USB2.0 GND
3
2016/11/09 X542UA_R1.0 #68, Reserve RN5501 for USB_C_CC1/CC2 PU to +3V
@/EMI
09G09209011D
+3V
RN5501B @
4.7KOhm
USB_C_CC1 RN5501A 3 4.7KOhm 4 @
USB_C_CC2 1 2
H=1.1
CC Logic
2017/02/02 X542UA_R1.1 #24, 0ohm modify to SL +5VSUS
+3V
T5507
SL5505
1
SL5507 SL5504
1
0402
0805
T5506
0805
1
nbs_r0805_shorted_000s GND +USB_C_VBUS
2
nbs_r0805_shorted_000s 20151007
2
T5505 TI 過認證後改開鋼板JP5501
認證前先用F5501保護
1
1
C5563 C5564
0.1UF/16V 10UF/25V T5504 F5501
U5505
22
21
20
19
18
17
1 2
2
nbs_c0805_h49_000s
GND3
GND2
LD_DET#
UFP#
POL#
AUDIO#
2.6A/6V @
T5508 nbs_polyswitch_2p_017
JP5501
GND GND 1 16
FAULT# DEBUG#
1
USB_C_OC# 2 15 1 2
IN1_1 OUT2 1 2
3 14
IN1_2 OUT1
4 13 1MM_SHORT_PIN
IN2 CC2
5 12 USB_C_CC2 nbs_1mm_open_5mil_000
AUX GND1
1
1
6 11 C5566 C5501 C5562 C5561
EN CC1
USB_C_CC1 10UF/25V 0.1UF/16V 10UF/25V 100UF/6.3V
REF_RTN
CHG_HI
@
2
2
CHG
REF
nbs_c0805_h49_000s nbs_c0805_h49_000s
+3V +3V nbs_c1206_h75_000s
Set CC
7
8
9
10
I limit = 3A SN1507044RVCR
06050-00280000 GND GND GND GND
2
R5511 R5514
10KOhm 10KOhm GND
1
R5509
CHU 100KOhm
CHU_HI
2
2
R5513 R5512
10KOhm 10KOhm
@ @
TI sug U5505
remove pin9 GND
1
GND GND Project Name Rev
X542UA/UV R2.0
Title : USB 3.1 MB Type-C

Size
D
vinafix.com
+5VS +3VS
VINAFIX.COM +VCCIO
R1.1-5 Main Board
20160218 X541UV R1.1
R5703 Stuff for dischager +5VS
1
R5703 R5704 R5707
+3VA 330Ohm 330Ohm 330Ohm
@ @
2
Q5702B
1
R5701 EM6K1-G-T2R
3
Q5702A
100KOhm
EM6K1-G-T2R 5
6
UM6K1N
@
4
5 Q5701B 2 @
1
6
UM6K1N
2 Q5701A GND GND GND
30,77,88 SUSB_EC#
1
GND
20151127 X541UV DEL +1.8VS
+NVVDD +PEX_VDD +VDD_MAIN +VDD_AON +FBVDDQ
1
R5722 R5705 R5721 R5718 R5720
330Ohm 33Ohm 33Ohm 330Ohm 330Ohm
@ /VGA /VGA
@ @
2
@ @
Q5705A Q5705B
+NVDD_DSG +PEX_VDD_DSG +3VSG_MAIN_DSG +3VSG_AON_DSG +1.35VSG_DSG
D5701 EM6K1-G-T2R EM6K1-G-T2R
3
1 Q5703A Q5703B Q5704A Q5704B
77 dGPU_PWR_MAIN_DSG#
3 2 UM6K1N 5 UM6K1N 2 UM6K1N 5 UM6K1N 2 5
2 dGPU_PWR_MAIN_DSG#_R /VGA /VGA /VGA /VGA
4
BAT54CW
1
/VGA R5730 GND GND GND R5731 GND R5714 GND
1MOhm 1MOhm 1MOhm
/VGA @/VGA @/VGA
2
GND GND GND
77 dGPU_PWR_AON_DSG#
77 dGPU_PWR_15#
4/20 Stuff R5710 and R5711

R1.1-5
+3V
1 +VCCST +1.2V
1
R5711 R5723 R5712
+3VA 330Ohm 330Ohm +3VA 330Ohm
@
2
2
1
1
R5702 R5708
Q5708A Q5708B
100KOhm 100KOhm
EM6K1-G-T2R EM6K1-G-T2R
3
6
UM6K1N UM6K1N
@ @
2
2
5 Q5706B 2 5 2 Q5707A
4
1
6
3
UM6K1N UM6K1N
2 Q5706A GND GND 5 Q5707B GND
30,52,68,88 SUSC_EC# 25,30,86 PM_SUSC#
1
4
GND GND
2017/02/09 X542UA_R1.1 #27, Stuff R5712 & modify SUSC_EC# to PM_SUSC#
+3VA +3VA_EC
+3VA +5VSUS +3VA +3VSUS +1.0VSUS +1.8VSUS
UX303 0827
1
R5713 R5756 2
1
2
100KOhm 330Ohm R5715 R5719
1
100KOhm 124Ohm R5709 R5717 R5710 R5706
@ @ @ 100KOhm 124Ohm 124Ohm 124Ohm
2
@ @ @ @
2
@
1
1
3
EM6K1-G-T2R
3
3
5 Q5709B EM6K1-G-T2R EM6K1-G-T2R EM6K1-G-T2R EM6K1-G-T2R
5 Q5710B 5 Q5711B 2 Q5712A 5 Q5712B
UX303C1 0616
4
@ @ @ @
4
4
@
6
EM6K1-G-T2R
6
6
Q5709A EM6K1-G-T2R EM6K1-G-T2R
2
32,88 PS_ON Q5710A Q5711A
2 2
1
30,87 5VSUS_ON 30,83,88 VSUS_ON

@ @ GND GND GND
1
1
@
GND GND
GND GND
GND
UX303 1015
BOM
Project Name Rev
X542UN/URV R1.0
Title : DSG_Discharge
Size
C
vinafix.com
VINAFIX.COM
Main Board
+3VA_DSW +3VA_DSW
1
R5852
1
100KOhm
R5811 R1.0-7
2
100KOhm
2014/12/26
2
20150325 remove VCCPRIM_PWRGD
R1.1 follow VC & intel sequence D5804
1
25,30,87 3VA_DSW_PWRGD
3
2
83 1.0VSUS_PWRGD
BAT54AW
+3VA_DSW +1.0V_VCCST
SL5808
VCCST_PWRGD for PCH
1 2
88 P_3VSUS_PWRGD 0402 3VSUS_PWRGD 30
3VSUS_PWRGD
+3VA_DSW
20150108
1
Checking
R5801 R5803 R5803 near CPU side
1
R5809 100KOhm 1KOhm
100KOhm R1.0-2
2
D5805 @ VCCST_PWRGD_PCH 25
BAT54CTB
2
D5803 1
3
UM6K1N
1 3
83 1.8VSUS_PWRGD Q5801B
3 2 5
2
4
25,30 DPWROK_EC
6
UM6K1N
BAT54AW
SL5802 1 2 2 Q5801A
0402
ALL_SYSTEM_PWRGD
1
1
@
+3VSUS C5801
0.1UF/6.3V
2
2
GND GND GND

R5805
100KOhm
D5802
1
1
3VSUS_PWRGD 3 +3VS 2.5V_PWRGD

2 EMI solution
88 VCCST_PWRGD
1
@
BAT54AW C5803
0.1UF/6.3V
2
+3VSUS +3VA_DSW
1
R5806
10KOhm GND
2
R5807 R5812
2
100KOhm 100KOhm
R1.0-7
1
20150325
R1.1 follow VC & intel sequence D5801
1 SL5801
25,30,88 PM_SUSB#
3 1 2
0402 ALL_SYSTEM_PWRGD 25,30,80
2
86 1.2V_PWRGD
BAT54AW
1
C5804
100PF/50V 2017/02/13 X542UA_R1.1 #29, C5802 stuff 0.01uF for S0 to DS3 tPLT17
1
2
+3VSUS +3VSUS C5802

0.01UF/25V
2
GND
2
GND
BOM
R5813 R5814
100KOhm 100KOhm Project Name Rev
D5806 X542UA/UV R2.0

1
1
88 VCCIO_PWRGD
3 Title : PRO_Protect
2
86 2.5V_PWRGD Size
B
BAT54AW
vinafix.com
2016/10/06_X542UA_R1.0 #22, Del LED circuit
VINAFIX.COM
+3VA
2nd follow X541U
06045-00050100
2nd source: J5901
06033-00140000
1
VDD
3
GND
2
30 LID_SW# OUTPUT
LID_SW#
YB8248ST23
1
C5901
0.1UF/16V
2 1 2
D5911
@/ESD
GND
current: 1m
GND
PWR_SW# 30,31,32
PWR_SW#
JDEBUGSW5901
1
C5902 1 3
0.1UF/16V
/PR
2
2 4
SW_4P
/PR
GND
<Variant Name>
Project Name Rev
X542UA/UV R2.0
Title : 59_Power & WIFI & CAP LED
Size
A
vinafix.com
Power
VINAFIX.COM
Note:<=65W bead*3;
90W~~150W:Bead*4;
+V_DCJACK >=180W: bead*6 A/D_DOCK_IN
1 PT6001
1 PT6002
1 PT6003
1 PT6004 PL6001
120Ohm
1 2
J6001
PIN(+)
9 PL6002
1
7 +V_DCJACK 120Ohm PR6002 PR6003
SPRING(-) 8 1 2 2.2Ohm 2.2Ohm
1
1
2 PC6001 PL6003 PC6003 PC6004
2
3 0.1UF/25V 120Ohm 1UF/25V 0.1UF/25V
GND
4 1 2 @ P_AC_SNB_20
1
5 PC6005 2mm
6 1 PT6005 10UF/25V
1 PT6006
2
DC_PWR_JACK_9P 1 PT6007
1 PT6008
12033-00030500
GND GND
換Connector 整個 GND Shape 都要跟PIN腳連起來
20150706
H6001為一顆螺絲接通 BAT_EN# 和 GND,電池才開始送電
Battery Connector 20160216
H6001 Change temp_T_0390
BAT_CON
20160329
H6001 Change s10270
2016/11/11 X542UA_#71, Modify J6002, battery pin define follow X456U battery
J6002
NP_NC1
9 1 PT6022
1
1 1 PT6020
2
2 PR6004 1 2 330Ohm
3 SMB0_CLK 30,89
3 SMB0_DAT_CLK_CON PR6005 1 2 330Ohm
4 SMB0_DAT 30,89
4 SMB0_DAT_BAT_CON
5
5 PD6001
6
6 BAT_EN#
7
7 I/O3 I/O2
8
8 4 3
NP_NC2
1
10 PC6006
0.1UF/25V
H6001 +3VA
BATT_CON_8P
nbs_c0603_h37_000s
2
12020-00010900 1
NP_NC
VDD GND
2 5 2
GND1
3
GND2
I/O4 I/O1
C276D94N 6 1
GND
Pin define should be checked after battery team confirm s10836

AZC099-04SP
<Variant Name>
Project Name Rev
X542UA/UV R2.0
Title : 60_DC_DC & BAT IN
Size
Dept.: Engineer: Power
C
vinafix.com
2016/11/16 X542UA_R1.0 #81, Add HDD DB
2016/11/23 X542UA_R1.0 #88, Modify J6401 to B to B conn. & pin define
2016/11/28 X542UA_R1.0 #92, Modify J6401 to BtoB CONN. from MB to HDD DB & Del J6402 from HDD DB to IO DB
VINAFIX.COM
SATA HDD BtoB CONN.
J6401
24
23
GND_HD
2 1
2 1 1A
SIDE4
SIDE3
+3VS_HD
4 3
4 3
SATA0_HDD_TX_DP_HD 6 5
6 5
SATA0_HDD_TX_DN_HD 8 7
10
8 7
9
+5VS_HD 2A
10 9
SATA0_HDD_RX_DN_HD 12 11
12 11
SATA0_HDD_RX_DP_HD 14 13
14 13
16 15
16 15
SATA0_DEVSLP_HD 18 17
SIDE2
SIDE1
18 17
20 19
20 19
12G161H0020A
BTOB_CON_20P
22
21
GND_HD GND_HD GND_HD
SATA HDD CONN.

SATA HDD
+5VS_HD J6403
2 S1
P_GND2 S1
S2 C6405 2 1 0.01UF/16V
S2
4 S3 SATA_TXP0_C C6406 2 1 0.01UF/16V SATA0_HDD_TX_DP_HD
NP_NC2 S3
S4 SATA_TXN0_C SATA0_HDD_TX_DN_HD
S4
1
C6401 C6410 C6402 S5 C6407 2 1 0.01UF/16V
2
S5
0.1UF/16V 10UF/6.3V 22UF/6.3V S6 SATA_RXN0_C C6408 2 1 0.01UF/16V SATA0_HDD_RX_DN_HD
S6
nbs_c0603_h37_000s nbs_c0805_h57_000s S7 SATA_RXP0_C SATA0_HDD_RX_DP_HD
1
S7
2
HDD_@
P1 1 2 SL6404
P1 0805 +3VS_HD
P2 +3VS_HDD
P2
P3
1A R6402 1 2 0Ohm
P3
P4 SATA0_DEVSLP_C HDD_@
P4
P5 SL6407 1 2
P5 0402
GND_HD +3VS_HD P6 SATA0_DEVSLP_HD
P6
P7 1 2 SL6405
P7 0805 +5VS_HD
P8 +5VS_HDD
P8
P9
2A 1 2 SL6406
P9 0805
P10
P10
T6402
1
C6403 C6404 P11 1
P11
0.1UF/16V 10UF/6.3V P12
P12
0805 SL 拉40 mil trace = 1A

HDD_@ nbs_c0603_h37_000s 3 P13
NP_NC1 P13
2
HDD_@ P14
P14
1
P_GND1 P15
P15
for power consumption
SATA_CON_22P
12015-00295500
2nd source:
GND_HD 12015-00295200
GND_HD
GND_HD
以list 2nd footprint 下去layout 避免干涉
Near J6403
U6401
1
EMI SATA0_DEVSLP_HD
Line-1
SATA_TXP0_C 2 9
Line-2 NC4
SATA_TXN0_C 3 8 SATA_TXP0_C
GND NC3
1
4 7 SATA_TXN0_C C6409
Line-3 NC2
SATA_RXN0_C 5 6 SATA_RXN0_C 0.1UF/16V
Line-4 NC1
SATA_RXP0_C SATA_RXP0_C HDD_@/EMI
A-B: 2
2
AZ1045-04F HDD_@/EMI 2nd source:
07G028076030 07024-00760000
GND_HD 07024-00960000
BtoB NUT s GND_HD
H6401 H6402
CT236B195ID165 CT236CB195D165
13NB0621M09011 13020-01480000
nbs_nut_1p_343 nbs_nut_1p_343
2nd source: 2nd source:

13020-01370600 13020-01370700
GND_HD GND_HD
C-D E-D G-D G-H: 2
H6403 H6407 H6406
1 1 1
H6404 H6405
NP_NC NP_NC NP_NC
2 5 2 5 2 5 1 1
GND1 GND4 GND1 GND4 GND1 GND4 BOM
3 4 3 4 3 4 C98D98N C98D98N
GND2 GND3 GND2 GND3 GND2 GND3
Project Name Rev
s09684 s09684
X542UA/UV R2.0
c276d98n CRT591X374CB276D98N CB276D98N
GND_HD GND_HD GND_HD GND_HD GND_HD GND_HD Title : IO_SATA HDD & SPEAKER
s07694 s10841 s10828
Size
C
vinafix.com
2016/10/18 X542UA_R1.0 #48, Update H65-1~H6506 for CPU/DGPU/SSD nuts
VINAFIX.COM
O-P + R-Q: 6
TOP CPU NUT S footprint: 342 TOP GPU NUT S footprint: 303
2017/01/23 X542UA_R1.1 #14, H6503 & H6504 modify to 13020-00880000
H6503 H6504 H6505 H6506 H6501 H6502

/VGA /VGA
CT256BRID146 CT256BRID146 CT256BRID146 CT256BRID146 CT236B177D150 CT236B177D150
13020-00880000 13020-00880000 13020-00880000 13020-00880000 nbs_nut_1p_303 nbs_nut_1p_303
nbs_nut_1p_344 nbs_nut_1p_344 nbs_nut_1p_344 nbs_nut_1p_344 13GNXS10M120-1 13GNXS10M120-1
2nd source: 2nd source: 2nd source: 2nd source: 2nd source: 2nd source:
13020-02020000 13020-02020000 13020-02020000 13020-02020000 13020-00109900 13020-00109900
GND GND GND GND GND GND
A-B: 4 K-B Gasket

2017/02/02 X542UA_R1.1 #23, Add Gasket H6532 for EMI
TOP BOT
H6511 H6512 H6513 H6527 H6516 H6529 H6530 H6532
1 1 1
1 1 1
1 1 1 1 1 6
NP_NC NP_NC NP_NC NP_NC NP_NC1 GND5
2 5 2 5 2 5 2 5 2 5
GND1 GND4 GND1 GND4 GND1 GND4 GND1 GND4 NP_NC2 GND4 GASKET_1P GASKET_1P SMD209X130
3 4 3 4 3 4 3 4 3 4
GND2 GND3 GND2 GND3 GND2 GND3 GND2 GND3 GND2 GND3
13040-00530000 13040-00530000 13040-00890000
GND GND GND
/EMI /EMI /EMI
c276d98n c276d98n c276d98n c276d98n 2D_D98N_D67N
GND GND GND GND GND GND GND GND GND GND
s07694 s07694 s07694 s07694 s10835
C-D: 3 Y-B Y-Z: 3
H6507 H6508 H6510 H6515 H6518 H6519 H6520

1 1 1
1 1 1 1
NP_NC NP_NC NP_NC NP_NC C98D98N C98D98N C98D98N
2 5 2 5 2 5 2 5
GND1 GND4 GND1 GND4 GND1 GND4 GND1 GND4
3 4 3 4 3 4 3 4 s09684 s09684 s09684
GND2 GND3 GND2 GND3 GND2 GND3 GND2 GND3
C276D94N C276D94N C276D94N CB276D98N

s05088 s05088 s05088 s10828
C-F G-H I-H M-N T
H6517 H6531 H6523

H6525
At P60, H6001 1 1 1 6 1
NP_NC NP_NC NP_NC1 GND5 1
2 5 2 5 2 5
GND1 GND4 GND1 GND4 NP_NC2 GND4
3 4 3 4 3 4
GND2 GND3 GND2 GND3 GND2 GND3 SMD315X236
temp_T_001414
GND
C276D165N RCT577X335CB276D165N 2D_D110N_D98N
GND GND GND GND GND GND
s10832 s10837 s10838
X-1 X-2 AA-BB & CC-DD GG-HH II-JJ
H6514
1 9
H6509
NP_NC1 GND1
2 10
NP_NC2 GND2
3 11 1 6
NP_NC3 GND3 NP_NC1 GND1
4 12 2 7
H6526 H6528 H6521 H6522 5
NP_NC4 GND4
3
NP_NC2 GND2
NP_NC5 NP_NC3
1 1 1 1 6 4
1 1 NP_NC6 NP_NC4
7 5
O118X98DO118X98N O118X98DO118X98N NP_NC7 NP_NC5
8
SMD2008X98 SMD827X85 NP_NC8
s04890 s04890 5D_D94N_4D24N
temp_T_001415 temp_T_001416
8D_D98N_D39N
s11034
GND GND
GND GND
s11029
2017/02/09 X542UA_R1.1 #28, H6509 & H6514 modify
<Variant Name>
Project Name Rev
X542UA/UV R2.0
Title : 65_ME_Conn & Skew Hole
Size
C
vinafix.com
VINAFIX.COM
DB_IO
GND_IO
SD Card Reader DATA2
1
1 0402
2
2
SL6609
SL6610
IO_@
IO_@
1 T6601 IO_@
SD-DATA2
0402 1
DATA3 T6602 IO_@ SD-DATA3
+3V_CR DATA4 1 2 SL6611 IO_@
0402 1
2016/10/06 X542UA_R1.0 #16, Add IO DB. follow X456U & Modify netname SDCMD_L T6603 IO_@ SDCMD
2016/10/06 X542UA_R1.0 #26, Change FFC CONN. to 12018-00021800 same as J6801 DATA5
2016/10/11 X542UA_R1.0 #37, Modify J6601 pin define SDCLK
HDD DB to IO DB FPC CONN.

2016/11/15 X542UA_R1.0 #75, J6601 Pin define reverse
5/31
1
2016/11/28 X542UA_R1.0 #90, Modify J6601 to 30 pin FPC CONN. from IO DB to MB C6609 C6610
2016/12/15 X542U5_R1.0 #A5, Audio Jack pin modify 0.1UF/16V 10PF/50V U6601 改用AU6465RB63-GCF-GR
30
29
28
27
26
25
24
23
22
IO_N/A IO_@
02046-00020200
GND2
GND1
MSCLK
MSD7/SDD2
MSD3/SDD3
MSD6/SDD4
MSD2/SDD5
SDCLK
SDCMD
GND_IO GND_IO
1 IO_N/A 2 1 21 1 T6604 IO_@
GND_IO REXT MSD0/SDD6
R6605 330Ohm CR_REXT 2 20 DATA6 1 T6605 IO_@
V33P MSD4/SDD7
3 19 DATA7 1 2 SL6612 IO_@
DP MSD1/SDD0 0402
4 18 1 2
J6601 USB_P7_DP_R
DM MSD5/SDD1
DATA0
0402
SL6613 IO_@ SD-DATA0
USB_P7_DN_R 5 17 DATA1 1 2 SL6614 IO_@ SD-DATA1
GND_IO VS33P MSBS/SDWP 0402
30 6 16 SDWP1 SDWP40mil
30 XI VDDIO IO_PWR
+5VSUS_IO 29 XIN_CR 7 15 1 IO_@ 2
USB2.0 100 mil 2.5A 28
29
XOUT _CR
XO XTALSEL
XTALSEL R6607 10KOhm
+3V_CR
28
VDDHM
C1_V33
SDCDN
27 1 2
LED 5 mil 0.05A
MSINS
27
RSTN
VDD
26 R6608 IO_@ 0Ohm
V18
26
25
25
24 AU6465RB63-GCF-GR
8
9
10
11
12
13
14
24
23
CR 40 mil 0.5A +3VS_IO
23 02046-00020200
22 GND_IO
22
21 32
21 SIDE2 40mil +1.8V_CR IO_N/A
BUF_PLT_RST#_IO 20 R6606 2 IO_@ 1 0Ohm
20 +3V_CARD
CHG_FULL_LED#_IO 19 CR_RSTN BUF_PLT_RST#_IO
LED 19 +3V_CR
1
CHG_LED#_IO 18 SDCDN C6615
18
1
PWR_LED_IO 17 C6613 IO_N/A 1 T6606 IO_@ 0.47UF/6.3V
17 Max : 0.5A
WLAN_LED_IO 16 4.7U F/6.3V XDRDN/MSINS IO_N/A
16 +1.8V_CR
2
SATA_LED#_IO 15 +3VS_IO +3V_CR
USB PWR SW en 15 Pin 8
2
SUSC_EC#_IO 14 SL6608 nbs_c0603_h37_000s
14
1
13 1 2 C6614 IO_N/A GND_IO
13 06 03
CR USB_P7_DP_IO
USB_P7_DN_IO
12
11
12
IO_@
40mil 近IC GND_IO 0.1UF/16V
11 Pin 11
2
10 31 C6608
2
10 SIDE1 +3V_CR IO_PWR +3V_CARD
USB_P4_DN_IO 9 0.1UF /16V
USB 2.0 USB_P4_DP_IO 8
9
IO_@ /EMI GND_IO
1
8
7
7
HP_JD1_IO 6
6
1
1
HP_R_2_IO 5 C6618 C6619 C6620 C6621 C6622 C6623
AUDIO JACK HP_L_2_IO 4
5
GND_IO 0.1UF /16V 2.2UF/10V 4.7UF/6.3V 4.7UF/6.3V 0.1UF/16V 0.1UF/16V
4
3 IO_@ IO_@ IO_N/A IO_@ GND_IO IO_@
3
2
MIC2_L_RING2_IO 2
2 nbs_c0603_h37_000s nbs_c0603_h37_000s IO_N/A
MIC2_R_SLEEVE_IO 1
1
AUDIO JACK
FPC _CON_30P IO_N/A GND_IO GND_IO
Near J6601 12018-00021800
+3V_CARD
2nd source:
12018-00021900 GND_IO SL6615
EMI SUSC_EC#_IO BUF_PLT_RST#_IO GND_AUDIO_IO GND_IO 1 2
12018-00022000 0805
J6604 IO_N/A
IO_@
1
C6644 C6642 9 16
DAT2 GND3
1000PF/50V 1000PF/50V 2017/02/02 X542UA_R1.1 #24, 0ohm modify to SL F6602 1.5A/6V SD-DATA2 1 14
CD/DAT3 GND1
IO_@ /EMI IO_@ /EMI SLN6603A 1 2 1 2 +3V_CARD_CON SD-DATA3 2 12
2R4P
CMD NP_NC1
2
USB_P7_D P_IO IO_@ /EMI SDCMD 3
VSS1
SL6616 4
VDD
1 2 5
0603 CLK
GND _IO GND_IO SD_CLK_C SDCLK_R 6
VSS2
IO_@ 7
DAT0
1
USB_P7_DP_R C6625 C6626 C6627 SD-DATA0 8 13
2
DAT1 NP_NC2
L6601 IO_@ /EMI 20150708 22PF/50V 4.7UF/6.3V 0.1UF/16V SD-DATA1 10 15
R2.0 C6625 mount 22pF for EMI CD GND2
90Ohm/100Mhz IO_/EMI IO_@ IO_N/A SDCDN 11 17
1
WP GND4
2
SDWP
nbs _c0603_h37_000s
1
USB_P7_DN_R C6611 C6612 SD_SOCKET_9P
0.1UF/16V 0.1UF /16V
IO_@ IO_@ GND_IO GND_IO GND_IO
12023-00013700
1
C6628 C6629
SLN6603B 3 4 10PF/50V 10PF/50V
2R4P 2nd source:
USB_P7_D N_IO IO_@ IO_@
12023-00017400
2
GND_IO GND_IO
近J4004
GND_IO GND_IO GND_IO GND_IO
USB 2.0 con.

SL6601
1 2 2017/01/20 X542UA_R1 .1 #14, J6604 CDN & WP SWAP
0402
SDCLK SD_CLK_C
IO_@
1
X'tal Checking
C6624 Modify to 10pF, 0402 type
10PF/50V
2
IO_@
2016/10/06 X542UA_R1.0 #23, Change USB2.0 portect IC over current to 2.5A solution XIN_CR XOUT_CR
+5V_USB_IO
2016/10/12 X542UA_R1.0 #42, Modify U6602 circuit
1 3
GND_IO
FOR EMI
USB3.0 Power SW for Power Protect
1
C6616 X6601 C6617
4
27PF/50V 12MHZ 27PF/50V
1
C6601 C6602 C6604 C6605 IO_@ IO_@ IO_@ SD-DATA0 SD-DATA1 SD-DATA2 SD-DATA3
2
0.1UF/16V 47UF/6.3V 22UF/6.3V 22UF/6.3V
IO_EMI IO_EMI IO_@ IO_N/A
1
GND_IO GND_IO GND_IO C6635 C6636 C6637 C6638
GND_IO GND_IO GND_IO GND_IO 10PF /50V 10PF/50V 10PF/50V 10PF/50V
+5VSUS_IO +5V_USB_IO IO_@ /EMI IO_@ /EMI IO_@/EMI IO_@/EMI
J6602
2
U6602 IO_N/A T6607 2017/02/02 X542UA_R1.1 #24, 0ohm modify to SL 1 8 AU6465 CLK source : External CLK or X'tal
1 P_GND4
1 IO_@ SLN6601B 3 4 2 7
EN#/EN OC# 2R4P 2 P_GND3 XTALSEL : 0 = 12Mhz, 1 = 48Mhz(default)
SUSC_EC#_IO 4 5 USB_P4_DN_IO SLN6601A 1 2 IO_USB_U4-_CON 3 6 GND_IO GND_IO GND_IO GND_IO
IN2 OUT3 2R4P 3 P_GND2 AU6465R : Build in X'tal
3 6 USB_P4_DP_IO IO_USB_U4+_CON 4 5
IN1 OUT2 4 P_GND1
2 7
GND OUT1
1 8 USB_CON_4P IO_N/A
1
3
C6639 BD82034FVJ-E2 C6641
2
12012-00063900
10UF/25V C6640
06016-01200000 22UF/6.3V L6602
IO_@ 1UF /25V IO_N/A 2nd source:
1
90Ohm/100Mhz
2
nbs_c0805_h49_000s IO_EMI IO_@ /EMI 12012-00063300
2
GN D_IO GND_IO
20150708
LED indicator
GND_IO GND_IO GND_IO GN D_IO R2.0 Mount L6601 & L6602 for EMI
USB2.0 ESD-Protection
ESD chip should be 5V tolerance
+5V_USB_IO
Charger LED WIRELESS/ BT LED POWER LED HDD LED CAP LED
IO_USB_U4-_CON
2017/01/24 X542UA_R1.1 #22, WLAN LED modify PU from +5VSUS_IO to +3VS_IO 2017/01/11 X542UA_R1.1 #01, HDD LED modify PU from +5V SUS_IO to +3VS_IO
I/O4
I/O3
VDD
+3VS_IO +5VSUS_IO +3VS_IO
6
4
+5VSUS_IO
D6602
1
AZC099-04SP R6604 R6613
1
R6603 330Ohm 100Ohm
IO_/EMI 100Ohm
1
R6601
2
07024-00200200
2
330Ohm IO_N/A
2
1
3
I /O2
I/O1
GND
IF = 5mA LED6603 LED6604
1
IO_N/A
LED6602
+
1
VF Min. = 1.6V WHITE WHITE
+
VF Max. = 2.4V LED6601 WHITE
IO_USB_U4+_CON 07G01520043A 07G01520043A
Orange 07G01520043A
2
GND_IO
2
IO_N/A IO_N/A
CHG_LED#_IO 4 2 SL6602 1 2
2nd source:
+
IO_N/A 0402
2016/11/15 X542UA_R1.0 #76, SATA_LED

IO_@ reserve Q6604 & add SL6602
3
CHG_FULL_LED#_IO 3 1 3 D Q6603 3 D Q6604 3 D Q6605
White
+
2N7002K 2N7002K 2N7002K
AUDIO JACK
IF = 5mA WHITE&ORANGE
1 1 1 1 1 1 IO_@
VF Min. = 2.55V 07014-00190100 WLAN_LED _IO G PWR_LED_IO G SATA_LED#_IO G
VF Max. = 3.15V
IO_N/A
1
IO_@ 2 S IO_@ 2 S IO_@ 2 S
R6602 R6620 R6614
2
2016/10/06 X542UA_#120, Modify Audio Jack to X541U solution 10KOhm 10KOhm 10KOhm
2
IO_N/A IO_N/A
GND_IO GN D_IO GND_IO GND_IO GND_IO GND_IO
FOR EMI
C HG_FULL_LED#_IO CHG_LED#_IO WLAN_LED_IO PWR_LED _IO
1
C6630 C 6631 C6633 C6634
33PF /50V 33PF/50V 33PF/50V 33PF/50V
IO_@ /EMI IO_@/EMI IO_@/EMI IO_@/EMI
J6603
2
IO_N/A
6
4
R6609 62Ohm R6610 1 IO_N/A 2 0Ohm HP_JD1_IO 5 GND_IO GND_IO GND_IO GND_IO
HP_L_2_IO 1 IO_N/A 2 AC _HP_L_R nbs_r0603_h24_000s AC_HP_L_J
3
R6611 62Ohm R6612 1 IO_N/A 2 0Ohm 2
HP_R_2_IO 1 IO_N/A 2 AC _HP_R_R nbs_r0603_h24_000s AC_HP_R_J 1
1
C6603 C6606
2015/09/24 100PF/50V 100PF/50V AUDIO_JACK_6P
R2.0 R3708, R3709 change from 51 to 62 IO_/EMI IO_/EMI
Ohm for 音壓測試 12014-00714700 IO_Board PAD
2
2nd source:
12014-00715700 A-B C-D E-F G-H I-J
GND_AUDIO_IO
GND_AUDIO_IO
R6617 1 IO_N/A 2 0Ohm

MIC2_L_RING2_IO MIC2_L_RING2_J
R6618 1 IO_N/A 2 0Ohm

H6602 H6603 H6601
MIC2_R_SLEEVE_IO MIC2_R_SLEEVE_J
1 1 1
H6604 H6605
NP_NC NP_NC NP_NC
1
2 5 2 5 2 5 1 1
GND1 GND4 GND1 GND4 GN D1 GND4
C6607 C6632 3 4 3 4 3 4
GND2 GND3 GND2 GND3 GN D2 GND3 C98D98N O161X91DO161X91N
100PF /50V 100PF/50V
2
IO_/EMI IO_/EMI s09684 s10846
2017/01/23 X542UA_R1.1 #21, C66 03/06/43/32/07 stuff 100pF for EMI CRT400X386D98N CRTCB276D98N c276d98n
GND_IO GND_IO GND_IO GND_IO GND_IO GND_IO
s10843 s10844 s07694
GND_AUDIO_IO
(7031.00 4878.00)
(6869.00 4715.00) HP_JD1_IO
(6946.00 5380.00)
C6646 0.1UF/16V IO_/EMI

1
1 2 C6643 (6941.00 4853.00)

C6647 0.1UF/16V IO_/EMI 100PF/50V
1 2 IO_/EMI
BOM
2
C6645 0.1UF/16V IO_/EMI

1 2 Project Name Rev
X542UA/UV R2.0
GND_AUDIO_IO GND_IO GND_AUDIO_IO
Title : IO_USB*2 & CR & LED
Size
Custom
vinafix.com
VINAFIX.COM
MAIN Board to IO FPC CONN.

2016/10/06
2016/10/06
2016/10/11
2016/10/12
X542UA_R1.0
X542UA_R1.0
X542UA_R1.0
X542UA_R1.0
#14,
#19,
#38,
#41,
Del SATA BtoB CONN.
Add IO FPC CONN. follow X456U
Modify J6801 pin define
USB Power SW enable pin change to SUSC_EC#
MB to IO DB FPC CONN.
2016/11/16 X542UA_R1.0 #80, Update J6801 from 30pin to 40pin (Add SATA HDD)
2016/11/23 X542UA_R1.0 #87, Modify J6801 to B to B conn. & pin define
2016/11/28 X542UA_R1.0 #89, Modify J6801 to 30 pin FPC CONN. from MB to IO DB
2016/12/15 X542U5_R1.0 #A4, Audio Jack pin modify
J6801
30
+5VSUS 30
29
USB2.0 100 mil 2.5A 28
29
28
27
LED 5 mil 0.05A 26
27
26
25
25
24
+3VS 24
23
CR 40 mil 0.5A 22
23
22
21 32
25,30,33,53,54,70 BUF_PLT_RST# 21 SIDE2
20
30 CHG_FULL_LED# 20
19
LED 30 CHG_LED#
18
19
30 PWR_LED 18
17
21 WLAN_LED_R 17
16
23 SATA_LED# 16
15
USB PWR SW en 30,52,57,88 SUSC_EC#
14
15
14
13
13
USB_PP7_C 12
CR USB_PN7_C 11
12
11
10 31
10 SIDE1
USB_PN4_C 9
USB 2.0 USB_PP4_C 8
9
8
7
36 HP_JD1 7
6
AUDIO JACK 36 HP_R_2
5
6
36 HP_L_2 5
4
Near J6801 3
4
36 MIC2_L_RING2 3
2
36 MIC2_R_SLEEVE 2
1
EMI 2017/02/02 X542UA_R1.1 #24, 0ohm modify to SL
1
AUDIO JACK FPC_CON_30P

SLN6801B 3 2R4P
4
23 USB_PP7
SLN6801A 1 2 USB_PP7_C
23 USB_PN7 2R4P 12018-00021800
USB_PN7_C
GND_AUDIO GND GND
2nd source:
4
12018-00021900
L6801 12018-00022000
90Ohm/100Mhz
@/EMI
1
SLN6802B 3 2R4P
4
23 USB_PN4
SLN6802A 1 2R4P
2 USB_PN4_C
23 USB_PP4
USB_PP4_C
4
L6802
90Ohm/100Mhz
@/EMI
1
SUSC_EC# BUF_PLT_RST#
BOM
1
C6803 C6801 Project Name Rev

1000PF/50V 1000PF/50V
@/EMI /EMI X542UA/UV R2.0
2
Title : B TO B CONNECTOR
Size
GND GND Dept.: NB2_RD1_EE1 Engineer: Joach_Wang
B
vinafix.com
VINAFIX.COM
BAT_CON
1
C6901 (8260.00 1214.00)
0.1UF/16V
@/EMI
2
GND
+3VS
(8284.00 1613.00)
GND
+LED_VCC_INV
1
C6903 (2431.00 6380.00)
0.1UF/16V
@/EMI
2
GND
TOUCHPAD_INTR# 21,31
TOUCHPAD_INTR#
1
C6904 (393.00 2128.00)
100PF/50V
@/EMI
2
GND
(7928.00 2131.00)
@/EMI
C6905 0.1UF/16V
1 2
GND GND_AUDIO
AC_BAT_SYS
(777.00 5599.00)
(2031.00 6564.00)
1
C6906 C6907 C6908 C6910 C6909
(895.00 2504.00)
0.1UF/50V 0.1UF/50V 0.1UF/50V 0.1UF/50V 0.1UF/50V (6692.00 1744.00)
@/EMI /EMI @/EMI /EMI /EMI (8319.00 2323.00)
2
GND GND GND GND GND
0608 EMI add CAP

GPU_PWR_EN 77,91,93 DGPU_PWR_EN# 21,77
1
1
C6911 C6902
1000PF/50V 1000PF/50V
/VGA/EMI /VGA/EMI
2
2
GND GND
BOM
Project Name Rev
X542UA/UV R2.0
Title : EMI
Size
C
vinafix.com
2016/10/07_X542UA_#31, Modify U7002 circuit follow X456U
N16S-GTR = 3V
N17S-G1 = 1.8V
+VDD_AON
U7002
1 5
25,30,33,53,54,68
21
BUF_PLT_RST#
GPU_RST#
2
3
INB
INA
GND
VCC
OUTY
4 VINAFIX.COM
SYS_PEX_RST_MON# 76
74LVC1G08GW
/VGA
GND /VGA/N17
1 R7002 2 0Ohm
DGPU_PEX_RST#
N16S-GTR = 3V
N17S-G1 = 1.8V
1
R7011
100KOhm +VDD_AON
/VGA
Near U7001 N17S-G1 need modify to 1.0V
Place Near BALLS Place Near GPU 300mil
2
U7001A
+PEX_VDD
EMI
2
DGPU_PEX_RST#
R7001
GND 10KOhm AB6
NC18
1
C7013 /VGA C7009 C7010 C7011 C7037 C7012 C7014 C7015
2
100PF/50V AA22 1UF/6.3V 1UF/6.3V 4.7UF/6.3V 4.7UF/6.3V 10UF/6.3V 22UF/6.3V 22UF/6.3V
PEX_IOVDD1
1
/EMI AC7 AB23 /VGA /VGA/N17 /VGA /VGA/N17 /VGA /VGA @/VGA
1
32,76 DGPU_PEX_RST# PEX_RST_N PEX_IOVDD2
2
AC24 nbs_c0603_h37_000s nbs_c0603_h37_000s nbs_c0805_h37_000s nbs_c0805_h57_000s nbs_c0805_h57_000s
PEX_IOVDD3
AC6 AD25
24 PEX_CLKREQ# PEX_CLKREQ_N PEX_IOVDD4
PEX_CLKREQ# AE26
PEX_IOVDD5
GND SL7001 1 2 AE8 AE27
24 CLK_PCIE_PEG_PCH 0402 PEX_REFCLK PEX_IOVDD6
SL7002 1 2 PEX_REFCLKP AD8 GND
24 CLK_PCIE_PEG#_PCH 0402 PEX_REFCLK_N
PEX_REFCLKN
AC9 N17S-G1 need modify to 1.8V
PEX_TX0 3300 mA
PCIEG_TXP0 AB9
PEX_TX0_N
PCIEG_TXN0 +PEX_VDD_H
AG6
PEX_RX0
PCIEG_RXP0 AG7 AA10
PEX_RX0_N PEX_IOVDDQ1
PCIEG_RXN0 AA12
PEX_IOVDDQ2
AB10 AA13
PEX_TX1 PEX_IOVDDQ3
CX7001 2 1 0.22UF/6.3V /VGA PCIEG_TXP1 AC10 AA16
PEX_TX1_N PEX_IOVDDQ4
1
PCIENB_RXN0 CX7002 2 1 0.22UF/6.3V /VGA PCIEG_TXN0 PCIEG_TXN1 AA18 C7016 C7017 C7032 C7033 C7018 C7020 C7021 C7022
2
PEX_IOVDDQ5
PCIENB_RXP0 CX7003 2 1 0.22UF/6.3V /VGA PCIEG_TXP0 AF7 AA19 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 4.7UF/6.3V 10UF/6.3V 10UF/6.3V 22UF/6.3V
PEX_RX1 PEX_IOVDDQ6
PCIENB_RXN1 CX7004 2 1 0.22UF/6.3V /VGA PCIEG_TXN1 PCIEG_RXP1 AE7 AA20 /VGA /VGA /VGA/N17 /VGA/N17 /VGA/N17 @/VGA/N17 /VGA/N17 /VGA/N17
1
2
PCIENB_RXP1 CX7005 2 1 0.22UF/6.3V /VGA PCIEG_TXP1 PCIEG_RXN1 AA21 nbs_c0603_h37_000s nbs_c0805_h37_000s nbs_c0805_h37_000s nbs_c0805_h57_000s
PEX_IOVDDQ8
PCIENB_RXN2 CX7006 2 1 0.22UF/6.3V /VGA PCIEG_TXN2 AD11 AB22
PEX_TX2 PEX_IOVDDQ9
PCIENB_RXP2 CX7007 2 1 0.22UF/6.3V /VGA PCIEG_TXP2 PCIEG_TXP2 AC11 AC23
PEX_TX2_N PEX_IOVDDQ10
PCIENB_RXN3 CX7008 2 1 0.22UF/6.3V /VGA PCIEG_TXN3 PCIEG_TXN2 AD24
PEX_IOVDDQ11
PCIENB_RXP3 PCIEG_TXP3 AE9 AE25
PEX_RX2 PEX_IOVDDQ12
PCIEG_RXP2 AF9 AF26 GND
PCIEG_RXN2 AF27
PEX_IOVDDQ14
AC12
23 PCIEG_RXP[3:0] PEX_TX3
PCIEG_TXP3 AB12
23 PCIEG_RXN[3:0] PEX_TX3_N
PCIEG_TXN3 N17S-G1 = 1.8V
23 PCIENB_RXP[3:0]
AG9 N16S-GTR = 3V
23 PCIENB_RXN[3:0]
PCIEG_RXP3 AG10
PEX_RX3 Place Near GPU Place Midway btw GPU&VR +VDD_AON +VDD_MAIN
PEX_RX3_N
PCIEG_RXN3
AB13
NC8 /VGA/N16
AC13
NC19
1 2
AF10 R7010 0Ohm
NC55
AE10
NC42
NC FOR GF119 R7009
AD14
NC32 0.3A
AC14 AA8 1 2
NC20 PEX_PLL_HVDD1
AA9 PEX_PLL_HVDD
PEX_PLL_HVDD2
AE12
NC43 0Ohm
1
AF12 C7023
2
NC56
PEX_SVDD_3V3
AB8 1 2 0.1UF/16V C7024 C7025 /VGA/N17
AC15 N17S-G1, NC PEX_SVDD R7003 0Ohm /VGA 10UF/6.3V 22UF/6.3V
1
NC21
2
NC FOR GM108
AB15 /VGA /VGA
NC9
/VGA/N16
AG12
NC67
AG13
NC68
C7025 N17 11G233222625320, 22uF
AB16 GND
NC10 N16 11G233247515360,4.7uF
AC16
NC22
AF13
NC57
AE13
NC44 C7024 N17 11G233210625310, 10uF
N16 11G233247515360,4.7uF
AD17
NC33
AC17
NC23
AE15
NC45
AF15 T7003
NC58
1
AC18 F2
NC24 VDD_SENSE TPC26T NVDD_VCCSENSE 91
AB18 0.9V 0.2mm
NC11
AG15 F1
NC69 GND_SENSE NVDD_VSSSENSE 91
AG16 0.0V 0.2mm
NC70
AB19
NC12
AC19
NC25
AF16
NC59
AE16
NC46
AD20
NC35
AC20
NC26
AE18
NC47
AF18
NC60
AC21
NC27
AB21
NC14
NC FOR GF117/GK208/GM108
AG18 AF22
NC71 PEX_TSTCLK
AG19 AE22 PEX_TSTCLK_OUT 1 2
NC72 PEX_TSTCLK_N
PEX_TSTCLK_OUT_N R7005 5% 200Ohm
AD23 @/VGA /VGA/N16
AE23
NC36 Place Near GPU +PEX_VDD
NC51
150mA Place Near BALLS L7001
AF19 AA14 1 2
NC61 PEX_PLLVDD1
AE19 AA15 PEX_PLL_VDD
NC48 PEX_PLLVDD2
1
N17S-G1, NC C7026 C7027 C7030 C7028 30Ohm/100Mhz C7029
AF24 0.1UF/16V 1UF/6.3V 4.7UF/6.3V 22UF/6.3V 1UF/6.3V
NC64
AE24 @/VGA/N16 nbs_l0603_h39_000s @/VGA/N16
NC52 /VGA/N16 /VGA/N16 /VGA/N16
2
nbs_c0603_h37_000s nbs_c0805_h57_000s
AE21
NC50
AF21
NC63
AD9 1 1% 2
TESTMODE
AG24 TESTMODE R7006 10KOhm GND
NC75
AG25 /VGA
NC76
AG21 GND
NC73
AG22
NC74
AF25 1 1% 2
PEX_TERMP
PEX_TERMP
0.3mm R7007 2.49KOhm
BOM
/VGA
N16S-GTR-S-A2 Project Name Rev
GND
X542UN/URV R1.0
Title : N14M-GE_PCIE
Size
C
vinafix.com
VINAFIX.COM
U7001B
T7102
72 FBA_D[0:63]
E18 NC
F3 1
FBA_D0 FB_CLAMP
FBA_D0 F18
FBA_D1 TPC26T
FBA_D1 E16 N17S-G1, NC
FBA_D2 GF119
FBA_D2 F17
1
FBA_D3
FBA_D3 D20 R7104
FBA_D4
FBA_D4 D21 10KOhm
FBA_D5
FBA_D5 F20 /VGA/N16
FBA_D6
FBA_D6 E21 1%
2
FBA_D7
FBA_D7 E15
FBA_D8
FBA_D8 D15
FBA_D9
FBA_D9 F15 GND
FBA_D10
FBA_D10 F13
FBA_D11
FBA_D11 C13
FBA_D12
FBA_D12 B13
FBA_D13
FBA_D13 E13
FBA_D14
FBA_D14 D13
FBA_D15
FBA_D15 B15
FBA_D16
FBA_D16 C16
FBA_D17
FBA_D17 A13
FBA_D18
FBA_D18 A15
FBA_D19
FBA_D19 B18
FBA_D20
FBA_D20 A18
FBA_D21
FBA_D21 A19
FBA_D22
FBA_D22 C19
FBA_D23
FBA_D23 B24
FBA_D24
FBA_D24 C23
FBA_D25
FBA_D25 A25
FBA_D26
FBA_D26 A24
FBA_D27
FBA_D27 A21
FBA_D28
FBA_D28 B21
FBA_D29 C20
FBA_D29 Mode D：single rank designs.
FBA_D30
FBA_D30 C21
FBA_D31
FBA_D31 R22
FBA_D32 FBA_CMD[0:15] 72
FBA_D32 R24 C27
FBA_D33 FBA_CMD0
FBA_D33 T22 C26 FBA_CMD0
FBA_D34 FBA_CMD1
FBA_D34 R23 E24 FBA_CMD1
FBA_D35 FBA_CMD2
FBA_D35 N25 F24 FBA_CMD2
FBA_D36 FBA_CMD3
FBA_D36 N26 D27 FBA_CMD3
FBA_D37 FBA_CMD4
FBA_D37 N23 D26 FBA_CMD4
FBA_D38 FBA_CMD5
FBA_D38 N24 F25 FBA_CMD5
FBA_D39 FBA_CMD6
FBA_D39 V23 F26 FBA_CMD6
FBA_D40 FBA_CMD7
FBA_D40 V22 F23 FBA_CMD7
FBA_D41 FBA_CMD8
FBA_D41 T23 G22 FBA_CMD8
FBA_D42 FBA_CMD9
FBA_D42 U22 G23 FBA_CMD9
FBA_D43 FBA_CMD10
FBA_D43 Y24 G24 FBA_CMD10
FBA_D44 FBA_CMD11
FBA_D44 AA24 F27 FBA_CMD11
FBA_D45 FBA_CMD12
FBA_D45 Y22 G25 FBA_CMD12
FBA_D46 FBA_CMD13
FBA_D46 AA23 G27 FBA_CMD13
FBA_D47 FBA_CMD14
FBA_D47 AD27 G26 FBA_CMD14
FBA_D48 FBA_CMD15 FBA_CMD[16:31] 72
FBA_D48 AB25 M24 FBA_CMD15
FBA_D49 FBA_CMD16
FBA_D49 AD26 M23 FBA_CMD16
FBA_D50 FBA_CMD17
FBA_D50 AC25 K24 FBA_CMD17
FBA_D51 FBA_CMD18
FBA_D51 AA27 K23 FBA_CMD18
FBA_D52 FBA_CMD19
FBA_D52 AA26 M27 FBA_CMD19
FBA_D53 FBA_CMD20
FBA_D53 W26 M26 FBA_CMD20
FBA_D54 FBA_CMD21
FBA_D54 Y25 M25 FBA_CMD21
FBA_D55 FBA_CMD22
FBA_D55 R26 K26 FBA_CMD22
FBA_D56 FBA_CMD23
FBA_D56 T25 K22 FBA_CMD23
FBA_D57 FBA_CMD24
FBA_D57 N27 J23 FBA_CMD24
FBA_D58 FBA_CMD25
FBA_D58 R27 J25 FBA_CMD25
FBA_D59 FBA_CMD26
FBA_D59 V26 J24 FBA_CMD26
FBA_D60 FBA_CMD27
FBA_D60 V27 K27 FBA_CMD27
FBA_D61 FBA_CMD28
FBA_D61 W27 K25 FBA_CMD28
FBA_D62 FBA_CMD29
FBA_D62 W25 J27 FBA_CMD29
FBA_D63 FBA_CMD30
FBA_D63 J26 FBA_CMD30
FBA_CMD31
FBA_CMD31
72 FBA_DBI[7..0]
D19
FBA_DQM0
FBA_DBI0 D14
FBA_DQM1
FBA_DBI1 C17 GF117/GF119
FBA_DQM2
FBA_DBI2 C22 GK208
FBA_DQM3
FBA_DBI3 P24
FBA_DQM4 +FBVDDQ
FBA_DBI4 W24 NC
B19
FBA_DQM5 FBA_CMD32
FBA_DBI5 AA25 R7101 60.4Ohm @/VGA
FBA_DQM6
FBA_DBI6 U25 F22 1 2
FBA_DQM7 FBA_DEBUG0 FBA_CMD34
FBA_DBI7 FBA_DEBUG1
J22 1 2
FBA_CMD35
72 FBA_EDC[7..0]
E19 R7102 60.4Ohm @/VGA
FBA_DQS_WP0
FBA_EDC0 C15
FBA_DQS_WP1
FBA_EDC1 B16 D24
FBA_DQS_WP2 FBA_CLK0 FBA_CLK0 72
FBA_EDC2 B22 D25
FBA_DQS_WP3 FBA_CLK0_N FBA_CLK0# 72
FBA_EDC3 R25 N22
FBA_DQS_WP4 FBA_CLK1 FBA_CLK1 72
FBA_EDC4 W23 M22
FBA_DQS_WP5 FBA_CLK1_N FBA_CLK1# 72
FBA_EDC5 AB26
FBA_DQS_WP6
FBA_EDC6 T26
FBA_DQS_WP7
FBA_EDC7
F19 D18
Add for FDDR5
FBA_DQS_RN0 FBA_WCK01 FBA_WCK01 72
C14 C18
FBA_DQS_RN1 FBA_WCK01_N FBA_WCK01# 72 +FBVDDQ
A16 D17
A22 D16
FBA_DQS_RN3 FBA_WCK23_N FBA_WCK23# 72
P25 T24 1 2
W22 U24 FBA_CMD14 R7103 10KOhm
AB27 V24
FBA_DQS_RN6 FBA_WCK67 FBA_WCK67 72 /VGA
T27 V25 N17S-G1 need modify to 1.8V 1 2
FBA_CMD30 R7123 10KOhm
+PEX_VDD_H
/VGA
GF119 L7101 1 2
F16 200mA 1 2 FBA_CMD13 R7124 10KOhm
FB_PLL_AVDD1
NC
FB_PLLAVDD /VGA
1
P22 C7101 C7102 C7103 C7106 C7107 C7104 C7105 30Ohm/100Mhz 1 2
FB_PLL_AVDD2
0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 1UF/6.3V 22UF/6.3V /VGA FBA_CMD29 R7125 10KOhm
FB_PLLAVDD
H22 @/VGA @/VGA /VGA /VGA/N17 /VGA /VGA /VGA nbs_l0603_h39_000s /VGA
FB_DLL_AVDD
2
nbs_c0402_h22_000s nbs_c0402_h22_000s nbs_c0805_h57_000s
GF117 nbs_c0402_h22_000s nbs_c0402_h22_000s nbs_c0402_h22_000s GND
GND GND
GND
Place Near Balls Place Near GPU

T7101 1 D23
FB_VREF
FB_VREF
TPC26T
N16S-GTR-S-A2
BOM Mount: 02004-00300400
<Variant Name>
Project Name Rev
X542UN/URV R1.0
Title : N14M-GE_FB-IF
Size
C
vinafix.com
2016/11/18 X542UA_#84, Modify to GDDR5
VINAFIX.COM
X16, 0‐15 & 16‐31 X16, 32‐47 & 48‐63
71 FBA_CLK0 FBA Partition Memory (1 of 4) FBA Partition Memory (2 of 4) 71 FBA_CLK1 FBA Partition Memory (3 of 4) FBA Partition Memory (4 of 4)
71 FBA_CLK0# 71 FBA_CLK1#
MF=0 non‐Mirror +FBVDDQ
MF=1 Mirror +FBVDDQ
MF=0 non‐Mirror +FBVDDQ
MF=1 Mirror +FBVDDQ
U7201 U7202 U7203 U7204
71 FBA_CMD[0:15] 71 FBA_CMD[16:31]
M2 B1 M2 B1 M2 B1 M2 B1
DQ7/DQ31 VDDQ1 DQ7/DQ31 VDDQ1 DQ7/DQ31 VDDQ1 DQ7/DQ31 VDDQ1
M4 B3 M4 B3 M4 B3 M4 B3
N2 B12 N2 B12 N2 B12 N2 B12
N4 B14 N4 B14 N4 B14 N4 B14
T2 D1 T2 D1 T2 D1 T2 D1
T4 D3 T4 D3 T4 D3 T4 D3
71 FBA_D[0:63] DQ2/DQ26 VDDQ6 DQ2/DQ26 VDDQ6 DQ2/DQ26 VDDQ6 DQ2/DQ26 VDDQ6
FBA_D[0:63] U2 D12 FBA_D[0:63] U2 D12 FBA_D[0:63] U2 D12 FBA_D[0:63] U2 D12
U4 D14 U4 D14 U4 D14 U4 D14
M13 E5 M13 E5 M13 E5 M13 E5
FBA_D23 FBA_D18 M11 E10 FBA_D15 FBA_D11 M11 E10 FBA_D55 FBA_D55 M11 E10 FBA_D47 FBA_D47 M11 E10
FBA_D22 FBA_D22 N13 F1 FBA_D14 FBA_D8 N13 F1 FBA_D54 FBA_D53 N13 F1 FBA_D46 FBA_D46 N13 F1
FBA_D21 FBA_D19 N11 F3 FBA_D13 FBA_D12 N11 F3 FBA_D53 FBA_D52 N11 F3 FBA_D45 FBA_D45 N11 F3
FBA_D20 FBA_D21 T13 F12 FBA_D12 FBA_D9 T13 F12 FBA_D52 FBA_D54 T13 F12 FBA_D44 FBA_D44 T13 F12
FBA_D19 FBA_D16 T11 F14 FBA_D11 FBA_D13 T11 F14 FBA_D51 FBA_D51 T11 F14 FBA_D43 FBA_D43 T11 F14
71 FBA_DBI[7..0] DQ10/DQ18 VDDQ14 DQ10/DQ18 VDDQ14 DQ10/DQ18 VDDQ14 DQ10/DQ18 VDDQ14
FBA_D18 FBA_D23 U13 G2 FBA_D10 FBA_D14 U13 G2 FBA_D50 FBA_D50 U13 G2 FBA_D42 FBA_D42 U13 G2
FBA_DBI0 FBA_D17 FBA_D17 U11 G13 FBA_D9 FBA_D15 U11 G13 FBA_D49 FBA_D49 U11 G13 FBA_D41 FBA_D41 U11 G13
FBA_DBI1 FBA_D16 FBA_D20 F13 H3 FBA_D8 FBA_D10 F13 H3 FBA_D48 FBA_D48 F13 H3 FBA_D40 FBA_D40 F13 H3
FBA_DBI2 F11 H12 F11 H12 F11 H12 F11 H12
FBA_DBI3 E13 K3 E13 K3 E13 K3 E13 K3
FBA_DBI4 E11 K12 E11 K12 E11 K12 E11 K12
FBA_DBI5 B13 L2 B13 L2 B13 L2 B13 L2
FBA_DBI6 B11 L13 B11 L13 B11 L13 B11 L13
FBA_DBI7 A13 M1 A13 M1 A13 M1 A13 M1
A11 M3 A11 M3 A11 M3 A11 M3
71 FBA_EDC[7..0] DQ16/DQ8 VDDQ24 DQ16/DQ8 VDDQ24 DQ16/DQ8 VDDQ24 DQ16/DQ8 VDDQ24
F2 M12 F2 M12 F2 M12 F2 M12
FBA_EDC0 FBA_D7 FBA_D0 F4 M14 FBA_D31 FBA_D24 F4 M14 FBA_D39 FBA_D39 F4 M14 FBA_D63 FBA_D56 F4 M14
FBA_EDC1 FBA_D6 FBA_D4 E2 N5 FBA_D30 FBA_D26 E2 N5 FBA_D38 FBA_D38 E2 N5 FBA_D62 FBA_D58 E2 N5
FBA_EDC2 FBA_D5 FBA_D2 E4 N10 FBA_D29 FBA_D27 E4 N10 FBA_D37 FBA_D37 E4 N10 FBA_D61 FBA_D59 E4 N10
FBA_EDC3 FBA_D4 FBA_D6 B2 P1 FBA_D28 FBA_D25 B2 P1 FBA_D36 FBA_D36 B2 P1 FBA_D60 FBA_D57 B2 P1
FBA_EDC4 FBA_D3 FBA_D5 B4 P3 FBA_D27 FBA_D31 B4 P3 FBA_D35 FBA_D35 B4 P3 FBA_D59 FBA_D60 B4 P3
FBA_EDC5 FBA_D2 FBA_D3 A2 P12 FBA_D26 FBA_D30 A2 P12 FBA_D34 FBA_D34 A2 P12 FBA_D58 FBA_D63 A2 P12
FBA_EDC6 FBA_D1 FBA_D7 A4 P14 FBA_D25 FBA_D28 A4 P14 FBA_D33 FBA_D33 A4 P14 FBA_D57 FBA_D61 A4 P14
FBA_EDC7 FBA_D0 FBA_D1 T1 FBA_D24 FBA_D29 T1 FBA_D32 FBA_D32 T1 FBA_D56 FBA_D62 T1
VDDQ33 VDDQ33 VDDQ33 VDDQ33
T3 T3 T3 T3
T12 T12 T12 T12
T14 T14 T14 T14
J5 J5 J5 J5
A12/A13 A12/A13 A12/A13 A12/A13
FBA_CMD9 K4 C5 FBA_CMD9 K4 C5 FBA_CMD25 K4 C5 FBA_CMD25 K4 C5
A0/A10/A8/A7 VDD1 A0/A10/A8/A7 VDD1 A0/A10/A8/A7 VDD1 A0/A10/A8/A7 VDD1
FBA_CMD6 K5 C10 FBA_CMD10 K5 C10 FBA_CMD22 K5 C10 FBA_CMD26 K5 C10
FBA_CMD7 K10 D11 FBA_CMD11 K10 D11 FBA_CMD23 K10 D11 FBA_CMD27 K10 D11
A3/BA3/A5/BA1 VDD3 A3/BA3/A5/BA1 VDD3 A3/BA3/A5/BA1 VDD3 A3/BA3/A5/BA1 VDD3
FBA_CMD4 K11 G1 FBA_CMD1 K11 G1 FBA_CMD20 K11 G1 FBA_CMD17 K11 G1
FBA_CMD3 H10 G4 FBA_CMD2 H10 G4 FBA_CMD19 H10 G4 FBA_CMD18 H10 G4
FBA_CMD11 H4 L1 FBA_CMD7 H4 L1 FBA_CMD27 H4 L1 FBA_CMD23 H4 L1
FBA_CMD10 L4 FBA_CMD6 L4 FBA_CMD26 L4 FBA_CMD22 L4
VDD9 VDD9 VDD9 VDD9
L11 L11 L11 L11
VDD10 VDD10 VDD10 VDD10
L14 L14 L14 L14
D4 P11 D4 P11 D4 P11 D4 P11
71,72 FBA_WCK01 WCK23/WCK01 VDD12 71,72 FBA_WCK23 WCK23/WCK01 VDD12 71,72 FBA_WCK45 WCK23/WCK01 VDD12 71,72 FBA_WCK67 WCK23/WCK01 VDD12
D5 R5 D5 R5 D5 R5 D5 R5
71,72 FBA_WCK01# WCK23#/WCK01# VDD13 71,72 FBA_WCK23# WCK23#/WCK01# VDD13 71,72 FBA_WCK45# WCK23#/WCK01# VDD13 71,72 FBA_WCK67# WCK23#/WCK01# VDD13
R10 R10 R10 R10
P4 P4 P4 P4
71,72 FBA_WCK23 WCK01/WCK23 71,72 FBA_WCK01 WCK01/WCK23 71,72 FBA_WCK67 WCK01/WCK23 71,72 FBA_WCK45 WCK01/WCK23
R7239 P5 P5 P5 P5
71,72 FBA_WCK23# WCK01#/WCK23# 71,72 FBA_WCK01# WCK01#/WCK23# 71,72 FBA_WCK67# WCK01#/WCK23# 71,72 FBA_WCK45# WCK01#/WCK23#
40.2Ohm A1 A1 A1 A1
VSSQ1 VSSQ1 VSSQ1 VSSQ1
FBA_CLK0 1 2
/VGA R2 A3 R2 A3 R2 A3 R2 A3
EDC0/EDC3 VSSQ2 EDC0/EDC3 VSSQ2 EDC0/EDC3 VSSQ2 EDC0/EDC3 VSSQ2
1% R13 A12 R13 A12 R13 A12 R13 A12
FBA_EDC2 C13 A14 FBA_EDC1 C13 A14 FBA_EDC6 C13 A14 FBA_EDC5 C13 A14
GND EDC2/EDC1 VSSQ4 GND EDC2/EDC1 VSSQ4 GND EDC2/EDC1 VSSQ4 GND EDC2/EDC1 VSSQ4
FBA_CLK0_C C2 C1 C2 C1 C2 C1 C2 C1
FBA_EDC0 C3 FBA_EDC3 C3 FBA_EDC4 C3 FBA_EDC7 C3
1
R7240 P2 C4 P2 C4 P2 C4 P2 C4
DBI0#/DBI3# VSSQ7 DBI0#/DBI3# VSSQ7 DBI0#/DBI3# VSSQ7 DBI0#/DBI3# VSSQ7
40.2Ohm C7267 P13 C11 P13 C11 P13 C11 P13 C11
FBA_CLK0# 1 2
/VGA 0.01UF/25V FBA_DBI2 D13 C12 FBA_DBI1 D13 C12 FBA_DBI6 D13 C12 FBA_DBI5 D13 C12
2
1% D2 C14 D2 C14 D2 C14 D2 C14
/VGA/N17 DBI3#/DBI0# VSSQ10 DBI3#/DBI0# VSSQ10 DBI3#/DBI0# VSSQ10 DBI3#/DBI0# VSSQ10
R7241 FBA_DBI0 E1 FBA_DBI3 E1 FBA_DBI4 E1 FBA_DBI7 E1
40.2Ohm E3 E3 E3 E3
FBA_CLK1 1 /VGA
2 GND E12 E12 E12 E12
1% G3 E14 G3 E14 G3 E14 G3 E14
CAS#/RAS# VSSQ14 CAS#/RAS# VSSQ14 CAS#/RAS# VSSQ14 CAS#/RAS# VSSQ14
FBA_CMD12 L3 F5 FBA_CMD15 L3 F5 FBA_CMD28 L3 F5 FBA_CMD31 L3 F5
RAS#/CAS# VSSQ15 RAS#/CAS# VSSQ15 RAS#/CAS# VSSQ15 RAS#/CAS# VSSQ15
FBA_CLK1_C FBA_CMD15 F10 FBA_CMD12 F10 FBA_CMD31 F10 FBA_CMD28 F10
H2 H2 H2 H2
1
R7242 J3 H13 J3 H13 J3 H13 J3 H13
CKE# VSSQ18 CKE# VSSQ18 CKE# VSSQ18 CKE# VSSQ18
40.2Ohm C7268 FBA_CMD14 J11 K2 FBA_CMD14 J11 K2 FBA_CMD30 J11 K2 FBA_CMD30 J11 K2
CK# VSSQ19 CK# VSSQ19 CK# VSSQ19 CK# VSSQ19
FBA_CLK1# 1 /VGA
2 0.01UF/25V FBA_CLK0# J12 K13 FBA_CLK0# J12 K13 FBA_CLK1# J12 K13 FBA_CLK1# J12 K13
CK VSSQ20 CK VSSQ20 CK VSSQ20 CK VSSQ20
2
1% FBA_CLK0 M5 FBA_CLK0 M5 FBA_CLK1 M5 FBA_CLK1 M5
/VGA/N17 VSSQ21 VSSQ21 VSSQ21 VSSQ21
M10 M10 M10 M10
G12 N1 G12 N1 G12 N1 G12 N1
WE#/CS# VSSQ23 WE#/CS# VSSQ23 WE#/CS# VSSQ23 WE#/CS# VSSQ23
GND FBA_CMD0 L12 N3 FBA_CMD5 L12 N3 FBA_CMD16 L12 N3 FBA_CMD21 L12 N3
20170214 For GDDR5 >/ 3G Hz FBA_CMD5
CS#/WE# VSSQ24
N12 FBA_CMD0
CS#/WE# VSSQ24
N12 FBA_CMD21
CS#/WE# VSSQ24
N12 FBA_CMD16
CS#/WE# VSSQ24
N12
N14 N14 N14 N14
R7202 1 1% 2 121Ohm J13 R1 R7224 1 1% 2 121Ohm J13 R1 R7207 1 1% 2 121Ohm J13 R1 R7215 1 1% 2 121Ohm J13 R1
GND ZQ VSSQ27 GND ZQ VSSQ27 GND ZQ VSSQ27 GND ZQ VSSQ27
R7203 1 2 1KOhm FBA_ZQ1 J10 R3 R7223 1 2 1KOhm FBA_ZQ2 J10 R3 R7205 1 2 1KOhm FBA_ZQ3 J10 R3 R7214 1 2 1KOhm FBA_ZQ4 J10 R3
SEN VSSQ28 SEN VSSQ28 SEN VSSQ28 SEN VSSQ28
FBA_SEN1 R4 FBA_SEN2 R4 FBA_SEN3 R4 FBA_SEN4 R4
R11 R11 R11 R11
J2 R12 J2 R12 J2 R12 J2 R12
RESET# VSSQ31 RESET# VSSQ31 RESET# VSSQ31 RESET# VSSQ31
R7204 1KOhm FBA_CMD13 J1 R14 R7216 1KOhm FBA_CMD13 J1 R14 R7206 1KOhm FBA_CMD29 J1 R14 R7209 1KOhm FBA_CMD29 J1 R14
GND MF VSSQ32 +FBVDDQ MF VSSQ32 GND MF VSSQ32 +FBVDDQ MF VSSQ32
2 1 FBA_MF1 U1 2 1 FBA_MF2 U1 2 1 FBA_MF3 U1 2 1 FBA_MF4 U1
MF=0 non‐Mirror VSSQ33
VSSQ34
U3
U12
MF=1 Mirror VSSQ33
VSSQ34
U3
U12
MF=0 non‐Mirror VSSQ33
VSSQ34
U3
U12
MF=1 Mirror VSSQ33
VSSQ34
U3
U12
U14 U14 U14 U14
A5 A5 A5 A5
Vpp/NC Vpp/NC Vpp/NC Vpp/NC
@ C7202 820PF/50V U5 @ C7211 820PF/50V U5 @ C7206 820PF/50V U5 @ C7213 820PF/50V U5
Vpp/NC1 Vpp/NC1 Vpp/NC1 Vpp/NC1
1 2 B5 1 2 B5 1 2 B5 1 2 B5
GND VSS1 GND VSS1 GND VSS1 GND VSS1
A10 B10 A10 B10 A10 B10 A10 B10
VREFD1 VSS2 VREFD1 VSS2 VREFD1 VSS2 VREFD1 VSS2
FBA_VREFD0 U10 D10 FBA_VREFD0 U10 D10 FBA_VREFD1 U10 D10 FBA_VREFD1 U10 D10
VREFD2 VSS3 VREFD2 VSS3 VREFD2 VSS3 VREFD2 VSS3
1 2 G5 1 2 G5 1 2 G5 1 2 G5
VSS4 VSS4 VSS4 VSS4
@ C7203 820PF/50V G10 @ C7212 820PF/50V G10 @ C7207 820PF/50V G10 @ C7214 820PF/50V G10
VSS5 VSS5 VSS5 VSS5
H1 H1 H1 H1
VSS6 VSS6 VSS6 VSS6
H14 H14 H14 H14
VSS7 VSS7 VSS7 VSS7
K1 K1 K1 K1
VSS8 VSS8 VSS8 VSS8
1 2 J14 K14 J14 K14 1 2 J14 K14 J14 K14
GND VREFC VSS9 VREFC VSS9 GND VREFC VSS9 VREFC VSS9
C7204 820PF/50V
FBA_VREFC0 L5 FBA_VREFC0 L5 C7205 820PF/50V
FBA_VREFC1 L5 FBA_VREFC1 L5
L10 L10 L10 L10
P10 P10 P10 P10
J4 T5 J4 T5 J4 T5 J4 T5
ABI# VSS13 ABI# VSS13 ABI# VSS13 ABI# VSS13
FBA_CMD8 T10 FBA_CMD8 T10 FBA_CMD24 T10 FBA_CMD24 T10
K4G41325FE-HC28 GND K4G41325FE-HC28 GN D K4G41325FE-HC28 GND K4G41325FE-HC28 GND
/VRAM /VRAM /VRAM /VRAM
+FBVDDQ +FBVDDQ
2
R7225 R7213
549Ohm 549Ohm
@ @
1
FBA_VREFD0 FBA_VREFD1
2
R7233 R7234 R7217 R7219
1.33KOhm 931Ohm 1.33KOhm 931Ohm
@ @ @ @
1
GND GND
3
Q7202A Q7202B
2 UM6K31N 5 UM6K31N
MEM_VREF_CTL @ MEM_VREF_CTL @
4
+FBVDDQ +FBVDDQ
GND GND
2
R7235 R7220
549Ohm 549Ohm
1
R7238 1 @ 2 0Ohm
FBA_VREFC0 FBA_VREFC1
2
R7236 R7237 R7221 R7222
1.33KOhm 931Ohm 1.33KOhm 931Ohm
1
GND GND
3
Q7201A Q7201B
2 UM6K31N 5 UM6K31N
76 MEM_VREF_CTL
MEM_VREF_CTL
4
GND GND
+FBVDDQ
LD R1.2 [chip]
Add Ce7201/02
1
+ CE7201 + CE7202
1
C7225 C7226 C7227 C7228 C7229 C7230 C7231 C7232 C7233 C7234
0603 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 470uF/2V 470uF/2V
/VGA /VGA /VGA @/VGA @/VGA @/VGA /VGA @/VGA @/VGA @/VGA @/VGA @/VGA
2
1
1
C7235 C7236 C7237 C7238 C7239 C7240 C7241 C7242 C7243 C7244 C7245 C7246 C7247 C7248 C7249 C7250
0603 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V
/VGA /VGA /VGA /VGA /VGA @/VGA /VGA @/VGA /VGA /VGA /VGA /VGA /VGA @/VGA @/VGA /VGA
2
1
1
C7251 C7252 C7253 C7254 C7255 C7256 C7257 C7258 C7259 C7260 C7261 C7262 C7263 C7264 C7265 C7266
0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V
2
/VGA /VGA /VGA /VGA /VGA /VGA /VGA /VGA /VGA /VGA /VGA /VGA /VGA /VGA /VGA /VGA
GND
<Variant Name>
Project Name Rev
X542UN/URV R1.0
Title : DDR3L
Size
Custom
vinafix.com
VINAFIX.COM
Place Near GPU
N16S-GTR = 3V U7001D 2.5A
N17S-G1 = 1.8V +FBVDDQ
N17S-G1 = 1.8V Place Near Balls Place Near GPU 300mil
Place Near Balls +VDD_MAIN B26
150mA FBVDDQ1
CORE_PLLVDD MAIN & AON 注意 C25
FBVDDQ2
1
U7001C E23 C7306 C7308 C7310 C7312 C7313 C7366
FBVDDQ3
E26 1UF/6.3V 1UF/6.3V 10UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V
FBVDDQ4
1
C7301 C7302 C7303 C7304 F14 /VGA /VGA /VGA /VGA /VGA /VGA/N17
2
FBVDDQ5
2
AD10 G8 0.1UF/16V 0.1UF/16V 1UF/6.3V 4.7UF/6.3V F21 nbs_c0603_h37_000s nbs_c0805_h57_000s nbs_c0805_h57_000s nbs_c0805_h57_000s
1
NC31 3V3_MAIN_1 FBVDDQ6
R7305 AD7 G9 /VGA /VGA /VGA/N17 /VGA/N17 G13
1
NC40 GM108 3V3_MAIN_2 FBVDDQ7
2
/VGA/N17 0Ohm 3V3_AON
G10 nbs_c0603_h37_000s G14
3V3_AON_1 FBVDDQ8
3V3_AON
G12 G15
3V3_AON_2 FBVDDQ9
N17S-G1 G16 5/16 GND
2
FBVDDQ10 C7311→10uF
F11 G18
NC81 FBVDDQ11 C7312→22uF
GND G19 for PWR Noise
FBVDDQ12
V5 N16S-GTR = 3V G20
FERMI_RSVD1 FBVDDQ13
V6 N17S-G1 = 1.8V G21
FERMI_RSVD2 FBVDDQ14
L22
Place Near Balls +VDD_AON
FBVDDQ15
1
C7345 150mA L24 C7307 C7309 C7311 C7367
FBVDDQ16
0.1UF/16V L26 1UF/6.3V 1UF/6.3V 10UF/6.3V 10UF/6.3V
FBVDDQ17
/VGA/N17 M21 /VGA/N17 /VGA/N17 /VGA /VGA/N17
FBVDDQ18
2
nbs_c0402_h22_000s CONF IGURABLE N21 nbs_c0603_h37_000s nbs_c0603_h37_000s
FBVDDQ19
1
C7331 C7305 C7329 C7330 R21
2
POWER CHANNELS
FBVDDQ20
* nc on substrate 0.1UF/16V 0.1UF/16V 1UF/6.3V 4.7UF/6.3V T21
FBVDDQ21
/VGA /VGA /VGA/N17 /VGA/N17 V21 2/17
1
FBVDDQ22
2
GND G1 nbs_c0603_h37_000s W21 Add C7341, C7342, C7343, C7344→1uF GND
NC82 FBVDDQ23 for N17S
G2
NC83
G3
NC84 GF117
G4
NC85 GF119
G5 GND
NC86 GK208
1
G6 C7341 C7342 C7343
G7
NC87 Place Near GPU H24 1UF/6.3V 1UF/6.3V 1UF/6.3V
NC88 FBVDDQ FBVDDQ_AON1
FBVDDQ
H26 /VGA/N17 /VGA/N17 /VGA/N17
FBVDDQ_AON2
2
J21
FBVDDQ FBVDDQ_AON3
V1 K21
NC140 FBVDDQ FBVDDQ_AON4
V2
NC141
GND
W1
NC145
W2
NC146
1
W3 C7344
NC147
W4 1UF/6.3V
NC148
/VGA/N17
2
N16S-GTR-S-A2
GND
U7001F
+FBVDDQ
A2 M13
GND1 GND73
/VGA 1% 2 1 D22 AB17 M15
FB_CAL_VDDQ GND6 GND74
R7301 40.2Ohm FB_CAL_PD_VDDQ AB20 M17
GND7 GND75
AB24 N10
GDDR5 = 40.2 ohm /VGA 1% 2 1 C24 AC2
GND8 GND76
N12
DDR3 = 42.2 ohm R7302 40.2Ohm FB_CAL_PU_GND
FB_CAL_GND
AC22
GND10 GND77
N14
GND11 GND78
AC26 N16
GND12 GND79
/VGA R7304 1 2 60.4Ohm B25 AC5 N18
FB_CAL_TERM GND13 GND80
FB_CAL_TERM_GND AC8 P11
GND14 GND81
AD12 P13
GDDR5 = 60.4 ohm N16S-GTR-S-A2 AD13
GND15 GND82
P15
GND DDR3 = 51.1 ohm A26
GND16 GND83
P17
GND2 GND84
AD15 P2
GND17 GND85
AD16 P23
GND18 GND86
AD18 P26
GND19 GND87
AD19 P5
GND20 GND88
AD21 R10
GND21 GND89
AD22 R12
GND22 GND90
AE11 R14
GND23 GND91
20161207 For X542U layout simulation modify CAPs AE14 R16
GND24 GND92
AE17 R18
GND25 GND93
AE20 T11
GND26 GND94
AB11 T13
GND4 GND95
AF1 T15
GND27 GND96
AF11 T17
GND28 GND97
AF14 U10
GND29 GND98
AF17 U12
GND30 GND99
AF20 U14
GND31 GND100
AF23 U16
GND32 GND101
AF5 U18
GND33 GND102
AF8 U2
GND34 GND103
AG2 U23
GND35 GND104
AG26 U26
GND36 GND105
AB14 U5
GND5 GND106
B1 V11
GND37 GND107
B11 V13
GND38 GND108
B14 V15
GND39 GND109
B17 V17
GND40 GND110
+NVVDD B20 Y2
21.22A GND41 GND111
B23 Y23
GND42 GND112
U7001E B27 Y26
Place Under GPU B5
GND43 GND113
Y5
GND44 GND114
K10 B8
VDD1 GND45
K12 E11
VDD2 GND46
1
1
K14 C7336 C7337 C7363 C7324 C7327 C7328 C7325 E14
2
VDD3 GND47
K16 1UF/6.3V 1UF/6.3V 1UF/6.3V 4.7UF/6.3V 4.7UF/6.3V 4.7UF/6.3V 4.7UF/6.3V E17
VDD4 GND48
K18 /VGA /VGA /VGA/N17 /VGA /VGA /VGA /VGA E2
1
VDD5 GND49
2
2
L11 nbs_c0603_h37_000s nbs_c0603_h37_000s nbs_c0603_h37_000s nbs_c0603_h37_000s E20
VDD6 GND50
L13 E22
VDD7 GND51
L15 E25
VDD8 GND52
L17 E5
VDD9 GND53
M10 E8
VDD10 GND54
M12 H2
VDD11 GND55
M14 H23
VDD12 GND56
M16 H25
VDD13 GND57
M18 C7315 C7340 C7314 C7322 H5
2
2
VDD14 GND58
N11 4.7UF/6.3V 4.7UF/6.3V 4.7UF/6.3V 4.7UF/6.3V K11
VDD15 GND59
N13 /VGA /VGA /VGA /VGA/N17 K13
1
1
VDD16 GND60
N15 nbs_c0603_h37_000s nbs_c0603_h37_000s nbs_c0603_h37_000s nbs_c0603_h37_000s K15
VDD17 GND61
N17 K17
VDD18 GND62
P10 L10
VDD19 GND63
P12 L12
VDD20 GND64
P14 L14
VDD21 GND65
P16 L16
VDD22 GND66
P18 L18
VDD23 GND67
R11 L2
VDD24 GND68
1
R13 C7364 C7365 C7333 C7321 C7326 C7338 L23

2
2
VDD25 GND69
R15 1UF/6.3V 1UF/6.3V 4.7UF/6.3V 4.7UF/6.3V 4.7UF/6.3V 4.7UF/6.3V L25
VDD26 GND70
R17 /VGA /VGA /VGA /VGA /VGA /VGA L5 AA7
1
1
VDD27 GND71 GND3
2
T10 nbs_c0603_h37_000s nbs_c0603_h37_000s nbs_c0603_h37_000s nbs_c0603_h37_000s M11 AB7

VDD28 GND72 GND9
T12
VDD29
T14
VDD30
T16 GND GND
VDD31
T18 N16S-GTR-S-A2
VDD32
U11 GND
VDD33
U13
VDD34
U15
VDD35
U17
VDD36
V10 C7348 C7349
2
2
VDD37
V12 4.7UF/6.3V 4.7UF/6.3V
VDD38
V14
1
1
VDD39
V16 nbs_c0603_h37_000s nbs_c0603_h37_000s
VDD40
V18
VDD41
@/VGA/N17 @/VGA/N17
N16S-GTR-S-A2 GND
1
1
C7354 C7360 C7356 C7357 C7358
2
4.7UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V

@/VGA /VGA/N17 /VGA/N17 /VGA/N17
1
2
nbs_c0603_h37_000s nbs_c0603_h37_000s nbs_c0603_h37_000s nbs_c0603_h37_000s nbs_c0603_h37_000s
/VGA/N17
PC9145, PC9137, PC9144, PC9139 22uF under GPU

GND
Optional caps
Place Near GPU 300mil
BOM
Project Name Rev
X542UN/URV R1.0
Title : N14M-GE-VDD
Size
D
vinafix.com
VINAFIX.COM
LVDS U7001G
CORE_PLLVDD
AC4
NC29
AC3 U7001I
NC28
1
R7403 AA6
NC6
0Ohm Y3
NC152 GF119/GK208
Y4 U6
NC153 NC139
/VGA/N17 U7001H
2
DVI/HDMI DP
V7
NC144
AA2
IFPC
NC2
W7 AA3 T7 I2CX_SDA P4
NC151 NC3 NC136 NC121
T6 GF119/GK208 I2CX_SCL P3
NC135 NC120
R7
NC129
1
C7401 AA1 DVI/HDMI DP
NC1
0.1UF/16V AB1 TXC
R5
NC7 NC127
/VGA/N17 M7 I2CW_SDA N5 R4
NC113 NC118 TXC NC126
2
nbs_c0402_h22_000s N7 I2CW_SCL N4
NC119 NC117
AA5 T5
NC5 TXD0 NC134
AA4 TXD0
T4
NC4 NC133
N3
TXC NC116
GND TXC
N2 TXD1 U4
NC115 NC138
AB4 IFPD TXD1 U3
NC16 NC137
AB5 R3
NC17 TXD0 NC125
TXD0
R2 V4
NC124 NC143
NC FOR GF117/GM108
TXD2
NC FOR GF117/GM108
2/17 add C7401 0.1uF for N17 V3
TXD2 NC142
Andy W6 AB2 R1
NC FOR GF117/GM108
NC FOR GF117/GM108
NC150 NC13 TXD1 NC123
AB3 TXD1 T1
NC15 NC130
GF117
Y6
NC154
NC FOR GF117/GM108
T3 R6 D4
TXD2 NC132 NC128 NC GPIO17
AD2 T2
NC FOR GF117/GM108
NC34 TXD2 NC131
AD3
NC37
GF117
AD1 P6 C3
NC30 NC122 NC GPIO15
AE1
NC41
N16S-GTR-S-A2
N16S-GTR-S-A2
AD5
NC39
AD4
NC38
GF117
NC
B3
GPIO14
IFPAB
N16S-GTR-S-A2
U7001J
CRT
GF119/GK208
DVI-DL DVI-SL/HDMI DP
N16S-GTR = 3V
I2CY_SDA I2CY_SDA J3 N17S-G1 = 1.8V
NC94
I2CY_SCL I2CY_SCL J2
NC93 +VDD_AON
J7 20161207_SWAP
NC98
J1 U7001K
TXC TXC NC92
K1
TXC TXC NC99
K7 R7401
NC105 GF117/GM108 GF117 GM108/GK208
/VGA/N17
K3 10KOhm
TXD0 TXD0 NC101
K2 W5 B7 I2CA_SCL 2 1
TXD0 TXD0 NC100 NC149 NC NC I2CA_SCL
A7 I2CA_SCL I2CA_SDA R7402 2 10KOhm 1
NC I2CA_SDA @/VGA/N17
K6 M3 AE2 TSEN_VREF I2CA_SDA
NC104 TXD1 TXD1 NC110 NC49
M2
TXD1 TXD1 NC109
AF2 NC NC
AE3
NC62 NC53
M1 AE4
TXD2 TXD2 NC108 NC NC54
N1
TXD2 TXD2 NC114
NC FOR GF117/GM108
IFPE AG3 1 2 RN7405A /VGA/n16

NC FOR GK208 NC NC77 2.2KOhm
I2CA_SCL 3 4 RN7405B /VGA/N16
2.2KOhm
AF4 I2CA_SDA
NC NC66
C2 AF3
HPD_E HPD_E GPIO18 NC NC65
GM108
NC FOR GF117 GK208
GF117 GND
NC FOR GF117/GK208/GM108
H6 N16S-GTR-S-A2
NC91
GF119/GK208
J6
NC97 DVI-DL DVI-SL/HDMI DP
H4
I2CZ_SDA NC90
I2CZ_SCL H3
NC89
TXC J5
NC96
TXC J4
NC95
K5
TXD3 TXD0 NC103
TXD3 TXD0
K4
NC102
TXD4 TXD1 L4
NC107
IFPF TXD4 TXD1 L3
NC106
M5
NC FOR GF117/GM108
TXD5 TXD2 NC112

TXD5 TXD2
M4
NC111
NC FOR GK208
F7
HPD_F GPIO19 DGPU_GPIO19 76
DGPU_GPIO19
NC FOR GF117
N16S-GTR-S-A2
BOM
Project Name Rev
X542UN/URV R1.0
Title : N14M-GE_DISPLAY
Size
C
vinafix.com
VINAFIX.COM
R7519
+VDD_MAIN +VDD_AON
N16S-GTR = 3V
N17S-G1 = 1.8V
1
N17S VRAM Starp pin R7531 R7532
+VDD_AON 0Ohm 0Ohm
VG BOM 帶入主料時記得要加2nd Source

/VGA/N16 /VGA/N17
2
N16S-GTR = 3V
2
N17S-G1 = 1.8V
4.99K = 10G212499114010
1
R7511 R7508 R7507 R7505 R7503 R7501 N16, R7501 = 49.9K (10G212499214010)
45.3KOhm
@/VGA
45.3KOhm
@ /VGA
4.99KOhm
@/VGA
100KOhm 100KOhm 49.9KOHM N17, R7501 = STRAP
+VDD_AON
10K = 10G212100214010
@/VGA/N17 @/VGA/N17
1
1% 1% 1% /VGA/N16 R7516 R7526 R7518 15K = 10G212150214030
2
1
1
U7001L 100KOhm 100KOhm 100KOhm
20K = 10G212200214030
1
R7514 /VGA/N17 /VGA/N17 /VGA/N17
10KOhm 24.9K = 10G212249214010
2
STRAP5 STRAP4 STRAP3 STRAP2 STRAP1 STRAP0 @/VGA
30.1K = 10G212301214010
2
E10 ROM_SI ROM_SO ROM_SCLK
34.8K = 10G212348214010
1
NC79
R7512 R7510 R7509 R7506 R7504 R7502 F10 D12
NC80 ROM_CS_N
45.3K = 10G212453214010
2
100KOhm 100KOhm 100KOhm 100KOhm 100KOhm 100KOhm ROM_CS#
1
/VGA/N17 /VGA/N17 /VGA/N17 @/VGA/N17 @/VGA/N17 @/VGA/N17 ROM_SI
B12
A12 ROM_SI
R7519
4.99KOhm
R7520
4.99KOhm
R7521
100KOhm 49.9K = 10G212499214010
2
ROM_SO
D1 C12 ROM_SO @ /VGA/N16 /VGA/N16
/VGA/N16/N17
STRAP0 ROM_SCLK
STRAP0 D2 ROM_SCLK 1% 1%
2
STRAP1
1
STRAP1 E4 NC F OR
STRAP2
STRAP2 E3 GM108 N16 VRAM Starp pin N16 4.99K
STRAP3
STRAP3 D3 N17, 100Kohm
STRAP4
GND STRAP4
GND
N17S-G1
C1
NC78
STRAP5 D11
BUFRST_N
F6 D10 R7515 10KOhm

MULTI_STRAP_REF0_GND NC PGOOD
GF117 2 /VGA/N16 1
GK208 GF117 GF 119
T7501 GM108 GK208
1 F4 GM108
1
MULTI_STRAP_REF1_GNDMLS_REF1 NC
R7517
TPC26T
40.2KOhm F5 GND
MULTI_STRAP_REF2_GND NC
/VGA/N16
1%
2
N16S-GTR-S-A2
N16 (920/930/940)→stuff R7511
GND
Xtal
N16S-GTR = +PEX_VDD
N17S-G1 = +VDD_MAIN
CORE_PLLVDD
+PEX_VDD_H U7001M
Place Near GPU Place close to balls
L7501 150mA
1 2 60mA L6
CORE_PLLVDD
M6
SP_PLLVDD
30Ohm/100Mhz
1
/VGA C7507 C7505 45mA N6

2
VID_PLLVDD NC
nbs_l0603_h39_000s 22UF/6.3V 4.7UF/6.3V
/VGA /VGA 45mA
1
GF119/GK208 GF117/GM108
2
nbs_c0805_h57_000s nbs_c0603_h37_000s
1
R7529 C7501 Near GPU

0Ohm 0.1UF/16V
/VGA A10 C10
XTAL_SSIN XTAL_OUTBUFF
2
/VGA/N17 NV27M_SSC_NV SS_CLKIN

2
GND C11 B10

XTAL_IN XTAL_OUT
GND
NV27M_NOSSC_NV N16S-GTR-S-A2
1
1
2
R7522 R7523
2
10KOhm R7524 10KOhm
/VGA R7528 X7501 1KOhm /VGA
0OHM 27Mhz /VGA
2
2
/VGA /VGA
1
1
L7502 1 3
1 2 NV27M_NOSSC_NV_R Xtal_out GND
GND
300Ohm/100Mhz
4
1
1
C7503 C7508 C7509
/VGA/N16
1
C7511 10UF/6.3V 15PF/50V 15PF/50V

47UF/6.3V /VGA/N16 C7510 C7809 /VGA /VGA
2
2
nbs_c0603_h37_000s 0.1UF/10V 0.1UF/10V
2
/VGA/N16 /VGA /VGA GND GND
07G010952701
GND GND
GND GND 2nd source: BOM
GND 07G010262700 (未測)
07G010X22700 (未測) Project Name Rev
X542UN/URV R1.0
Title : N14M-GE_ROM,XTAL
Size
D
vinafix.com
VINAFIX.COM
N16S-GTR = 3V
N17S-G1 = 1.8V
+VDD_AON
3 4 RN7609B /VGA
2.2KOhm
DDC2C_CLK 1 2 RN7609A /VGA
2.2KOhm
DDC2C_DAT
+VDD_AON
4
R7651
RN7601A RN7601B 1 2
0526-2 JIM
2.2KOhm 2.2KOhm
/VGA /VGA 0Ohm /VGA 3 4 RN7608B /VGA
2.2KOhm
DDC2B_CLK 1 2 RN7608A /VGA
2.2KOhm
R7605 DDC2B_DAT
3
1 2
DGPU_RST# 77
DGPU_RST#
0Ohm @/VGA
GPIO GND
2
N16S-GTR = 3V
1 6 N17S-G1 = 1.8V
SMB1_CLK_S 28,50
U7001N +VDD_AON
Q7601A
5
D9 UM6K1N
I2CS_SCL
D8 I2CS_SCL 4 3
I2CS_SDA SMB1_DAT_S 28,50
I2CS_SDA
A9 1 2 RN7602A @/VGA
I2CC_SCL Q7601B 2.2KOHM
B9 DDC2C_CLK DDC2C_CLK 3 4 RN7602B @/VGA
I2CC_SDA 2.2KOHM
DDC2C_DAT UM6K1N DDC2C_DAT
1 2 RN7603A @/VGA
GF117 2.2KOHM
T7610 1 E12 DDC2B_CLK 3 4 RN7603B @/VGA
THERMDN 2.2KOHM
NC
C9 DDC2B_DAT
I2CB_SCL
T7611 1 F12 NC
C8 DDC2B_CLK 1 2 RN7604A /VGA
THERMDP I2CB_SDA 100KOhm
DDC2B_DAT GPU_THERM#_L 3 4 RN7604B /VGA
100KOhm
GPU_ALERT#_L
T7612 1 AE5
JTAG_TCK
T7614 1 AD6
JTAG_TMS
T7609 1 AE6
JTAG_TDI
T7613 1 AF6 R7606 10KOhm @/VGA/N16
JTAG_TDO
AG4 C6 NVDD_PSI 2 1
JTAG_TRST_N GPIO0
B2 DGPU_GPIO0
GPIO1
D6 DGPU_GPIO1
GPIO2
C7 DGPU_GPIO2
1
GPIO3
R7601 F9
GPIO4
10KOhm A3 DGPU_GPIO4 R7609 10KOhm @/VGA
GPIO5
1% GK208
A4 DGPU_GPIO5 DGPU_FB_CLAMP_GPIO_R 2 1
GPIO6
/VGA B6 DGPU_GPIO6 R7607 10KOhm /VGA
2
GM108 GPIO7
OVERT
A6 DGPU_GPIO7 VDD_MAIN_EN 2 1
OVERT
OVERT F8 GPU_THERM#_L R7650 10KOhm /VGA/N17
GPIO9 N16S-GTR & N17S-G1
GPIO10
C5 GPU_ALERT#_L
相同設定 FRAME_LOCK# 2 1
E7 MEM_VREF_CTL
GPIO11
D7 DGPU_GPIO11 R7610 10KOhm /VGA
GPIO12
GND B4 dGPU_PD# GPU_PEX_RST_HOLD# 2 1
GPIO13
DGPU_GPIO13 R7615 10KOhm @/VGA
GPU_EVENT# 2 1
GM108 GK208 GF117 GF 119
GPIO16 GPIO16 NC
D5 R7611 10KOhm /VGA
GPIO16
GPIO20 GPIO20 NC E6 DGPU_GPIO16 FB_CLAMP_TGL_REQ 2 1
GPIO20
C4 R7604 10KOhm /VGA
GPIO21 GPIO8 NC GPIO21
DGPU_GPIO21
N17S-G1, reserved SYS_PEX_RST_MON# 2 1
GPIO8 NC NC
E9
GPIO8
DGPU_GPIO8
R7613 10KOhm @/VGA
DGPU_GPIO19 74
N16S-GTR-S-A2 DGPU_GPIO19 SYS_PEX_RST_MON# 2 1
R7612 10KOhm /VGA
DGPU_FB_CLAMP_GPIO_R 2 1
N16S-GTR & N17S-G1 GPIO
2 R7647 1 100KOhm
NVDD_PWM_VID 91 3D VISION 2 R7648 1 100KOhm
MEM_VREF_CTL
VDD_MAIN_EN 77
NVDD_PSI 91
MEM_VREF_CTL 72
dGPU_PD# 89
GND
GPU_PEX_RST_HOLD#
3D VISION /VGA 1 2
GPU_EVENT# 21
FB_CLAMP_TGL_REQ D7601
1N4148WS +3VS
10KOhm R7608 @/VGA

VGA_ALERT_P# 2 1
For N16S-GTR GPIO, follow X456Ux For N17S-G1 GPIO, follow N17
R7621 /VGA 0Ohm
2 1
R7603 1
/VGA/N16 2 0Ohm R7634 1/VGA/N17 2 0Ohm
DGPU_GPIO0 DGPU_FB_CLAMP_GPIO_R DGPU_GPIO0 R7635 1/VGA/N17 2 0Ohm NVDD_PWM_VID 2 3
S 2
D3
VGA_ALERT_P# 90
DGPU_GPIO1 R7636 1/VGA/N17 2 0Ohm DGPU_FB_CLAMP_GPIO_R GPU_ALERT#_L
DGPU_GPIO2 FB_CLAMP_TGL_REQ
R7637 1/VGA/N17 2 0Ohm
R7623 1
/VGA/N16 2 0Ohm DGPU_GPIO4 R7649 1/VGA/N17 2 0Ohm VDD_MAIN_EN @/VGA
G
DGPU_GPIO5 R7624 1
/VGA/N16 2 0Ohm VDD_MAIN_EN DGPU_GPIO5 R7638 1/VGA/N17 2 0Ohm FRAME_LOCK# 2N7002K
1
DGPU_GPIO6 R7625 1
/VGA/N16 2 0Ohm FB_CLAMP_TGL_REQ DGPU_GPIO6 NVDD_PSI Q7604
1
DGPU_GPIO7 3D VISION R7643 1 2 0Ohm
DGPU_GPIO16 /VGA/N17 SYS_PEX_RST_MON#
R7630 1
/VGA/N16 2 0Ohm DGPU_PEX_RST#
DGPU_GPIO11 NVDD_PWM_VID
R7632 1
/VGA/N16 2 0Ohm
DGPU_GPIO13 NVDD_PSI @/VGA/N17 Q7603
1
1 2
1
R7646 0Ohm 2N7002K
G
DGPU_GPIO8 @/VGA/N17 @/VGA
R7644 1 2 0Ohm
DGPU_GPIO21
N16S-GTR = 3V R7633 1
/VGA/N16 2 0Ohm 2 3
Level shift
2 S
3 D
GPU_THERM#_GPU 32,77
N17S-G1 = 1.8V DGPU_GPIO21 GPU_PEX_RST_HOLD# GPU_THERM#_L
+VDD_AON DGPU_GPIO8
R7626 1
/VGA/N16 2 0Ohm
SYS_PEX_RST_MON# /VGA/N17
GND N17:1.8V
DGPU_GPIO19
R7645 1 2 0Ohm
3D VISION
R7602
2
/VGA
1
0Ohm
N16:3.3V
2
R7618
10KOhm
/VGA +3VS
1
N16S-GTR = 3V
1
dGPU_PD# N17S-G1 = 1.8V +3VS R7627
100KOhm
+VDD_AON /VGA
U7602
2
R7622
DGPU_FB_CLAMP_GPIO 21,30,77
1 A 5 100KOhm
70 SYS_PEX_RST_MON# VCC
6
Q7602A /VGA
3
UM6K1N 2 B Q7605B
2
2 0Ohm 1 @/VGA 2 R7619 GPU_PEX_RST_HOLD# 5 UM6K1N
AC_IN_OC# 30,89
3 4
4
GND DGPU_PEX_RST# 32,70
1
6
/VGA /VGA/N17
0Ohm 1 /VGA 2 R7620 NC7SZ08P5X
DGPU_LIMIT 30
/VGA/N16 2
1
3
Q7602B GND R7616 DGPU_FB_CLAMP_GPIO_R Q7605A
1
UM6K1N 10KOhm UM6K1N GND
5 /VGA/N17
/VGA/N16
GND
2
4
/VGA
GND GND
R7628 0Ohm
1 2
/VGA/N16
BOM
Project Name Rev
X542UN/URV R1.0
Title : N14M-GE_GPIO
Size
D
vinafix.com
VINAFIX.COM
GPU_PWR_EN +VDD_AON +12VSUS +12VSUS

0606 delete D7704, C7703, R7718
+3VSUS
U7701 N16S-GTR = 3V N16S-GTR = 3V
N17S-G1 = 1.8V N17S-G1 = 1.8V
1
1 A 5 R7706 R7707
30,57,88 SUSB_EC# VCC +1V8_VDD_3V +VDD_AON
100KOhm 100KOhm
2 B /VGA /VGA
+3VS
2
D7701
3 4
GND
Y GPU_PWR_EN
NC7SZ08P5X dGPU_PWRON_VSG 1 2
1
R7708 @/VGA Q7701
3
1N4148WS
10KOhm GND Q7703B 1 6
/VGA 5 UM6K1N /VGA 2 D 5
57 dGPU_PWR_AON_DSG#
/VGA 1 2 3 S 4
4
G
6
GPU_PWR_EN 69,91,93
1
dGPU_PWRON R7701 2 1 0Ohm /VGA Q7703A R7702 SI3456DDV-T1-GE3
2 UM6K1N 1MOhm C7701 /VGA
GPU_PWR_EN /VGA /VGA 0.022UF/25V
2
/VGA
3
3 D
Q7702 GND GND GND

1 1 2N7002K
21,69 DGPU_PWR_EN#
G /VGA
2 S
1
R7709
2
10KOhm
/VGA
+VDD_MAIN
2
+12VSUS +12VSUS
N16S-GTR = 3V N16S-GTR = 3V
GND GND N17S-G1 = 1.8V N17S-G1 = 1.8V
1
R7736 R7737 +1V8_VDD_3V +VDD_MAIN
100KOhm 100KOhm
/VGA /VGA R7704
dGPU_PWRON_VSG 2 1 2
2
3 30KOHM
MAIN_EN 1
NVVDD_PWR_EN D7703 BAT54AW
/VGA
Q7711
3
Q7712B /VGA 1 6
N16S-GTR = 3V N16S-GTR = 3V 5 UM6K1N 2 D 5
57 dGPU_PWR_MAIN_DSG# 1 2 3 S 4
N17S-G1 = 1.8V N17S-G1 = 1.8V dGPU_PWR_MAIN_DSG# /VGA
4
G
6
+VDD_MAIN +VDD_MAIN
1
+3VSUS Q7712A R7733 270KOhm SI3456DDV-T1-GE3
2 UM6K1N C7706 /VGA
76 VDD_MAIN_EN
/VGA 0.01UF/25V
2
2
2
1
R7710 R7712 R7713
10KOhm 100KOhm 10KOhm 0606 PU at PAGE76 N16S-GTR = 3V
@/VGA /VGA GND GND GND N17S-G1 = 1.8V
@/VGA
1
+1.8VS +1V8_VDD_3V
NVDD_PWR_EN 91
/VGA/N17
3
Q7704B 2 1
5 EM6K1-G-T2R R7753 0Ohm
@/VGA +3VS nbs_r0805_h24_000s
4
6
Q7704A
2 EM6K1-G-T2R 2 1
@/VGA +PEX_VDD +1.0VSUS +PEX_VDD R7714 0Ohm
2
/VGA nbs_r0805_h24_000s
1
1
C7702 R7711 R7721 Q7705
0.1UF/25V 100KOhm 300KOHM PEA28BA /VGA/N16
@/VGA 5%
S
@/VGA /VGA 3
D
1
dGPU_PWRON_VSG 2 5 2
3 1
G
1
4
GND GND GND GND GND D7705 /VGA BAT54AW
2 1
MAIN_EN PEX_VDD_EN
1
R7705 560KOhm
/VGA C7704
0.015UF/16V
2
GND
N16S-GTR = 3V N16S-GTR = 1.0V

+12VSUS +3V N17S-G1 = 1.8V N17S-G1 = 1.8V
FBVDDQ_EN
+VDD_MAIN +PEX_VDD_H
/VGA/N17
1
R7719 R7715 2 1
100KOhm 10KOhm R7716 0Ohm
/VGA /VGA +PEX_VDD nbs_r0805_h24_000s
2
2 1
DGPU_FBVDDQ_EN 93
R7703 0Ohm
nbs_r0805_h24_000s
3
Q7710B +12VSUS +12VSUS
5 UM6K1N
57 dGPU_PWR_15# /VGA/N16
/VGA 0524-2 JIM
4
D7702
6
SL7702 1 2 1 Q7710A 0525-1 JIM
1
21,30,76 DGPU_FB_CLAMP_GPIO 0402 3 2 UM6K1N R7717 R7751
SL7703 1 2 2 dGPU_PWRON_OR /VGA 100KOhm 100KOhm
1
91 NVDD_PWRGD 0402
@/VGA @/VGA
2
BAT54CW +3VSUS +3VS R7752
2
/VGA R7720 1 2
100KOhm PEX_VDD_EN
/VGA 10KOhm
@/VGA
3
1
R7740 R7731 Q7720B
100KOhm 100KOhm 5 EM6K1-G-T2R
+VDD_AON GND GND GND /VGA/N17 /VGA/N17 @/VGA
4
2
6
Q7720A
2 EM6K1-G-T2R
1
DGPU_PWROK 21,24
R7750 NVDD_PWRGD @/VGA
1
10KOhm
3
/VGA Q7716B
D7706
1N4148WS 5 UM6K1N
2
/VGA /VGA/N17 GND GND
4
1 2
6
Q7716A
SL7701 1 2 2 UM6K1N
24,93 +FBVDDQ_PWRGD 0402 /VGA/N17
1
1
C7707
0.033UF/16V
@/VGA GND GND
2
R7741 1 2 0Ohm
GND /VGA/N16
NVVDD POWER GOOD LOOPBACK 0302-1 rick

ref.G753VI +3vs 0303-1 rick
76 DGPU_RST# GPU_THERM#_GPU 32,76
2
+VDD_AON
R7718
10KOhm
@/VGA +3vs +VDD_AON
UM6K1N
6
1
Q7707A
2 UM6K1N GPU_THERM#_GPU 3 4 NVDD_PWR_EN
@/VGA Q7707B @/VGA
3
Q7706B
5
5 UM6K1N
@/VGA
4
+3vs GND
6
Q7706A
2 UM6K1N
NVDD_PWRGD @/VGA GND GND
1
+3vs FOR Layout Placement

GND
DGPU_FB_CLAMP_GPIO
BOM
Project Name Rev
X542UN/URV R1.0
Title : N14M-GE_POWER
Size
D
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http://pnp.asus.com/DSNViewer/40959#
Address Selection Table VINAFIX.COM

Address 0x7E 0x7C 0x7A 0x78 0x76 0x74 0x72 0x70
R7812 10k 1.5k 2k 3.6k 3.9k 4.3k 5.1k 6k
R7813 Open 8.2k 6.2k 6.8k 4.7k 3.6k 2.7k 2k
TR7807 place near VRAM

or SSD base on Thermal RD test
P_TEMPSENS_6_VCC_30
TR7807 /VGA R7808 R7812 /VGA
47KOHM 12KOHM 4.3KOHM
t
1 2 C7803
2 1
1% P_TEMPSENS_6_VCC_30 47PF/50V
C7804 /VGA R7813 /VGA @/VGA
0.1UF/25V 3.6KOhm
1.0 ~ 3.56V 1 2 1 2
2 1
/VGA GND
GND GND SL7802 @/VGA
TR7806 place near AMD/APL CPU U7803 2 1
1 8 0402 SMB1_DAT 28,30,90
ALT/ADD SDA
105C @ 5k TR7806 /VGA R7810 P_TEMPSENS_6_ADDR_10 2 7 P_TEMPSENS_6_SDA_30 SL7803 @/VGA
40C @ 51k TM3 SCL
47KOHM 12KOHM P_TEMPSENS_6_TM3_10 3 6 P_TEMPSENS_6_SCL_30 2 1
TM2 GND
t
2 1 P_TEMPSENS_6_TM2_10 4 5 0402 SMB1_CLK 28,30,90
TM1 VCC5
1% P_GPU_VRM_TEMP_SENSOR_10 P_TEMPSENS_6_VCC_30
C7805 /VGA UP1905AMA8
0.1UF/25V /VGA GND Check 其他頁是否有
1.0 ~ 3.56V 1 2 pull high 到 3.3V
2 1 +5VSUS C7807
/VGA 47PF/50V GND
GND 1 2 @/VGA
R7811 2.2Ohm 5%
1
PTR9110 place near PQL9101 nbs_r0603_h24_000s
Close to +NVDD L side R7809 C7806
/VGA
12KOHM 1UF/16V
2
2 1 nbs_c0603_h37_000s
91 P_GPU_VRM_TEMP_SENSOR_10
1% /VGA
105C @ 5k C7808 /VGA GND
40C @ 51k 0.1UF/25V
1.0 ~ 3.56V
2 1
/VGA
GND Place at Page 91
BOM
Project Name Rev
X456 R2.0
Title : VGA_****
Size
C
Dept.: ASUSTeK COMPUTER INC. Engineer: EE
vinafix.com
VINAFIX.COM
81 P_IMVP8_GT_HG_30
81 P_IMVP8_GT_LX_30
81 P_IMVP8_GT_LG_30
81 P_IMVP8_CORE1_HG_30
81 P_IMVP8_CORE1_LX_30
81
81
P_IMVP8_CORE1_LG_30
P_IMVP8_SA_HG_30
KBLAKE IMVP8 (1) Power [For U42 CPU]
81 P_IMVP8_SA_LX_30
81 P_IMVP8_SA_LG_30
81 P_IMVP8_CORE2_PWM_10
Place Close to CPU
PR8012 @ PC8091
100Ohm 1% 220PF/50V @ PR8039 Place Close to PL8104
1 2 1 2 0Ohm @
nbs_r0201_h12_000s 1 2
P_IMVP8_SA_CSN_10 P_IMVP8_SA_CSN_R_10 81
1
1 2 PR8027 CHOKE SIZE PTR8005
6 P_VCCSA_VSSSENSE_50OHM
PR8015 1.5KOhm VCCSA OCP=8A 100kOhm
2
1KOhm @ @ CHOKE SIZE 1% @
2
2
1
PR_2017/03/21 PC8035 PC8003 PC8092 PC8072
2
1
1000PF/50V PC8036 PC8094 PR8045 0.01UF/50V 4700PF/50V 0.01UF/50V
Place Close to CPU @ PR8048 VCCSA LL=10.3mohm P_IMVP8_SA_COMP_R_10 15PF/50V 1000PF/50V 24KOhm @ @ @ P_IMVP8_SA_CS_R_10
1
1
2
2
1.4KOHM @ @
2
2
@
1
2 1@ CHOKE SIZE PC8020 PR8055 PR8059 @
6 P_VCCSA_VCCSENSE_50OHM
1
0.01UF/50V 12KOHM 7.5KOHM
PR8036 @ PR8023 PC8063 @ @ nbs_r0603_h39_000s
1
1
100Ohm 1% 0Ohm @ 1000PF/50V 2 1
1 2 2 1 2 1 P_IMVP8_SA_LX_SP_10 81
+VCCSA
nbs_r0201_h12_000s @
Place Close to CPU P_IMVP8_SA_VSP_R_10

PR8050 PSL8001
1 2 +5VSUS_PWR
+VCCCORE 0402
2 100Ohm 1 89 P_IMVP8_PSYS_INFO IMVP8_PWRGD 25,30
DIS SA PSL8002 1 2 ALL_SYSTEM_PWRGD 25,30,58
6 P_VCCCORE_VCCSENSE_50OHM CHOKE SIZE
0402 P_IMVP8_DRON 81
20161216 Power modify
2
PR8004
2
+VCCST
PC8007 PR8029 1KOhm P_IMVP8_SVID_VCC_10 2 1
1000PF/50V PR8020 13.3KOhm PC8046 PR8018 PR8034
2
750Ohm 470PF/50V 54.9KOhm 1Ohm 5%
1
1 2 1 2
1
@ @ nbs_r0603_h24_000s
1
6 P_VCCCORE_VSSSENSE_50OHM
1
PR8019 PR8000 PR8002 PC8018
100Ohm
P_IMVP8_SA_COMP_10
Place Close to CPU 45.3Ohm 100Ohm 0.1UF/25V
P_IMVP8_SA_IOUT_10
2
P_IMVP8_SA_CSN_10
P_IMVP8_SA_VSN_10
P_IMVP8_SA_CSP_10
P_IMVP8_SA_VSP_10
P_IMVP8_SA_ILIM_10
nbs_c0603_h37_000s
P_IMVP8_PSYS_10
2 1 1 2 PSL8004
2
PC8093 /U42_/U22 PR8052 P_IMVP8_CORE_VSN_10 1 2
VCCCORE ICCMAX=32A/U22:102kohm 0402
4700PF/50V 102KOhm P_IMVP8_EN_10 PR8001
1 2 VCCCORE ICCMAX=64A/U42:154kohm
49.9Ohm
Place Close to PL8102 P_IMVP8_CORE_COMP_RC_10 P_IMVP8_CORE2_PWM_10 1 2 PSL8000
P_SVID_CLK_50OHM_X2 6
PC8078 PR8053 PR8005 PR8056 1 2
1
0402 P_SVID_ALERT#_50OHM_X2 6
680PF/50V 4.7KOhm 470Ohm /U42_/U22 24.9KOHM PR8056=24.9kohm/U22 PR8057 PR8003 1 2
PR8056=26.1kohm/U42 P_SVID_DATA_50OHM_X2 6
2 1 1 2 PU8001 22.1KOhm 10Ohm PR8065 1 2 100Ohm
IMVP8_VRHOT# 8
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
1 2 1 2 NCP81236AMNTXG
PC8026 PC8014 470PF/50V
2
VR_RDY
EN
GND5
GND4
GND3
GND2
GND1
VSN_2ph
VSP_2ph
PSYS/TSENSE_1b
VSP_1b
VSN_1b
COMP_1b
ILIM_1b
CSN_1b
CSP_1b
IOUT_1b
PWM/ADDR_VBOOT
PTR8004 PC8066 P_IMVP8_CORE_FB_RC_10
PC8006 PR8042 470PF/50V 1 2 PR8047=59kohm/U22
2
100kOhm PR8031 15PF/50V 470PF/50V 49.9Ohm 2 1 PR8047 1 2 59KOhm PR8047=62kohm/U42 PR8037 Place Close to PL8101
1% 75KOhm 2 1 /U42_/U22 0Ohm
1 2 1 2 1 39 1 2
1
2
IOUT_2ph DRON
P_IMVP8_CORE_IOUT_10 2 38 P_IMVP8_DRON_10 PC8031 1000PF/50V P_IMVP8_GT_CSN_10 P_IMVP8_GT_CSN_R_10 81
DIFFOUT_2ph/ICCMAX_2ph SCLK
P_IMVP8_CORE_DIFFOUT_10 3 37 P_SVID_CLK_50OHM_X1 2 1
1
FB_2ph ALERT#
P_IMVP8_CORE_FB_10 4 36 P_SVID_ALERT#_50OHM_X1 PTR8006
COMP_2ph SDIO
2
P_IMVP8_CORE_CSCOMP_R_10 1 2 P_IMVP8_CORE_COMP_10 5 35 P_SVID_DATA_50OHM_X1 1 2 /U42_/U22 PR8006=27.4kohm/U22 100kOhm
ILIM_2ph VR_HOT#
PC8032 PC8021 PR8044 9.76KOhm P_IMVP8_CORE_ILIM_10 6 34 P_IMVP8_VR_HOT#_10 PR8006 27.4kOHM PR8006=31.6kohm/U42 1%
2
VCCCORE OCP=42A/U22‐9.76kohm CSCOMP_2ph IOUT_1a
VCCCORE LL=2.4mohm 560PF/50V 390PF/50V VCCCORE OCP=84A/U42‐19.61kohm /U42_/U22 P_IMVP8_CORE_CSCOMP_10 7 33 P_IMVP8_GT_IOUT_10 VCCGT OCP=40A/U22 PC8002 PC8027 PC8045
2
CSSUM_2ph CSP_1a
PR8060 P_IMVP8_CORE_CSSUM_10 8 32 P_IMVP8_GT_CSP_10 VCCGT OCP=36A/U42 0.01UF/50V 0.022UF/25V 0.01UF/50V
1
CSREF_2ph CSN_1a
1
165KOhm PC80861 2 0.22UF/10V P_IMVP8_CORE_CSREF_10 9 31 P_IMVP8_GT_CSN_10 PC8013 15PF/50V @ P_IMVP8_GT_CS_R_10
1
CSP2_2ph ILIM_1a
PR8009 PR8046 P_IMVP8_CORE2_CSP_10 10 30 P_IMVP8_GT_ILIM_10
2
CSP1_2ph COMP_1a
56KOhm 51KOhm P_IMVP8_CORE1_CSP_10 11 29 P_IMVP8_GT_COMP_10 1 2 PR8043 PR8038
TSENSE_2ph VSN_1a
1 2 1 2 P_IMVP8_CORE_TSENSE_10 12 28 P_IMVP8_GT_VSN_10 PR8021 1.3KOhm 12KOHM 7.5KOHM
VRMP VSP_1a
P_IMVP8_CORE1_LX_SP_10 P_IMVP8_CORE1_LX_R_10 P_IMVP8_VRMP_10 13 27 P_IMVP8_GT_VSP_10 1 2 1 2 nbs_r0603_h39_000s
LG2/ICCMAX_1a
LG3/ICCMAX_1b
1
VCC TSENSE_1a
P_IMVP8_VCC_20 P_IMVP8_GT_TSENSE_10 2 1
2
P_IMVP8_GT_LX_SP_10 81
LG1/ROSC
PR8033 /U42 PR8026 /U42 PC8025 PC8074 P_IMVP8_GT_CSP_10
2
56KOhm 51KOhm 0.1UF/50V 0.015UF/16V
2
2
PVCC
BST1
BST2
BST3
2
SW1
SW2
SW3
1 2 1 2 PR8054 PC8079
HG1
HG2
HG3
PC8042 P_IMVP8_GT_COMP_R_10
1
P_IMVP8_CORE2_LX_SP_10 P_IMVP8_CORE2_LX_R_10 1KOhm 0.01UF/50V PR8062 PC8065 0.1UF/50V Place Close to CPU
1
1Ohm 1UF/25V PC8077
1
14
15
16
17
18
19
20
21
22
23
24
25
26
P_IMVP8_CORE_TSENSE_R_10 nbs_r0603_h24_000s
nbs_c0603_h37_000s 2200PF/50V PR8064 1 1% 2 100Ohm
2
+5VSUS_PWR PR8010 5% nbs_r0201_h12_000s
1
1
1KOhm /U22 PTR8007 PR8032 PR8024 PTR8003 1 2
P_IMVP8_SA_BST_30
2 1 100kOhm 12.7KOHM 100kOhm 1 2
P_IMVP8_SA_HG_30
P_IMVP8_SA_LG_30
12.7KOHM
P_IMVP8_SA_LX_30
P_IMVP8_PVCC_20
1% VCCGT Thermal Hot=100 degree 1% P_VCCGT_VSSSENSE_50OHM 6
+5VSUS_PWR
PR8049
2
2
2
P_IMVP8_CORE1_BST_30 P_IMVP8_GT_BST_30 422Ohm PC8000
nbs_r0603_h24_000s
80,81 P_IMVP8_CORE_CSREF_10
2
P_IMVP8_CORE1_HG_30 P_IMVP8_GT_HG_30 VCCGT LL=3.1mohm 1000PF/50V
1
Place Close to PQL8102 PR8011 P_IMVP8_CORE1_LX_30 P_IMVP8_GT_LX_30 PR8030 PR8007
1
PC8001 /U42 0Ohm P_IMVP8_CORE1_LG_30 P_IMVP8_GT_LG_30 0Ohm Place Close to PQL8101 2.74KOhm
2
PR8028 /U42 0.047UF/25V VCCCORE Thermal Hot=100 degree nbs_r0603_h24_000s Frequency=600kHz nbs_r0603_h24_000s 1 2 CHOKE SIZE
2
4.22KOhm PR8040 P_VCCGT_VCCSENSE_50OHM 6
PR8008
1
1
1 2 +5VSUS_PWR PR8035 2 1 1 2 PR8025 1 1% 2 100Ohm
81 P_IMVP8_CORE2_LX_SP_10 14KOHM +VCCGT
nbs_r0603_h24_000s P_IMVP8_CORE1_BST_R_30
1Ohm
11KOhm P_IMVP8_GT_BST_R_30 nbs_r0201_h12_000s
1
2 1 1 2 @ PC8019 PR8016
1
P_IMVP8_SA_BST_R_30
PC8041 PC8030 1000PF/50V 0Ohm Place Close to CPU
80,81 P_IMVP8_CORE_CSREF_10
0.1UF/25V PC8005 @ PR8022 0.1UF/25V
2
1
5%
nbs_c0603_h37_000s 0.1UF/25V 0Ohm @ nbs_c0603_h37_000s
PC8068 nbs_c0603_h37_000s nbs_r0603_h24_000s P_IMVP8_GT_VSP_R_10
2
PR8014 0.047UF/25V
2
4.22KOhm VCCSA ICCMAX =5A /U22_11K
1
1 2 PC8053 PR8017 VCCSA ICCMAX = 6A 3/U42_14K
81 P_IMVP8_CORE1_LX_SP_10
nbs_r0603_h24_000s 1UF/25V 29.4KOhm
nbs_c0603_h37_000s
1
81 P_IMVP8_CORE_VIN_S
PR8017=29.4KOhm ICCMAX=31A/U22/U42
<Variant Name>
Project Name Rev
X542UA/UV R2.0
Title : SPW_KBLAKE_U42_IMVP8
Size
A2
Dept.: ASUS Power Team Engineer: SS
vinafix.com
Skylake IMVP8 Power (2) [For CPU]
+VCCGT A C_BAT_SY S
@ PJP8101
1MM_OPEN_5MIL
NTMFS4C09NBT1G
1 2
1 2
P_IMVP8 _GT_VIN_S
1
P QH8101
1
+
PCI8101 PCI8111 PCE8101
10 UF/25V 10UF/25V 22UF/25V
3
D
2
/U42/U22 /U42/U22 /U42/U22
nbs_c0805_h57_00 0s nbs_c0805_h5 7_000s h=4.5mm
2
80 P_IMV P8_GT_HG_30
G S
2
/U42/U2 2
1
PR810 5
Imax = 28A
VINAFIX.COM
10KOhm PL8101
@ 0.24UH
NTMFS4C06NBT1G
Ira t=35 A
1
1 2
80 P_IMV P8_GT_L X_30
@
+VCCGT
1
PQL8101
P C8112 /U42/U22
1 000PF/50V [HF]CYNTEC/PEUE063T-R24MS1R195 PSP 8104
n bs_c0603_h37_0 00s SHORT_PAD
3
D
2
P_ IMVP8_GT_CSN_R_10 80
2 1
2 P _IMVP8_GT1_SNB_S
80 P_IMV P8_GT_L G_30 G S PSP 8105
@
@ SHORT_PAD
1
PC8109 /U42/U2 2 P R8104
1
P_ IMVP8_GT_LX_SP_10 80
220 0PF/50V 1 Ohm 5% 2 1
1
@ n bs_r120 6_h30_000s
2
@
+VCCCORE
A C_BAT_SY S
@ PJP8103
80 P_IMV P8_CORE_VIN_S
3MM_SHO RT_PIN
1 2
1 2
NTMFS4C09NBT1G
1
1
1
+
P QH8102
PCI8102 PCI8112 PCE8102
10UF/25 V 10UF/25V 22UF/25V
2
/U42/U22 /U42/U22 /U42/U2 2
3
D
nbs_c0805_h57_nbs_
000sc0805_h 57_000s h=4.5mm
2
80 P_IMV P8_CORE1_HG_30
G S
2
PR81 06 /U42/U22
1
Imax = 64A
10KOhm PL8102
@ 0.24UH
NTMFS4C06NBT1 G
Ir at=3 5A
1
1 2
80 P_IMV P8_CORE1_LX_ 30 +VCCCORE
PQL8102
@ /U42/U22
1
P C8132 [HF]CYNTEC/PEUE063T-R24MS1R195
1 000PF/50V
3
D
n bs_c0603_h37_0 00s PS P8103
2
SHORT_PAD P_IMVP8_CORE1_VO_10
2 2 1
80 P_IMV P8_CORE1_LG_ 30 G S P_IMVP8_CORE _CSREF_10 80,81
P_ IMVP8_CORE_S NB_S 2 1
PR8112
/U42/U22 @ PS P8106 10Ohm Place Close to PL8102
1
@
P C8140 P R8103 SHORT_PAD /U42/U22
22 00PF/50V 1 Ohm 5%
1
P_IMVP 8_CORE1_LX_S P_10 80
@ n bs_r1206 _h30_000s 2 1
2
@
NTMFS 4C09NBT1G
P_IMVP8_CORE_VIN_S
1
PQH8103
PCI8 103 PCI8113
P_IMVP8_ CORE2_LX_R_30 10UF/25V 10UF/25 V
2
PR8114 /U42 PC8179 /U42 /EMI /U42
3
D
0Ohm 0.1UF/25V PR8115 /U42 nbs_c0805_h57_000s n bs_c0805_h57_0 00s
5% 2 1 0Ohm 5%
2 1 1 2 2 2017/02/06 X542UA_R1.1 #26, EMI solution
nbs_r060 3_h24_000s nbs_c06 03_h37_000s P_IMVP8_ CORE2_HG_R_3 0 G S
2
nbs_r0 603_h24_000s
PU8 101 /U42 PR8110 /U42
1
Imax =64 A
9 10 KOhm PL8103
GND2
1 8 @ 0.24UH /U42
BST DRVH
NTMFS4C06NBT1G
P_IMVP8_CORE2_B ST_30 2 7 P_IMV P8_CORE2_HG_30 Irat=35A
80 P_IMVP 8_CORE2_PWM_10 PWM SW
1
3 6 P_IMV P8_CORE2_LX_ 30 1 2
80 P_IMVP 8_DRON
4
EN GND1
5
+VCCCORE
VCC DRVL
P_IMV P8_CORE2_LG_ 30 [HF]CYNTEC/PEUE 063T-R24MS1R195
PQL8103
@
1
NCP81151AMNTB PC8106 PSP810 8
+5VS_PWR
1000P F/50V SHORT_PAD P_IMVP8_CORE 2_VO_10
3
D
nbs_c0 603_h37_000s 2 1
2
P_IMVP8_CO RE_CSREF_10 80 ,81
2 1
2 PR8113 /U42
G S P_IMVP 8_CORE2_SNB_S PSP810 9 10Ohm Place Close to PL8103
@
1
SHORT_PAD
PC8180 /U42 @
1
2 1 P_IMVP8_CORE2_LX_SP_10 80
1UF/25V PC8113 PR8111
2
2200PF/50V 1Ohm 5%
1
/U42
@ nbs_r1206_h30 _000s
@
nb s_c0603_h35_00 0s
2
+VCCSA
@ PJP8102 AC_BAT_SYS
1MM_O PEN_5MIL
1 2
1 2
P _IMVP8_SA_VIN_S
QM1830M3
PQH8104
1
PCI8104 PCI8114
10UF/25 V 10UF/25V
5
D
2
@ @
n bs_c0805_h57_0 00s nbs_ c0805_h 57_000s
4
80 P_IMVP 8_SA_HG_30
G S
2
P R8109 @
1
2
3
Imax = 5A
1 0KOhm PL8104
@ 0.68UH @
Irat=9.7A
1
1 2
80 P_IMVP 8_SA_LX_30
@
+VCCSA
QM18 30M3
1
PQL8104
PC8154 [HE]CYNTEC/PEUE053T-R68MS
1000P F/50V
nbs_c0603_h37_000s PSP810 1 @
5
D
2
SHORT_PAD
P_IMVP8_S A_CSN_R_10 80
4 P_IMV P8_SA_SNB_S 2 1
80 P_IMVP 8_SA_LG_30
G S
@ PSP810 7 @
1
PC8169 @ PR8107 SHORT_PAD
1
2
3
2200P F/50V 1Ohm 5%
1
P_IMVP8_S A_LX_SP_10 80
nbs_r1206_h3 0_000s 2 1
@
2
+VCCSA +VCCIO_CPU
@
PJP81 04
3MM_SHORT_PIN
1 2
1 2
Place Close to CPU
COLAY COLAY COLAY
+VCCGT +VCCCORE +VCCCORE
1
1
1
+ PCE8105 + PCE8108 + PCE8107 + P CE8109 + PCE811 0 + P CE8111
330UF/2.5V 470U/2V 330 UF/2.5V 4 70U/2V 330UF/2.5V 4 70U/2V
@ V-Chip /U42/U22 @ V-Chip /U42/U22 @ V-Chip @
2
2
2
2
h=4.6mm POSCAP h=4.6mm POSCAP h=4.6mm POSCAP
h=2.1mm h=2.1mm h=2.1mm
+VCCGT 32PCS U22 => 14PCS +VCCCORE 30PCS U22 => 15PCS

U42 => 14PCS U42 => 30PCS
1
1
PC8102 PC8107 PC8108 PC8110 PC8144 PC8118 P C8119 PC8 121 PC8122 PC8127 PC8101 PC8103 PC8104 PC8105 PC8114 P C8115 PC8116 PC8117 PC8120 PC8123
22UF/6.3V 22UF/6.3V 22 UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 2 2UF/6.3V 22UF/6.3V 22UF/6.3 V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6 .3V 22UF/6.3V 22UF/6.3V 22 UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V
/U42/U22 /U42/U22 @ /U42/U22 @ @ /U42/U22 /U42/U22 /U42/U2 2 @ /U42/U2 2 /U4 2 /U42 /U42/U22 /U42 /U42 /U42/U22 /U42 /U42 /U22 /U42
2
2
nbs_c0805_ h57_000s nbs_c0 805_h57_000s nb s_c0805_h57_00 0s nbs_c0805_h5 7_000s nbs_c0805 _h57_000s nbs_c0805_h57_000s n bs_c0805_h57_0 00s nbs_ c0805_h 57_000s nbs_c080 5_h57_000s nbs_c0805_h57_000 s nbs_c08 05_h57_000s nbs_c0805_h57_000 s nbs_c0805_h57 _000s nbs_c0805_ h57_000s nbs_c0 805_h57_000s
nbs_c0805_h57_00 0s nbs_c0805_h57 _000s nbs_c0805 _h57_000s nbs_c0805_h57_000s n bs_c0805_h57_0 00s
+VCCCORE
+VCCGT
1
PC8124 PC8125 PC8126 PC8134 PC8135 P C8136 PC81 39 PC8143 PC8155 PC8160
1
1
PC8128 PC8129 PC8130 PC813 1 PC8133 PC8137 P C8138 PC8 147 PC9319 PC8150 22UF/6.3V 22UF/6.3V 22UF/6 .3V 22UF/6.3V 22UF/6.3V 22 UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V
22UF/6.3V 22UF/6.3V 22 UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 2 2UF/6.3V 22UF/6.3V 22UF/6.3 V 22UF/6.3V /U42 /U4 2/U22 /U42/U22 /U42/U22 /U42 /U42/U22 /U42/U22 /U42 /U42 /U42
2
/U42/U22 @ /U42/U22 /U42/U22 @ /U42/U22 @ @ /U42/U2 2 @
2
2
nbs_c08 05_h57_000s nbs_c0805_h57_000 s nbs_c0805_h57 _000s nbs_c0805_ h57_000s nbs_c0 805_h57_000s nb s_c0805_h57_00 0s nbs_c0805_h5 7_000s nbs_c0805 _h57_000s nbs_c0805_h57_000s n bs_c0805_h57_0 00s
nbs_c0805_ h57_000s
nbs_c08 05_h57_000s nb s_c0805_h57_00 0s nbs_c0805_h5 7_000s
nbs_c0805 _h57_000s nbs_c0805_h57_000s
nb s_c0805_h57_0 00s nbs_c0805_h5 7_000s nbs_c080 5_h57_000s nbs_c0805_h57_000 s
+VCCGT +VCCCORE
1
1
PC8151 PC8152 PC8153 PC815 6 PC8159 PC8161 P C8162 PC8 164 PC8168 PC8170 PC8163 PC8165 PC8167 PC8173 PC8174 P C8176 PC81 77 PC8178 PC8188 PC8189
22UF/6.3V 22UF/6.3V 22 UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 2 2UF/6.3V 22UF/6.3V 22UF/6.3 V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6 .3V 22UF/6.3V 22UF/6.3V 22 UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V
@ @ @ @ /U42/U22 /U42/U22 @ @ /U42/U2 2 @ /U42/U2 2 /U4 2/U22 /U42 /U42 /U42/U22 /U42/U22 /U42 /U42/U22 /U42 /U22 /U42
2
2
nbs_c0805_ h57_000s nbs_c0 805_h57_000s nb s_c0805_h57_00 0s nbs_c0805_h5 7_000s nbs_c0805 _h57_000s nbs_c0805_h57_000s n bs_c0805_h57_0 00s nbs_ c0805_h 57_000s nbs_c080 5_h57_000s nbs_c0805_h57_000 s nbs_c08 05_h57_000s nbs_c0805_h57_000 s nbs_c0805_h57 _000s nbs_c0805_ h57_000s nbs_c0 805_h57_000s nb s_c0805_h57_00 0s nbs_c0805_h5 7_000s
nbs_c0805 _h57_000s nbs_c0805_h57_000s n bs_c0805_h57_0 00s
+VCCGT
1
PC8171 PC8172
22UF/6.3V 22UF/6.3V
@ @
2
nbs_c0805_ h57_000s nbs_c0 805_h57_000s
+VCCSA 9PCS => 3PCS
1
PC8146 PC8175 PC8142 PC815 7 PC8141 PC8158 P C8149 PC8 111 PC8166
22UF/6.3V 22UF/6.3V 22 UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 2 2UF/6.3V 22UF/6.3V 22UF/6.3 V
/U42/U22 /U42/U22 /U42/U22 @ @ @ @ /U42/U22 /U42/U2 2
BOM
2
nbs_c0805_ h57_000s nbs_c0 805_h57_000s nb s_c0805_h57_00 0s nbs_c0805_h5 7_000s nbs_c0805 _h57_000s nbs_c0805_h57_000s
nb s_c0805_h57_0 00s
nbs_c0805_h5 7_000s nbs_c080 5_h57_000s Project Name Rev
X542UA/UV R2.0
Title : PW_SKYLAKE-U (2)

Size
Custom
Dept.: NB P ower Tea m Engineer: SS
vinafix.com
Date: Tuesday, June 20, 2017 Sheet 81 of 10 2
+1.0VSUS (RT8248AGQW)
f=420kHz
PR8304 PJP8301 @ AC_BAT_SYS
620KOhm 1MM_OPEN_5MIL
1 2 1 2
1 2
PC8304
P_1.0VSUS_VIN_S
0.033UF/16V
1
2 1
GND
PCI8301 PCI8303 + PCE8301
VINAFIX.COM 10UF/25V 10UF/25V 33UF/25V
2
P_1.0VSUS_VSENS_10 @ h=4.5mm
2
nbs_c0805_h57_000s nbs_c0805_h57_000s
GND
+3VSUS
PEA16BA
PQH8301
GND PU8302
GND RT8248AGQW
@
PD8301
5
4
3
2
1
5
D
BAT54CW
VDDQ
VTTREF
GND1
VTTSNS
VTTGND
PR8318 1
100KOhm 3 23 4
GND4
c0805,nb_c0805_h57_hdi
c0805,nb_c0805_h57_hdi
c0805,nb_c0805_h57_hdi
@ 2 22 G S
Imax=7.45A
c0805,nb_c0805_h57_hdi
GND3
2
21 P_1.0VSUS_BST_R_30
PR8315
2
GND2
6 20 0Ohm 5% PC8302 PR8302
1
2
3
FB VTT +1.0VO +1.0VSUS
P_1.0VSUS_FB_10 7 19 nbs_r0603_h24_000s 0.1UF/25V 10KOhm PL8302
S3 VLDOIN
P_1.0VSUS_LDO_EN_10 8 18 @ 1UH PJP8303 @
30,57,83,88 VSUS_ON S5 BOOT
2 1 P_1.0VSUS_EN_10 9 17 P_1.0VSUS_BST_30 1 2 1 2 Irat=12A 3MM_OPEN_5MIL
TON UGATE
1
PR8303 P_1.0VSUS_TON_10 10 16 P_1.0VSUS_HG_30 nbs_c0603_h37_000s 2 1 480mil 1 2
58 1.0VSUS_PWRGD PGOOD PHASE 1 2
330UF/2.5V
1
30KOhm PC8313 P_1.0VSUS_LX_30
22UF/6.3V
22UF/6.3V
22UF/6.3V
22UF/6.3V
0.1UF/25V 7x7x3mm
PCE8302
PCO8306
[HF]CYNTEC/PEUB063T-1R0MS
LGATE
PC8303
PC8305
PC8320
PGND
2
1
VDD
nbs_r0603_h24_000s
VID
CS
1
PC8317 @
PEA16BA
1
+
PQL8302
1000PF/50V
11
12
13
14
15
2
nbs_c0603_h37_000s
@
5
D
2
+5VSUS_PWR
SHORT_PAD
P_1.0VSUS_SNB_S
h=4.5mm
P_1.0VSUS_VDDP_30
4
1
P_1.0VSUS_CS_10
G S PR8320 @
PSP8302
1Ohm 5%
PR8321 GND @
nbs_c0603_h37_000s
1
2
3
2.2Ohm nbs_r1206_h30_000s
1
5% PC8310 @
2200PF/50V
1
P_1.0VSUS_LG_30 2 1
2
GND
1
PC8307 RLIMIT = ILIMIT x RDS(ON) ×10 / 5μA
1
1UF/25V
PR8310 OCP=13A
P_1.0VSUS_FB_10
2
249KOhm
2
GND GND
PR8306
820PF/50V
P_1.0VSUS_LX_30 2 1 PR8313
178KOhm PC8315 10Ohm
PR8306 close to PU8302 2 1
2 1 P_1.0VSUS_LOSENS_10
PR8309 PSP8301
PSL8303
PT830* 請放置 PU8302旁;並請放置Trace 上! VFB=0.75V 1
0402
2
2 1 P_1.0VSUS_VSENS_10 P_1.0VSUS_RESENS_10 2 1
3.48KOhm @
SHORT_PAD
PT8303 @
1
1 PR8311 PC8301
P_1.0VSUS_HG_30 10KOhm 0.1UF/25V
NB_TPC20T
2
2
PT8301
1
P_1.0VSUS_LX_30
NB_TPC20T
PT8302
1 GND GND
P_1.0VSUS_LG_30
NB_TPC20T
+1.8VSUS [For PCH]

PR8312 0Ohm
30,57,83,88 VSUS_ON 2 1
1
PD8302 @ PC8318
BAT54CW 0.1UF/16V
1 @
2
3
2
Imax=1A
GND
+1.8VSUS
58 1.8VSUS_PWRGD +3VA_DSW
+5VSUS
PU8301
APL5930CQBI-TRG
13
1
GND3
PJP8302 12
1
GND2
1MM_OPEN_5MIL 11
GND1
1 10
2
POK VCNTL
@ 1.8VSUS_PWRGD 2 9
2
FB EN
P_1.8VSUS_FB_10 3 8 P_1.8VSUS_EN_10
VOUT1 VIN3
4 7
VOUT2 VIN2
5 6
VOUT3 VIN1
+1.8VSUSO
PR8314
12.7KOHM
2 1 1 2
@ PSP8303
SHORT_PAD
1
1
1
PC8316 PR8307 PC8314
1
PC8311 PC8309 PC8319 @ 1UF/16V 10KOhm 10UF/6.3V

10UF/6.3V 10UF/6.3V 1000PF/50V @
1
2
@ 2 1 PR8308
2
<Variant Name>
2
10KOhm
Project Name Rev
3A LDO REF=0.8V
2
X542UN/URV R1.0
Title : PW_+1.0VSUS / +1.8VSUS

Size
C
Dept.: POWER Engineer: Power
vinafix.com
+1.2V / +VTT / +2.5V[For Memory]
1
PR8630
0Ohm
2 1
PD8600
BAT54AW
VINAFIX.COM +VTT
25,30,57 PM_SUSC#
3
2 P_1V2_EN_10
30 1.2V_ON
1
1 2
PC8601 PC8600
PR8613
1
PC8613 10UF/6.3V 10UF/6.3V
10KOhm
2
0.22UF/10V
nbs_c0805_h37_000s nbs_c0805_h37_000s
2
f=420kHz
PR8607
620KOhm AC_BAT_SYS
1 2
AC_BAT_SYS
1
PC8615
1
PD8601 @ 0.1UF/25V PCI8601 PCI8603 + PCE8600
BAT54CW 2 1 10UF/25V 10UF/25V 33UF/25V
GND
2
2 nbs_c0805_h57_000s nbs_c0805_h57_000s
h=4.5mm
P_1V2_VTTREF_10
P_1V2_VSENS_10
3
1
PR8616
QM1830M3
PQH8601
0Ohm
+1.2V GND
4 DDR_PG_CTRL
2 1 P_1V2_LDO_EN_10
5
D
1
PC8614 PU8600 GND
PSL8601
0.1UF/25V RT8248AGQW @
2
@ 4
Imax= 10.06A
5
4
3
2
1
2
G S
VTTSNS
VTTGND
VDDQ
GND1
VTTREF
0603
23
OCP= 13A
1
2
3
GND4
22
1
GND3
1
21 PR8606 P_1V2_BST_R_30 PR8604
GND2
c0805,nb_c0805_h57_hdi
c0805,nb_c0805_h57_hdi
c0805,nb_c0805_h57_hdi
6 20 0Ohm 5% PC8603 10KOhm
c0805,nb_c0805_h57_hdi
FB VTT
P_1V2_FB_10 7 19 +VTT nbs_r0603_h24_000s 0.1UF/25V @ PL8600
P_1V2_LDO_EN_10 8
S3 VLDOIN
18 P_1V2_LDOIN_30 1UH
+1.2V
2
S5 BOOT
P_1V2_EN_10 9 17 P_1V2_BST_30 1 2 1 2 Irat=12A PJP8601
TON UGATE
P_1V2_TON_10 10 16 P_1V2_HG_30 nbs_c0603_h37_000s 2 1 480mil 1 2
58 1.2V_PWRGD PGOOD PHASE 1 2
P_1V2_LX_30 P_1V2_VO_S @
1
PC8604 7x7x3mm 3MM_SHORT_PIN
330UF/2.5V
1UF/25V [HE]CYNTEC/PEUB063T-1R0MS
LGATE
22UF/6.3V
PGND
22UF/6.3V
22UF/6.3V
22UF/6.3V
SHORT_PAD
1
PCE8601
VDD
nbs_c0603_h37_000s PC8609
VID
QM1830M3
CS
PCO8606
PQL8602
PC8607
1000PF/50V
PC8605
PC8610
nbs_c0603_h37_000s
PSP8600
11
12
13
14
15
1
@
5
D
1
+
1
+5VSUS P_1V2_SNB_S
GND 4 @
2
G S PR8608
1Ohm 5% h=4.5mm
P_1V2_VDD_30
nbs_r1206_h30_000s @
1
2
3
2
P_1V2_CS_10
P_1V2_LG_30
1
PR8601 @
2
2.2Ohm PC8608
nbs_r0603_h24_000s 1000PF/50V
2
2
@
5%
GND GND
1
1
PC8602 RLIMIT = ILIMIT x RDS(ON) ×10 / 5μA
1UF/25V PR8603
nbs_c0603_h37_000s 649KOhm OCP=13A
2
PC8612
2
820PF/50V
2 1
GND GND
PT860* 請放置 PU8600旁;並請放置Trace 上! VFB=0.75V PR8611 PR8609

PR8621 6.2KOhm 10Ohm
2 1
P_1V2_LX_30 2 1 P_1V2_FB_10 2 1 P_1V2_VSENS_10 P_1V2_LOSENS_10
PT8601 178KOhm
1
P_1V2_HG_30
1
NB_TPC20T
+1.2V
1
PR8612 PC8611 PSP8601 @
10KOhm 0.1UF/25V PSL8602 SHORT_PAD
PT8602 1 2
2
1 0402 1 2
2
P_1V2_LX_30 @
NB_TPC20T
PT8603
1 GND GND
P_1V2_LG_30
NB_TPC20T
+2.5V PD8602
BAT54AW
@ PR8615
0Ohm @
1 2 1
3 PM_SUSC#
2
1.2V_ON
2 1
1
PC8620 PR8614
Imax= 3A 0.1UF/25V 10KOhm
OCP= 4.5A @
2
+2.5V
+5VSUS +3VA_DSW
PU8601
APL5930CQBI-TRG
2
13
GND3
PJP8602 @ 12
GND2
1 2
1MM_SHORT_PIN 11
GND1
1 10
58 2.5V_PWRGD POK VCNTL
2.5V_PWRGD 2 9
FB EN
1
P_2.5V_FB_10 3 8 P_2.5V_RCEN_10
VOUT1 VIN3
4 7
VOUT2 VIN2
5 6
VOUT3 VIN1
+2.5VO
PR8623
21.5KOhm
2 1 1 2
@ PSP8602 PC8606 @
SHORT_PAD 1000PF/50V
1
1
1
2 1 PC8617 PR8622 PC8618
1
PC8619 PC8616 1UF/16V 10KOhm 10UF/6.3V

10UF/6.3V 10UF/6.3V @
1
2
@ 3A LDO REF=0.8V PR8602
2
2
nbs_c0805_h57_000s nbs_c0805_h57_000s 10KOhm <Core Design>
Project Name Rev

2
X542UN/URV R1.0
Title : PW_+1.2V/+VTT/+2.5V
Size
A2
vinafix.com
+3VA_DSW / +5VSUS [System Power]
PT8713 PT8716
1
PC8706
VINAFIX.COM 0.1UF/25V 1
P_3VADSW_HG_30
1
P_5VSUS_HG_30
2
P_5VSUS_BST_R
PT8714 PT8717
1
PR8705 1 1
0Ohm 5% P_3VADSW_LX_30 P_5VSUS_LX_30
P_12VSUS_SKIPSEL_20
nbs_r0603_h24_000s
P_5VSUS_LX_30 2
PT8715 PT8718
P_5VSUS_BST_30
P_5VSUS_EN_10
1 1
P_3VADSW_LG_30 P_5VSUS_LG_30
P_5VSUS_HG_30
PU8701 Close to PU8701

RT8249CGQW
23
22
21
20
19
18
17
16
+5VSUS IOCP=14A
PJP8701 @
GND3
GND2
GND1
EN1
SKIPSEL
PHASE1
BOOT1
UG1
1MM_OPEN_5MIL PR8702
AC_BAT_SYS
1 2 1 2 1 15
1 2 CS1 LG1
P_5VSUS_VIN_S 36KOhm P_5VSUS_CS_10 2 14 P_5VSUS_LG_30 PJP8703 @
FB1 BYP1
P_5VSUS_FB_10 3 13 +5VSUSO 1MM_OPEN_5MIL
LDO3 LDO5
1
1
PR8706 +3VAO 4 12 +5VAO 1 2
FB2 VIN AC_BAT_SYS 1 2 AC_BAT_SYS
PCE8702 + PCI8703 PCI8701 1 2 P_3VADSW_FB_10 5 11 P_3VADSW_VIN_S
CS2 LG2
PHASE2
PGOOD
10UF/25V 10UF/25V 36KOhm P_3VADSW_CS_10 P_3VADSW_LG_30
BOOT2
33UF/25V
1
UG2
h=4.5mm @
EN2
nbs_c0805_h57_000s
1
nbs_c0805_h57_000s PC8705 PCI8705 PCI8707
1
+3VA_DSW IOCP=13A PC8702 4.7UF/6.3V 10UF/25V 10UF/25V
6
7
8
9
10
QM1830M3
2
PQH8704
4.7UF/6.3V
QM1830M3
2
PQH8701
nbs_c0805_h57_000s
nbs_c0805_h57_000s
5
D
2
Imax =9.81A
5
D
P_3VADSW_BST_30
P_3VADSW_EN_10
Imax = 9.5A
2P_3VADSW_LX_30
4
4 P_3VADSW_HG_30 P_3VADSW_HG_30 G S
S G P_5VSUS_HG_30
1
2
3
3
2
1
PL8702
+5VSUS PJP8702 @ 3.3UH
3MM_SHORT_PIN Irat=6.5A PR8708
1 2 1 2 5% PL8701
+3VA_DSW
1 2 0Ohm
+5VSUSO P_5VSUS_LX_30 nbs_r0603_h24_000s 3.3UH PJP8704 @
7x7x3mm Irat=6.5A 3MM_SHORT_PIN
1
SHORT_PAD
[HF]CYNTEC/PEUB063T-3R3MS 1 2 1 2
+5VSUS_PWR
QM1830M3
1 2
1
PQL8702
P_3VADSW_BST_R P_3VADSW_LX_30 +3VADSWO
1
5
+
PSP8705
PC8723 PCE8703 D PC8714 7x7x3mm
1 2 22UF/6.3V 220UF/6.3V 0.1UF/25V [HF]CYNTEC/PEUB063T-3R3MS
2
0603
SHORT_PAD
V-Chip
QM1830M3
1
2
1
4
PQL8703
PSL8705 @ h=4.5mm PR8727 PC8707
1
S G
PSP8706
680KOhm 390PF/50V
5
D
PSL8705 is close to PJP8702 0511 PCO8711 PC8725 PC8726 PC8727
2
3VA_DSW_PWRGD 25,30,58
22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V
1
3
2
1
2
4 @
2
G S
@
1 2 P_3VADSW_FBMLCC_10
1
2
3
P_5VSUS_LG_30 PSL8702 @
2
PC8716 @ SHORT_LAND
P_5VSUS_VSENS_10 2200PF/50V 1 2
30 3VADSW_ON 0402
@
P_3VADSW_EN_10
1
1
1
1
PC8709 PR8703 PC8715 1 2 PC8708

0.1UF/25V 10KOhm 150PF/50V PSL8703 @ P_3VADSW_LG_30 0.01UF/50V P_3VADSW_VSENS_10
@ SHORT_LAND PC8703 @
1
2
2
1
1
1 2 2200PF/50V PC8721 PR8704 PC8710
2
30,57 5VSUS_ON 0402

P_5VSUS_EN_10 150PF/50V 6.8KOhm 0.1UF/25V
@
2
P_5VSUS_FB_10 PSL8704 @
2
SHORT_LAND
1
PR8701 1 2 P_3VADSW_FB_10
0603 +3VA
6.49KOhm +3VAO
1
PR8707
2
10KOhm
2
Adaptor Mode (IMVP8) Battery Mode (IMVP8)
S0 CS S3 DS3 S4 S5 S5 with USB Charger+ S0 CS S3 DS3 S4 S5 S5 with USB Charger+
PS_ON 1 - 1 - 1 - 1 PS_ON 1 - - 1 0 0 1
PD8701
2 1 6 1 3VADSW_ON 1 - 1 - 1 - 1 3VADSW_ON 1 - - 1 0 0 0
P_3VADSW_LG_30 P_12VSUS_CP1_20 +5VSUSO
@
PSL8701 1 2 PC8718 5 2 3VSUS_ON 1 - 1 - 0 - 0 3VSUS_ON 1 - - 0 0 0 0

+12VSUS 0603
P_12VSUS_CP4_20 0.1UF/25V P_12VSUS_CP3_20
1
PC8724 4 3 5VSUS_ON 1 - 1 - 1 - 1 5VSUS_ON 1 - - 1 0 0 1
1
0.1UF/25V PC8722
nbs_c0603_h37_000s BAT54SDW 0.1UF/25V 1.35V_ON 1 - 1 - 0 - 0 1.35V_ON 1 - - 1 0 0 0
2
nbs_c0603_h37_000s
2
SUSC_EC# 1 - 1 - 0 - 0 SUSC_EC# 1 - - 0 0 0 0
2 1
P_12VSUS_CP2_20 SUSB_EC# 1 0 - - 0 SUSB_EC# 1 - - 0 0 0 0
- 0
PC8701
0.1UF/25V
請 check 整份線路 +12VSUS total 並聯對地電阻不得小於10kOhm
PT8704
PT8709 PT8702 PT8706 PT8701 PT8708
PT8710 PT8711 PT8707 PT8705

TPC28T TPC28T TPC28T
1 1 1
@
+12VSUS +3VADSWO +3VAO
TPC28T TPC28T
PT8703 PT8712
BOM
1 1
@
+3VA_DSW +3VA Project Name Rev
TPC28T TPC28T TPC28T
1 1 1 X542UA/UV R2.0
@
GND +5VSUSO GND
TPC28T TPC28T TPC28T Title : PW_+3VA_DSW/+5VSUS
1 1 1
@
Size
GND +5VSUS
TPC28T
GND
Custom
1 Date: Tuesday, June 20, 2017 Sheet 87 of 102
@
+5VAO
vinafix.com
Load Switch +3VSUS +3VA_DSW +3VSUS
Imax =0.1A
PSL8801 Imax = 1.275A Imax = 5.5A
1
1 2 PR8809 PR8813 PR8802
+3VA
PU8801 0603 +3VA_EC +3V +3VS 100KOhm 100KOhm 100KOhm
GND4
17
16
VINAFIX.COM
@ +3VA_DSW +3VA_DSW
2
GND3
15 PQ8811A PQ8811B
GND2
PR8820 1 14 PC8801
VIN1_1 VOUT1_2
P_LS_3VSUS_PG#_10
0Ohm 2 13 +3VA_ECO 470PF/50V 8 D S 1 6 D S 3
VIN1_2 VOUT1_1 P_3VSUS_PWRGD 58
1 2 3 12 7 5
0.01UF/25V
0.01UF/25V
D D
32,57 PS_ON ON1 CT1
1
P_LS_3VA_EC_ON_10 4 11 P_LS_3VA_EC_CT_10 1 2 9 D 10 D
VBIAS GND1
1 2 5 10 G G
P_LS_3VSUS_PG_10
PC8805 PC8828
3
PC8826
PC8815
30,57,83 VSUS_ON ON2 CT2
@ P_LS_3VSUS_ON_10
@ 6 9 P_LS_3VSUS_CT_10 1 2 @ PEA32DY 0.1UF/25V PEA32DY 0.1UF/25V
VIN2_1 VOUT2_2
4
2
2
PR8819 7 8 PC8817 @ 5
VIN2_2 VOUT2_1 @
0Ohm 0.1UF/25V PQ8804B
4
Imax = 1.63A
1
SN1409049DPUR EM6K1-G-T2R
6
+12V +12VS
P_LS_3V_RC_10 2 1 P_LS_3VS_RC_10 2 1 2
+3VSUS
1
PC8820 PR8816 PC8827 PR8804 PQ8804A
1
1
1
PC8816 0.01UF/25V 100KOhm 0.01UF/25V 100KOhm PC8819 EM6K1-G-T2R
0.1UF/25V 0.1UF/25V
2
+3VA_DSW
2
20151204 Modify +3VA_DSW
2017/01/11 X542UA_R1.1 #04, PQ8809, PC8833 & PR8826 stuff PR8825

10Ohm
Imax = 0.1A Imax = 5.1A 2 1
1
PD8801 @
+1.8VS +5VS +5VS_PWR BAT54CW PC8832
+VCCPLL_OC
+1.8VSUS PQ8809 +5VSUS PQ8801 1 1UF/6.3V
PU8804
2
QM1830M3 QM1830M3 3 +1.2V
2 C1 A2
VDD VOUT
PSL8803 @
1
3 3 1 2 A1 C2
D
D
0603 VIN SS
5 2 5 2 P_VCCPLL_OC_SS_10 PC8830
PSL8803請放置PQ8801B旁
1
1 1 B1 B2 0.1UF/25V
G
G
30,52,57,68,88 SUSC_EC# EN GND
2
1
PC8823 1 2 P_VCCPLL_OC_EN
4
1
PC8834 0.1UF/25V PR8824 PC8808
2
APL3527GHAI-TRG
0.1UF/25V @ PC8831 0.1UF/25V
2
0Ohm
@ 0.01UF/25V @
2
+12VS
P_LS_5VS_RC_10 2 1
+12VS
1
P_LS_1.8VS_RC_10 2 1 PC8822 PR8823
1
PR8826 0.01UF/25V 100KOhm

PC8833 100KOhm
2
0.01UF/25V
2
+VCCST +3VSUS +VCCIO +3VSUS

Imax = 0.24A Imax = 3.44A
+VCCST +VCCIO
+1.0VSUS +1.0VSUS
2
1
1
PR8801 PR8815 PR8807 PR8805
VCCST_PWRGD 58 VCCIO_PWRGD 58
PQ8805A PQ8805B 1KOhm 100KOhm 1KOhm 100KOhm
+12VS +12VS
8 S 1 6 S 3
2
D D
1
7 D 5 D
3
1
1
9 D 10 D PQ8803A PQ8803B
P_LS_VCCST_PG#_10
P_LS_VCCIO_PG#_10
P_LS_VCCST_PG_10
G PC8803 G PC8809 2 EM6K1-G-T2R 5 EM6K1-G-T2R
P_LS_VCCIO_PG_10
1
1
PEA32DY 0.1UF/25V PEA32DY 0.1UF/25V PR8806 PR8821
4
2
4
2
2
@ @ 100KOhm 100KOhm
PQ8802 C PQ8812 C
PMBS3904 PMBS3904
Pull high on P.58
2
Pull high on P.58
+12V
P_LS_VCCST_RC_10 2 1 P_LS_VCCIO_RC_10 B B
1
1
6
PC8810 PR8803 PC8811 PC8802 PC8804
0.01UF/25V 100KOhm 0.01UF/25V PQ8813A 0.1UF/25V 0.1UF/25V
1
EM6K1-G-T2R 2 PC8806 @ PC8825 @
2
2
P_LS_VCCIO_R_RC_10 4.7UF/6.3V E 4.7UF/6.3V E
2
PQ8813B
EM6K1-G-T2R 5
PM_SUSB# 25,30,58
PQ8810 PQ8807
EMD62 EMD62
+12VSUS 20mil TR2
20mil +12V +12VSUS 20mil TR2
20mil +12VS
4 3 4 3
R2 R1 R2 R1
1
P_LS_12V_EN_10 5 2 PR8812 P_LS_12VS_EN_10 5 2 1 PR8810

R1 R1
R2 R2
1MOhm 1MOhm
6 1 6 1
TR1 TR1
2
30,52,57,68,88 SUSC_EC# 30,57,77 SUSB_EC#
BOM
Project Name Rev
X542UN/URV R1.0
Title : PW_LOAD_SWITCH
Size
Custom
vinafix.com
<=40W <=120W >=120W
A/D_DOCK_IN
200mil
PQ8901
QM3056M6AC PQ8902
QM0930M3
VINAFIX.COM PR8938
10mOHM
PR8938 25m
EPC NB
10m 5m
G for shipping mode AC_BAT_SYS
S
3 nbs_r0612_h28_000s 240mil
S
3 1 P_CHG_ACMOS_S_20 2 5 1 2
D
4.7MOhm
1 P_CHG_PATH_19V_SHAPE
PR8937
G
SHORT_PAD
SHORT_PAD
G
1
2
PSP8803.PSPS8804 PR8940
4
請從PR8938內側中間拉線。
PSP8903
PSP8904
PC8922 20KOhm
@
0.047UF/50V
nbs_c0603_h37_000s @
2
2
2
PC8905
1000PF/50V
1 2 P_CHG_ACMOS_G_20
QM0930M3
1
5
D
PQ8903
1
PR8905
1
1MOhm PR8934 PC8909
4.02KOHM 0.1UF/25V 4
2
G S
2
PR8936 PR8923
2
4.02KOHM 4.02KOHM
1
2
3
1 2
P_CHG_BATDRV_G_20
2 1 PC8903 P_CHG_BATDRV_20
0.1UF/25V
P_CHG_REGN_20 PR8911 PR8928

1 2
1 2
AC_OK 1 2
100KOhm 0Ohm
1
1 2
PC8915 200mil PC8918
AC_BAT_SYS
1
0.1UF/25V AC_BAT_SYS 0.01UF/50V
2
PC8910
0.1UF/25V
2
@
QM1830M3
PQH8901
1
PSL8902 PR8906
P_CHG_CMSRC_20
P_CHG_ACDRV_20
2 1 + PCE8901
P_CHG_ACOK_10
PCI8901 PCI8902 10OHM
P_CHG_ACN_10
P_CHG_ACP_10
A/D_DOCK_IN 30,76 AC_IN_OC# 0402
10UF/25V 10UF/25V 33UF/25V nbs_r0603_h39_000s
6 1
5
@
D
2
EM6K1-G-T2R @ h=4.5mm
PQ8905A
2
1 2 nbs_c0805_h57_000s nbs_c0805_h57_000s P_CHG_BATSRC_20 1 2
P_CHG_ACDET_10 4 240mil
PR8929 G S
1
127KOhm PC8912 P_CHG_IADP_10
2
PR8924 0.1UF/25V
1
2
3
1
20KOhm PC8907 PR8927
AD : 17.8V
2
47PF/50V PU8901 P_CHG_VCC_30 10KOhm P_CHG_RSENS_SHAPE
7
6
5
4
3
2
1
@ PL8901 PR8926 BAT BAT_CON
ACDET
IADP
ACOK
ACDRV
ACP
CMSRC
ACN
1
2
3.3UH 10mOHM PJP8901 @
1
1
33 PC8921 Irat=6.5A nbs_r0612_h28_000s 3MM_OPEN_5MIL
GND6
32 1UF/25V 2 1 1 2
GND5 2 1
10UF/25V
10UF/25V
10UF/25V
10UF/25V
10UF/25V
31 nbs_c0603_h37_000s P_CHG_LX_30 2 1
90 P_CHG_ACDET_10 GND4
2
30 [HE]CYNTEC/PEUB063T-3R3MS
PC8906
PC8916
PC8924
PC8919
PC8923
GND3
1
29 PC8928
GND2
8 28
1
0.047UF/50V
QM1830M3
IDCHG VCC
SHORT_PAD
SHORT_PAD
1
P_CHG_IDCHG_10 9 27 P_CHG_VCC_30 PR8918 nbs_c0603_h37_000s + PCE8904
PQL8901
PC8925
80 P_IMVP8_PSYS_INFO PMON PHASE
2
1
PC8917 P_CHG_PMON_10 10 26 P_CHG_LX_30 0Ohm 1000PF/50V @ 15UF/25V
PROCHOT# HIDRV
2
47PF/50V P_CHG_PROCHOT#_10 11 25 P_CHG_HG_30 1 2
PSP8901
PSP8902
@
5
SDA BTST D nbs_c0603_h37_000s
2
P_CHG_SDA_10 12 24 P_CHG_BST_30 P_CHG_BST_R_30 h=2.1mm
SCL REGN
2
P_CHG_SCL_10 13 23 P_CHG_REGN_20 @
1
CMPIN LODRV P_CHG_REGN_20
3
14 22 P_CHG_LG_30 4
CMPOUT GND1
1
P_CHG_LG_30 G S P_CHG_SNB_20
2
PC8920 PD8901
1
BATPRES#
BAT54CW PR8908 PR8910 @
TB_STAT#
2.2UF/16V
1
2
3
2
BATSRC
BATDRV
10KOhm 1Ohm
2
SRN
@
SRP
ILIM
2
PSL8901 @
2
1
@
1 2 SN2867RUYR
15
16
17
18
19
20
21
30,60 SMB0_DAT 0402 nbs_r1206_h30_000s
5%
+3VA
1 2 P_CHG_ILIM_10 1 2
30,60 SMB0_CLK 0402 PR8921
PSL8903 @ 180KOhm
P_CHG_BATDRV_20
1
P_CHG_BATPRES#_10
P_CHG_TB_STAT#_10
1
PR8919 PC8926
P_CHG_BATSRC_20
90 P_CHG_CMPIN_10
P_CHG_SRN_10
100KOhm 0.1UF/25V
@
I limit : Charge 6 A
P_CHG_SRP_10
2
2
90 P_CHG_CMPOUT_10 DisCharge 24A
PSL8904 nbs_r0603_h39_000s
1 2
+3VACC +3VACC 30 BAT1_IN_OC# 0402 1 2
@ 10OHM PR8931
1
1 2 PC8913
+3VS
PR8933 0.1UF/25V PC8901
10KOhm 0.1UF/25V
1
2
PR8909 PR8914
100KOhm 100KOhm
@ nbs_r0603_h39_000s
PR8828 SET
2
x : 0V =>0 OHM 1 2
30 A/D_MAX_POWER 30 MB_MAX_POWER 30W: 0.4V =>14k 10OHM PR8912
40W: 0.8V =>32k
1
PC8929
2
2
45W: 1.2V =>57.6k 0.1UF/25V

PR8916 PR8903 PR8935
65W: 1.6V =>93.1k
2
0Ohm 93.1KOhm 0Ohm
5% 75W: 2.0V =>150k @
90W: 2.4V =>270k 1 2
1
PWRLIMIT_EC# 30
120W: 2.8V =>560k
x : 3.3V =>@
3
+5VS_PWR
PQ8904B
5 EM6K1-G-T2R
4
PR8942
2
100Ohm
PR8920 1 2
PWRLIMIT#_CPU 8
2
150KOHM
PR8917 PD8902
PD8903 PR8932 P_CHG_VCC_30 150KOHM BAT54CW
NEW_PWRLIMIT#_CPU
3
1
BAT54CW 10Ohm 5% PQ8908B
nbs_r1206_h28_000s 2 5 EM6K1-G-T2R
A/D_DOCK_IN
1
2 3 P_PL_AC_THROTTLE_10
4
2
2
3 1 2 1
BAT
1
1
PR8901 PR8913 PC8914 PR8922
6
0Ohm PQ8908A 1MOhm 2200PF/50V 1MOhm
EM6K1-G-T2R
2 EM6K1-G-T2R @ @
2
P_CHG_PROCHOT#_10 1 2
1
PQ8905B
1
3
PC8908
5 270PF/50V
dGPU_PD# ---> GPIO12
2
AC_OK
4
PR8925
0Ohm
1 2
dGPU_PD# 76
P_PL_AC_THROTTLE_GPU_10
6
PQ8904A
2 EM6K1-G-T2R
1
BOM
Project Name Rev
X542UN/URV R1.0
Title : PW_CHARGER
Size
A2
vinafix.com
Register Address
Address Selection Table Address 0x00 0x01 0x02 0x03 0x04 0x05 0x06
Address 0x7E 0x7C 0x7A 0x78 0x76 0x74 0x72 0x70 R/W W W W R R R R
PR9001 10k 1.5k 2k 3.6k 3.9k 4.3k 5.1k 6k bit 4 = 0

bit 5 = 0
Temp. alert
Function threshold setting Sensed temp. data bit 6 = 0
PR9002 Open 8.2k 6.2k 6.8k 4.7k 3.6k 2.7k 2k
VINAFIX.COM When ALERT#

assert
PR9000
PTR9001 place near PQ8901 2 0Ohm 1
Close to AC FET VGA_ALERT_P# 76
P_TEMPSENS_VCC_30 @ 5%
PTR9001 PR9003 PR9001
100kOhm 12KOHM 10KOhm
2 1 ALERT# pull low if sensed temp.
2 1
1% 2 1 P_TEMPSENS_VCC_30 is higher than setting PC9005
PC9000 PR9002 47PF/50V
0.1UF/25V 2KOHM @
1.0 ~ 3.56V
2 1 1 @ 2 1 2
GND GND PSL9001 GND

PTR9002 place near BAT Connect PU9000 2 1
1 8 0402 SMB1_DAT 28,30,78
ALT/ADD SDA
105C @ 5k PTR9002 PR9004 P_TEMPSENS_ADDR_10 2 7 P_TEMPSENS_SDA_30 PSL9002
@
40C @ 51k TM3 SCL
100kOhm 12KOHM P_TEMPSENS_TM3_10 3 6 P_TEMPSENS_SCL_30 2 1
TM2 GND 0402
2 1 P_TEMPSENS_TM2_10 4 5 SMB1_CLK 28,30,78
TM1 VCC5
2 1 1% P_TEMPSENS_TM1_10 P_TEMPSENS_VCC_30 @
PC9001 UP1905AMA8
0.1UF/25V GND Check 其他頁是否有
1.0 ~ 3.56V 1 2 pull high 到 3.3V
2 1 +5VSUS_PWR PC9004
47PF/50V GND
GND 1 2 @
PTR9004 place near PL8901 or PQL8901(CHG page) PR9006 2.2Ohm 5%
1
nbs_r0603_h24_000s
PTR9004 PR9005 PC9003
105C @ 5k 100kOhm 12KOHM 1UF/16V
2
40C @ 51k 2 1 nbs_c0603_h37_000s
2 1 1%
PC9002 GND
0.1UF/25V
1.0 ~ 3.56V
2 1
GND
DC Jack Thermal Latch
P_CHG_REGN_20 P_CHG_REGN_20 P_CHG_REGN_20
PTR9003 place near DC JACK
2
PSL9003
2
SHORT_LAND PTR9003
1
1 2 PR9014 PR9017 100kOhm
0402
P_LATCH_OUT_10 100KOhm 10KOhm
1
3
2
1
PQ9001B
89 P_CHG_CMPIN_10
EM6K1-G-T2R 5
2
P_LATCH_ACDET_10
P_LATCH_OUT#_10 PQ9001A
1
EM6K1-G-T2R PR9022
PC9008 7.32KOhm
2 1UF/25V
P_CHG_CMPOUT_10 89
2
1
1
GND
GND
GND
PR9018
1 2
PR9013
10KOhm
20KOhm
2 1
P_CHG_ACDET_10 89
<Variant Name>
Project Name Rev
X542UN/URV R1.0
Title : PW_PROTECTION
Size
A3
vinafix.com
PWM-VID Spec
Config A Config B Config C Config D

VINAFIX.COM GPU_PWRON_3.3VSG = NVDD_PWR_EN
NVDD_PWR_EN 77
R1 (kR) 39 20 39 27 2 1
AC_BAT_SYS
N16S-GTR = 3V PR9124 5% PJP9100
R2 (kR) 39 20 30 7.5 N17S-G1 = 1.8V 0Ohm 3MM_OPEN_5MIL
/VGA 2 1
+VDD_AON 2 P_NVVDD_VIN_S 2 1
R3 (kR) 1.5 2 3 0
NTMFS4C09NBT1G
2 1 3 @/VGA
GPU_PWR_EN 69,77,93
1
1
R4 (kR) 30 18 24 6.2 PR9123 1
PC9110 3.3KOhm PD9102 PCI9102 PCI9101 + PCE9100
BAT54AW
PQH9101
R5 (kR) 1.5 0 3 1.74 0.015UF/16V /VGA 10UF/25V 10UF/25V 22UF/25V
1
/VGA
2
/VGA /VGA @/VGA /VGA
2
C (nF) 1.5 2.7 1.8 5.6 PR9118 nbs_c0805_h57_000s nbs_c0805_h57_000s nbs_cplsmd_2p_001
3
D
10KOhm PR9119 5% h=4.6mm
PSL9106 /VGA 0Ohm
2
1 2 1 2 2
76 NVDD_PSI 0402
P_NVVDD_HG1_30 P_NVVDD_HG1_R_30 G S
@/VGA PD9101 nbs_r0603_h24_000s
1
1 +5VS_PWR PR9110 /VGA
1
/VGA
PSL9105 P_NVVDD_BST2_30 3 +NVVDD
10KOhm
1 2 2 PL9100
76 NVDD_PWM_VID 0402
@/VGA 0.36UH
NTMFS4C06NBT1G
@/VGA BAT54AW @/VGA 1 2
1
PR9126
P_NVVDD_BST1_RC_30 PC9121 Irat=25A /VGA
P_NVVDD_BST1_30
P_NVVDD_HG1_30
P_NVVDD_VID_10
P_NVVDD_PSI_10
PQL9101
0Ohm 5% 0.1UF/25V PC9104 [HE]CYNTEC/PEUE063T-R36MS
P_NVVDD_EN_10
1 2 2 1 1000PF/50V
1
PR9109 nbs_c0603_h37_000s
3
D
6.19KOhm nbs_r0603_h24_000s nbs_c0603_h37_000s @/VGA + PCE9102
/VGA /VGA 330UF/2.5V
P_NVVDD_REFIN_R_10 2 1 2 /VGA
2
/VGA R1 PU9101 P_NVVDD_LG1_30 G S P_NVVDD_SNB1_S h=4.5mm
+5VS_PWR
RT8820AGQW
1
1
PR9122 /VGA PR9121 /VGA PR9117
5
4
3
2
1
1
PC9113
2
For N17 R3 4.32KOhm 27.4kOHM 1Ohm
PSI
UGATE1
BOOT1
VID
EN
PR9112 23 1000PF/50V nbs_r1206_h30_000s
Boot Voltage = 0.8V
1
GND3
2
/VGA R2 20.5KOhm 22 PR9103 @/VGA @/VGA 5%
2
GND2
PSL9102 21 2.2Ohm @/VGA
GND1
1 2 /VGA 6 20 nbs_r0603_h24_000s
REFADJ PHASE1
1
0402 7 19
P_NVVDD_REFIN_10 P_NVVDD_REFADJ_10 P_NVVDD_LX1_30 5% /VGA UPI
2
REFIN LGATE1
P_NVVDD_REFIN_10 8 18 P_NVVDD_LG1_30
@/VGA
P_NVVDD_VIN_S VREF PVCC OCSET
C P_NVVDD_VREF_10 9 17 P_NVVDD_PVCC_20 OCP=60A
1
TON LGATE2
1
PR9104 P_NVVDD_OCS_10 10 16 P_NVVDD_LG2_30
RGND PHASE2
R4 16.5KOhm PC9103 P_NVVDD_FBRTN_10 P_NVVDD_LX2_30 PC9123
OCSET/SS
1500PF/50V PR9106 1UF/25V
1
2
2
UGATE2
PGOOD
/VGA /VGA PR9114 11KOhm nbs_c0603_h37_000s
BOOT2
2
VSNS
2.2Ohm @/VGA /VGA
/VGA PR9116
2
1
PC9122 620KOhm 1%
11
12
13
14
15
1
PR9102 1UF/6.3V
R5 0Ohm 5% 1 /VGA 2
P_NVVDD_COMP_10
P_NVVDD_PG_10
P_NVVDD_HG2_30
P_NVVDD_BST2_30
P_NVVDD_VIN_S
1
/VGA
1
/VGA P_NVVDD_BST2_RC_30
NTMFS4C09NBT1G
PC9114 PR9108 PR9127 PC9117 PCI9103 PCI9104
1UF/25V 20KOhm 0Ohm 5% 0.1UF/25V 10UF/25V 10UF/25V
2
/VGA @/VGA 1 2 /VGA @/VGA
PQH9103
P_NVVDD_FB_10 1 2
P_NVVDD_FBRTN_10 nbs_r0603_h24_000s nbs_c0603_h37_000s nbs_c0805_h57_000s nbs_c0805_h57_000s
/VGA /VGA
3
D
PR9125 5%
0Ohm
1 2 2
P_NVVDD_HG2_R_30 G S
1
nbs_r0603_h24_000s
1
PSP9102放在PCE9102 or PCE9101 上 PC9119 N16S-GTR = 3V PR9101 /VGA Imax=51A
1
/VGA
+NVVDD N17S-G1 = 1.8V +NVVDD
PSP9102 4700PF/25V 10KOhm
2
PR9107 @/VGA @/VGA PL9101
+VDD_AON 0.36UH
2
2 1 1 2 1 2
NTMFS4C06NBT1G
P_NVVDD_CMP_10
100Ohm /VGA P_NVVDD_LX2_30
1
SHORT_PAD
1
PR9115 Irat=25A /VGA
1
@/VGA PR9128 PC9120 10KOhm [HE]CYNTEC/PEUE063T-R36MS
PQL9103
PSL9103 200KOhm 5600PF/25V /VGA PC9111
1
1 2 @/VGA PSL9104 1000PF/50V
2
NVDD_VCCSENSE 70
2
0402 1 2 + PCE9103
nbs_c0603_h37_000s
3
0402 NVDD_PWRGD 77 D
@/VGA @/VGA 330UF/2.5V
1
RT @/VGA /VGA
2
1
PC9125 PC9109 @/VGA OCSET PR9111 2 h=4.5mm
4700PF/50V 4700PF/50V P_NVVDD_LG2_30 G S P_NVVDD_SNB2_S
OCP=75A 33KOhm
1
@/VGA @/VGA
1
2
PSL9101 PR9120 /VGA PR9113
1
1 2 27.4kOHM PC9116 1Ohm
NVDD_VSSSENSE 70
2
0402
UPI 1000PF/50V nbs_r1206_h30_000s
@/VGA PC9109放在GPU端 OCSET @/VGA @/VGA @/VGA
5%
2
PSP9101 OCP=60A
PR9105
2 1 1 2 +NVVDD
100Ohm
SHORT_PAD
/VGA
@/VGA
PSP9101放在PCE9102 or PCE9101 上
1
PT910* 請放置 PU9101旁;並請放置Trace 上! PC9136 PC9137 PC9138 PC9139 PC9140
22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V
@/VGA /VGA @/VGA @/VGA @/VGA
2
PT9101 PT9104
1 NB_TPC20T 1 NB_TPC20T
P_NVVDD_HG1_30 @/VGA P_NVVDD_HG2_30 @/VGA
PTR9110 place near PQL9101
Close to +NVDD L side
PT9102 PT9105 At Page 78
1 NB_TPC20T 1 NB_TPC20T PTR9110 +NVVDD
P_NVVDD_LX1_30 @/VGA P_NVVDD_LX2_30 @/VGA 100kOhm
2 1 P_GPU_VRM_TEMP_SENSOR_10 78
BOM
PT9103 PT9306
1
1 NB_TPC20T 1 NB_TPC20T PC9141 PC9142 PC9143 PC9144 PC9145 Project Name Rev
P_NVVDD_LG1_30 @/VGA P_NVVDD_LG2_30 @/VGA 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V
@/VGA @/VGA @/VGA /VGA /VGA X542UN/URV R1.0
2
Title : PW_NVVDD (1)
Size
Custom
vinafix.com
S3 And S5 Truth Table
PD9301
69,77,91 GPU_PWR_EN
1 VINAFIX.COM
3 1
PR9301
2
State Pin7(S3) Pin8(S5) VDDQ VTTREF VTT
2
2KOhm
BAT54AW /VGA S0 1 1 On On On
/VGA
PR9306
1 2
77 DGPU_FBVDDQ_EN
P_FBVDDQ_EN_10
S3 0 1 On On OFF(Hi-Z)
10KOhm
1
/VGA
PC9303
S4/S5 0 0 OFF OFF OFF
0.1UF/25V
2
/VGA
(Discharge) (Discharge) (Discharge)
+FBVDDQ
[For FRAM]
VTTREF
AC_BAT_SYS
AC_BAT_SYS
1
PC9308
1
0.1UF/25V PCI9301 PCI9303
/VGA 10UF/25V 10UF/25V
2
/VGA /VGA
2
P_FBVDDQ_VTTREF_10
h=4.5mm
QM1830M3
PQH9301
P_FBVDDQ_DHR_30
5
D
P_FBVDDQ_VSENS_10
Imax = 12A
4
PU9301 G S
RT8248AGQW
5
4
3
2
1
/VGA /VGA
OCP = 13A
1
2
3
VDDQ
VTTREF
GND1
VTTSNS
VTTGND
23
1
GND4
22 PR9312
GND3
f=308kHz 21 PR9317 PC9312 10KOhm
c0805,nb_c0805_h57_hdi
c0805,nb_c0805_h57_hdi
c0805,nb_c0805_h57_hdi
c0805,nb_c0805_h57_hdi
GND2
6 20 0Ohm 0.1UF/25V @/VGA
PR9307 P_FBVDDQ_FB_10 7
FB VTT
19 nbs_r0603_h24_000s nbs_c0603_h37_000s PL9301
+FBVDDQ
2
S3 VLDOIN
820KOhm 8 18 1UH
S5 BOOT
1 2 P_FBVDDQ_EN_10 9 17 P_FBVDDQ_BST_30 2 /VGA 1 1 2 Irat=12A /VGA
TON UGATE
AC_BAT_SYS /VGA P_FBVDDQ_TON_10 10 16 P_FBVDDQ_HG_30 /VGA 1 2 1 2
QM1830M3
PGOOD PHASE 1 2
PQL9302
P_FBVDDQ_LX_30 +FBVDDQO @/VGA
7x7x3mm PJP9303
22UF/6.3V
22UF/6.3V
22UF/6.3V
[HF]CYNTEC/PEUB063T-1R0MS
22UF/6.3V
3MM_OPEN_5MIL
LGATE
5
D
PGND
VDD
PCO9306
VID
PC9315
CS
PC9318
PC9309
330UF/2.5V
1
PC9311 @/VGA
24,77 +FBVDDQ_PWRGD 4 1000PF/50V
PCE9301
11
12
13
14
15
G S nbs_c0603_h37_000s
1
1
1
2
1
/VGA
1
2
3
+5VSUS
2
2
2
+
P_FBVDDQ_VDD_20
P_FBVDDQ_VDDP_20
P_FBVDDQ_CS_10
P_FBVDDQ_SNB_S
1
PC9301 @/VGA PSP9302 @/VGA /VGA /VGA /VGA /VGA
2
1000PF/50V SHORT_PAD
1
PR9315 1 2 PR9305 @/VGA @/VGA
2.2Ohm 5% P_FBVDDQ_LG_30 1Ohm 5%
h=4.5mm
/VGA nbs_r1206_h30_000s
2
nbs_r0603_h24_000s
2
1
PR9309 RLIMIT = ILIMIT x RDS(ON) ×10 / 5μA
1
PC9310 649KOhm
1UF/25V /VGA OCP=13A
/VGA PR9314
2
2
nbs_c0603_h37_000s PC9313 /VGA 10Ohm
820PF/50V 1 2
2 1 P_FBVDDQ_LOSENS_10
/VGA
PR9303 PSP9301 @/VGA

PR9304 10KOhm PSL9302 SHORT_PAD
1 2
0402 +FBVDDQ
P_FBVDDQ_LX_30 2 1 1 2 P_FBVDDQ_VSENS_10 P_FBVDDQ_RESENS_10 2 1
178KOhm FB=0.75V /VGA @/VGA
/VGA
1
PR9302 PC9317
12.4KOhm 0.1UF/25V
R V /VGA @/VGA
2
12.4K 1.35V
2
PR9302
10K 1.5V
PT930* 請放置 PU9301旁;並請放置Trace 上!
PT9301
1 NB_TPC20T
P_FBVDDQ_HG_30 @/VGA
PT9302
1 NB_TPC20T
<Variant Name>
P_FBVDDQ_LX_30 @/VGA
Project Name Rev
PT9303 X542UN/URV R1.0

1 NB_TPC20T
P_FBVDDQ_LG_30 @/VGA Title : PW_+FBVDDQ
Size
Custom
vinafix.com
A/D_DOCK_IN
P0A03BEA P0A03BEA AC_BAT_SYS
SN2867RUYR P0A03BEA
DCDRV
ACDRV
H-MOS
VINAFIX.COM SMB0_DAT
PEA28BA*1
L-MOS
PEA28BA*1
BAT
SMB0_CLK
ACOK
+3VAO +3VA
+3VA
RT8249C
AC_BAT_SYS
SN1409049-1 +3VA_EC
PS_ON
+5VO
+5VSUS Imax =10.3A
H-MOS
PEA28BA*1 PEA32DY-1 +5V
5VSUS_ON PS_ON
L-MOS
PEA28BA*1
+5VS
Controller SUSB#_EC PEA32DY-2
Converter
+5VS_PWR
LDO
+3VA_DSW
MOSFET +3VA_DSW Imax =8.3A
SN1409049-2 +3VSUS
VSUS_ON
PEA32DY-1 +3V
SUSC#_EC
H-MOS
PEA28BA*1
3VADSW_ON L-MOS PEA32DY-2
+3VS
PEA28BA*1 SUSB#_EC
+1.8VSUSO
+1.8VSUS
UP0132A
VSUS_ON
1.8VSUS_PWRGD
+12VSUS
3VA_DSW_PWRGD
PUMD12
SUSC#_EC +12V
PUMD12 +12VS
SUSB#_EC
PUMD12 +12VDX
MPHY_PWREN
NCP81206
H-MOS
NTMFS4C09*1
L-MOS +VCCCORE Imax = 31A
NTMFS4C06*1
+5VS_PWR
H-MOS +VCCGT
NTMFS4C09*1 Imax = 29A
VCCIN_EN
L-MOS
NTMFS4C06*1
VR_SVID_ALERT#
+VCCSA Imax = 5.1A

VR_SVID_DATA H-MOS
PEA28BA*1
L-MOS
VR_SVID_CLK
PEA28BA*1
IMVP8_PWRGD
RT8248A
+5VSUS +1.05VO
H-MOS +1.0VSUS Imax =12A
PEA16BA*1
L-MOS
5VSUS_Delay PEA16BA*1
PEA32DY-1 +VCCST
SUSC#_EC
PEA32DY-2
+VCCIO
SUSB#_EC
RT8248A
+1.35VO
+5VSUS +1.2V Imax = 13A
H-MOS
PEA16BA*1
L-MOS
PEA16BA*1
1.35V_ON
VTT
DDR_PG_CTRL 1.35V_PWRGD
RT8815A
+5VS_PWR H-MOS +NVVDD Imax = 51A

NTMFS4C09*1
L-MOS
NTMFS4C06*1
NVDD_PWR_EN
NVDD_PWM_VID NVDD_PWRGD
BOM
vinafix.com
Project Name Rev
X542UN/URV R1.0
Title : PW_FLOWCHART
Size
Custom
AC-IN Mode X541UV/UA Power-On Sequence
1 +3VA/+3VA_EC Timing Diagram Rev.0.1
(to EC) 2 EC_RST#
5VSUS_ON
VINAFIX.COM
(EC to power) 3 3VA_DSW_ON
+3VA_DSW/+5VSUS/+12VSUS
(pull up to +3VSUS)
(PCH to EC) 4 ME_SusPwrDnAck_R

T0=20ms (spec.>=10ms)
(power to EC) 5 3VSUS_PWRGD
T1<200ms(check)
(EC to PCH) 6 PM_RSMRST#
(EC to PCH) 7 AC_PRESENT
(falling edge)
(to EC) 8 PWR_SW#
T2=50ms
(EC to PCH) 9 PM_PWRBTN#
(PCH to EC) 10 PM_SLP_A#
(PCH to EC) 11 PM_SUSC#
12 PM_SUSB#/SLP_LAN#
(PCH to EC) (PCH to power)
(EC to power) ME_SLP_M_EC#
(EC to power) 13 SUSC_EC#
+1.2V/+2.5V/+3V/+12V/+VCCST
(EC to power) 14 SUSB_EC#
+1.8VS/+3VS/+5VS/+12VS
+VCCIO/+VccSTG
VccST/VccPLL
+VCCSA
(power to EC) 15 IMVP8_PWRGD
16 ALL_SYSTEM_PWRGD
(EC to PCH) 17 PM_PWROK_PCH
(PCH to EC) PCH_SUS_STAT#
(PCH to EC) 18 PLT_RST#
+VCCGT
THERMTRIP#
BOM
Project Name Rev
X542UN/URV R1.0
Title : Power On Timing

Size
C
Dept.: SS Engineer: <OrgAddr1>
vinafix.com
DC-IN Mode X541UV/UA Power-On Sequence
1 +3VA/+3VA_EC Timing Diagram Rev.0.1
(to EC) 2 EC_RST# VINAFIX.COM
5VSUS_ON
(EC to power) 3 3VA_DSW_ON
+3VA_DSW/+5VSUS/+12VSUS
(pull up to +3VSUS)
(PCH to EC) 4 ME_SusPwrDnAck_R

T0=20ms (spec.>=10ms)
(power to EC) 5 3VSUS_PWRGD
T1<200ms(check)
(EC to PCH) 6 PM_RSMRST#
(EC to PCH) 7 AC_PRESENT
(falling edge)
(to EC) 8 PWR_SW#
T2=50ms
(EC to PCH) 9 PM_PWRBTN#
(PCH to EC) 10 PM_SLP_A#
(PCH to EC) 11 PM_SUSC#
12 PM_SUSB#/SLP_LAN#
(PCH to EC) (PCH to power)
(EC to power) ME_SLP_M_EC#
(EC to power) 13 SUSC_EC#
+1.2V/+2.5V/+3V/+12V/+VCCST
(EC to power) 14 SUSB_EC#
+1.8VS/+3VS/+5VS/+12VS
+VCCIO/+VccSTG
VccST/VccPLL
+VCCSA
(power to EC) 15 IMVP8_PWRGD
16 ALL_SYSTEM_PWRGD
(EC to PCH) 17 PM_PWROK_PCH
(PCH to EC) PCH_SUS_STAT#
(PCH to EC) 18 PLT_RST#
+VCCGT
THERMTRIP#
BOM
Project Name Rev
X542UN/URV R1.0
Title : Power On Timing

Size
Dept.: SS Engineer: <OrgAddr1>
C
vinafix.com
Rev Date Description Rev Date Description
R 1.0 2016/10/05 01.P09. Add 24MHz parts for KBL-R U42, X0901 circuit Option: /U42 2016/11/30 93.P23. Remove PCIE to SSD
03.P24. Del GCLK circuit R2427/R2428/R2429
04.P24. X2402 Option: N/A & Del SL2401/R2431/R2432

VINAFIX.COM
02.P24. 24MHz parts for KBL-R U22, X2401 circuit Option: /U22 & Del R2425/R2409 2016/12/01
2016/12/02
2016/12/05
94.P45. Del Q4501 circuit.
95.P37. Add Q3701 circuit for SKP protectin & modify Ra & Rb for Switching loss
96.P06. VCORE sense & VCCGT sense modify

05.P33. X3301 circuit Option: N/A & modify Del R3313/R3314 & Del GCLK circuit R3312/C3319 97.P36. Add DIN to P37 Smart Amp
06.P75. X7501 circuit Option: /VGA, Del GCLK R7527 98.P16. DDR SWAP
07.P29. Del GCLK all circuit 99.P17. DDR SWAP

08.P21. Modify DMIC_ID to PCB_ID1 A1.P45. Reserve DMIC_CODEC & DMIC_PCH
09.P36. Del DMIC circuit & reserve test point & Modify AMIC netname A2.P36. Modify int. AMIC & Audio Jack MIC
10.P45. Del DMIC R457/R4518 & Modify AMIC Option: N/A & Modify netname 2016/12/07 A3.P16. Modify int. AMIC & Audio Jack MIC
2016/10/06 11.P45. Del Touch Panel R4582~R4595/SLN4507/L4502 & C4517 2016/12/15 A4.P36. Modify Codec from ALC295 to ALC3288
12.P45. Del EMI reserve C4591/C4592/C4593 A5.P68. Audio Jack pin modify
13.P51. Add SATA ODD CONN. & SATA HDD FPC CONN. circuit A6.P66. Audio Jack pin modify
14.P68. Del SATA BtoB CONN. A7.P36. Reserve R3635 / R3637 / C3631 / C3632 / C3633 / C3634
15.P24. Modify RTC circuit follow X456U 2016/12/19 A8.P37. J3701 Pin define modify: R+, R-, L+, L-
16.P66. Add IO DB. follow X456U

R 1.1 2017/01/11 01.P66. HDD LED modify PU from +5VSUS_IO to +3VS_IO
17.P33. LAN chip change solution to RTL8411 follow X456U
02.P36. AUD_VDD_IO modify to +1.8VS
18.P34. Transformer & RJ45 follow X456U
03.P26. +3VSUS_VCCPAZIO modify to +VCCPAZIO & change from +3VS to +1.8VSUS
19.P68. Add IO FPC CONN. follow X456U
04.P88. PQ8809, PC8833 & PR8826 stuff
20.P66. Modify Audio Jack to X541U solution & Modify netname
2017/01/12 05.P53. Modify BT_ON & WLAN_ON circuit (un-stuff)
21.P42. Del SD CONN circuit
2017/01/13 06.P24. C2401&C2402 modify to 27pF for X542UQ SR PCB
22.P59. Del LED circuit
07.P33. C3344&C3345 modify to 12pF for X542UQ SR PCB
23.P66. Change USB2.0 portect IC over current to 2.5A solution
08.P75. C7508&C7509 modify to 15pF for X542UQ SR PCB
24.P54. Add SSD circuit follow T303UA
2017/01/16 09.P30. Stuff R3036, DC S0 to S5, EC powr latch VSUS_ON will floating & VSUS will turn on
2016/10/07 25.P53. Change WLAN CONN. to NGFF, follow X456U
2017/01/19 10.P37. Remove Q3701 & modify
26.P66. Change FFC CONN. to 12018-00021800 same as J6801
11.P04. Modify R0404 PU to +3VS & RES 200K
27.P06. Add R0601/R0602/R0607/R0608 for U42 & U22 Option
2017/01/20 12.P55. Type-C U3 modify
28.P28. Modify SPI PCH power follow X456U
13.P45. R4566 modify to 150K ohm for Panel sequence
29.P32. Modify GPU_THERM# follow X456U
14
30.P55. Modify Type C circuit follow X456U
15
31.P70. Modify U7002 circuit follow X456U
2016/10/08 32.P04. Modify 0401 circuit follow X456U P14. U1405

33.P14. C1447-C1450 change to 47nF follow X456U
34.P14. C1533-C1536 change to 47nF follow X456U

35.P21. R2101 staff follow X456U
36.P25. U2502 circuit BOM follow X456U
37.P66. Modify J6601 pin define

38.P68. Modify J6801 pin define
39.P37. Modify HP Jack Mute to P36
2016/10/12 40.P52. Modify U5201 circuit & change OC from 3.2A to 2.5A
41.P68. USB Power SW enable pin change to SUSC_EC#
42.P66. Modify U6602 circuit
43.P47. Change DP to VGA solution from RTD2168 to RTD2166
2016/10/13 44.P26. VCCHDA change to +3VS
45.P37. Add SMART AMP. TAS2555

2016/10/14 46.P37. Change SAMRT AMP. TAS5766
2016/10/17 47.P06. Modify R0602/R0607/R0608 from 0603 to 0805 for intel suggestion
2016/10/18 48.P65. Update H65-1~H6506 for CPU/DGPU/SSD nuts
2016/10/19 49.P24. Modify CK_REQ_Px# setting P2 & P3 same group

According to checklist：
Any un-used, disabled, and non-mapped SRCCLKREQ# signal must be left as no connects
at the PCH side on the platform.
2016/10/20 50.P05. Add SPI for FingerPrint
51.P31. Add J3103 for FingerPrint
2016/10/21 52.P21. Add GSPI0 for FingerPrint & PU to +3VS

2016/10/27 53.P05. Remove PCH_SUS_STAT# & reserve test point for measure
54.P30. Remove PCH_SUS_STAT#
55.P25. Remove reserve RES R2514 & R2554

56.P22. Remove PCH_GPPB14 & remove R2210/R2211
57.P21. Remove PCH_GPPB22 & remove R2160/R2161

58.P05. Remove GPP_C2/GPP_C5 & remove R0506/R0507
59.P21. Remove TOUCHPAD_ID/TOUCH_PANEL_ID & remove R2111/R2137/R2139/R2140
60.P21. Remove SNSR_HUB_PWREN & remove R2153
61.P23. Remove DIRECT_ESATA_DETECT_R# & remove R2302/R2306
62.P23. Remove SATA_ODD_PRSNT_R# & remove R2303/R2305

63.P23. Remove R2301/R2304
64.P54. Add R5411 & unstaff Q5401 & R5408
65.P23. Modify PCIE CAPs to P54 & add SATA RX CAPs

2016/10/28 66.P31. Add BL CONN. J3104 & circuit
2016/11/01 67.P66. Add LED6604 for HDD LED
2016/11/09 68.P55. Reserve RN5501 for USB_C_CC1/CC2 PU to +3V

2016/11/10 69.P37. Update SPK CONN. pin define ADR1 & GND pin
70.P36. Reserve R3526/R3627/R3631/R3632 for Smart Amp. SPK co-lay

2016/11/11 71.P60. Modify J6002, battery pin define follow X456U battery
72.P32. Modify reference Design IP IT8995 KABYLAKE_EC_RST
2016/11/14 73.P51. Modify SATS FPC CONN. pin define

74.P53. WLAN power modify to +3VSUS for wake on WLAN
2016/11/15 75.P66. J6601 Pin define reverse
76.P66. SATA_LED reserve Q6604 & add SL6602
2016/11/16 77.P30. Add DGPU_FB_CLAMP_GPIO to GPC4 (GC6_EN to EC)

78.P17. Remove R1709
79.P30. Remove PM_EXTTS#0 & R3091
80.P68. Update J6801 from 30pin to 40pin (Add SATA HDD)
81.P64. Add HDD DB
82.P51. Remove J5102

2016/11/17 83.P76. Add GPIO10, MEM_VREF_CTL
2016/11/18 84.P72. Modify to GDDR5
2016/11/22 85.P31. J3102 (Touch Pad) modify pin define to STD
2016/11/23 86.P16. Add SO-DIMM (ChA), remove P13, P14 & P15 DRAM
87.P68. Modify J6801 to B to B conn. & pin define
88.P64. Modify J6401 to B to B conn. & pin define
2016/11/28 89.P68. Modify J6801 to 30 pin FPC CONN. from MB to IO DB

90.P66. Modify J6601 to 30 pin FPC CONN. from IO DB to MB BOM
91.P51. Add J5102 B to B CONN. from MB to HDD DB Project Name Rev
92.P64. Modify J6401 to BtoB CONN. from MB to HDD DB & Del J6402 from HDD DB to IO DB X542UN/URV
93
Title : System History
Size
D
Dept.: SS Engineer:
vinafix.com

X542UN X542URV r1.0

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X542UN X542URV r1.0

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SYSTEM PAGE REF.

045_eDP_LVDS USB 3.0 Standard Conn.

056_ iSST Page 55

076_VGA_nVIDIA_N16V/S_GPIO Page 52 Page 64 Page 66

100_Power On Timing--AC mode

Project Name Rev

Title : Block Diagram

Power on Int.& Ext Power on Int.& Ext

GPP_A23 GPO NA GPP_E22 GPO N/A GPD0 I PCH_SLP_S0# HIGH PCIE 2

EXT PD 10K USB Port

GPP_C8 GPO NA GPP_G7 GPO SDIO_WP N/A GPH5 O PM_PWROK

GPP_D2 GPO N/A GPJ7 O N/A HIGH

GPP_D4 GPO N/A

GPP_D5 GPO SATA_ODD_PWRGT EXT PU 10K +3VS PU at ODD

GPP_D12 GPO N/A

GPP_D13 GPI TOUCHPAD_INTR# EXT PU 10K +3VS

GPP_D16 GPO N/A

GPP_D17 GPO N/A

GPP_D18 GPO N/A

GPP_D19 GPO N/A

GPP_D20 GPO N/A

Title : System Setting

Intel Version ASUS P/N

Project Name Rev

SL0409 2 1 C0402 R0404

Project Name Rev

2016/10/27 X542UA_#58, Remove GPP_C2/GPP_C5 & remove R0506/R0507

Transport Layer Security (TLS) Confidentiality

Project Name Rev

CPU - VCCIO DECAPS- Place close to the package

1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V

CPU - VCCSA DECAPS- Place close to the package

JP鋼板測試, 共20顆 PR remove

Simulation team suggestion

Project Name Rev

CPU SIDEBAND SIGNALS +VCCSTG

Project Name Rev

RESERVED SIGNALS-1 SPARE

E68 BB68 AW69 F6

F61 AP56 @ R0905

STALL RESET SEQUENCE Project Name Rev

CPU - VCC DECAPS- Place close to the package

CAP above 22UF move to PWR page

Project Name Rev

Project Name Rev

2016/12/05 X542UA_R1.0 #98, DDR SWAP

C1617 C1612 254 204 M_A_DQ58 175 176

166 228 M_A_DQ45 107 106

GND GND GND GND GND GND GND GND

2017/02/06 X542UA_R1.1 #26, EMI solution

Project Name Rev

166 228 M_B_DQ52 107 106

GND Place close to SO-DIMM Socket (VDD Pin)

EVENT# ON ECC DIMM: KEEP A PULL UP IF NO PIN IN PCH

GND GND GND GND GND GND GND GND

GND GND GND GND GND GND GND GND

2017/02/06 X542UA_R1.1 #26, EMI solution

2017/02/06 X542UA_R1.1 #26, EMI solution Project Name Rev

All Vref trace must be 20 mils width

2017/02/21 X542UA_R1.1 #32, Modify R1812/18/21 to SO-DIMM setting

+1.2V M_B_VREFCA +1.2V M_A_VREFCA

Project Name Rev

Title : DDR4 CA VOLTAGE

REV=<REV> REV=<REV> Project Name Rev