Gurugram, India

+91-8684060556
panghalmonika08@gmail.com

Monika Panghal Monika Panghal

Looking for an responsible position in VLSI domain to utilize my technical skills and implement innovative ideas to
make world a better place.

Profile Summary
● Good programming knowledge of C/C++.
● Design rules for CMOS Layout (TSMC018: 180nm, GPDK90: 90nm).
● Good Knowledge of CMOS Digital Design Circuits, Analog Circuit Design, Circuit Theory.
● Good in Hardware Description Languages i.e., Verilog and VHDL, System Verilog and UVM.
● Hands-on experience in protocols using Verilog i.e., I2C, UART, SPI, AMBA APB, AMBA AHB.
● 6 weeks training on VLSI Design and Verification by School of VLSI design & Embedded system, NITK.
● Hands-on experience in various EDA Tools: QuestaSim 10.2, Xilinx ISE 14.7, Cadence Virtuoso IC6.15.

Skills
● HDL : Verilog, VHDL, SystemVerilog.
● HVL : UVM
● Programming Language : C/C++
● Operating Systems : Linux (Ubuntu), Windows
● EDA Tools : Virtuoso Cadence, Xilinx ISE.
● Hardware Boards : Zynq Board, Spartan 3E FPGA Board
● Protocols : UART, I2C, SPI, AMBA, Memory Controllers

Professional Experience
2021-Present: Trainee at Maven Silicon, Bangalore (Advanced VLSI Design & Verification)
Digital Verilog
System Verilog Perl
STA UVM
HVL SVA
2018-2020 : CCI Systems
● Associate Engineer
● Worked at client end on verification of communication protocols.
2014-2016 : BITS College of Polytechnic / Rohtak, India
Served as Ad-hoc faculty for the following subjects:
● Micro-Electronics
● Analog Electronics
● Network Theory
● Digital Electronics

Education
M.Tech in VLSI Design / NIT Kurukshetra, India Nov 2018
B.E in Electronics and Communication / TIT&S Bhiwani, India June 2014
XII(CBSE) / Public senior secondary school Bal Bhawan, Bhiwani May 2009
X(CBSE) / Public senior secondary school Bal Bhawan, Bhiwani May 2007
Projects and Presentation
• Project : Implementation of ECG processor in MATLAB for Stress and CVD detection
Description: Design of an efficient module for R-peak detection, that helps in identifying the types of
abnormalities present in human heart, which affects the cardiac health.
Platform : MATLAB

• Project : Designed a 32 Bit ALU using Xilinx ISE (MTech Minor, 2018)
Description: Designed and emulated a behavioral model of 32-bit AVR ALU on Spartan3-E FPGA.
Platform : Xilinx ISE Design tool using Verilog

• Project : Full Custom Design of low power SSRAM and 6T SRAM using AMI 0.6µ technology
Description: Designed a low power driving SRAM to control the sub-threshold current thereby reduction in the
leakage power. Compared the 64-bit 6T sleepy SRAM and conventional 64-bit 6T SRAM and
obtained the power reduction of 20~30%. Achieved storage of 1 byte of data in a row of SRAM.
Platform : Cadence Virtuoso

• Project : Verification Environment using UVM

Description: Implemented complete verification environment around adder using UVM and developed
following components: DUT, Interface, Packet, Sequence, Sequencer, Driver, Monitor, Scoreboard
Coverage

• Project : System Verilog Design and Verification

Description: Implemented complete verification environment around adder using System Verilog and
developed following components: DUT, Interface, Packet, Generator, Driver, Collector,
Scoreboard.
Platform : Questa Sim

• Project : Verilog Design and Verification

Description: Implemented complete design for APB protocol. Design and testbench developed in Verilog.
Platform : Questa Sim

• Project : Perl scripting based task

Description: Performed variety of task ranging from file handling, manipulation and data extraction.

• Project : Static Timing Analysis

Description: Report checks for setup time violation and hold time violation for a custom circuit. The delays on
different paths are also calculated.
Platform : Open STA

Publications
● Monika, Dr R K Sharma, “ECG Analysis and automatic detection of R-peak in MATLAB” in International
Conference on Recent Innovation and Trends in Electrical, Electronics Communications (ICRIEECE-2018).
● Monika, Dr R K Sharma, “MATLAB SIMULINK Based ECG analysis and detection of R- peaks” in
International Conference on Recent Innovation and Trends in Electrical, Electronics and Communications
(ICRIEECE-2018).

2
Extra-Curricular Activities
● Won 1st prize in State level Yoga competition
● Won 1st prize in Inter -College State Level Chess Championship
● Participated in Ethical Hacking workshop.
● Participated in National event on “Semiconductor Physics”.
● Co-ordinated College Cultural fest named “Aagaaz”.