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Low Loss

Step Down Converter


Michel Franke
quiescent current: 120µA @ +12V +9V...+60V
1N4148 250µA @ +60V
This circuit arose from the need of the R1 R7 R6 Ue
D3
author to provide a 5 V output from the

1M
330k

330k
T2
24 V battery of a solar powered genera-
tor. Although solar power is essentially
free it is important not to be wasteful espe- T3 C6 C7
BC327
cially for small installations; if the battery 26µA @ Ue = +12V
R5 220µ 220µ
C3 C4
runs flat at midnight you’ve got a long 63V 63V

220k
2SJ221
wait before the sun comes up again. The 1n 3n3 2SJ174
100V
20A
basic requirement was to make an effi- 0Ω22
D1 D2
cient step-down converter to power low
voltage equipment; the final design BAT46 C2 BAT46
shown here accepts a wide input voltage

from 9 to 60 V with an output current of
500 mA. The efficiency is very good
+3V3
IC1
L1
* +5V
R2 T1
3 7 ≈110mH
even with a load of 1 mA the design is 100k
6 D4 1 Ω
≤ 500mA
TL061
still better than a standard linear regula- 2
BS170
tor. The low quiescent current (200 µA) 4 SB360
SB160
also plays a part in reducing losses. R4 C8 C9

Some of the components specified (par- 100k


R3.A R3.B C5 220µ 220µ
ticularly the power MOSFET) are not the D5 C1 10V 10V
330k

470k

most economical on the market but they 10n

have been deliberately selected with effi- 3V3


ZRC330A01
100n

ciency in mind.
When power is applied to the circuit a * see text 050264 - 11

reference voltage is produced on one


side of R2. D1 connects this to the sup-
ply (pin 7) of IC1 to provide power at which conducts and effectively shorts out put voltage is required. The output volt-
start-up. Once the circuit begins switch- the gate capacitance of T3 thereby age must be a minimum of 1 V below
ing and the output voltage rises to 5 V, improving its switch off time. the input voltage and the output has a
D2 becomes forward biased and pow- The switching frequency is not governed minimum value of 4 V because of the
ers the IC from the output. Diode D1 by a fixed clock signal but instead by the supply to IC1.
becomes reverse biased reducing current load current; with no load attached the A maximum efficiency of around 90 %
through R1. When the circuit is first pow- circuit oscillates at about 40 Hz while at was achieved with this circuit using an
ered up the voltage on pin 2 of IC1 is 500 mA it runs at approximately 5 input voltage between 9 and 15 V and
below the reference voltage on pin 3, kHz. The variable clock rate dictates that supplying a current greater than 5 mA,
this produces a high level on output pin the output inductor L1 needs to have the even with an input voltage of 30 V the
6. The low power MOSFET T1 is relatively high value of 100 mH. circuit efficiency was around 80 %. If the
switched on which in turn switches the The coil can be wound on ferrite core circuit is used with a relatively low input
power MOSFET T3 via R5 and the material with a high AL value to allow the voltage efficiency gains can be made by
speed-up capacitor C4, the output volt- smallest number of turns and produce the replacing D4 with a similar device with a
age starts to rise. lowest possible resistance. Ready-made lower reverse breakdown voltage rating,
When the output approaches 5 V the coils of this value often have a resistance these devices tend to have a smaller for-
voltage fed back to the inverting input of greater than 1 Ω and these would only ward voltage drop which reduces losses
IC1 becomes positive with respect to the be suitable for an output load current of in the diode at high currents. At higher
non inverting input (reference) and less than 100 mA. input voltage levels the value of resistor
switches the output of IC1 low. T1 and The voltage divider ratio formed by R4 R1 can be increased proportionally to
T3 now switch off and C3 transfers this and R3 sets the output voltage and these reduce the quiescent current even further.
negative going edge to the base of T2 values can be changed if a different out- (050264-1)

2 elektor electronics - 7-8/2006

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