Name of Subject : 8051 -Microcontroller

Subject Code : 17EE3503

UNIT -I
 Embedded System
The word embedded means it is built into the system. It is a permanent part in a bigger system
An embedded system is some combination of computer hardware and software, either fixed in
capability or programmable, that is specifically designed for a particular function. Industrial
machines, automobiles, medical equipment, cameras, household appliances, airplanes, vending
machines and toys (as well as the more obvious cellular phone and PDA) are among the myriad
possible hosts of an embedded system. Embedded systems that are programmable are provided
with programming interfaces, and embedded systems programming is a specialized occupation.

Examples of embedded systems

Embedded systems are used everywhere in modern life, including:

• Telecommunications systems uses them for telephones, cell phone network, and wi-
fi routers.
• Consumer electronics include clock radios, MP3 players, mobile phones, video game
consoles, digital cameras, DVD players, GPS receivers, home security systems, and printers.
• Household appliances, like microwave ovens, washing machines and dishwashers have
embedded systems.
• Transportation uses embedded systems for everything from locomotives for
trains, airplanes and automobiles.
• Industry uses electric motors with electronic controllers, card readers and CNC machines
which automatically make metal parts.
• Medical devices like defibrillators, automated blood pressure readers, and automated insulin
pumps.
• Military devices, like walkie-talkies, satellites and the guiding systems for missiles.

Common features

• Embedded systems are designed to do a specific task, unlike general-purpose computers.

• It does not look like a computer - there may not be a full monitor or a keyboard.
• Many embedded systems must be able to do things in real-time - in a short amount of time
(almost instantly from a human view).
• Many embedded systems must be very safe and reliable, especially for medical devices
or avionics controlling airplanes.
• Starts very quickly. People don't want to wait a minute or two for their car to start or
emergency equipment to start.
• It may use a special operating system (or sometimes a very small home-made OS) that helps
meet these requirements called a real-time operating system, or RTOS.
• The program instructions written for embedded systems are referred to as firmware, and are
stored in read-only memory or flash memory chips. They run with limited computer
hardware resources: little memory, small or non-existent keyboard and/or screen.
Embedded systems are not always standalone devices. Sometimes they are built as a set, like the
various parts of a car - the radio, the throttle control, the pollution control, etc. Sometimes they
can communicate to the internet or a cell-phone network and they may have a USB reader or
other connections.

S NO Harvard architectures Von-Neumann architectures

1 Harvard architecture has separate A von Neumann architecture has only one
data and instruction busses bus which is used for both data transfers and
instruction fetches,
2 It is allowing transfers to be The data transfers and instruction fetches
performed simultaneously on both must be scheduled - they can not be
busses performed at the same time.
3 It is possible to have two separate Von Neumann architectures usually have
memory systems for a Harvard a single unified cache, which stores both
architecture. As long as data and instructions and data.
instructions can be fed in at the same
time
4 There is separate pair of address and Only one Pair of address and data bus
data buses for RAM and ROM
5 In Harvard architecture, the CPU is In Von-Neumann architecture, there is no
connected with both the data memory separate data and program memory. Instead,
 (RAM) and program memory a single memory connection is given to the
(ROM), separately. CPU.

6 It requires more hardware since it In contrast to the Harvard architecture, this

will be requiring separate data and requires less hardware since only a common
address bus for each memory. memory needs to be reached.
7 This requires more space. Von-Neumann Architecture requires less
space.
8 Speed of execution is faster Speed of execution is slower since it cannot
because the processor fetches data fetch the data and instructions at the same
and instructions simultaneously time.
9 It results in wastage of space since if Space is not wasted because the space of the
the space is left in the data memory data memory can be utilized by the
then the instructions memory cannot instructions memory and vice-versa.
use the space of the data memory and
vice-versa.
10 Controlling becomes complex since Controlling becomes simpler since either
data and instructions are to be fetched data or instructions are to be fetched at a
simultaneously. time.

Features of 8051 Microcontroller:

1. It is 40 pin integrated electronic circuit, out of 32 pins are input/output pins ,those are
devided into 4 ports Port 0,1,2,3. Except Port 1 all other are multi function pins.
2. It is a 8-bit microcontroller that means it do operation at time on 8-bit directly.
3. It has 8 data lines D7-D0 and 16 address line A15-A0. Using 16 lines it can access 216=64
KB of external memory.
4. It has 128 Bytes of On chip RAM (Data memory)
5. It has 4K Bytes of On chip ROM (Program memory memory)
6. It has two 16-bit multi mode Timer/counter.
7. It has 8-bit full duplex serial port UART(Universal Asynchronouse Receiver and
Transmiter)
8. It has 5 intrrupt sources excluding Rest
Two hardware intrrupts INT0,INT1
Three internal peripharal intrrupts Timer0.Timer1 and serial port intrrupt.

8051 Family :

Feature/IC NO 8031 8051 8751 8032 8032 8752

Program None 4K ROM 4K None 8K ROM 8K

Memory EPROM EPROM
Data Memory 256 B
128 B 128 B 128 B 256 B 256 B
I/O Ports 32
32 32 32 32 32
Timer/Counter
2 2 2 3 3 3
16-bit
Serial Port 1
1 1 1 1 1
Intrrupt
Sources
5 5 5 6 6 6
(RESET Not
included)

PIN Diagram of 8051

XTAL1 and XTAL2:
These are two I/P line for on-chip oscillator and clock generator circuit. A resonant network as quartz
crystal is connected between these two pin. 8051 microcontroller also drives from external clock,
then XTAL2 is used to drive 8051 from external clock and XTAL1 should be grounded.

The 8051 has an on-chip oscillator but requires an external clock to run it. Most often a quartz
crystal oscillator is connected to inputs XTAL1 (pin 19) and XTAL2 (pin 18). The quartz crystal
oscillator connected to XTAL1 and XTAL2 also needs two capacitors of 30 pF value. One side
of each capacitor is connected to the ground as shown in Figure
It must be noted that there are various speeds of the 8051 family. Speed refers to the maximum
oscillator frequency connected to XTAL. For example, a 12-MHz chip must be connected to a
crystal with 12 MHz frequency or less. Likewise, a 20-MHz microcontroller requires a crystal
frequency of no more than 20 MHz. When the 8051 is connected to a crystal oscillator and is
powered up, we can observe the frequency on the XTAL2 pin using the oscilloscope. The 8051
can designed to operate from 4MHz to 30 MHz .The general consideration of frequency is
11.0592 MHz (to compatible to PC)

Machine cycle and crystal frequency :

The 8051 uses one or more machine cycles to execute an instruction. The period of machine
cycle varies among the different versions of 8051 from 12 clocks to other. The frequency of the
crystal oscillator connected to the XTAL1 – XTAL2 pins dictates the speed of the clock used in
the machine cycle.
RST (Reset):

Pin 9 is the RESET pin. It is an input and is active high (normally low). Upon applying a high
pulse to this pin, the microcontroller will reset and terminate all activities. This is often referred
to as a power-on reset. Activating a power-on reset will cause all values in the registers to be
lost. It will set program counter to all Os

Activating a power-on reset will cause all values in the registers to be lost. Following Table
provides a partial list of 8051 registers and their values after power-on reset. From Table 8-2 we
note that the value of the PC (program counter) is 0 upon reset, forcing the CPU to fetch the first
opcode from ROM memory location 0000. This means that we must place the first byte of
opcode in ROM location 0 because that is where the CPU expects to find the first instruction.

RESET Value of Some 8051 Registers:

Register After Reset
PC 0000
DPTR 0000
ACC 00
PSW 00
SP 07
B 00
P0-P3 FF

Power ON RESET circuit :

.
Momentary switch for reset circuitry:

In order for the RESET input to be effective, it must have a minimum duration of two machine
cycles. In other words, the high pulse must be high for a minimum of two machine cycles before
it is allowed to go low. Here is what the Intel manual says about the Reset circuitry: “When
power is turned on, the circuit holds the RST pin high for an amount of time that depends on the
capacitor value and the rate at which it charges. To ensure a valid reset the RST pin must be held
high long enough to allow the oscillator to start up plus two machine cycles.” Although, an 8.2K-
ohm resistor and a 10-uF capacitor will take care of the vast majority of the cases, you still need
to check the data sheet for the 8051 you are using.
EA (bar) :

EA. which stands for “external access,” is pin number 31 in the DIP packages. It is an input pin
and must be connected to either Vcc or GND. In other words, it cannot be left unconnected .The
8051 family members, all come with on-chip ROM to store programs. In such cases, the EA pin
is connected to Vcc . For family members such as the 8031 and 8032 in which there is no on-chip
ROM. code is stored on an external ROM and is fetched by the 8031/32. Therefore, for the 8031
the EA pin must be connected to GND to indicate that the code is stored externally.

PSEN(bar)]:
It is active low O/P signal. It is used to enable external program memory (ROM). When
[PSEN(bar)]= 0, then external program memory becomes enabled and microcontroller read
content of external memory location. Therefore it is connected to (OE) of external ROM. It is
activated twice every external ROM memory cycle.
ALE: :
Address latch enable: It is active high O/P signal. When it goes high, external address latch
becomes enabling and lower address of external memory (RAM or ROM) latched into it. Thus it
separates or demultiplex A0-A7 address from AD0-AD7. It provides properly timed signal to
latch lower byte address. The ALE is activated twice in every machine cycle. If external RAM &
ROM is not accessed, then ALE is activated at constant rate of 1/6 oscillator frequency, which
can be used as a clock pulses for driving external devices.

Ports 0, 1, 2 and 3

The four ports PO, PI, P2, and P3 each use 8 pins, making them 8-bit ports. All the ports upon
RESET are configured as input, since PO – P3 have value FFH on them. The following is a
summary of features of PO – P3

Port 0 with Pull-Up Resistors:

Port 0 is also designated as ADO – AD7, allowing it to be used for both address and data. The
8051 multiplexes address and data through port 0 to save pins. ALE indicates if PO has address
or data. When ALE = 0. it provides data DO – D7. but when ALE = 1 it has address AO -A”.
Therefore. ALE is used for de multiplexing address and data with the help of a “4LS373 latch, as
we will see in Chapter 14. In the 8051-based systems where there is no external memory
connection, the pins of PO must be connected externally to a 1 OK-ohm pull-up resistor. This is
due to the fact that PO is an open drain, unlike PI. P2. and P3. Open drain is a term used for
MOS chips in the same way that open collector is used for TTL chips. In many systems using the
8751. 89C51. or DS89C4xO chips, we normally connect PO to pull-up resistors. See Figure With
external pull-up resistors connected to PO, it can be used as a simple I/O port, just like PI and P2.
In contrast to port 0, ports PI, P2, and P3 do not need any pull-up resistors since they already
have pull-up resistors internally. Upon reset, ports PI, P2, and P3 are configured as input ports.

Port 1 and Port 2 :

In 8051-based systems with no external memory connection, both PI and P2 are used as simple
I/O. However, in 8031/51-based systems with external memory connections, port 2 must be used
along with PO to provide the 16-bit address for the external memory. As shown in Figure , port 2
is also designated as A8 – A15, indicating its dual function. Since an 8031/51 is capable of
accessing 64K bytes of external memory, it needs a path for the 16 bits of the address. While PO
provides the lower 8 bits via AO – A7, it is the job of P2 to provide bits A8 – A15 of the address.
In other words, when the 8031/51 is connected to external memory, P2 is used for the upper 8
bits of the 16-bit address, and it cannot be used for I/O.
From the discussion so far, we conclude that in systems based on 8051 microcontrollers, we have
three ports, PO, PI, and P2, for I/O operations. This should be enough for most microcontroller
applications. That leaves port 3 for interrupts as well as other signals, as we will see next.

Port 3:

Port 3 occupies a total of 8 pins, pins 10 through 17. It can be used as input or output. P3 does
not need any pull-up resistors, the same as PI and P2 did not. Although port 3 is configured as an
input port upon reset, this is not the way it is most commonly used. Port 3 has the additional
function of providing some extremely important signals such as interrupts. Table provides these
alternate functions of P3. This information applies to both 8051 and 8031 chips.

P3.0 and P3.1 are used for the RxD and TxD serial communications signals. Bits P3.2 and P3.3
are set aside for external interrupts, and are discussed in Chapter 11. Bits P3.4 and P3.5 are used
for Timers 0 and 1, and are discussed in Chapter 9. Finally, P3.6 and P3.7 are used to provide the
WR and RD signals of external memory connections.. In systems based on the 8051, pins 3.6 and
3.7 are used for I/O while the rest of the pins in port 3 are normally used in the alternate function
role.
Table : Port 3 Alternate Functions

P3 Pin Function Pin

P3.0 RxD
P3.1 TxD
P3.2 INT0 (bar)
P3.3 IN TI (bar)
P3.4 T0
P3.5 T1
P3.6 WR (bar)
P3.7 RD (bar)

Port 3(p3.0 to port 3.7):

It is 8-bit I/O port. In an alternating function each pins can be used as a special function I/O pin.

P3.0-RxD:
It is an Input signal. Through this I/P signal microcontroller receives serial data of serial
communication circuit.
P3.1-TxD: It is O/P signal of serial port. Through this signal data is transmitted.

P3.2- (INT0):It is external hardware interrupt I/P signal. Through this user, programmer or
peripheral interrupts to microcontroller.
P3.3-(INT1):It is external hardware interrupt I/P signal. Through this user, programmer or
peripheral interrupts to microcontroller.

P3.4- T0:It is I/P signal to internal timer-0 circuit. External clock pulses can connects to timer-0
through this I/P signal.
P3.5-T1:It is I/P signal to internal timer-1 circuit. External clock pulses can connects to timer-1
through this I/P signal.
P3.6-[WR(bar)]: It is active low write O/P control signal. During External RAM (Data memory)
access it is generated by microcontroller. when [WR(bar)]=0, then performs write operation.
P3.7-[RD(bar)]: It is active low read O/P control signal. During External RAM (Data memory)
access it is generated by microcontroller. when [RD(bar)]=0, then performs read operation from
external RAM.
Architecture of 8051:

Oscillator and clock generator:

All operations in a microcontroller are synchronized by the help of an oscillator clock. The
oscillator clock generates the clock pulses by which all internal operations are synchronized. A
resonant network connected through pins XTAL1 and XTAL2 forms up an oscillator. For this
purpose a quartz crystal and capacitors are employed. The crystal run at specified maximum and
minimum frequencies typically at 1 MHz to 16MHz.
ALU:

It is 8 bit unit. It performs arithmetic operation as addition, subtraction, multiplication, division,

increment and decrement. It performs logical operations like AND, OR and EX-OR. It
manipulates 8 bit and 16 bit data. It calculates address of jump locations in relative branch
instruction. It performs compare, rotate and compliment operations. It consists of Boolean
processor which performs bit, set, test, clear and compliment. 8051 micro controller contains 34
general purpose registers or working registers.2 of them are called math registers A & B and 32
are bank of registers.

Accumulator (A-reg): It is 8 bit register. Its address is E0H and it is bit and byte accessible.
Result of arithmetic & logic operations performed by ALU is accumulated by this register.
Therefore it is called accumulator register. It is used to store 8 bit data and to hold one of
operand of ALU units during arithmetical and logical operations. Most of the instructions are
carried out on accumulator data. It is most versatile of 2 CPU registers.

B-register: It is special 8 bit math register. It is bit and byte accessible. It is used in conjunction
with A register as I/P operand for ALU. It is used as general purpose register to store 8 bit data.

PSW (Program Status Word): It is 8 bit register. Its address is D0H and It is bit and byte
accessible. It has 4 conditional flags or math flags which sets or resets according to condition of
result. It has 3 control flags, by setting or resetting bit required operation or function can be
achieved. The format of flag register is as shown below:

i. MATH FLAG:
1. Carry Flag(CY): During addition and subtraction any carry or borrow is generated
then carry flag is set otherwise carry flag resets. It is used in arithmetic, logical, jump,
rotate and Boolean operations.
2. Auxiliary carry flag(AC): If during addition and subtraction any carry or borrow is
generated from lower 4 bit to higher 4 bit then AC sets else it resets. It is used in BCD
arithmetic operations.
3. Overflow flag(OV): If in signed arithmetic operations result exceeds more than 7 bit
than OV flag sets else resets.It is used in signed arithmetic operations only.
4. Parity flag(P): If in result, even no. Of ones "1" are present than it is called even
parity and parity flag sets. In result odd no. Of ones "1"are present than it is called odd
parity and parity flag resets.

ii. CONTROL FLAGS:

1. FO: It is user defined flag. The user defines the function of this flag. The user can set
,test clear this flag through software.
2. RS1 and RS0: These flags are used to select bank of register by resetting those flags
which are as shown below table.
 RS0 RS1 Bank Selection Address
0 0 Bank 0 00H-07H
0 1 Bank 1 08H-0FH
1 0 Bank 2 10H-17H
1 1 Bank 3 18H-1FH

Program counter(PC): The Program Counter (PC) is a 2-byte address which tells the 8051
where the next instruction to execute is found in memory. It is used to hold 16 bit address of
internal or external ROM locations. When the 8051 is initialized PC always starts at 0000h and it
is automatically increment to next instruction to execute. It is important to note that PC is always
increments but never decremented. This is the only register does not have address

Data pointer register(DTPR): It is a 16 bit register used to hold address of external or internal
ROM to point out the data. It is used to store 16 bit data. It is divided into2- 8bit registers, DPH-
data pointer higher order (83H) and DPL-data pointer lower order (82H). Each register can be
used as general purpose register to store 8 bit data and can also be used as memory location.
DPTR does not have single internal address. It functions as Base register in base relative
addressing mode and in-direct jump.

Stack : Stack is a portion of memory to store and retrieve address of next instruction and data
( i.e Program Counter) while executing branching and interrupt Service Routine. Stack is
portion of internal RAM in 8051 starts from the address 07H. User can also change it starting
address by programming SP register. Example To start stack for 20H of RAM write instruction
as MOV SP,#20H
Stack pointer (SP): It is 8-bit register. It is byte addressable. Its address is 81H. It is used to
hold the internal RAM memory location addresses which are used as stack memory. When the
data is to be placed on stack by PUSH instruction, the content of stack pointer is incremented by
1, and then data pushes into stack memory . Data is retrieved by POP Instruction when data is
retrieved from stack, first the data popes and then stack pointer is decremented by 1 .

Special function Registers (SFR) :

The 8051 microcontroller has 11 SFR divided in 4 groups:
A. Timer/Counter register: 8051 microcontroller has 2-16 bit Timer/counter registers called
Timer-reg-T0 And Timer/counter Reg-T1.Each register is 16 bit register divide into lower and
higher byte register as shown below: These register are used to hold initial no. of count. All of
the 4 register are byte addressable.

1. Timer control register: 8051 microcontroller has two 8-bit timer control register i.e.
TMOD and TCON register. TMOD Register: it is 8-bit register. Its address is 89H. It
is byte addressable. It used to select mode and control operation of time by writing
control word.
2. TCON register: It is 8-bit register. Its address is 88H. It is byte addressable. Its MSB
4-bit are used to control operation of timer/ counter and LSB 4-bit are used for external
interrupt control.
3.TL0,TH0,TL1,TH1 : To load the count value
B. Serial data register: 8051 micro controller has 2 serial data register viz. SBUF and SCON.

1. Serial buffer register (SBUF): it is 8-bit register. It is byte addressable .Its address is
99H. It is used to hold data which is to be transferred / receive serially.
2. Serial control register (SCON): it is 8-bit register. It is bit/byte addressable. Its
address is 98H. The 8-bit loaded into this register controls the operation of serial
Communication.
C. Interrupt register: 8051 µC has 2 8-bit interrupt register.
1. Interrupt enable register (IE): it is 8-bit register. It is bit/byte addressable. Its
address is A8H.it is used to enable and disable function of interrupt.
2. Interrupt priority register (IP): It is 8-bit register. It is bit/byte addressable. Its
address is B8H. it is used to select low or high level priority of each individual
interrupts.
D. Power control register (PCON): it is 8-bit register. It is byte addressable .Its address is 87H.
its bits are used to control mode of power saving circuit, either idle or power down mode and
also one bit is used to modify baud rate of serial communication.

Bit 7 – SMOD

1 = Baud rate is doubled in UART mode 1, 2 and 3.

0 = No effect on Baud rate.

Bit 3:2 – GF1 & GF0:

These are general purpose bit for user.

Bit 1 – PD: Power Down

1 = Enable Power Down mode. In this mode, Oscillator clock turned OFF and both CPU and
peripherals clock stopped. Hardware reset can cancel this mode.

0 = Disable Power down mode.

Bit 0 – IDL: Idle

1 = Enable Idle mode. CPU clock turned off whereas internal peripheral module such as
timer, serial port, interrupts works normally. Interrupt and H/W reset can cancel this mode.

0 = Disable Idle mode.

Internal RAM

Internal RAM has memory 128-byte. See 8051 hardware for further internal RAM design.
Internal RAM is organized into three distinct areas: 32 bytes working registers from address 00h
to 1Fh 16 bytes bit addressable occupies RAM byte address 20h to 2Fh, altogether 128
addressable bits General purpose RAM from 30h to 7Fh.

Internal ROM

Data memory and program code memory both are in different physical memory but both have
the same addresses. An internal ROM occupied addresses from 0000h to 0FFFh. PC addresses
program codes from 0000h to 0FFFh. Program addresses higher than 0FFFh that exceed the
internal ROM capacity will cause 8051 architecture to fetch codes bytes from external program
memory

8051 Memory Organization :

• Internal RAM (128B- from 00H to 7FH)
• Internal ROM (4KB – from 0000h to 0FFFH)
• External RAM and ROM (64KB – from 0000H to FFFFH)

Internal RAM : Internal RAM divided into three classification

• Working Registers (32- from 00H to 1FH)
• Bit addressable Registers (16 – from 20H to 2FH)
• General-purpose Registers (80 – from 30H to 7FH)
Special Function Registors : This registers starts from the address 80H

External memory :

PSEN (Program Store Enable) : It is active low output control signal used to activate the
enable signal of the external ROM .It is activate foe every six oscillatory periods while reading
the external memory.
EA (External access) : It is active low signal when signal deactivate the program fetches from
0000H to 0FFFH are connected to internal ROM.
It is active the program fetches from 0000H to FFFFH are connected to external ROM.
Pull up resistor / Pull down resistor :

What are pull-up resistors :

Pull-up resistors are resistors used in logic circuits to ensure a well-defined logical level at a pin
under all conditions. As a reminder, digital logic circuits have three logic states: high, low and
floating (or high impedance). The high-impedance state occurs when the pin is not pulled to a
high or low logic level, but is left “floating” instead. A good illustration of this is an unconnected
input pin of a microcontroller. It is neither in a high or low logic state, and a microcontroller
might unpredictably interpret the input value as either a logical high or logical low. Pull-up
resistors are used to solve the dilemma for the microcontroller by pulling the value to a logical
high state, as seen in the figure. If there weren’t for the pull-up resistor, the MCU’s input would
be floating when the switch is open and brought down only when the switch is closed.

Pull-up resistors are not a special kind of resistors; they are simple fixed-value resistors
connected between the voltage supply (usually +5V) and the appropriate pin, which results in
defining the input or output voltage in the absence of a driving signal. A typical pull-up resistor
value is 4.7kΩ, but can vary depending on the application, as will be discussed later in this art

Let’s say you have an MCU with one pin configured as an input. If there is nothing connected to
the pin and your program reads the state of the pin, will it be high (pulled to VCC) or low (pulled
to ground)? It is difficult to tell. This phenomena is referred to as floating. To prevent this
unknown state, a pull-up or pull-down resistor will ensure that the pin is in either a high or low
state, while also using a low amount of current.
For simplicity, we will focus on pull-ups since they are more common than pull-downs. They
operate using the same concepts, except the pull-up resistor is connected to the high voltage (this
is usually 3.3V or 5V and is often refereed to as VCC) and the pull-down resistor is connected to
ground.
Pull-ups are often used with buttons and switches.
Input / Output Pins, Ports, and Circuits :

One major feature of a microcontroller is the versatility built into the input/output circuits that
connect the 8051 to the outside world. Microprocessor designs must add additional chips to
interface with external circuitry; this ability is built into the microcontroller.

To be commercially viable, the 8051 had to incorporate as many functions as were technically
and economically feasible. The main constraint that limits numerous functions is the number of
pins available to the 8051 circuit designers. The DIP has 40 pins, and the success of the design in
the market place was determined by the flexibility built into the use of these pins.

For this reason, 24 of the pins may each be used for one of two entirely different functions,
yielding a total pin configuration of 64. The function a pin performs at any given instant
depends, first, upon what is physically connected to it and, then, upon what software commands
are used to "program" the pin. Both of these factors are under the complete control of the 8051
programmer and circuit designer.Given this pin flexibility, the 8051 may be applied simply as a
single component with 1/0 only, or it may be expanded to include additional memory, parallel
ports, and serial data communication by using the alternate pin assignments. The key to
programming an alternate pin function is the port pin circuitry shown in Figure .

Each port has a D-type output latch for each pin. The SFR for each port is made up of these eight
latches, which can be addressed at the SFR address for that port. For instance, the eight latches
for port 0 are addressed at location 80h; port 0 pin 3 is bit 2 of the P0 SFR. The port latches
should not be confused with the port pins; the data on the latches does not have to be the same as
that on the pins.
The two data paths are shown in Figure by the circuits that read the latch or pin data using two
entirely separate buffers. The top buffer is enabled when latch data is read, and the lower buffer,
when the pin state is read. The status of each latch may be read from a latch buffer, while an
input buffer is connected directly to each pin so that the pin status may be read independently of
the latch state.

Different opcodes access the latch or pin states as appropriate. Port operations are determined by
the manner in which the 8051 is connected to external circuitry.

Programmable port pins have completely different alternate functions. The configuration of the
control circuitry between the output latch and the port pin determines the nature of any particular
port pin function. An inspection of Figure reveals that only port 1 cannot have alternate
functions; ports 0, 2, and 3 can be programmed.

Port 0

Port 0 pins may serve as inputs, outputs, or, when used together, as a bi-directional low order
address and data bus for external memory. For example, when a pin is to be used as an input, a 1
must be written to the corresponding port 0 latch by the program, thus turning both of the output
transistors off, which in turn causes the pin to "float" in a high impedance state, and the pin is
essentially connected to the input buffer .

When used as an output, the pin latches that are programmed to a 0 will turn on the lower FET,
grounding the pin. All latches that are programmed to a 1 still float; thus, external pull up
resistors will be needed to supply a logic high when using port 0 as an output.
When port 0 is used as an address bus to external memory, internal control signals switch the
address lines to the gates of the Field Effect Transistories (FETs). A logic 1 on an address bit
will turn the upper FET on and the lower FET off to provide a logic high at the pin. When the
address bit is a zero, the lower FET is on and the upper FET off to provide a logic low at the pin.
After the address has been formed and latched into external circuits by the Address Latch Enable
(ALE) pulse, the bus is turned around to become a data bus. Port 0 now reads data from the
external memory and must be configured as an input, so a logic 1 is automatically written by
internal control logic to all port 0 latches.

Port 1

Port 1 pins have no dual functions. Therefore, the output latch is connected directly to the gate of
the lower FET. which has an FET circuit labeled Internal FET Pullup as an active pullup load.

Used as an input. a 1 is written to the latch. turning the lower FET off; the pin and the input to
the pin buffer are pulled high by the FET load. An external circuit can overcome the high
impedance pullup and drive the pin low to input a 0 or leave the input high for a 1 .

If used as an output. the latches containing a 1 can drive the input of an external circuit high
through the pullup. If a 0 is written to the latch. the lower FET is on. the pullup is off. and the pin
can drive the input of the external circuit low.

To aid in speeding up switching times when the pin is used as an output. the internal FET pull up
has another FET in parallel with it. The second FET is turned on for two oscillator time periods
during a low-to-high transition on the pin. as shown in Figure 1. This arrangement provides a
low impedance path to the positive voltage supply to help reduce rise times in charging any
parasitic capacitances in the external circuitry.
Port 2

Port 2 may be used as an input/output port similar in operation to port 1. The alternate use of port
2 is to supply a high-order address byte in conjunction with the port 0 low-order byte to address
external memory.

Port 2 pins are momentarily changed by the address control signals when supplying the high byte
of a 16-bit address. Port 2 latches remain stable when external memory is addressed, as they do
not have to be turned around (set to 1) for data input as is the case for port 0 .

Port 3

Port 3 is an input/output port similar to port 1 . The input and output functions can be
programmed under the control of the P3 latches or under the control of various other special
function registers. The port 3 alternate uses are shown in the following table:
PIN ALTERNATE USE SFR
P3.0-RXD Serial data input SBUF
P3.1- TXD Serial data output SBUF
P3.2-INTO External interrupt 0 TCON.l
P3.3-INT1 External interrupt 1 TCON.3
P3.4- TO External timer 0 input TMOD
P3.5- T1 External timer 1 input TMOD
P3.6-WR External memory write pulse -
P3.7-RD External memory read pulse -

Unlike ports 0 and 2. which can have external addressing functions and change all eight port bits
when in alternate use. each pin of port 3 may be individually programmed to be used either as
110 or as one of the alternate functions.

.
 Addressing modes of 8051

There are 5 different ways to execute this instruction and hence we say, we have got 5 addressing
modes for 8051. They are 1) Immediate addressing mode 2) Direct addressing mode 3) Register
direct addressing mode 4) Register indirect addressing mode 5) Indexed addressing mode.

1. Immediate Addressing Mode :

Let’s begin with an example.

MOV A, #6AH

In general we can write MOV A, #data

This addressing mode is named as “immediate” because it transfers an 8-bit data immediately to
the accumulator (destination operand).

Here the data 6A is the operand, often known as source data. When this instruction is executed,
the data 6AH is moved to accumulator A.
The picture above describes the above instruction and its execution. The opcode for MOV A, #
data is 74H. The opcode is saved in program memory at 0202 address. The data 6AH is saved in
program memory 0203. (See, any part of the program memory can be used, this is just an
example) When the opcode 74H is read, the next step taken would be to transfer whatever data at
the next program memory address (here at 0203) to accumulator A (E0H is the address of
accumulator). This instruction is of two bytes and is executed in one cycle. So after the execution
of this instruction, program counter will add 2 and move to 0204 of program memory.

Note: The ‘#’ symbol before 6AH indicates that operand is a data (8 bit). If ‘#’ is not present
then the hexadecimal number would be taken as address.

2. Direct Addressing Mode :This is another way of addressing an operand. Here the
address of the data (source data ) is given as operand. Lets take an example.

MOV A, 04H

Here 04H is the address of register 4 of register bank#0. When this instruction is executed, what
ever data is stored in register 04H is moved to accumulator. In the picture below we can see,
register 04H holds the data 1FH. So the data 1FH is moved to accumulator.

Note: We have not used ‘#’ in direct addressing mode, unlike immediate mode. If we had
used ‘#’, the data value 04H would have been transferred to accumulator instead 0f 1FH.
As shown in picture above this is a 2 byte instruction which requires 1 cycle to complete.
Program counter will increment by 2 and stand in 0204. The opcode for instruction MOV A,
address is E5H. When the instruction at 0202 is executed (E5H), accumulator is made active and
ready to receive data. Then program control goes to next address that is 0203 and look up the
address of the location (04H) where the source data (to be transferred to accumulator) is located.
At 04H the control finds the data 1F and transfers it to accumulator and hence the execution is
completed.

3. Register Direct Addressing Mode :

In this addressing mode we use the register name directly (as source operand). An example is
shown below.

MOV A, R4

At a time registers can take value from R0,R1…to R7. You may already know there are 32 such
registers. So how you access 32 registers with just 8 variables to address registers? Here comes
the use of register banks. There are 4 register banks named 0,1,2 and 3. Each bank has 8 registers
named from R0 to R7. At a time only one register bank can be selected. Selection of register
bank is made possible through a Special Function Register (SFR) named Processor Status Word
(PSW). PSW is an 8 bit SFR where each bit can be programmed. Bits are designated from
PSW.0 to PSW.7 Register banks are selected using PSW.3 and PSW.4 These two bits are known
as register bank select bits as they are used to select register banks. A picture below shows the
PSW register and the Register Bank Select bits with status.
So in register direct addressing mode, data is transferred to accumulator from the register (based
on which register bank is selected).

Take a look at the picture below.

So we see that opcode for MOV A, R4 is EC. The opcode is stored in program memory address
0202 and when it is executed the control goes directly to R4 of the respected register bank (that
is selected in PSW). If register bank #0 is selected then the data from R4 of register bank #0 will
be moved to accumulator. (Here it is 2F stored at 04 H). 04 H is the address of R4 of register
bank #0. Movement of data (2F) in this case is shown as bold line. Now please take a look at the
dotted line. Here 2F is getting transferred to accumulator from data memory location 0C H. Now
understand that 0C H is the address location of Register 4 (R4) of register bank #1. Programmers
usually get confused with register bank selection. Also keep in mind that data at R4 of register
bank #0 and register bank #1 (or even other banks) will not be same. So wrong selection of
register banks will result in undesired output.
Also note that the instruction above is 1 byte and requires 1 cycle for complete execution. This
means using register direct addressing mode can save program memory.

4.Register Indirect Addressing Mode :

So in this addressing mode, address of the data (source data to transfer) is given in the register
operand.

MOV A, @R0

Here the value inside R0 is considered as an address, which holds the data to be transferred to
accumulator.

Example: If R0 holds the value 20H, and we have a data 2F H stored at the address 20H, then
the value 2FH will get transferred to accumulator after executing this instruction. Got
it? See the picture below.
So the opcode for MOV A, @R0 is E6H. Assuming that register bank 0 is selected. So the R0
of register bank #0 holds the data 20H. Program control moves to 20H where it locates the data
2FH and it transfers 2FH to accumulator.
This is a single byte instruction and the program counter increments 1 and moves to 0203 of
program memory.
Note: Only R0 and R1 are allowed to form a register indirect addressing instruction. In other
words programmer can must make any instruction either using @R0 or @R1. All register banks
are allowed.

5.Indexed Addressing Mode : Well lets see two examples first.

MOVC A, @A+DPTR and MOVC A, @A+PC
where DPTR is data pointer and PC is program counter (both are 16 bit registers). Lets take the
first example.
MOVC A, @A+DPTR

What’s the first impression you have now? The source operand is @A+DPTR and we know
we will get the source data (to transfer) from this location. It is nothing but adding contents of
DPTR with present content of accumulator. This addition will result a new data which is taken as
the address of source data (to transfer). The data at this address is then transferred to
accumulator. Take a look at the picture below.
The opcode for the instruction is 93H. DPTR holds the value 01FE, where 01 is located in DPH
(higher 8 bits) and FE is located in DPL (lower 8 bits). Accumulator now has the value 02H. A
16 bit addition is performed and now 01FE H+02 H results in 0200 H. What ever data is in 0200
H will get transferred to accumulator. The previous value inside accumulator (02H) will get
replaced with new data from 0200H. New data in the accumulator is shown in dotted line box.
This is a 1 byte instruction with 2 cycles needed for execution. What you infer from that? The
execution time required for this instruction is high compared to previous instructions (which all
were 1 cycle).
The other example MOVC A, @A+PC works the same way as above example. The only
difference is, instead of adding DPTR with accumulator, here data inside program counter (PC)
is added with accumulator to obtain the target address.
I hope you now have a clear cut understanding of 8051 addressing modes. If you have any
doubts or need any additional clarifications, please post your comments below. I will answer
them.

External memory accesses:

8051 Data Types And Directives :
The 8051 microcontroller has only one data type. It is 8 bits, and the size of each register is also
8 bits. It is the job of the programmer to break down data larger than 8 bits (00 to FFH, or 0 to
255 in decimal) to be processed by the CPU.

DB (define byte)

The DB directive is the most widely used data directive in the assembler. It is used to define the
8-bit data. When DB is used to define data, the numbers can be in decimal, binary, hex, or ASCII
formats. For decimal, the “D” after the decimal number is optional, but using “B” (binary) and
“H” (hexadecimal) for the others is required. Regardless of which is used, the assembler will
convert the numbers into hex. To indicate ASCII, simply place the characters in quotation marks
(‘like this’). The assembler will assign the ASCII code for the numbers or characters
automatically. The DB directive is the only directive that can be used to define ASCII strings
larger than two characters; therefore, it should be used for all ASCII data definitions. Following
are some DB examples:

ORG 500H

DATA1 : DB 28 ; Decimal

DATA1 : DB 00110101B ; Binary

DATA1 : DB 39H ; Hexa

ORG 510H

DATA1 : DB “25” ; ASCII number

ORG 520H

DATA1 : DB “My name is joe” ;ASCIICharacter

Either single or double quotes can be used around ASCII strings. This can be useful for strings,
which contain a single quote such as “O’Leary”. DB is also used to allocate memory in byte-
sized chunks.

Assembler directives : The following are some more widely used directives of the 8051.

ORG (origin) : The ORG directive is used to indicate the beginning of the address. The number
that comes after ORG can be either in hex or in decimal. If the number is not followed by H, it is
decimal and the assembler will convert it to hex. Some assemblers use “. ORG” (notice the dot)
instead of “ORG” for the origin directive. Check your assembler.

EQU (equate) :This is used to define a constant without occupying a memory location. The
EQU directive does not set aside storage for a data item but associates a constant value with a
data label so that when the label appears in the program, its constant value will be substituted for
the label. The following uses EQU for the counter constant and then the constant is used to load
the R3 register.
COUNT EQU 25
……… ………..
………. ………..
MOV R3,#COUNT

When executing the instruction “MOV R3, COUNT”, the register R3 will be loaded with the
value 25 (notice the # sign). What is the advantage of using EQU? Assume that there is a
constant (a fixed value) used in many different places in the program, and the programmer wants
to change its value throughout. By the use of EQU, the programmer can change it once and the
assembler will change* all of its occurrences, rather than search the entire program trying to find
every occurrence.

END directive

Another important pseudocode is the END directive. This indicates to the assembler the end of
the source (asm) file. The END directive is the last line of an 8051 program, meaning that in the
source code anything after the END directive is ignored by the assembler. Some assemblers use
“. END” (notice the dot) instead

of “END”.

Rules for labels in Assembly language

By choosing label names that are meaningful, a programmer can make a program much easier to
read and maintain. There are several rules that names must follow. First, each label name must
be unique. The names used for labels in Assembly language programming consist of alphabetic
letters in both uppercase and lowercase, the digits 0 through 9, and the special characters
question mark (?), period (.), at (@), underline (_), and dollar sign ($). The first character of the
label must be an alphabetic character. In other words it cannot be a number. Every assembler has
some reserved words that must not be used as labels in the program. Foremost among the
reserved words are the mnemonics for the instructions. For example, “MOV” and “ADD” are
reserved since they are instruction mnemonics. In addition to the mnemonics there are some
other reserved words. Check your assembler for the list of reserved words.