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Whcamacho - It150-8 Chapter4 SG
Whcamacho - It150-8 Chapter4 SG
Whcamacho - It150-8 Chapter4 SG
FOPI01
Chapter4_SG
Answer: Retrieving program instructions requires comprehension, elucidation, and carrying out
the specified series of actions on the right data. The data route and control unit of the CPU are separated.
The basic structure of the data stream is a sophisticated network of arithmetic and logic units
(ALU) and storage units coupled by buses, the timing of which is dictated by the CPU clock. The control
unit is responsible for overseeing the activities' chronological sequence and ensuring that the proper data
arrive at the right location at the right time.
Answer: Ensures that the activities are carried out in the proper sequence and that the
appropriate data is available when and where it is needed.
Thus, the control unit is ultimately in charge of ensuring that the proper actions are being
performed on the correct data.
3. Where are registers located and what are the different types?
Answer: The smallest and quickest type of computer memory is called register memory. The
smallest data holding units, known as registers, are found in the CPU and are not a part of the main
memory. A register serves as a temporary storage location for the CPU's commonly used data,
instructions, and memory addresses.
A. MDR
-Memory Data Register is the full form of MDR. The data that will be saved or fetched from
the computer's memory is kept in the memory data register, i.e. Access Memory Randomly
(RAM). The memory data register's primary function is to serve as a buffer by storing
everything that may be copied from computer memory and being used by the CPU for
subsequent operations.
B. Accumulator
- The central processing unit registers are a class of processor registers that are frequently
utilized to change the operand's address during program execution. The index register is
frequently used to perform operations on arrays or vectors.
C. Instruction Register
-The instructions that are now being performed or that will be decoded are stored in the
instruction register, another sort of central processing unit register. Each instruction is stored
in the instruction register of the processor before being executed by the processors. The
instructions can be carried out in a single step or in a number of phases.
4. How does the ALU know which function to perform?
Answer: A register is a tiny storage space that is a component of a CPU. The ALU receives
instructions from the control unit on what operation to do on the data, and it then saves the outcome in
an output register. The data is transferred between these registers, the ALU, and memory via the control
unit.
Answer: Why is a bus a common communication stumbling block? A bus is a shared yet common
data channel that connects several system subsystems. The parallel transport of bits is made possible by
the several lines. However, the bus can only be used by one device at a time.
Answer: A bus is a group of cables that link several subsystems together inside a system. A point-
to-point bus can link two particular components. It is possible to provide a dedicated connection between
the two. Although it is more costly, this is quicker.
The bus can link several devices that are communicating with one another. In this scenario, the
bus is being used as a shared route. This is additionally known as a multipoint bus. Although this
connection type is undoubtedly cost-effective, its performance may suffer.
Answer: The bus may occasionally link several devices that are communicating with one another
and serving as a common path. The bus is shared in this case. The bus protocol is necessary to organize
the sharing of the bus.
The lines that carry data are known as data buses, whilst the lines that carry signals allowing other
devices to take control of the bus are known as control lines. The location on the memory that data must
be written to or retrieved from is determined by the address lines. Additionally, the power lines supply
the electricity required for the system's proper operation.
All administrative tasks related to the microprocessor are carried out through the bus protocol.
8. Explain the differences between data buses, address buses, and control buses.
Answer: Data bus refers to a set of lines used for data transmission. These hold the essential
information that must be transferred from one place to another. From one register to the next or from a
register to the ALU and back, the data is sent in binary form. They are controlled by a clock in terms of
time.
The bus is frequently shared by more than two devices. Here, it is necessary to decide which
device will commandeer the bus and start data transfer. The control lines transmit pulses that serve as
signals for devices to be authorized to take over a bus. Additionally passed are signals for clock
synchronization, interruptions, and bus request acknowledgements.
The location of the data in memory that has to be read from or written to is determined by the
address lines. Finally, the electrical power required for general operation is provided via the power lines.
9. What is a bus cycle?
Answer: The primary tasks that a bus carries out include sending an address (for read/write) and
transporting data to and from memory and registers. Additionally, they read and write data from a range
of I/O peripheral devices.
Concurrent execution of these tasks is not feasible. The operations must be given their own
designated timeslots. The timeslot, which is essentially the interval between two ticks of the clock, is
defined by a bus cock.
10. Name three different types of buses and where you would find them.
Answer:
•The CPU in a computer system transfers the data down the paths.
All the other components on the motherboard are connected by that route. Buses are the names for the
interconnected routes.
•External buses transport data to peripherals connected to the motherboard as well as to other devices.
All of the internal parts of the computer system are connected through the internal bus. These are the
computer system's memory bus, backplane bus, or system bus.
•Processor-memory buses are short and have a high speed. To maximize bandwidth, they are synced with
the machine's memory in terms of time and breadth. These buses' architecture accomplishes a very
specific purpose.
•I/O buses typically have a longer length than processor-memory buses. They are compatible with a
variety of architectures and can interface with devices that span a variety of bandwidths.
Backplane buses are considered to be the third category of bus. These are so-named because they are
built into the hardware and operate as a single point of contact for the CPU, I/O, and memory.
To move data from the CPU to the memory, three different types of buses are used:
• Bus address
Bus Control
The paths to all the other motherboard components are connected by these buses.
It is the most prevalent kind of bus. It distributes the data from the computing system to every other
motherboard component.
•It moves information among the peripheral devices, the CPU, and the memory.
•The number of lines in the data bus has an impact on how quickly data is sent.
The data buses can be used by the CPU to read and write data.
Bus Address:
•The compute must have access to it in order to quickly access every character in the memory.
The address bus is utilized to indicate that component address in order to communicate.
•It transfers the memory location address from the main memory to the processor through the address
bus.
Control bus:
•It transfers the information at the speed of a billion characters per second.
•It reads, writes, and performs the actions and after execution, the result will be sent back to the memory.
•It transmits the control signal to read and write data in the process of execution.
11. What is the difference between synchronous buses and nonsynchronous buses?
Answer: The fundamental distinction between synchronous and non-synchronous buses is precise
usage guidelines, timing and signaling requirements, and connection standards.
The buses are managed by the system clock. Only at the time of a clock tick, which synchronizes all bus-
using devices, can a data transfer take place.
The proper operation of the clock is therefore extremely important to the system. The system is
vulnerable to failure when the clock performs inconsistently. The length of the vehicle is kept to a
minimum to reduce these variations.
•The bus length is restricted by the need that the amount of time needed for information to go
through the bus exceed the cycle time.
Timing is controlled via a thorough handshaking protocol. The protocol generally entails making
a request, fulfilling that request, and then acknowledging that the request has been fulfilled.
The benefit of using a protocol is that it can accommodate a larger range of devices since it can
scale better with technology.
12. Explain the difference between clock cycles and clock frequency.
Answer: The following are the primary variations between clock cycles and clock frequency:
Every computer has an internal clock that controls how quickly instructions may be carried out. The clock
synchronizes every component in the system.
•The CPU needs a variable amount of clock cycles to carry out each instruction. Additionally, the
effectiveness of instruction execution is assessed using clock cycles (not seconds).
•Gigahertz units are used to measure clock frequency (GHz). In essence, this represents the quantity of
clock ticks in a second.
•In contrast, the clock cycle time is the interval between two successive ticks.
Answer: Every computer has an internal clock that controls how quickly instructions are carried
out. The clock synchronizes every component of the system. Each instruction is carried out by the CPU
using a certain number of ticks.
The following are the main distinctions between system clocks and bus clocks:
•The CPU and other components are regulated by the system clock (including the buses). However, there
are certain bus clocks that self-regulate, or, to put it another way, run on their own clocks. System clocks
are often faster than bus clocks. This disparity in speed frequently results in bottlenecks.
Answer: I/O (Input/Output) devices let users interact with the computer system. Data transfer
between primary memory and other I/O peripheral devices is essentially what is meant by I/O. It's crucial
to remember that these components aren't linked up to the CPU directly.
Each system has an I/O interface that controls data flows. This interface converts system bus signals into
and out of a format that the target device can understand. The CPU communicates with the I/O devices
using I/O registers, which are intermediate storage devices.
15. Explain the difference between memory-mapped I/O and instruction-based I/O.
Answer: The I/O interface is responsible for converting system bus signals into and out of formats
that are compatible with each individual device. I/O registers are then used by the CPU to interface with
these devices.
I/O memory-mapped:
In this format, there is little distinction between accessing memory and an I/O device since the registers
in the interface are visible in the computer's memory map. Although it has the benefit of being quick, it
uses up too much memory.
The input and output operations in this format are carried out by dedicated instructions. Although
particular I/O instructions are needed for this format, RAM is not used for them. This suggests that it can
only be utilized by CPUs that can carry out these particular instructions. The main purpose of such
instructions is to inform the CPU when input or output is ready for usage.
16. What is the difference between a byte and a word? What distinguishes each?
Answer:
•You may think of memory as a matrix of bits. Either 0 or 1 can be stored in a bit.
•Since words are made up of bytes, their lengths must be multiples of 8 bits.
The primary differentiator is the CPU's ability to manage several bits at once. Memory is typically byte
addressed, meaning that each byte has a unique address. When a word contains more than one byte, the
word's total address is determined by the byte with the lowest address.
Answer:
Differences: