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Lab Activity No. 1
Lab Activity No. 1
Lab Activity No. 1
1
EXPERIMENT TITLE: BJT VOLTAGE DIVIDER BIAS
INTRODUCTION
The voltage divider bias configuration, like the emitter-stabilized fixed bias, also attempts to
minimize the differences in β from transistor to transistor. We are given values of the supply
voltage, VCC and the Q-point (IC and VCE) and the emitter voltage, VE and are required to find
suitable values for the four external resistors.
The voltage at the midpoint of the divider formed by R 1 and R2 is VB which is determined not by
R1 or R2 individually but by their ratio. Therefore, we may assign any convenient value to R 2 and
solve for the corresponding value of R2.
THEORY
A potential divider bias, also known as voltage divider bias, is a method used for the
dc biasing of bipolar junction transistors (BJT) in a simple amplifier circuit. The circuit usually
consists of biasing resistors in a voltage divider network whose values are determined through
circuit analysis.
Ohm's law is a law that states that the voltage across a resistor is directly proportional to the
current flowing through the resistance.
OBJECTIVES
MATERIALS/EQUIPMENT
Module EL1-H, Digital, Digital multimeter, Trainer set, Transistor (2N2222), power
supply and resistors.
PROCEDURE/PREPARATION
CONCLUSION:
The result of R2 Ω, RC Ω, RE Ω, and I2 mA using BJT Voltage Divider bias configuration
formulas shown in table 1.
The measured of I2 mA, IC mA, VCE V, and VE V using Digital Multi Tester shown in table
2.
FINDINGS:
Table 1:
VCC= 12V; IC= 5mA; VCE= 4V; VE= 2V ; VBE= 0.52V
Calculated Measured
R1 R2 RC RE I2 I2 IC VCE VE
25KΩ 6.7KΩ 1.2KΩ 400Ω 0.4mA 0.8mA 3.6mA 3.9V 1.7V
28KΩ 2.2KΩ 1.2KΩ 400Ω 1.15mA 1.2mA 3.7mA 4V 1.8V
Table 2:
Calculated Measured
R1 R2 RC RE I2 I2 IC VCE VE
25KΩ 15KΩ 400Ω 400Ω 0.3mA 0.5mA 3.7mA 3.8V 3.7
28KΩ 4.7KΩ 400Ω 400Ω 1mA 1mA 3.5mA 3.9V 3.8V