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1 2 3 4 5

MS-7204 Version 30
Intel (R) Lakeport (GMCH) + ICH7 Chipset
Title Page
Intel LGA775 Processor
COVER SHEET 1
CPU:
A A

BLOCK DIAGRAM 2
Intel LGA775 3,4,5 Intel - up to Conroe
Intel Lakeport 6,7,8,9
ICH7 10,11,12
System Chipset:
ICS954119DF Clock Gen 13 Intel Lakeport (945P)- GMCH (North Bridge)
LPC I/O - W83627DHF 14 Intel ICH7/7R/7DH (South Bridge)
FWH/FAN/SATA 15
LAN - INTEL 82562GZ/82573 16
On Board Chipset:
IEEE1394 VT-6308P 17 BIOS -- FWH EEPROM- 4M
B
Azalia CODEC-ALC888 18 Azalia Codec -- RLK- ALC888 7.1+2 channel B

Audio Jacks 19 LPC Super I/O -- W83627DHF


USB CONNECTORS 20 LAN - INTEL 82562GZ/82573
DDR II DIMM 1 & 2 Channel A 21 1394 -- VIA- VT6308P with PHY
DDR II DIMM 3 & 4 Channel B 22 CLOCK -- ICS954119DF
DDR II VTT Decoupling 23
BTX ,Front Panel,IDE 24
Main Memory:
PCI -Express X16 Slot & X1 Slot 25 DDR II * 4 (Max 4GB)
MS7 ACPI Controller 26
C
Intersil 6312 3Phase 27 Expansion Slots: C

PCI Slot 1,2 28


Misc 29
PCI EXPRESS X16 SLOT * 1
HISTORY 30
PCI EXPRESS X1 SLOT * 1
PCIRST & POWER OK MAP 31
PCI 2.3 SLOT * 2
POWER MAP 32
SATA *4
History 33
PCI Routing Table
Intersil PWM:
PCI Device IDSEL REQ/GNT INTERRUPT PCI CLK
Controller: HIP6312 3 Phase
PCI Slot 1 AD16 0 A PCI_CLK1
D
PCI Slot 2 AD17 1 B PCI_CLK0 D

AD20 3 E PCI_CLK3
(Add MEDION SPEC)
AD21 5 F PCI_CLK4
1394. AD19 4 D 1394_PCLK MICRO-START INT'L CO.,LTD.
Title
LAN (INTERNAL) AD24 MS-7204-30-060804K1
Size Document Number Rev
Custom COVER SHEET 3.0
Date: Friday, August 04, 2006 Sheet 1 of 33
1 2 3 4 5
1 2 3 4 5

VRM_GD
VTT_PWG

A
VRM 11
Intersil 6312 Intel LGA775 Processor Block Diagram A

VID_GD
3-Phase PWM
P.3~5

P.28

2 DDR II

FSB
H_CPURST#
H_PWRGD PWR_GD
CHANNEL A DIMM RSMRST#
Modules
PCIRST_SLOT# PCI MS7 HD_RST#
EXPRESS
X16 P.20

Connector
Lakeport-945P
P.15

2 DDR II PCIRST_SLOT#
PCIRST_BUF#
CHANNEL B DIMM
Modules
P.6~9
P.19 UltraDMA
B 33/66/100 P.21 B
PLRST#
IDE Primary

DMI
HD_RST# PWR_GD
VRM_GD
P.18

IDE Primary PCIRST_ICH7#


P.18
SLP_S4#

PCI Slot 1

PCI Slot 2
SERIAL ATA1
ICH7
P.18
PCI 1394
SERIAL ATA2
P.18 VIA VT6308P
SLP_S3#
P.26
P.10~12

PWR_OK
USB2.0 USB

USB Port0~ 7

LPC Bus
PCIRST_BUF#
C C
ATX1 P.23 P.23

P.25 RSMRST#

LPC SIO
RLK
W83627DHF
Azalia Codec
P.16

P.14

LAN LAN
Intel 82562EZ
P.17

FWH Keyboard Floopy Parallel Serial


P.30 P.14 P.14 P.18 P.18

SW_ON# FP_RST# Mouse


D P.14 D

JFP1 PCIRST_ICH6# MICRO-START INT'L CO.,LTD.


Title
MS-7204-30-060804K1
Size Document Number Rev
Custom BLOCK DIAGRAM 3.0
Date: Friday, August 04, 2006 Sheet 2 of 33
1 2 3 4 5
1 2 3 4 5

CPU SIGNAL BLOCK VID Pull-Up Resistor


VCC_VRM_SENSE
VCC_VRM_SENSE 27
C377
C10U6.3X51206
VSS_VRM_SENSE
VSS_VRM_SENSE 27
VID7 REV:3.0 VTT_OUT_RIGHT
VID7 27
VID6
6 H_A#[3..31] VID6 27
VID5
VID5 27
VID4 8P4R-680R RN34
VID4 27
VID3 VID7 1 2

H_A#10
H_A#31
H_A#30
H_A#29
H_A#28
H_A#27
H_A#26
H_A#25
H_A#24
H_A#23
H_A#22
H_A#21
H_A#20
H_A#19
H_A#18
H_A#17
H_A#16
H_A#15
H_A#14
H_A#13
H_A#12
H_A#11
VID3 27

H_A#8
H_A#7
H_A#6
H_A#5
H_A#4
H_A#3
H_A#9
VID2 VID3 3 4
VID2 27
VID1 VID6 5 6
VID1 27
A VID0 VID1 7 8 A
VID0 27
VID2 1 2
VTT_OUT_RIGHT VID5 3 4

AM7
AM5

AM3

AM2
AG5
AG4
AG6
AH5
AH4

AC5

AD6

AC2

AN3
AN4
AN5
AN6
AB4

AB5
AA5

AA4

AB6

AK3

AK4
AF4
AF5

AL4

AL6

AL5
AJ6
AJ5

AJ3
W6

W5

M4

M5
U4
U5

U6

R4
VID0

Y4
Y6

V4
V5

P6
T4

T5

L4

L5
5 6
U11A VID4 7 8
REV:3.0 8P4R-680R RN53

VCC_SENSE
VSS_SENSE
A35#
A34#
A33#
A32#
A31#
A30#
A29#
A28#
A27#
A26#
A25#
A24#
A23#
A22#
A21#
A20#
A19#
A18#
A17#
A16#
A15#
A14#
A13#
A12#
A11#
A10#
A9#
A8#
A7#
A6#
A5#
A4#
A3#

DBR#

VCC_MB_REGULATION

ITP_CLK1
ITP_CLK0

VID6#
VID5#
VID4#
VID3#
VID2#
VID1#
VID0#
RSVD
VSS_MB_REGULATION
A8 R139
6 H_DBI#0 DBI0#
6 H_DBI#1 G11 DBI1# 1KR0402 REV:3.0
6 H_DBI#2 D19 DBI2# VID_SELECT AN7 VRD_VIDSEL 27
6 H_DBI#3 C20 DBI3# GTLREF0 H1 CPU_GTLREF0 4
GTLREF1 H2 CPU_GTLREF1 4
F2 H29 GTLREF_SEL TP2
EDRDY# GTLREF_SEL
4 H_IERR# AB2 IERR# CS_GTLREF E24 MCH_GTLREF_CPU 6
AB3 AG3 H_BPM#5
MCERR# BPM5# H_BPM#4
4,10 H_FERR# R3 FERR#/PBE# BPM4# AF2
M3 AG2 H_BPM#3
10 H_STPCLK# STPCLK# BPM3#
AD3 AD2 H_BPM#2
BINIT# BPM2# H_BPM#1
10 H_INIT# P3 INIT# BPM1# AJ1
H4 AJ2 H_BPM#0
RSP# BPM0#

6 H_DBSY# B2 DBSY# PCREQ# G5 IO_PECI 14 REV:3.0


C1 J6 H_REQ#4
6 H_DRDY# DRDY# REQ4# H_REQ#[0..4] 6
E3 K6 H_REQ#3
6 H_TRDY# TRDY# REQ3#
M6 H_REQ#2
REQ2# H_REQ#1
6 H_ADS# D2 ADS# REQ1# J5
C3 K4 H_REQ#0
6 H_LOCK# LOCK# REQ0#
6 H_BNR# C2 BNR#
D4 W2 H_TESTHI12 R301 62R0402
6 H_HIT# HIT# TESTHI12
E4 P1 H_TESTHI11 R290 62R0402
B 6 H_HITM# HITM# TESTHI11 B
G8 H5 H_TESTHI10 R281 62R0402
6 H_BPRI# BPRI# TESTHI10
G7 G4 H_TESTHI9 R274 62R0402
6 H_DEFER# DEFER# TESTHI9
G3 H_TESTHI8 R275 62R0402 VTT_OUT_LEFT
H_TDI TESTHI8
AD1 TDI TESTHI7 F24
H_TDO AF1 G24
H_TMS TDO TESTHI6
AC1 TMS TESTHI5 G26
H_TRST# AG1 G27
H_TCK TRST# TESTHI4
AE1 TCK TESTHI3 G25
AL1 F25 H_TESTHI2_7R183 62R0402
14 H_THERMDA THERMDA TESTHI2 V_FSB_VTT
AK1 W3 H_TESTHI1 R304 62R0402
14 H_THERMDC THERMDC TESTHI1
M2 F26 H_TESTHI0 R184 62R0402
4,10 TRMTRIP# THERMTRIP# TESTHI0
AE8 AK6 H_FORCEPH R321 X_62R0402
GND/SKTOCC# FORCEPH VTT_OUT_RIGHT 4,5
AL2 G6 RSVD_G6 R272 X_62R0402
4 H_PROCHOT# PROCHOT# RSVD
10 H_IGNNE# N2 IGNNE#
10 ICH_H_SMI# P2 SMI# BCLK1# G28 CK_H_CPU# 13
10 H_A20M# K3 A20M# BCLK0# F28 CK_H_CPU 13
R284 L2
VTT_OUT_LEFT H_TESTHI13 TESTI_13
RS2# A3 H_RS#2 6
AH2 RSVD RS1# F5 H_RS#1 6
62R0402 N5 B3
RESERVED0 RS0# H_RS#0 6
AE6 RESERVED1
C9 U3 TP18
RESERVED2 AP1# TP20
G10 RESERVED3 AP0# U2
D16 RESERVED4 BR0# F3 H_BR#0 4,6
A20 T2 H_COMP5 R296 60.4R1%0402
RESERVED5 COMP5 VTT_OUT_LEFT 4
J2 H_COMP4 R278 60.4R1%0402
COMP4 H_COMP3 R287 60.4R1%0402
Y1 BOOTSELECT COMP3 R1 PLACE RESISTORS OUTSIDE SOCKET
VTT_OUT_RIGHT R291 X_62R0402 V2 G2 H_COMP2 R271 60.4R1%0402 CAVITY IF NO ROOM FOR VARIABLE
VTT_OUT_RIGHT LL_ID1 LL_ID0 COMP2 H_COMP1 R289 60.4R1%0402
C AA2 LL_ID1 COMP1 T1 RESISTOR DON'T PLACE C
R303 62R0402 A13 H_COMP0 R204 60.4R1%0402 C370
COMP0 C0.1U16Y0402
4,8,13 H_FSBSEL0 G29 BSEL0
H30 J17 TP11
4,8,13 H_FSBSEL1 BSEL1 DP3#
G30 H16 TP8
4,8,13 H_FSBSEL2 BSEL2 DP2#
H15 TP10
DP1# TP12
4,10 H_PWRGD N1 PWRGOOD DP0# J16
RN33
G23 AD5 1 2 H_BPM#3
4,6 H_CPURST# RESET# ADSTB1# H_ADSTB#1 6
R6 3 4 H_BPM#5
ADSTB0# H_ADSTB#0 6
H_D#63 B22 C17 5 6 H_BPM#1
6 H_D#[0..63] D63# DSTBP3# H_DSTBP#3 6
H_D#62 A22 G19 7 8 H_BPM#0
D62# DSTBP2# H_DSTBP#2 6
H_D#61 A19 E12 8P4R-62R0402
D61# DSTBP1# H_DSTBP#1 6
H_D#60 B19 B9 RN31
D60# DSTBP0# H_DSTBP#0 6
H_D#59 B21 A16 1 2 H_TMS
D59# DSTBN3# H_DSTBN#3 6
LL_ID1 H_D#58 C21 G20 3 4 H_TDI
D58# DSTBN2# H_DSTBN#2 6
H_D#57 B18 G12 VTT_OUT_RIGHT 5 6 H_BPM#2
D57# DSTBN1# H_DSTBN#1 6
H_D#56 A17 C8 7 8 H_BPM#4
D56# DSTBN0# H_DSTBN#0 6
H_D#55 B16 L1 8P4R-62R0402
D55# LINT1/NMI H_NMI 10
H_D#54 C18 K1 C378 R309 X_62R0402 H_TDO
D54# LINT0/INTR H_INTR 10
R305 C371
D53#
D52#
D51#
D50#
D49#
D48#
D47#
D46#
D45#
D44#
D43#
D42#
D41#
D40#
D39#
D38#
D37#
D36#
D35#
D34#
D33#
D32#
D31#
D30#
D29#
D28#
D27#
D26#
D25#
D24#
D23#
D22#
D21#
D20#
D19#
D18#
D17#
D16#
D15#
D14#
D13#
D12#
D11#
D10#
D9#
D8#
D7#
D6#
D5#
D4#
D3#
D2#
D1#
D0#

X_C0.1U16Y0402 C0.1U16Y0402 R315 62R0402 H_TRST#


X_0R0402
R308 62R0402 H_TCK
H_D#53 B15
H_D#52 C14
H_D#51 C15
H_D#50 A14
H_D#49 D17
H_D#48 D20
H_D#47 G22
H_D#46 D22
H_D#45 E22
H_D#44 G21
H_D#43 F21
H_D#42 E21
H_D#41 F20
H_D#40 E19
H_D#39 E18
H_D#38 F18
H_D#37 F17
H_D#36 G17
H_D#35 G18
H_D#34 E16
H_D#33 E15
H_D#32 G16
H_D#31 G15
H_D#30 F15
H_D#29 G14
H_D#28 F14
H_D#27 G13
H_D#26 E13
H_D#25 D13
H_D#24 F12
H_D#23 F11
H_D#22 D10
H_D#21 E10
H_D#20 D7
H_D#19 E9
H_D#18 F9
H_D#17 F8
H_D#16 G9
H_D#15 D11
H_D#14 C12
H_D#13 B12
H_D#12 D8
H_D#11 C11
H_D#10 B10
H_D#9 A11
H_D#8 A10
H_D#7 A7
H_D#6 B7
H_D#5 B6
H_D#4 A5
H_D#3 C6
H_D#2 A4
H_D#1 C5
H_D#0 B4

_ZIF-SOCK775-15u-in

PLACE BPM TERMINATION NEAR CPU

D D

The LL_ID[]1:0] signals are used to select the LL_ID[]1:0]=00 for the P4 processor in the BSEL TABLE
correct loading slope for the processor. 775-land package.
ITPCLK[0:1] are copies of BCLK that are used only in processor systems where no debug
2 1 0 FSB FREQUENCY MICRO-START INT'L CO.,LTD.
Title
port is implemented on the system board. 0 0 0 267 MHZ (1067)
MS-7204-30-060804K1
The signal VID_SELECT(previously known as FC16, land number AN7) on the processor socket 0 1 0 200 MHZ (800) Size Document Number Rev
should have a 62 ohm 5% pull-down resistor to ground.
0 0 1 133 MHZ (533)
Custom Intel LGA775 - Signals 3.0
Date: Friday, August 04, 2006 Sheet 3 of 33
1 2 3 4 5
1 2 3 4 5

VCCP

VccPLL for Ssmithfield define the support

AM11
AM12
AM14
AM15
AM18
AM19
AM21
AM22
AM25
AM26
AM29
AM30
AG11
AG12
AG14
AG15
AG18
AG19
AG21
AG22
AG25
AG26
AG27
AG28
AG29
AG30

AH11
AH12
AH14
AH15
AH18
AH19
AH21
AH22
AH25
AH26
AH27
AH28
AH29
AH30

AN11
AN12
AN14
AN15
AN18
AN19
AN21
AN22
AK11
AK12
AK14
AK15
AK18
AK19
AK21
AK22
AK25
AK26
AF21
AF22

AL11
AL12
AL14
AL15
AL18
AL19
AL21
AL22
AL25
AL26
AL29
AL30
AJ11
AJ12
AJ14
AJ15
AJ18
AJ19
AJ21
AJ22
AJ25
AJ26
future processor.

AM8
AM9
AG8
AG9

AH8
AH9

AK8
AK9
AF8
AF9

AL8
AL9
AJ8
AJ9
U11B

VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCCP
A23 H_VCCA
VCCA H_VSSA
AF19 VCC VSSA B23
A AF18 D23 H_VCCPLL REV:3.0 A
VCC VCCPLL H_VCCIOPLL
AF15 VCC VCC-IOPLL C23
AF14 VCC
AF12 VCC
AF11 VCC VTT A25 V_FSB_VTT
AE9 VCC VTT A26
AE23 VCC VTT A27
AE22 VCC VTT A28
AE21 VCC VTT A29
AE19 A30 V_FSB_VTT
VCC VTT
AE18 VCC VTT B25
AE15 B26 C222 C10U10Y0805
VCC VTT
AE14 VCC VTT B27
AE12 B28 C223 C10U10Y0805
VCC VTT
AE11 VCC VTT B29
AD8 B30 C224 C10U10Y0805
VCC VTT
AD30 VCC VTT C25
AD29 VCC VTT C26
AD28 VCC VTT C27 CAPS FOR FSB GENERIC
AD27 VCC VTT C28
AD26 C29 V_FSB_VTT
VCC VTT
AD25 VCC VTT C30
AD24 VCC VTT D25
AD23 VCC VTT D26
AC8 D27 C220 C219 C221
VCC VTT
AC30 VCC VTT D28
AC29 D29 C0.1U16Y0402 C0.1U16Y0402 C0.1U16Y0402
VCC VTT
AC28 VCC VTT D30
AC27 VCC VTTPWRGD AM6 VTT_PWG
B AC26 B
VCC
AC25 VCC VTT_OUT_RIGHT AA1 VTT_OUT_RIGHT FSB GENERIC DECOUPLING
AC24 J1 VTT_OUT_LEFT
VCC VTT_OUT_LEFT
AC23 VCC VTT_SEL F27
AB8 VCC
AA8 VCC RSVD F29
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC

HS1
HS2
HS3
HS4
_ZIF-SOCK775-15u-in
Y8
Y30
Y29
Y28
Y27
Y26
Y25
Y24
Y23
W8
W30
W29
W28
W27
W26
W25
W24
W23
V8
U8
U30
U29
U28
U27
U26
U25
U24
U23
T8
T30
T29
T28
T27
T26
T25
T24
T23
R8
P8
N8
N30
N29
N28
N27
N26
N25
N24
N23
M8
M30
M29
M28
M27
M26
M25
M24
M23
L8
K8
K30
K29
K28
K27
K26
K25
K24
K23
J9
J8
J30
J29
J28
J27
J26
J25
J24
J23
J22
J21
J20
J19
J18
J15
J14
J13
J12
J11
J10
AN9
AN8
AN30
AN29
AN26
AN25

1
2
3
4
VCCP

R273
VTT_OUT_RIGHT R279 124R1%0402 CPU_GTLREF0
CPU_GTLREF0 3
10R0402
R280 C362
C364
210R1%0402 C220P25N0402
C1U6.3Y50402/80-20% V_1P5_CORE

CP14
1 2 H_VCCPLL
R277
VTT_OUT_LEFT R285 124R1%0402 CPU_GTLREF1 X_COPPER C411
C CPU_GTLREF1 3 C
C416 C421
10R0402 C10U10Y0805
R282 C363 X_C1U6.3Y50402/80-20%
GTLREF VOLTAGE SHOULD BE C369
0.63*VTT = 0.756V 210R1%0402 C220P25N0402 C0.01U10X0402
C1U6.3Y50402/80-20%
REV:3.0
V_FSB_VTT
L5
H_VCCIOPLL 100mA

10uH/8/125mA/Rdc=0.7 VTT_PWG SPEC :


VTT_OUT_RIGHT R318 680R0402
High > 0.9V
R189 Low < 0.3V
0R0805 VCC5_SB Trise < 150ns
V_FSB_VTT

L6 10uH/8/125mA/Rdc=0.7 H_VCCA 100mA


VTT_OUT_RIGHT R316 130R1%0402 H_PROCHOT# R320
3,5 VTT_OUT_RIGHT H_PROCHOT# 3
R182 62R0402 H_CPURST# 1KR0402 VTT_PWG
H_CPURST# 3,6
R322
C231 C229 C230 Q37
26,27 VID_GD#
C22U10X50805 X_C10U10Y0805 N-MMBT3904_NL_SOT23
X_C1U10X H_VSSA 10KR0402
C384
VTT_OUT_LEFT R286 X_100R0402 H_PWRGD X__C1U6.3Y50402/80-20%
3 VTT_OUT_LEFT H_PWRGD 3,10
D R276 62R0402 H_BR#0 D
H_BR#0 3,6
R306 62R0402 H_IERR#
H_IERR# 3
FSBSEL RESISTOR CAN BE REMOVED IF ONLY TEJAS
AND CEDAR MILL ARE SUPPORTED
V_FSB_VTT

V_FSB_VTT 1
RN20
2 H_FSBSEL1
MICRO-START INT'L CO.,LTD.
H_FSBSEL1 3,8,13 Title
R283 62R0402 TRMTRIP# 3 4 H_FSBSEL0
TRMTRIP# 3,10 H_FSBSEL0 3,8,13
R288 62R0402 H_FERR#
H_FERR# 3,10 5 6 H_FSBSEL2
H_FSBSEL2 3,8,13 MS-7204-30-060804K1
7 8
Size Document Number Rev
8P4R-470R0402 Custom Intel LGA775 - Power 3.0
Date: Friday, August 04, 2006 Sheet 4 of 33
1 2 3 4 5
B
A

D
C
3,4 VTT_OUT_RIGHT

1
1

A9
A6
A2

AE2
AB7
AB1
AA7
AA6
AA3

AD7
AD4
AC7
AC6
AC3
A24
A21
A18
A15
A12

AE28
AE27
AE26
AE25
AE24
AE20
AE17
AE16
AE13
AE10
AB30
AB29
AB28
AB27
AB26
AB25
AB24
AB23
AA30
AA29
AA28
AA27
AA26
AA25
AA24
AA23
U11C

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VTT_OUT_RIGHT

R300

AE29 VSS
60.4R1%0402

AE30 Y3 H_COMP6
VSS COMP6 H_COMP7
AE5 VSS COMP7 AE3
AE7 VSS RSVD AE4
AF10 VSS RSVD D1
AF13 VSS RSVD D14
R311

AF16 VSS RSVD E23


TP3

AF17 VSS
AF20 VSS RSVD E5
AF23 E6
60.4R1%0402

VSS RSVD
TP13
R323

AF24 VSS RSVD E7


AF25 VSS RSVD F23
62R0402

TP4

AF26 VSS IMPSEL# F6


AF27 B13 H_COMP8
VSS RSVD
AF28 VSS
AF29
REV:3.0

VSS
AF3 VSS RSVD J3
R313

AF30 VSS RSVD N4


AF6 P5
30R0402

VSS RSVD
AF7 VSS
AG10 V1 MSID1
VSS MSID[1] MSID0
AG13 VSS MSID[0] W1
AG16 VSS RSVD AC4
AG17

2
2

VSS
R302
R299
R295

AG20 VSS
AG23 VSS VSS Y7
AG24 VSS VSS Y5
AG7 VSS VSS Y2
AH1 VSS VSS W7
AH10 VSS VSS W4
62R0402
62R0402

AH13 VSS VSS V7


X_62R0402

AH16 VSS VSS V6


AH17 VSS VSS V30
AH20 VSS VSS V3
AH23 VSS VSS V29
AH24 VSS VSS V28
AH3 V27
V_FSB_VTT

VSS VSS
AH6 VSS VSS V26
AH7 VSS VSS V25
AJ10 VSS VSS V24
AJ13 VSS VSS V23
AJ16 VSS VSS U7
AJ17 VSS VSS U1
AJ20 VSS VSS T7
AJ23 VSS VSS T6
AJ24 VSS VSS T3
AJ27 VSS VSS R7
AJ28 VSS VSS R5
AJ29 VSS VSS R30
AJ30 VSS VSS R29
AJ4 VSS VSS R28
AJ7 VSS VSS R27
AK10 VSS VSS R26
AK13 VSS VSS R25
AK16 VSS VSS R24
AK17 VSS VSS R23

3
3

AK2 VSS VSS R2


AK20 VSS VSS P7
AK23 VSS VSS P4
AK24 VSS VSS P30
AK27 VSS VSS P29
AK28 VSS VSS P28
AK29 VSS VSS P27
AK30 VSS VSS P26
AK5 VSS VSS P25
AK7 VSS VSS P24
AL10 VSS VSS P23
AL13 VSS VSS N7
AL16 VSS VSS N6
AL17 VSS VSS N3
AL20 VSS VSS M7
AL23 VSS VSS M1
AL24 VSS VSS L7
AL27 VSS VSS L6
AL28 VSS VSS L30
AL3 VSS VSS L3
AL7 VSS VSS L29
AM1 VSS VSS L28
AM10 VSS VSS L27
AM13 VSS VSS L26
AM16 VSS VSS L25
AM17 VSS VSS L24
AM20 VSS VSS L23
AM23 VSS VSS K7
AM24 VSS VSS K5
AM27 VSS VSS K2
AM28 VSS VSS J7
AM4 VSS VSS J4
H9
4
4

VSS
AN1 VSS VSS H8
AN10 VSS VSS H7
AN13 VSS VSS H6
AN16 VSS VSS H3
AN17 VSS
AN2 VSS VSS H28
AN20 VSS VSS H27
AN23 VSS VSS H26
AN24 VSS VSS H25
AN27 VSS VSS H24
AN28 VSS VSS H23
VSS H22
B1 VSS VSS H21
B11 VSS VSS H20
Title

Size

B14 H19
Date:

VSS VSS
VSS H18
Custom

VSS H17
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

F4
F7

B5
B8
E2
E8

C4
C7
D3
D5
D6
D9
G1

F10
F13
F16
F19
F22

B17
B20
B24
E11
E14
E17
E20
E25
E26
E27
E28
E29

C10
C13
C16
C19
C22
C24
D12
D15
D18
D21
D24
H10
H11
H12
H13
H14

Document Number
_ZIF-SOCK775-15u-in

Friday, August 04, 2006


Intel LGA775-
MS-7204-30-060804K1

GND

5
5

Sheet
5
of
33
3.0
Rev
MICRO-START INT'L CO.,LTD.
B
A

D
C
1 2 3 4 5

V_1P5_CORE

AG10
AG11
AG12
AG13
AG14
AC22
AD14
AA22
AB21
AB22
AB23

AK14
AK15
AK20
AF10
AF11
AF12
AF13
AF14
AF30

AJ13
AJ14

W17
W18
W19
W20
W22
W24
W26
W27
AG2
AG3
AG4
AG5
AG6
AG7
AG8
AG9

AH1
AH2
AH4

M17
AK2
AK3
AK4
N17

R15
R17
R18
R20
R21
R23
R24
U15
U17
U18
U19
U20
U21
U22
U23
U24
U25
U26
AF6
AF7
AF8
AF9
P17
P18
P20
P21

V15
V17
V18
V19
V20
V21
V22
V23
V25
V27

Y15
AJ5
U14A
H_A#3 J39 P41 H_D#0

VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
3 H_A#3 HA3# HD0# H_D#0 3
H_A#4 K38 M39 H_D#1
3 H_A#4 HA4# HD1# H_D#1 3
H_A#5 J42 P42 H_D#2
3 H_A#5 HA5# HD2# H_D#2 3
H_A#6 K35 M42 H_D#3
3 H_A#6 HA6# HD3# H_D#3 3
H_A#7 J37 N41 H_D#4
3 H_A#7 HA7# HD4# H_D#4 3
H_A#8 M34 M40 H_D#5
3 H_A#8 HA8# HD5# H_D#5 3
A H_A#9 N35 L40 H_D#6 A
3 H_A#9 HA9# HD6# H_D#6 3
H_A#10 R33 M41 H_D#7
3 H_A#10 HA10# HD7# H_D#7 3
H_A#11 N32 K42 H_D#8
3 H_A#11 HA11# HD8# H_D#8 3
H_A#12 N34 G39 H_D#9
3 H_A#12 HA12# HD9# H_D#9 3
H_A#13 M38 J41 H_D#10
3 H_A#13 HA13# HD10# H_D#10 3
H_A#14 N42 G42 H_D#11
3 H_A#14 HA14# HD11# H_D#11 3
H_A#15 N37 G40 H_D#12
3 H_A#15 HA15# HD12# H_D#12 3
H_A#16 N38 G41 H_D#13
3 H_A#16 HA16# HD13# H_D#13 3
H_A#17 R32 F40 H_D#14
3 H_A#17 HA17# HD14# H_D#14 3
H_A#18 R36 F43 H_D#15
3 H_A#18 HA18# HD15# H_D#15 3
H_A#19 U37 F37 H_D#16
3 H_A#19 HA19# HD16# H_D#16 3
H_A#20 R35 E37 H_D#17
3 H_A#20 HA20# HD17# H_D#17 3
H_A#21 R38 J35 H_D#18
3 H_A#21 HA21# HD18# H_D#18 3
H_A#22 V33 D39 H_D#19
3 H_A#22 HA22# HD19# H_D#19 3
H_A#23 U34 C41 H_D#20
3 H_A#23 HA23# HD20# H_D#20 3
H_A#24 U32 B39 H_D#21
3 H_A#24 HA24# HD21# H_D#21 3
H_A#25 V42 B40 H_D#22
3 H_A#25 HA25# HD22# H_D#22 3
H_A#26 U35 H34 H_D#23
3 H_A#26 HA26# HD23# H_D#23 3
H_A#27 Y36 C37 H_D#24
3 H_A#27 HA27# HD24# H_D#24 3
H_A#28 Y38 J32 H_D#25
3 H_A#28 HA28# HD25# H_D#25 3
H_A#29 AA37 B35 H_D#26
3 H_A#29 HA29# HD26# H_D#26 3
H_A#30 V32 J34 H_D#27
3 H_A#30 HA30# HD27# H_D#27 3
H_A#31 Y34 B34 H_D#28
3 H_A#31 HA31# HD28# H_D#28 3
F32 H_D#29
HD29# H_D#29 3
M36 L32 H_D#30
3 H_ADSTB#0 HAD_STB0# HD30# H_D#30 3
V35 J31 H_D#31
3 H_ADSTB#1 HAD_STB1# HD31# H_D#31 3
F38 H31 H_D#32
HPCREQ# HD32# H_D#32 3
M33 H_D#33
HD33# H_D#33 3
AA41 K31 H_D#34
B 3,4 H_BR#0 HBREQ0# HD34# H_D#34 3 B
D42 M27 H_D#35
3 H_BPRI# HBPRI# HD35# H_D#35 3
K29 H_D#36
HD36# H_D#36 3
U39 F31 H_D#37
3 H_BNR# HBNR# HD37# H_D#37 3
H29 H_D#38
HD38# H_D#38 3
U40 F29 H_D#39
3 H_LOCK# HLOCK# HD39# H_D#39 3
L27 H_D#40
HD40# H_D#40 3
W42 M24 H_D#41
3 H_ADS# HADS# HD41# H_D#41 3
J26 H_D#42
HD42# H_D#42 3
H_REQ#0 E41 K26 H_D#43
3 H_REQ#0 HREQ0# HD43# H_D#43 3
H_REQ#1 D41 G26 H_D#44
3 H_REQ#1 HREQ1# HD44# H_D#44 3
H_REQ#2 K36 H24 H_D#45
3 H_REQ#2 HREQ2# HD45# H_D#45 3
H_REQ#3 G37 K24 H_D#46
3 H_REQ#3 HREQ3# HD46# H_D#46 3
H_REQ#4 E42 F24 H_D#47
3 H_REQ#4 HREQ4# HD47# H_D#47 3
E31 H_D#48
HD48# H_D#48 3
U41 A33 H_D#49
3 H_HIT# HHIT# HD49# H_D#49 3
W41 E40 H_D#50
3 H_HITM# HHITM# HD50# H_D#50 3
P40 D37 H_D#51
3 H_DEFER# HDEFER# HD51# H_D#51 3
C39 H_D#52
HD52# H_D#52 3
W40 D38 H_D#53
3 H_TRDY# HTRDY# HD53# H_D#53 3
U42 D33 H_D#54
3 H_DBSY# HDBSY# HD54# H_D#54 3
V41 C35 H_D#55
3 H_DRDY# HDRDY# HD55# H_D#55 3
TP23 Y40 D34 H_D#56
HEDRDY# HD56# H_D#56 3
C34 H_D#57
HD57# H_D#57 3
H_RS#0 T40 B31 H_D#58
3 H_RS#0 RS0# HD58# H_D#58 3
H_RS#1 Y43 C31 H_D#59
3 H_RS#1 RS1# HD59# H_D#59 3
H_RS#2 T43 C32 H_D#60
3 H_RS#2 RS2# HD60# H_D#60 3
D32 H_D#61
HD61# H_D#61 3
M31 B30 H_D#62
13 CK_H_MCH HCLKP HD62# H_D#62 3
M29 D30 H_D#63
C 13 CK_H_MCH# HCLKN HD63# H_D#63 3 C

AJ9 K40 H_DBI#0


11,26 PWR_GD PWROK KDINV_0# H_DBI#0 3
C30 A38 H_DBI#1
3,4 H_CPURST# HCPURST# HDINV_1# H_DBI#1 3
E29 H_DBI#2
HDINV_2# H_DBI#2 3
AJ12 B32 H_DBI#3
10 PLTRST# RSTIN# HDINV_3# H_DBI#3 3
ICH_SYNC# M18
11 ICH_SYNC# ICH_SYNC#
HD_STBP0# K41 H_DSTBP#0 3
R248 L43
HD_STBN0# H_DSTBN#0 3
HXRCOMP A28
HXSCOMP HRCOMP
C27 HSCOMP HD_STBP1# F35 H_DSTBP#1 3
16.9R1% HXSWING B27 G34
HSWING HD_STBN1# H_DSTBN#1 3
MCH_GTLREF_CPU D27 J27
HDVREF HD_STBP2# H_DSTBP#2 3
D28 HACCVREF HD_STBN2# M26 H_DSTBN#2 3
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD

E34

VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
HD_STBP3# H_DSTBP#3 3
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
HD_STBN3# B37 H_DSTBN#3 3

(INTEL-QG82945G-A2-LF)
AA35
AA42
AA34
AA38
L15
M15
U27
R27
A43
M11
AG25
AG26
AG27
AJ24
AJ27
AK40
AL39
AW17
AW18
AY14
BC16
AD30
AC34
Y30
Y33
AF31
AD31
U30
V31
AA30
AC30
AK21
AJ23
AJ26
AL29
AL20
AJ21
AL26
AK27
AJ29
AG29
V30

BC43
BC42
BC2
BC1
BB43
BB2
BB1
BA2
AW26
AW2
AV27
AV26
E35
C42
C2
B43
B42
B41
B3
B2
A42

Y17
Y18
Y19
Y21
Y23
Y25
Y27
AA15
AA17
AA18
AA19
AA20
V_FSB_VTT V_FSB_VTT V_1P5_CORE
HD_SWING S/B 0.22*VTT GTLREF VOLTAGE SHOULD BE 0.63*VTT=0.756V
124 OHM OVER 210 RESISTORS
R228 R233
D 301R1%0402 124R1%0402 D
R241 R244
HXSWING MCH_GTLREF_CPU
MCH_GTLREF_CPU 3
R245 C315
V_FSB_VTT HXSCOMP R232 62R0402 R237 10R0402 X_C220P25N0402
V_FSB_VTT
C292 210R1%0402 C305
60.4R1%0402
C316
84.5R1%0402-LF C0.01U25X0402
C0.1U16Y0402
CAPS SHOULD BE PLACED NEAR MCH PIN
MICRO-START INT'L CO.,LTD.
X_C2.2P25N0402 Title
CAP for GTLREF inputs GMCH use 12mil trace, MS-7204-30-060804K1
HSWING VOLTAGE "10mil trace 7mil space" isolate W 15mil space. Size Document Number Rev
place divider resistors near VTT. Custom 3.0
Intel lakeport - CPU
Date: Friday, August 04, 2006 Sheet 6 of 33
1 2 3 4 5
1 2 3 4 5

SDM_A[0:7]
21 SDQ_A[0..63] 21 SDM_A[0:7]

BA7 SDQ_A10
BB7 SDQ_A11
AV1 SDQ_A12
AW4 SDQ_A13
BC6 SDQ_A14
AY7 SDQ_A15
AW12SDQ_A16
AY10 SDQ_A17
BA12 SDQ_A18
BB12 SDQ_A19
BA9 SDQ_A20
BB9 SDQ_A21
BC11 SDQ_A22
AY12 SDQ_A23
AM20 SDQ_A24
AM18 SDQ_A25
AV20 SDQ_A26
AM21 SDQ_A27
AP17 SDQ_A28
AR17 SDQ_A29
AP20 SDQ_A30
AT20 SDQ_A31
AP32 SDQ_A32
AV34 SDQ_A33
AV38 SDQ_A34
AU39 SDQ_A35
AV32 SDQ_A36
AT32 SDQ_A37
AR34 SDQ_A38
AU37 SDQ_A39
AR41 SDQ_A40
AR42 SDQ_A41
AN43 SDQ_A42
AM40 SDQ_A43
AU41 SDQ_A44
AU42 SDQ_A45
AP41 SDQ_A46
AN40 SDQ_A47
AL41 SDQ_A48
AL42 SDQ_A49
AF39 SDQ_A50
AE40 SDQ_A51
AM41 SDQ_A52
AM42 SDQ_A53
AF41 SDQ_A54
AF42 SDQ_A55
AD40 SDQ_A56
AD43 SDQ_A57
AA39 SDQ_A58
AA40 SDQ_A59
AE42 SDQ_A60
AE41 SDQ_A61
AB41 SDQ_A62
AB42 SDQ_A63

BB25 SCKE_A0
AY25 SCKE_A1
BC24 SCKE_A2
BA25 SCKE_A3

AR3 SDM_A0
AP3 SDQ_A0

AY2 SDM_A1
BB10 SDM_A2
AP18 SDM_A3
AT34 SDM_A4
AP39 SDM_A5
AG40 SDM_A6
AC40 SDM_A7
AP2 SDQ_A1
AU3 SDQ_A2
AV4 SDQ_A3
AN1 SDQ_A4
AP4 SDQ_A5
AU5 SDQ_A6
AU2 SDQ_A7
AW3 SDQ_A8
AY3 SDQ_A9
SCKE_A[0..3]
21,23 SCKE_A[0:3]

U14B
BB37 BA40 SCS_B#0

SADQ0
SADQ1
SADQ2
SADQ3
SADQ4
SADQ5
SADQ6
SADQ7
SADQ8
SADQ9
SADQ10
SADQ11
SADQ12
SADQ13
SADQ14
SADQ15
SADQ16
SADQ17
SADQ18
SADQ19
SADQ20
SADQ21
SADQ22
SADQ23
SADQ24
SADQ25
SADQ26
SADQ27
SADQ28
SADQ29
SADQ30
SADQ31
SADQ32
SADQ33
SADQ34
SADQ35
SADQ36
SADQ37
SADQ38
SADQ39
SADQ40
SADQ41
SADQ42
SADQ43
SADQ44
SADQ45
SADQ46
SADQ47
SADQ48
SADQ49
SADQ50
SADQ51
SADQ52
SADQ53
SADQ54
SADQ55
SADQ56
SADQ57
SADQ58
SADQ59
SADQ60
SADQ61
SADQ62
SADQ63

SACKE0
SACKE1
SACKE2
SACKE3

SADM0
SADM1
SADM2
SADM3
SADM4
SADM5
SADM6
SADM7
21,23 SCS_A#0 SACS0# SBCS0# SCS_B#0 22,23
BA39 AW41 SCS_B#1
21,23 SCS_A#1 SACS1# SBCS1# SCS_B#1 22,23
BA35 BA41 SCS_B#2
21,23 SCS_A#2 SACS2# SBCS2# SCS_B#2 22,23
A AY38 AW40 SCS_B#3 A
21,23 SCS_A#3 SACS3# SBCS3# SCS_B#3 22,23
RAS_A# BA34 BA23 RAS_B#
21,23 RAS_A# SARAS# SBRAS# RAS_B# 22,23
CAS_A# BA37 AY24 CAS_B#
21,23 CAS_A# SACAS# SBCAS# CAS_B# 22,23
WE_A# BB35 BB23 WE_B#
21,23 WE_A# SAWE# SBWE# WE_B# 22,23
MAA_A0 BA32 BB22 MAA_B0
21,23 MAA_A0 SAMA0 SBMA0 MAA_B0 22,23
MAA_A1 AW32 BB21 MAA_B1
21,23 MAA_A1 SAMA1 SBMA1 MAA_B1 22,23
MAA_A2 BB30 BA21 MAA_B2
21,23 MAA_A2 SAMA2 SBMA2 MAA_B2 22,23
MAA_A3 BA30 AY21 MAA_B3
21,23 MAA_A3 SAMA3 SBMA3 MAA_B3 22,23
MAA_A4 AY30 BC20 MAA_B4
21,23 MAA_A4 SAMA4 SBMA4 MAA_B4 22,23
MAA_A5 BA27 AY19 MAA_B5
21,23 MAA_A5 SAMA5 SBMA5 MAA_B5 22,23
MAA_A6 BC28 AY20 MAA_B6
21,23 MAA_A6 SAMA6 SBMA6 MAA_B6 22,23
MAA_A7 AY27 BA18 MAA_B7
21,23 MAA_A7 SAMA7 SBMA7 MAA_B7 22,23
MAA_A8 AY28 BA19 MAA_B8
21,23 MAA_A8 SAMA8 SBMA8 MAA_B8 22,23
MAA_A9 BB27 BB18 MAA_B9
21,23 MAA_A9 SAMA9 SBMA9 MAA_B9 22,23
MAA_A10 AY33 BA22 MAA_B10
21,23 MAA_A10 SAMA10 SBMA10 MAA_B10 22,23
MAA_A11 AW27 BB17 MAA_B11
21,23 MAA_A11 SAMA11 SBMA11 MAA_B11 22,23
MAA_A12 BB26 BA17 MAA_B12
21,23 MAA_A12 SAMA12 SBMA12 MAA_B12 22,23
MAA_A13 BC38 AW42 MAA_B13
21,23 MAA_A13 SAMA13 SBMA13 MAA_B13 22,23

21,23 SODT_A0 AW37 SAODT0 SBODT0 AY42 SODT_B0 22,23


21,23 SODT_A1 AY39 SAODT1 SBODT1 AV40 SODT_B1 22,23
21,23 SODT_A2 AY37 SAODT2 SBODT2 AV43 SODT_B2 22,23
21,23 SODT_A3 BB40 SAODT3 SBODT3 AU40 SODT_B3 22,23
SBS_A0 BC33 AW23 SBS_B0
21,23 SBS_A0 SABA0 SBBA0 SBS_B0 22,23
SBS_A1 AY34 AY23 SBS_B1
21,23 SBS_A1 SABA1 SBBA1 SBS_B1 22,23
SBS_A2 BA26 AY17 SBS_B2
B 21,23 SBS_A2 SABA2 SBBA2 SBS_B2 22,23 B

21 SDQS_A0 AU4 SADQS0 SBDQS0 AM8 SDQS_B0 22


21 SDQS_A#0 AR2 SADQS0# SBDQS0# AM6 SDQS_B#0 22
21 SDQS_A1 BA3 SADQS1 SBDQS1 AV7 SDQS_B1 22
21 SDQS_A#1 BB4 SADQS1# SBDQS1# AR9 SDQS_B#1 22
21 SDQS_A2 AY11 SADQS2 SBDQS2 AV13 SDQS_B2 22
21 SDQS_A#2 BA10 SADQS2# SBDQS2# AT13 SDQS_B#2 22
21 SDQS_A3 AU18 SADQS3 SBDQS3 AU23 SDQS_B3 22
21 SDQS_A#3 AR18 SADQS3# SBDQS3# AR23 SDQS_B#3 22
21 SDQS_A4 AU35 SADQS4 SBDQS4 AT29 SDQS_B4 22
21 SDQS_A#4 AV35 SADQS4# SBDQS4# AV29 SDQS_B#4 22
21 SDQS_A5 AP42 SADQS5 SBDQS5 AP36 SDQS_B5 22
21 SDQS_A#5 AP40 SADQS5# SBDQS5# AM35 SDQS_B#5 22
21 SDQS_A6 AG42 SADQS6 SBDQS6 AG34 SDQS_B6 22
21 SDQS_A#6 AG41 SADQS6# SBDQS6# AG32 SDQS_B#6 22
21 SDQS_A7 AC42 SADQS7 SBDQS7 AD36 SDQS_B7 22
21 SDQS_A#7 AC41 SADQS7# SBDQS7# AD38 SDQS_B#7 22

21 SCLKA0 BB32 SACLK0 SBCLK0 AM29 SCLKB0 22


21 SCLKA#0 AY32 SACLK0# SBCLK0# AM27 SCLKB#0 22
21 SCLKA1 AY5 SACLK1 SBCLK1 AV9 SCLKB1 22
21 SCLKA#1 BB5 SACLK1# SBCLK1# AW9 SCLKB#1 22
21 SCLKA2 AK42 SACLK2 SBCLK2 AL38 SCLKB2 22
21 SCLKA#2 AK41 SACLK2# SBCLK2# AL36 SCLKB#2 22
21 SCLKA3 BA31 SACLK3 SBCLK3 AP26 SCLKB3 22
21 SCLKA#3 BB31 SACLK3# SBCLK3# AR26 SCLKB#3 22
21 SCLKA4 AY6 SACLK4 SBCLK4 AU10 SCLKB4 22
21 SCLKA#4 BA5 SACLK4# SBCLK4# AT10 SCLKB#4 22
C 21 SCLKA5 AH40 SACLK5 SBCLK5 AJ38 SCLKB5 22 C
21 SCLKA#5 AH43 SACLK5# SBCLK5# AJ36 SCLKB#5 22

SMPCOMP_N AL5
SMPCOMP_P MCH_SRCOMP0 MCH_VREF_B
AJ6 MCH_SRCOMP1 SMVREF1 AM2
AJ8 AM4 MCH_VREF_A
SMOCDCOMP0 SMVREF0
AM3 SMOCDCOMP1
SBDQ10
SBDQ11
SBDQ12
SBDQ13
SBDQ14
SBDQ15
SBDQ16
SBDQ17
SBDQ18
SBDQ19
SBDQ20
SBDQ21
SBDQ22
SBDQ23
SBDQ24
SBDQ25
SBDQ26
SBDQ27
SBDQ28
SBDQ29
SBDQ30
SBDQ31
SBDQ32
SBDQ33
SBDQ34
SBDQ35
SBDQ36
SBDQ37
SBDQ38
SBDQ39
SBDQ40
SBDQ41
SBDQ42
SBDQ43
SBDQ44
SBDQ45
SBDQ46
SBDQ47
SBDQ48
SBDQ49
SBDQ50
SBDQ51
SBDQ52
SBDQ53
SBDQ54
SBDQ55
SBDQ56
SBDQ57
SBDQ58
SBDQ59
SBDQ60
SBDQ61
SBDQ62
SBDQ63

SBCKE0
SBCKE1
SBCKE2
SBCKE3

SBDM7
SBDM6
SBDM5
SBDM4
SBDM3
SBDM2
SBDM1
SBDM0
SBDQ0
SBDQ1
SBDQ2
SBDQ3
SBDQ4
SBDQ5
SBDQ6
SBDQ7
SBDQ8
SBDQ9
AL6
AL8
AP8
AP9
AJ11
AL9
AM10
AP6
AU7
AV6
AV12
AM11
AR5
AR7
AR12
AR10
AM15
AM13
AV15
AM17
AN12
AR13
AP15
AT15
AM24
AM23
AV24
AM26
AP21
AR21
AP24
AT24
AU27
AN29
AR31
AM31
AP27
AR27
AP31
AU31
AP35
AP37
AN32
AL35
AR35
AU38
AM38
AM34
AL34
AJ34
AF32
AF34
AL31
AJ32
AG35
AD32
AC32
AD34
Y32
AA32
AF35
AF37
AC33
AC35

BA14
AY16
BA13
BB13

AD39
AJ39
AR38
AR29
AP23
AP13
AW7
AL11
(INTEL-QG82945G-A2-LF)
SDQ_B28
SDQ_B29

SDQ_B57
SDQ_B10
SDQ_B11
SDQ_B12
SDQ_B13
SDQ_B14
SDQ_B15
SDQ_B16
SDQ_B17
SDQ_B18
SDQ_B19
SDQ_B20
SDQ_B21
SDQ_B22
SDQ_B23
SDQ_B24
SDQ_B25
SDQ_B26
SDQ_B27

SDQ_B30
SDQ_B31
SDQ_B32
SDQ_B33
SDQ_B34
SDQ_B35
SDQ_B36
SDQ_B37
SDQ_B38
SDQ_B39
SDQ_B40
SDQ_B41
SDQ_B42
SDQ_B43
SDQ_B44
SDQ_B45
SDQ_B46
SDQ_B47
SDQ_B48
SDQ_B49
SDQ_B50
SDQ_B51
SDQ_B52
SDQ_B53
SDQ_B54
SDQ_B55
SDQ_B56

SDQ_B58
SDQ_B59
SDQ_B60
SDQ_B61
SDQ_B62
SDQ_B63
SDQ_B0
SDQ_B1
SDQ_B2
SDQ_B3
SDQ_B4
SDQ_B5
SDQ_B6
SDQ_B7
SDQ_B8
SDQ_B9

SCKE_B3
SCKE_B0
SCKE_B1
SCKE_B2

SDM_B7
SDM_B6
SDM_B5
SDM_B4
SDM_B3
SDM_B2
SDM_B1
SDM_B0
22 SDQ_B[0..63]
VCC_DDR
22,23 SCKE_B[0..3]
R252
SMPCOMP_N
22 SDM_B[0..7]
80.6R1%0402
D C323 D
C0.1U25Y
VCC_DDR PLACE CLOSE TO MCH VCC_DDR

R250 R253 1KR1%0402 MCH_VREF_A R256 1KR1%0402 MCH_VREF_B


SMPCOMP_P MICRO-START INT'L CO.,LTD.
80.6R1%0402 C356 R255 C334 C345 R258 C335 Title

C0.1U10Y C0.1U25Y C0.1U10Y C0.1U25Y


MS-7204-30-060804K1
1KR1%0402 1KR1%0402
Size Document Number Rev
Custom Intel lakeport - Memory 3.0
Date: Friday, August 04, 2006 Sheet 7 of 33
1 2 3 4 5
1 2 3 4 5

V_1P5_CORE VCC_DDR BSEL TABLE


V_1P5_PCIEXPRESS
2 1 0 FSB FREQUENCY

AW13
AW15
AW20
AW21
AW24
AW29
AW31
AW34
AW35
AC15
AC17
AC18
AC20
AC24
AC26
AC27
AD15
AD17
AD19
AD21
AD23
AD25
AD26

BC13
BC18
BC22
BC26
BC31
BC35
BC40
AA24
AA26
AB17
AB18
AB19
AB20
AB24
AB25
AB26
AB27

AE17
AE18
AE20
AE22
AE24
AE26
AE27

AY43
AV18
AV21
AV23
AV31
AV42

AY41
BB16
BB20
BB24
BB28
BB33
BB38
BB42
AF15
AF17
AF19
0 0 0 267 MHZ (1067)

N10
N11
N12

R10
R11
R13

U13
N5
N7
N9

R5

U6
U7
U8
U14C
0 1 0 200 MHZ (800)

VCC_EXP
VCC_EXP
VCC_EXP
VCC_EXP
VCC_EXP
VCC_EXP
VCC_EXP
VCC_EXP
VCC_EXP
VCC_EXP
VCC_EXP
VCC_EXP
VCC_EXP
VCC_EXP
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC

VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
25 EXP_A_RXP_0 G12 EXPARXP0 0 0 1 133 MHZ (533)
25 EXP_A_RXN_0 F12 EXPARXN0
25 EXP_A_RXP_1 D11 EXPARXP1
25 EXP_A_RXN_1 D12 EXPARXN1 EXPATXP0 D14 EXP_A_TXP_0 25 EXP_EN
25 EXP_A_RXP_2 J13 EXPARXP2 EXPATXN0 C13 EXP_A_TXN_0 25
A 25 EXP_A_RXN_2 H13 EXPARXN2 EXPATXP1 A13 EXP_A_TXP_1 25 State Description A
25 EXP_A_RXP_3 E10 EXPARXP3 EXPATXN1 B12 EXP_A_TXN_1 25
25 EXP_A_RXN_3 F10 EXPARXN3 EXPATXP2 A11 EXP_A_TXP_2 25 LOW Only SDVO or PCI-e
J9 B10
25 EXP_A_RXP_4
H10
EXPARXP4 EXPATXN2
C10
EXP_A_TXN_2 25 operating
25 EXP_EN_HDR 25 EXP_A_RXN_4 EXPARXN4 EXPATXP3 EXP_A_TXP_3 25
25 EXP_A_RXP_5 F7 EXPARXP5 EXPATXN3 C9 EXP_A_TXN_3 25 HIGH SDVO and PCI-e
F9 A9
R111
25 EXP_A_RXN_5
C4
EXPARXN5 EXPATXP4
B7
EXP_A_TXP_4 25 operating
25 EXP_A_RXP_6 EXPARXP6 EXPATXN4 EXP_A_TXN_4 25
0R0402
25 EXP_A_RXN_6 D3 EXPARXN6 EXPATXP5 D7 EXP_A_TXP_5 25
simultaneously
25 EXP_A_RXP_7 G6 EXPARXP7 EXPATXN5 D6 EXP_A_TXN_5 25
EXP_EN J6 A6
25 EXP_A_RXN_7 EXPARXN7 EXPATXP6 EXP_A_TXP_6 25
25 EXP_A_RXP_8 K9 EXPARXP8 EXPATXN6 B5 EXP_A_TXN_6 25 EXP_SLR (R46 and Normal high)
25 EXP_A_RXN_8 K8 EXPARXN8 EXPATXP7 E2 EXP_A_TXP_7 25
R214 F4 F1 State Description
25 EXP_A_RXP_9 EXPARXP9 EXPATXN7 EXP_A_TXN_7 25
X_1.1KR1%0402 G4 G2
25 EXP_A_RXN_9 EXPARXN9 EXPATXP8 EXP_A_TXP_8 25
25 EXP_A_RXP_10 M6 EXPARXP10 EXPATXN8 J1 EXP_A_TXN_8 25 LOW Only SDVO or PCI-e
V_2P5_MCH M7 J3
25 EXP_A_RXN_10
K2
EXPARXN10 EXPATXP9
K4
EXP_A_TXP_9 25 operating
25 EXP_A_RXP_11 EXPARXP11 EXPATXN9 EXP_A_TXN_9 25
25 EXP_A_RXN_11 L1 EXPARXN11 EXPATXP10 L4 EXP_A_TXP_10 25 HIGH SDVO and PCI-e
U11 M4
R219
25 EXP_A_RXP_12
U10
EXPARXP12 EXPATXN10
M2
EXP_A_TXN_10 25 operating
25 EXP_A_RXN_12 EXPARXN12 EXPATXP11 EXP_A_TXP_11 25
X_1.1KR1%0402
25 EXP_A_RXP_13 R8 EXPARXP13 EXPATXN11 N1 EXP_A_TXN_11 25
simultaneously
25 EXP_A_RXN_13 R7 EXPARXN13 EXPATXP12 P2 EXP_A_TXP_12 25
25 EXP_A_RXP_14 P4 EXPARXP14 EXPATXN12 T1 EXP_A_TXN_12 25
25 EXP_A_RXN_14 N3 EXPARXN14 EXPATXP13 T4 EXP_A_TXP_13 25
25 EXP_A_RXP_15 Y10 EXPARXP15 EXPATXN13 U4 EXP_A_TXN_13 25
EXP_EN Y11 U2
25 EXP_A_RXN_15 EXPARXN15 EXPATXP14 EXP_A_TXP_14 25
EXP_EN F20 V1
EXP_EN EXPATXN14 EXP_A_TXN_14 25
EXPATXP15 V3 EXP_A_TXP_15 25
10 DMI_TXP0 Y7 DMI RXP0 EXPATXN15 W4 EXP_A_TXN_15 25
10 DMI_TXN0 Y8 DMI RXN0
B 10 DMI_TXP1 AA9 DMI RXP1 DMI TXP0 W2 DMI_RXP0 10 B
10 DMI_TXN1 AA10 DMI RXN1 DMI TXN0 Y1 DMI_RXN0 10
10 DMI_TXP2 AA6 DMI RXP2 DMI TXP1 AA2 DMI_RXP1 10
10 DMI_TXN2 AA7 DMI RXN2 DMI TXN1 AB1 DMI_RXN1 10
10 DMI_TXP3 AC9 DMI RXP3 DMI TXP2 Y4 DMI_RXP2 10
should be AC8 AA4
connected 10 DMI_TXN3 DMI RXN3 DMI TXN2 DMI_RXN2 10
DMI TXP3 AB3 DMI_RXP3 10
13 CK_PE_100M_MCH B14 GCLKP DMI TXN3 AC4 DMI_RXN3 10
13 CK_PE_100M_MCH# B16 GCLKN
AC12 GPCOMP R247 24.9R1% V_1P5_PCIEXPRESS
EXP_COMPO
EXP_COMPI AC11
SDVO_CTRL_DATAR216 X_220R0402
F15
25 SDVO_CTRL_DATA SDVOCTRLDATA
SDVO_CTRL_CLK R217 X_220R0402
E15 D17 HSYNC R230 10KR
25 SDVO_CTRL_CLK SDVOCTRLCLK HSYNC
C17 VSYNC R222 10KR
VSYNC
R218 10KR0402 SEL0 F21 F17
3,4,13 H_FSBSEL0 BSEL0 RED
R215 10KR0402 SEL1 H21 K17
3,4,13 H_FSBSEL1 BSEL1 GREEN
R223 10KR0402 SEL2 L20 H18 V_2P5_MCH
3,4,13 H_FSBSEL2 BSEL2 BLUE
AK17 RSV_TP[0]
AL17 RSV_TP[1] RED# G17
GREENB J17
R220 1KR1%0402 EXPSLR K21 J18
EXP_SLR BLUE#
AK23 RSV_TP[2]
AK18 N18 R221 1KR V_2P5_MCH
RSV_TP[3] DDC_DATA R229 1KR
L21 RSV_TP[4] DDC_CLK N20
L18 RSV_TP[5]
N21 RSV_TP[6] DREFCLKINP J15 V_1P5_CORE
DREFCLKINN H15

VCCA_HPLL C21 A20 V_2P5_MCH


VCCA_MPLL VCCAHPLL IREF
B20 VCCAMPLL
C VCCA_DPLLA C19 J20 EXTTS R226 10KR0402 V_2P5_MCH C
VCCA_DPLLB VCCADPLLA EXTTS#
B19 VCCADPLLB
VCCA_GPLL B17 H20 TP21
VCCA_EXPPLL XORTEST

V_2P5_MCH D19 VCC2 ALLZTEST K18


L9 180L1500m_90 V_1P5_CORE

VCC_EXP
VCC_EXP
VCC_EXP
VCC_EXP
VCC_EXP
VCC_EXP
VCC_EXP
VCC_EXP
VCC_EXP
VCC_EXP
VCC_EXP
VCC_EXP
VCC_EXP
VCC_EXP
VCC_EXP
VCC_EXP
VCC_EXP
VCC_EXP
VCC_EXP
VCC_EXP
VCC_EXP
VCC_EXP
VCC_EXP
C18 VCCADAC
V_2P5_DAC_FILTERED B18
V_2P5_MCH VCCADAC
A18
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VSSA_DAC
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
1

C255 C260 C264


+

CD100U16EL7 C0.1U16Y0402 (INTEL-QG82945G-A2-LF)


2

A24
B23
B24
B25
B26
C23
C25
C26
D23
D24
D25
E23
E24
E26
E27
F23
F27
G23
H23
J23
K23
L23
M23
N23
P23

AF21
AF23
AF25
AF26
AF27
AF29
AG15
AG17
AG18
AG19
AG20
AG21
AG22
AG23
AG24
AJ15
AJ17
AJ18
AJ20

AE4
AE3
AE2
AD12
AD10
AD8
AD6
AD5
AD4
AD2
AD1
AC13
AC6
AC5
AA13
AA5
Y13
V13
V9
V10
V7
V6
V5
C0.01U16X0402
C326 C332
I = 70mA C10U10Y0805 C10U10Y0805
V_1P5_PCIEXPRESS
V_FSB_VTT

V_1P5_CORE CAPS for specific core MCH

CP6
VCC_DDR VCC_DDR
I = 60mA I = 55mA I = 45mA
X_COPPER C407 C10U10Y0805 C393 C10U10Y0805
L13 VCCA_MPLL L10 VCCA_DPLLA L12 1U500m_0805 R206 1R1% VCCA_GPLL
V_1P5_CORE V_1P5_CORE V_1P5_CORE
X_600L200m_500-1 10U125m_0805-1 C379 C10U10Y0805 C394 C0.1U16Y0402
1

R210 1R1% C263 C262


+

C285 C252 C294 C375 C0.1U16Y0402 C406 C10U10Y0805


_C1U6.3Y50402/80-20%
2

.CD220U10EL7 C0.1U16X0402 C10U10Y0805 C1U10X

D MCH MEMORY DECOUPLING D


CP7

S6 X_COPPER
I = 55mA X_COPPER I = 45mA 2 1 I = 1.5A
L11 VCCA_DPLLB L14 VCCA_HPLL R211 V_1P5_PCIEXPRESS
V_1P5_CORE V_1P5_CORE V_1P5_CORE
X_600L200m_500-1 X_0R0805 MICRO-START INT'L CO.,LTD.
1

10U125m_0805-1
+

Title
+

C253 C295 C286 R427 C254 C266 C10U10Y0805 C258


X_0R0805 CD220U10EL7 C0.1U16Y0402 MS-7204-30-060804K1
2

.CD220U10EL7 C0.1U16X0402 C0.1U16X0402 C261 C10U10Y0805


2 1
S7 X_COPPER Size Document Number Rev
Custom
Intel Lakeport-PCI EXPRESS 3.0
Date: Friday, August 04, 2006 Sheet 8 of 33
1 2 3 4 5
B
A

D
C

1
1

J7
J5
J2
E9
E7
E4
E3
B9
B6
B4

D5
D2
C7
C5
C3

G9
G7
G5
G3
F6
F2

J10
E32
E21
E20
E18
E17
E13
E12
B38
B33
B28
B22
B21
B13
B11
A35
A31
A26
A22
A16

H32
H27
H26
H17
H12
D21
D20
D16
D10
C40
C22
C14
C12

G38
G35
G32
G31
G29
G27
G24
G21
G20
G18
G15
G13
G10
F42
F34
F26
F18
F13
U14D

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

J12 VSS VSS AL37


J21 VSS VSS AL43
J24 VSS VSS AM5
J29 VSS VSS AM7
J38 VSS VSS AM9
J43 VSS VSS AM33
K3 VSS VSS AM36
K5 VSS VSS AM37
K6 VSS VSS AM39
K7 VSS VSS AN2
K10 VSS VSS AN4
K12 VSS VSS AN13
K13 VSS VSS AN15
K15 VSS VSS AN17
K20 VSS VSS AN18
K27 VSS VSS AN20
K32 VSS VSS AN21
K34 VSS VSS AN23
K37 VSS VSS AN24
K39 VSS VSS AN26
L2 VSS VSS AN27
L12 VSS VSS AN31
L13 VSS VSS AN42
L24 VSS VSS AP5
L26 VSS VSS AP7
L29 VSS VSS AP10
L31 AP12

2
2

VSS VSS
L42 VSS VSS AP29
M3 VSS VSS AP34
M5 VSS VSS AP38
M8 VSS VSS AR1
M9 VSS VSS AR6
M10 VSS VSS AR15
M13 VSS VSS AR20
M20 VSS VSS AR24
M21 VSS VSS AR32
M35 VSS VSS AR37
M37 VSS VSS AR39
N2 VSS VSS AR43
N6 VSS VSS AT12
N8 VSS VSS AT17
N13 VSS VSS AT18
N15 VSS VSS AT21
N24 VSS VSS AT23
N26 VSS VSS AT26
N27 VSS VSS AT27
N29 VSS VSS AT31
N31 VSS VSS AU6
N33 VSS VSS AU9
N36 VSS VSS AU12
N39 VSS VSS AU13
N43 VSS VSS AU15
P3 VSS VSS AU17
P14 VSS VSS AU20
P15 VSS VSS AU21
P24 VSS VSS AU24
P26 VSS VSS AU26
P27 VSS VSS AU29
P29 VSS VSS AU32

3
3

P30 VSS VSS AU34


R6 VSS VSS AV2
R9 VSS VSS AV10
R12 VSS VSS AV17
R14 VSS VSS AV37
R30 VSS VSS AW10
R31 VSS VSS BA4
R34 VSS VSS BA42
R37 VSS VSS BB3
R39 VSS VSS BB6
T2 VSS VSS BB11
T42 VSS VSS BB14
U3 VSS VSS BB19
U5 VSS VSS BB34
U9 VSS VSS BB39
U12 VSS VSS BB41
U14 VSS VSS BC9
U31 VSS VSS A4
U33 VSS VSS A40
U36 VSS VSS D1
U38 VSS VSS D43
V2 VSS VSS R26
V8 VSS VSS R29
V11 VSS VSS U29
V12 VSS VSS V24
V14 VSS VSS V26
V34 VSS VSS V29
V36 VSS VSS W21
V37 VSS VSS W23
V38 VSS VSS W25
V39 VSS VSS Y20
V43 VSS VSS Y22
W3 Y24
4
4

VSS VSS
Y2 VSS VSS Y26
Y5 VSS VSS Y29
Y6 VSS VSS AA25
Y9 VSS VSS AA27
Y12 VSS VSS AA29
Y14 VSS VSS AC19
Y31 VSS VSS AC25
Y35 VSS VSS AC29
Y37 VSS VSS AD18
Y39 VSS VSS AD20
Y42 VSS VSS AD22
AA3 VSS VSS AD24
AA8 VSS VSS AD27
AF18 VSS VSS AD29
Title

Size

AE21 AE19
Date:

VSS VSS
AE23 VSS VSS AF20
Custom

AE25 VSS VSS AF22


L17 VSS VSS AF24
VSS AY1
VSS BC4
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

Document Number
AJ7
AL1
AL2
AL3
AL7

AF1
AF2
AF3
AF5

AB2
AC2
AC3
AC7
AD7
AD9

Friday, August 04, 2006


AJ10
AJ30
AJ31
AJ33
AJ35
AJ37
AL10
AL12
AL13
AL15
AL18
AL21
AL23
AL24
AL27
AL32
AL33

AF33
AF36
AF38
AF43

AA11
AA12
AA14
AA21
AA23
AA31
AA33
AA36
AB43
AK24
AK26
AK29
AK30

AC10
AC14
AC21
AC23
AC31
AC36
AC37
AC38
AC39
AD11
AD13
AD33
AD35
AD37
AD42
AH42

AG30
AG31
AG33
AG36
AG37
AG38
AG39

Intel lakeport
MS-7204-30-060804K1

GND
(INTEL-QG82945G-A2-LF)

5
5

Sheet
9
of
33
3.0
Rev
MICRO-START INT'L CO.,LTD.
B
A

D
C
1 2 3 4 5

U10A

A20M# AH28 H_A20M# 3


CPUSLP# AG27
FERR# AG26 H_FERR# 3,4
AG22 SERIRQ R262 10KR0402
IGNNE# H_IGNNE# 3 VCC3
E18 AF22 KBRST# R259 10KR0402
17,28 AD0 AD0 INIT# H_INIT# 3
C18 AG21 A20GATER268 10KR0402
17,28 AD1 AD1 INIT3_3V# FWH_INIT# 15
17,28 AD2 A16 AD2 INTR AF25 H_INTR 3
A 17,28 AD3 F18 AD3 NMI AH24 H_NMI 3 A
17,28 AD4 E16 AD4 SMI# AF23 ICH_H_SMI# 3

CPU
17,28 AD5 A18 AD5 STPCLK# AH22 H_STPCLK# 3
E17 AG23 KBRST#
17,28 AD6 AD6 RCIN# KBRST# 14
A17 AE22 A20GATE
17,28 AD7 AD7 A20GATE A20GATE 14
17,28 AD8 A15 AD8 THRMTRIP# AF26 TRMTRIP# 3,4
17,28 AD9 C14 AD9 GPO49/CPUPWRGD AG24 H_PWRGD 3,4
17,28 AD10 E14 AD10
D14 R205
17,28 AD11 AD11
B12 C26 R_PLTRST# 33R0402-2
17,28 AD12 AD12 PLTRST# PLTRST# 6
17,28 AD13 C13 AD13
17,28 AD14 G15 AD14 PERN_1 F26 HSI_N1 25
17,28 AD15 G13 AD15 PERP_1 F25 HSI_P1 25
E12 E28 HSO_CN1 C267 C0.1U16X0402
17,28 AD16 AD16 PETN_1 HSO_N1 25
C11 E27 HSO_CP1 C271 C0.1U16X0402
17,28 AD17 AD17 PETP_1 HSO_P1 25
17,28 AD18 D11 AD18
17,28 AD19 A11 AD19 PERN_2 H26 Closer ICH7 5/7/20

PCI
17,28 AD20 A10 AD20 PERP_2 H25
17,28 AD21 F11 AD21 PETN_2 G28
17,28 AD22 F10 AD22 PETP_2 G27
17,28 AD23 E9 AD23

PCI EXPRESS
17,28 AD24 D9 AD24 PERN_3 K26
17,28 AD25 B9 AD25 PERP_3 K25
A8 J28

INTERFACE
17,28 AD26 AD26 PETN_3
17,28 AD27 A6 AD27 PETP_3 J27
17,28 AD28 C7 AD28
17,28 AD29 B6 AD29 PERN_4 M26
17,28 AD30 E6 AD30 PERP_4 M25
17,28 AD31 D6 AD31 PETN_4 L28
B L27 B
PETP_4
17,28 C_BE#0 B15 C/BE0#
17,28 C_BE#1 C12 C/BE1# PERN_5 P26
17,28 C_BE#2 D12 C/BE2# PERP_5 P25
C15 N28
17,28

17,28
C_BE#3

DEVSEL# A12
F16
C/BE3#

DEVSEL#
ICH 7 PETN_5
PETP_5 N27

T25
17,28 FRAME# FRAME# PERN_6
17,28 IRDY# A7 IRDY# PERP_6 T24
F14 R28
17,28
17,28
17,28
TRDY#
STOP#
PAR
F15
E10
E11
TRDY#
STOP#
PAR
PART 1/3 PETN_6
PETP_6 R27

28 LOCK# PLOCK#
28 SERR# B10 SERR#
17,28 PERR# C9 PERR#
28 PCI_PME# B19 PME# DMI_0RXN V26 DMI_RXN0 8
DMI_0RXP V25 DMI_RXP0 8
13 ICH_PCLK A9 PCICLK DMI_0TXN U28 DMI_TXN0 8
R193 PCIRSTICH# B18 U27
25,26 PCIRST_ICH# PCIRST# DMI_0TXP DMI_TXP0 8
33R0402-2
C246 Y26
DMI_1RXN DMI_RXN1 8

DIRECT MEDIA
28 PREQ#0 D7 REQ0# DMI_1RXP Y25 DMI_RXP1 8
C10P25N0402 C16 W28
28 PREQ#1 REQ1# DMI_1TXN DMI_TXN1 8
28 PREQ#2 C17 REQ2# DMI_1TXP W27 DMI_TXP1 8
28 PREQ#3 E13 REQ3#
17,28 PREQ#4 A13 GPIO22/REQ4# DMI_2RXN AB26 DMI_RXN2 8
28 PREQ#5 C8 GPIO1/REQ5# DMI_2RXP AB25 DMI_RXP2 8
DMI_2TXN AA28 DMI_TXN2 8
C DMI_2TXP AA27 DMI_TXP2 8 C
28 PGNT#0 E7 GNT0#
28 PGNT#1 D16 GNT1# DMI_3RXN AD25 DMI_RXN3 8
VCC3 D17 AD24
GNT2# DMI_3RXP DMI_RXP3 8
28 PGNT#3 F13 GNT3# DMI_3TXN AC28 DMI_TXN3 8
R191 X_1KR0402-1 PGNT#4 PGNT#4A14 AC27
17 PGNT#4 GPIO48/GNT4# DMI_3TXP DMI_TXP3 8
R190 X_1KR0402-1 PGNT#5 PGNT#5 D8
28 PGNT#5 GPIO17/GNT5#
DMI_CLKN AE28 CK_PE_100M_ICH# 13
INTERRUPT

28 PIRQ#A A3 PIRQA# DMI_CLKP AE27 CK_PE_100M_ICH 13


28 PIRQ#B B4 PIRQB#
C5 C25 R209 24.9R1%
28 PIRQ#C PIRQC# DMI_ZCOMP V_DMI
17,28 PIRQ#D B5 PIRQD# DMI_IRCOMP D25
28 PIRQ#E G8 GPIO2/PIRQE#
F7 V3 LAN_CLK
28
28
28
PIRQ#F
PIRQ#G
PIRQ#H
F8
G7
GPIO3/PIRQF#
GPIO4/PIRQG#
GPIO5/PIRQH#
LAN_CLK
LAN_RSTSYNC
LAN_RXD0
U3
U5
LAN_RSTSYNC
LAN_RXD0
LAN_CLK
LAN_RSTSYNC
LAN_RXD0
16
16
16
for 82562
V4 LAN_RXD1 VCC3_SB
LAN_RXD1 LAN_RXD1 16
SERIRQ AH21 T5 LAN_RXD2
14 SERIRQ SERIRQ LAN_RXD2 LAN_RXD2 16
24 IDE_IRQ AH16 IDEIRQ
U7 LAN_TXD0 R420
RN51 LAN_TXD0 LAN_TXD0 16
V6 LAN_TXD1 10KR0402 VCC3_SB
LAN_TXD1 LAN_TXD1 16
LAN

7 8 P5 V7 LAN_TXD2 U33
VCC3_SB SPI_MOSI LAN_TXD2 LAN_TXD2 16
SPI

5 6 P2 AT93C46-10SI-2.7-A
SPI_MISO
3 4 P6 SPI_CS# EE_CS W1 1 CS VCC 8
1 2 R2 SPI_CLK EE_DIN W3 2 SK NC 7
P1 SPI_ARB EE_DOUT Y2 3 DI NC 6
8P4R-10KR0402 Y1 4 DO C550
EE_SHCLK GND 5
X_C10P10N
VSS_10
VSS_11
VSS_12
VSS_13
VSS_14
VSS_15
VSS_16
VSS_17
VSS_18
VSS_19
VSS_20
VSS_21
VSS_22
VSS_23
VSS_24
VSS_25
VSS_26
VSS_27
VSS_28
VSS_29
VSS_30
VSS_31
VSS_32
VSS_33
VSS_34
VSS_35
VSS_36
VSS_37
VSS_38
VSS_39
VSS_40

If SPI not be
VSS_0
VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9

D D
used, should
be NC
(INTEL-NH82801GR-A1-LF)
A4
A23
B1
B8
B11
B14
B17
B20
B26
B28
C2
C6
D10
D13
D18
D21
D24
E1
E2
E8
E15
F3
F4
F5
F12
F27
F28
G1
G2
G5
G6
G9
G14
G18
G21
G24
G25
G26
H3
H4
H5

GNT5 GNT4 MICRO-START INT'L CO.,LTD.


0 1 Flash cycles routed to SPI Title
MS-7204-30-060804K1
1 0 Flash cycles routed to PCI
Size Document Number Rev
1 1 Flash cycles routed to LPC Custom ICH7 - PCI, DMI, CPU, IRQ 3.0
Date: Friday, August 04, 2006 Sheet 10 of 33
1 2 3 4 5
1 2 3 4 5

* Please put this block close ICH7


* Put a GND Plane under X'TAL 14 RI#
RI# 2 1 VCC3_SB
SM_LINK0 4 3
SM_LINK1 6 5 RN23
EXTSMI# 8 7 8P4R-10KR0402

LINK_ALERT# R203 10KR0402


DDACK# AF16 PD_DACK# 24 R89 reserved, The signal has an
LPC_AD0 AA6 AE15 GPI10 R195 10KR0402
14,15 LPC_AD0
LPC_AD1 AB5
LAD0 DDREQ
AF15
PD_DREQ 24 integrated pull-up of 18k~42k. GPI14 R227 10KR0402
14,15 LPC_AD1 LAD1 DIOR# PD_IOR# 24

LPC
LPC_AD2 AC4 AH15
14,15 LPC_AD2 LAD2 DIOW# PD_IOW# 24
LPC_AD3 Y6 AG16 GPI12 2 1
14,15 LPC_AD3 LAD3 IORDY PD_IORDY 24
LPC_DRQ#0 AC3 AH17 GPI13 4 3 RN22
14 LPC_DRQ#0 LDRQ_0# DA0 PD_A0 24
GPI23 AA5 AE17 6 5 8P4R-10KR0402
LDRQ_1#/GPI023 DA1 PD_A1 24
A AB3 AF17 GPI15 8 7 A
14,15 LPC_FRAME# LFRAME# DA2 PD_A2 24
DCS1# AE16 PD_CS#1 24
RN25 8P4R-33R0402 AD16 SIO_PME# 2 1
DCS3# PD_CS#3 24

AC-LINK
18 AC_RST# 1 2 ACRST# ACZBITCLK U1 ACZ_BCLK 4 3 RN21
18 AC_SDOUT 3 4 ACSDOUT ACRST# R5 ACZ_RST# DD_0 AB15 PDD0
PDD0 24
GPI9 6 5 8P4R-10KR0402
18 AC_SYNC 5 6 ACSYNC T2 ACZ_SDIN_0 DD_1 AE14 PDD1
PDD1 24
BATTLOW# 8 7
18 AC_BITCLK 7 8 ACZBITCLK T3 ACZ_SDIN_1 DD_2 AG13 PDD2
PDD2 24

P-ATA
T1 AF13 PDD3 AC_BITCLK R225 X_20KR1%0402 PWRBTN# R196 10KR0402
18 AC_SDIN ACZ_SDIN_2 DD_3 PDD3 24
ACSDOUT T4 AD14 PDD4 WAKE# R192 1KR0402-1
ACZ_SDOUT DD_4 PDD4 24
ACSYNC R6 AC13 PDD5
ACZ_SYNC DD_5 PDD5 24
C277 AD12 PDD6 SMBCLK_ICH R197 2.2KR0402
DD_6 PDD6 24
X__C10P25N0402/0.5 AC12 PDD7 SMBDATA_ICH R200 2.2KR0402
DD_7 PDD7 24
AE12 PDD8
DD_8 PDD8 24
F1 AF12 PDD9
20 USB0- USBP_0N DD_9 PDD9 24
F2 AB13 PDD10 R249
20 USB0+ USBP_0P DD_10 PDD10 24
G4 AC14 PDD11 PWR_GD GPI7 2 1
20 USB1- USBP_1N DD_11 PDD11 24 VCC3
G3 AF14 PDD12 GPI0 4 3
20 USB1+ USBP_1P DD_12 PDD12 24
H1 AH13 PDD13 10KR0402 GPI39 6 5 RN28
20 USB2- USBP_2N DD_13 PDD13 24
H2 AH14 PDD14 GPI38 8 7 8P4R-10KR0402
20 USB2+ USBP_2P DD_14 PDD14 24
J4 AC15 PDD15 ATADET0 R261 10KR0402
20 USB3- USBP_3N DD_15 PDD15 24
J3 GPI23 R243 X_10KR0402
20 USB3+ USBP_3P LPC_DRQ#0 R251 X_10KR0402
20 USB4- K1
K2
USBP_4N
AF3
Prevent leakage current BIOS_WP# R269 X_10KR0402
20 USB4+ USBP_4P SATA_0RXN SATA_RX#0 15
20 USB5- L4 USBP_5N SATA_0RXP AE3 SATA_RX0 15
L5 AG2 THERM# R260 4.7KR0402-1
20 USB5+ USBP_5P SATA_0TXN SATA_TX#0 15 VCC3
20 USB6- M1 USBP_6N SATA_0TXP AH2 SATA_TX0 15

USB
M2 INTRUDER# R238 1MR0402
20 USB6+ USBP_6P VBAT
20 USB7- N4 USBP_7N SATA_1RXN AE5 SATA_RX#1 15
20 USB7+ N3 USBP_7P SATA_1RXP AD5 SATA_RX1 15
SATA_1TXN AG4 SATA_TX#1 15
B D3
SATA_1TXP AH4 SATA_TX1 15 Energy Lake B
20 OC#1 OC_0#
C4 OC_1# SATA_2RXN AF7 SATA_RX#2 15
20 OC#2 D5 OC_2# SATA_2RXP AE7 SATA_RX2 15
D4 OC_3# SATA_2TXN AG6 SATA_TX#2 15
E5 OC_4# SATA_2TXP AH6 SATA_TX2 15
C3 GPIO29/OC_5#
ICH 7

S-ATA
20 OC#3 A2 GPIO30/OC_6# SATA_3RXN AD9 SATA_RX#3 15
B3 GPIO31/OC_7# SATA_3RXP AE9 SATA_RX3 15
SATA_3TXN AG8 SATA_TX#3 15
Resistor R201 USB_BIAS D1 AH8
USBRBIAS SATA_3TXP SATA_TX3 15
length less D2
than 500mil 22.6R1% USBRBIAS#
PART 2/3 SATA_CLKN
SATA_CLKP
AF1
AE1
CK_ICHSATA# 13
CK_ICHSATA 13 CLEAR CMOS JUMPER
SM BUS

R198 33R0402-2 SMBCLK_ICH C22


13,22,25,26,27 SMBCLK SMBCLK
R202 33R0402-2 SMBDATA_ICH B22 AH10 SATA_BIASR263 24.9R1%
13,22,25,26,27 SMBDATA SMBDATA SATARBIASN
EXTSMI# B23 AG10
24 EXTSMI# GPIO11/SMBALERT# SATARBIASP
C584 C0.1U25X AF18 SATALED# PH1*3/BLACK
SATALED# SATALED# 24
SM_LINK0 B25 AF19 2 1 RTC_RST#
SMLINK_0 GPIO21/SATA_0GP VCC3 1
SM_LINK1 A25 AH18 4 3 CLEAR_CMOS
LINK_ALERT# SMLINK_1 GPIO19/SATA_1GP RN26 2
A26 LINKALERT# GPIO36/SATA_2GP AH19 6 5 3
AE19 8 7 8P4R-10KR0402
GPIO37/SATA_3GP JBAT1
RSMRST# Y4 AB18 GPI0
14,16,26 RSMRST# RSMRST# BMBUSY#/GPIO0
LAN_RST# C19 AC21 ATADET0
16 LAN_RST# LAN_RST# GPIO6 ATADET0 24
PWRBTN# C23 AC18 GPI7
14 PWRBTN# PWRBTN# GPIO7
POWER MGNT

PWR_GD SIO_PME#
6,26 PWR_GD AA4 PWROK GPIO8 E21
GPI9
SIO_PME# 14 CMOS
13 VRM_GD_SB
FPRST#
AD22
A22
VRMPWRGD GPIO9 E20
A20 GPI10 CLEAR NORMAL CLEAR
24 FPRST# SYS_RESET# GPIO10
F19 GPI12
SLP_S3# GPIO12 GPI13
14,23,26 SLP_S3#
SLP_S4#
B24
D23
SLP_S3# GPIO13 E19
R4 GPI14
JBAT1 (1-2) (2-3)
26 SLP_S4# SLP_S4# GPIO14
C F22 GPIO E22 GPI15 C
SLP_S5# GPIO15
A27 SUS_STAT# GPIO16/DPRSLPVR AC22
C20 SUSCLK GPIO18/STPPCI# AC20

INTRUDER# Y5
GPIO20/STPCPU# AF21
R3
FAN_CTRL
FAN_CTRL 15 BATTERY
INTRUDER# GPIO24 LAN_DISABLE# 16 VCC3_SB VBAT
WAKE# F20 D20
25 WAKE# WAKE# GPIO25
RI# A28 A21 D4 BAT54C
THERM# RI# EL_RSVD/GPIO26 R1305 1KR0402-1
JPWD2 VBAT_SIO
14 THERM# AF20 THRM# EL_STATE0/GPIO27 B21
E23 Virtual off# X_XX 2
EL_STATE1/GPIO28 VCC3_SB
AG18 3 D5 R91
ICH_SYNC# GPIO32/CLKRUN# BIOS_WP# VBAT_DZ R74 1K BAT1
6 ICH_SYNC# AH20 MCH_SYNC# GPIO33/AZ_DOCK_EN# AC19 BIOS_WP# 15 1
SPKR A19 U2 R1306
24 SPKR SPKR GPIO34/AZ_DOCK_RST#
AD21 10KR0402 S-1N5817_DO214AC
1K
GPIO35/SATACLKREQ#
MISC

BATTLOW# C21 AD20 GPI38 1PS226


TP19 TP_1 BATLOW#/TP_0 GPIO38 GPI39 R88
AF24 DPRSTP#/TP_1 GPIO39 AE20
TP1 TP_2 AH25 RTC_RST# BAT1
TP7 TP_3 DPSLP#/TP_2 VBAT
F21 TP_3 VCCRTC W5 VBAT
W4 INTVRMEN R236 330KR0402 C121 20KR
INTVRMEN VBAT
RTC

AA3 CLEAR_CMOS C122


RTCRST# RTCX1 C1U10X0805
13 CK_14M_ICH AC1 CLK14 RTCX1 AB1 C1U10X0805
B2 AB2 RTCX2 C301 The RC time delay should be in the
13 CK_48M_USB_ICH CLK48 RTCX2
Close to Pin AA3 of ICH7. range of 18~25ms, C66 for VBAT.
X_C0.1U16Y0402
VSS_41
VSS_42
VSS_43
VSS_44
VSS_45
VSS_46
VSS_47
VSS_48
VSS_49
VSS_50
VSS_51
VSS_52
VSS_53
VSS_54
VSS_55
VSS_56
VSS_57
VSS_58
VSS_59
VSS_60
VSS_61
VSS_62
VSS_63
VSS_64
VSS_65
VSS_66
VSS_67
VSS_68
VSS_69
VSS_70
VSS_71
VSS_72
VSS_73
VSS_74
VSS_75
VSS_76
VSS_77
VSS_78
VSS_79
VSS_80
VSS_81
VSS_82
VSS_83
VSS_84
VSS_85

VCC3_SB
VCC5_SB
RTCX1 C313 C18P50N0402
H24
H27
H28
J1
J2
J5
J24
J25
J26
K24
K27
K28
L13
L15
L24
L25
L26
M3
M4
M5
M12
M13
M14
M15
M16
M17
M24
M27
M28
N1
N2
N5
N6
N11
N12
N13
N14
N15
N16
N17
N18
N24
N25
N26
P3

Y1
R194 single Y3 R246
R239 32.768KHZ12.5P_D-1 10MR1%0402
10KR0402 4.7KR0402-1 Firmware Hub/LPC interface: source
RTCX2
D U10B C310 C18P50N0402 D
FPRST# (INTEL-NH82801GR-A1-LF) No external pull-ups required.
RSMRST#
Connect straight to FWH/LPC.
R199
R242
ICH7 integrates 20K ohm mominal
GPIO[0~7,36~39]: should be pulled up to Vcc3_3 if not used.
X_1KR0402
10KR0402 GPIO[8~15,19~22]:should be pulled up to VccSus3_3 if not pull-up. MICRO-START INT'L CO.,LTD.
Title
used.
MS-7204-30-060804K1
Size Document Number Rev
Custom ICH7 - LPC, ATA, USB, GPIO 3.0
Date: Friday, August 04, 2006 Sheet 11 of 33
1 2 3 4 5
1 2 3 4 5

Vcc1_5_B = 0.74A
Vcc1_5_A = 0.97A 1.05V POWER
V_1P5_CORE

AG14
AG17
AG20
AG25
AD11
AD15
AD19
AD23

AH23
AH27
AH12
AE11
AE13
AE18
AE21
AE24
AE25

AF11
AF27
AF28
U10C (INTEL-NH82801GR-A1-LF)

AG1
AG3
AG7
AD4
AD7
AD8

AH1
AH3
AH7
AE2
AE4
AE8

AF2
AF4
AF8
V_1P5_CORE C248 C0.1U16Y0402 9VSB V_1P5_CORE

5VREF-AD17-G10

D
R234

VSS_169
VSS_170
VSS_171
VSS_172
VSS_173
VSS_174
VSS_175
VSS_176
VSS_177
VSS_178
VSS_179
VSS_180
VSS_181
VSS_182
VSS_183
VSS_184
VSS_185
VSS_186
VSS_187
VSS_188
VSS_189
VSS_190
VSS_191
VSS_192
VSS_193
VSS_194
VSS_195
VSS_196
VSS_197
VSS_198
VSS_199
VSS_200
VSS_201
VSS_202
VSS_203
V_DMI D26 AD17 5VREF G Q30
VCC1_5_B V5REF1 26 V1P2_DRV
D27 G10 C354 C355 N-2N7002_SOT23 U12A 1.31A
0R0805 VCC1_5_B V5REF2
D28 A5

S
VCC1_5_B VCC3_3-1

8
C314 EC29 C0.1U16Y0402 C0.1U16Y0402 R224 V_1P05_CORE

+
E24 AA7

D
VCC1_5_B VCC3_3-2 V1P05_REF Q34
A E25 VCC1_5_B VCC3_3-3 AB12 26 V1P2_SEN 3 + A
C10U10Y0805 CD470U6.3EL11-RH E26 AB20 1 G

2
VCC1_5_B VCC3_3-4 C241 150R1%
F23 VCC1_5_B VCC3_3-5 AC16 2 -
F24 AD13 C306 N-P3055LD_TO252

S
VCC1_5_B VCC3_3-6 C0.1U16Y0402
G22 AD18 R231

4
VCC1_5_B VCC3_3-7 C0.1U16Y0402
G23 VCC1_5_B VCC3_3-8 AG12 VCC3 1.05KR1%

1
LM358MX_SOIC8 EC34

+
H22 VCC1_5_B VCC3_3-9 AG15
H23 VCC1_5_B VCC3_3-10 AG19
J22 AH11

2
VCC1_5_B VCC3_3-11

1.5V DMI POWER


J23 B13 .CD1000U6.3EL11.5
VCC1_5_B VCC3_3-12
K22 VCC1_5_B VCC3_3-13 B16
K23 VCC1_5_B VCC3_3-14 B27
L22 VCC1_5_B VCC3_3-15 B7
L23 VCC1_5_B VCC3_3-16 C10
M22 D15 V_FSB_VTT
VCC1_5_B VCC3_3-17
M23 VCC1_5_B VCC3_3-18 F9
N22 VCC1_5_B VCC3_3-19 G11
N23 VCC1_5_B VCC3_3-20 G12
P22 VCC1_5_B VCC3_3-21 G16
P23 U6 C318 C325
VCC1_5_B VCC3_3-22
C10U10Y0805 C0.01U25X0402

S0 POWER
R22 VCC1_5_B
R23 AE23
PCI_E-D28-T28-AD20 R24
VCC1_5_B
VCC1_5_B
VCC_CPU_IO-1
VCC_CPU_IO-2 AE26 L15 1U500m_0805 V_1P5_CORE
R25 AH26 R254 1R1%
V_DMI VCC1_5_B VCC_CPU_IO-3 L16 10U100m_0805
R26 VCC1_5_B V_1P5_CORE
T22 AG28 R257 0R0402
VCC1_5_B VCCDMIPLL C331 C0.1U16Y
T23 VCC1_5_B VCCSATAPLL AD2
T26 VCC1_5_B VCCUSBPLL C1
T27
C265 C291 C309 T28
VCC1_5_B
L11
VCCUSBPLL--C1
V_1P5_CORE
Decoupling Caps for ICH7
B
C0.1U16Y0402 C0.1U16Y0402 C0.1U16Y0402 U22
U23
V22
VCC1_5_B
VCC1_5_B
VCC1_5_B
ICH 7 VCC1_05-1
VCC1_05-2
VCC1_05-3
L12
L14
L16
C251 B
VCC1_5_B VCC1_05-4 C0.01U25X0402
V23 L17
W22
VCC1_5_B
VCC1_5_B
VCC1_05-5
VCC1_05-6 L18 PCI-A5--B7--C10 AUDIO-U6
W23 M11 VCC3 VCC3
Y22
Y23
AA22
VCC1_5_B
VCC1_5_B
VCC1_5_B
PART 3/3 VCC1_05-7
VCC1_05-8
VCC1_05-9
M18
P11
P18
V_1P05_CORE C244 C338 C344 C240
VCC1_5_B VCC1_05-10 C0.1U16Y0402 C0.1U16Y0402 C0.1U16Y0402 C0.1U16Y0402
AA23 VCC1_5_B VCC1_05-11 T11
AB22 T18 C361 C359 C357
VCC1_5_B VCC1_05-12 C10U10Y0805 C0.1U16X C1U16Y
AB23 VCC1_5_B VCC1_05-13 U11
AC23 VCC1_5_B VCC1_05-14 U18
AC24 VCC1_5_B VCC1_05-15 V11
AC25 V12
AC26
VCC1_5_B
VCC1_5_B
VCC1_05-16
VCC1_05-17 V14 IDE-U6 SATA-AH11 PCI_E-B27
AD26 VCC1_5_B VCC1_05-18 V16 VCC3 VCC3 VCC3
AD27 VCC1_5_B VCC1_05-19 V17
AD28 V18 C243 C242 C340
VCC1_5_B VCC1_05-20
C0.1U16Y0402 C0.1U16Y0402 C0.1U16Y0402

V_1P5_CORE

V5REF_SUS F6 VCC5_SB
A1 VCC1_5-1 VCCSUS3_3-1 A24 V5REF_SUS--F6
AB10 C24 C259
C342 AB17
VCC1_5-2
VCC1_5-3
VCCSUS3_3-2
VCCSUS3_3-3 D19 C0.1U16Y0402 VCC_CPU_IO
1.5V CORE WELL POWER

AB7 VCC1_5-4 VCCSUS3_3-4 D22


C10U10Y0805 AB8 E3
VCC1_5-5 VCCSUS3_3-5 V_FSB_VTT
AB9 G19
AC10
VCC1_5-6
VCC1_5-7
VCCSUS3_3-6
VCCSUS3_3-7 K3 AE23 AE26 AH26

S5 POWER
C AC17 VCC1_5-8 VCCSUS3_3-8 K4 C
AC6 K5 C333 C329 C330
VCC1_5-9 VCCSUS3_3-9 C0.1U16Y0402 C0.1U16Y0402 C4.7U10Y0805
AC7 VCC1_5-10 VCCSUS3_3-10 K6
AC8 VCC1_5-11 VCCSUS3_3-11 L1
AD10 L2
USB--A1 AD6
VCC1_5-12
VCC1_5-13
VCCSUS3_3-12
VCCSUS3_3-13 L3 VCC3_SB
V_1P5_CORE AE10 VCC1_5-14 VCCSUS3_3-14 L6
AE6 VCC1_5-15 VCCSUS3_3-15 L7
AF10 VCC1_5-16 VCCSUS3_3-16 M6
AF5 VCC1_5-17 VCCSUS3_3-17 M7
C341 AF6 N7
C0.1U16X0402 AF9
VCC1_5-18
VCC1_5-19
VCCSUS3_3-18
VCCSUS3_3-19 P7 USB-k3--L1--E3 LAN-V1
AG5 VCC1_5-20 VCCSUS3_3-20 R7 VCC3_SB VCC3_SB
AG9 V1
AH5
VCC1_5-21
VCC1_5-22
VCCSUS3_3-21
VCCSUS3_3-22 V5 V1
AH9 VCC1_5-23 VCCSUS3_3-23 W2
F17 W7 C270 C293 C274 C249
VCC1_5-24 VCCSUS3_3-24
G17 VCC1_5-25 C0.01U25X0402 C0.1U16Y0402
H6 C0.1U16X0402 C0.1U16X0402
VCC1_5-26 TP1_VCCSUS1_05 TP17
H7 AA2
SATA-AH5-AH9 J6
VCC1_5-27
VCC1_5-28
VCCSUS1_05-1
VCCSUS1_05-2 C28 TP2_VCCSUS1_05 TP5
J7 G20 TP3_VCCSUS1_05 TP6
V_1P5_CORE VCC1_5-29 VCCSUS1_05-3
T7 K7 TP4_VCCSUS1_05 TP9
VCC1_5-30 VCCSUS1_05-4 TP5_VCCSUS1_05 TP15
VCCSUS1_05-5 Y7

C339 C343 5VREF Sequencing Circuit


C0.1U16Y0402 C0.1U16Y0402
VCC3 DZ1 R267 1KR0402-1
VCC3 VCC5
S-1N5817_DO214AC
VSS_168
VSS_167
VSS_166
VSS_165
VSS_164
VSS_163
VSS_162
VSS_161
VSS_160
VSS_159
VSS_158
VSS_157
VSS_156
VSS_155
VSS_154
VSS_153
VSS_152
VSS_151
VSS_150
VSS_149
VSS_148
VSS_147
VSS_146
VSS_145
VSS_144
VSS_143
VSS_142
VSS_141
VSS_140
VSS_139
VSS_138
VSS_137
VSS_136
VSS_135
VSS_134
VSS_133
VSS_132
VSS_131
VSS_130
VSS_129
VSS_128
VSS_127
VSS_126
VSS_125
VSS_124
VSS_123
VSS_122
VSS_121
VSS_120
VSS_119
VSS_118
VSS_117
VSS_116
VSS_115
VSS_114
VSS_113
VSS_112
VSS_111
VSS_110
VSS_109
VSS_108
VSS_107
VSS_106
VSS_105
VSS_104
VSS_103
VSS_102
VSS_101
VSS_100

C337
VSS_99
VSS_98
VSS_97
D
VSS_96 C0.1U16Y0402 5VREF D
C358 C0.1U16Y0402
AG11
P4
P12
P13
P14
P15
P16
P17
P24
P27
P28
R1
R11
R12
R13
E4

C27
R14
R15
R16
R17
R18
T6
T12
T13
T14
T15
T16
T17
U4
U12
U13
U14
U15
U16
U17
U24
U25
U26
V2
V13
V15
V24
V27
V28
W6
W24
W25
W26
Y3
Y24
Y27
Y28
AA1
AA24
AA25
AA26
AB4
AB6
AB11
AB14
AB16
AB19
AB21
AB24
AB27
AB28
AC2
AC5
AC9
AC11
AD1
AD3

MICRO-START INT'L CO.,LTD.


Title
MS-7204-30-060804K1
Size Document Number Rev
Custom
ICH7 - POWER 3.0
Date: Friday, August 04, 2006 Sheet 12 of 33
1 2 3 4 5
1 2 3 4 5

Clock Generator - ICS954119DF Trace length less than 0.5inchs


S2 X_COPPER
U9 CK_H_CPU R122 49.9R1%0402
2 1
43 MCHCLK R131 33R0402 CK_H_MCH CK_H_CPU# R123 49.9R1%0402
CPUCLKT0 CK_H_MCH 6
VCC3V 41 42 MCHCLK# R132 33R0402 CK_H_MCH# CK_H_MCH R120 49.9R1%0402
VCC3 VDDCPU CPUCLKC0 CK_H_MCH# 6
FB2 CK_H_MCH# R121 49.9R1%0402
C180 X_80L3_100_0805 C185 40 CPUCLK R133 33R0402 CK_H_CPU
CPUCLKT1 CK_H_CPU 3
C0.1U25Y C0.1U25Y 38 39 CPUCLK# R134 33R0402 CK_H_CPU# CK_PE_100M_1PORT R124 49.9R1%0402
GND CPUCLKC1 CK_H_CPU# 3
C197 CK_PE_100M_1PORT# R125 49.9R1%0402
X_C10U10Y1206 RN15 8P4R-33R0402
A 19 17 CK_PE_SRC1 CK_PE_SRC2# 8 7 CK_PE_100M_MCH# 8P4R-51R0402 A
VDDPCIEX PCIEXT0 CK_PE_100M_MCH# 8
18 CK_PE_SRC1# CK_PE_SRC2 6 5 CK_PE_100M_MCH CK_PE_100M_16PORT 7 8RN18
PCIEXC0 CK_PE_100M_MCH 8
34 21 CK_PE_SRC2 CK_PE_SRC1# 4 3 CK_PE_100M_16PORT# CK_PE_100M_16PORT# 5 6
VDDPCIEX#34 PCIEXT1 CK_PE_100M_16PORT# 25
22 CK_PE_SRC2# CK_PE_SRC1 2 1 CK_PE_100M_16PORT CK_PE_100M_MCH 3 4
PCIEXC1 CK_PE_100M_16PORT 25
28 23 CK_PE_SRC3 CK_PE_100M_MCH# 1 2
VDDSRC PCIEXT2 CK_PE_SRC3# CK_PE_SRC6# CK_ICHSATA# CK_PE_100M_ICH
PCIEXC2 24 8 7 CK_ICHSATA# 11 7 8
31 CK_PE_SRC4 CK_PE_SRC6 6 5 CK_ICHSATA CK_PE_100M_ICH# 5 6
PCIEXT3 CK_ICHSATA 11
C186 29 30 CK_PE_SRC4# CK_PE_SRC3# 4 3 CK_PE_100M_ICH# CK_ICHSATA 3 4
GND PCIEXC3 CK_PE_100M_ICH# 10
C0.1U25Y 33 CK_PE_SRC3 2 1 CK_PE_100M_ICH CK_ICHSATA# 1 2
PCIEXT4 CK_PE_100M_ICH 10
C207 25 32 RN16 8P4R-33R0402 RN19
S1 X_COPPER C0.1U25Y C204 GND PCIEXC4 CK_PE_SRC6 8P4R-51R0402
SRCCLKT 26
2 1 C0.1U25Y 20 27 CK_PE_SRC6#
GND SRCCLKC CK_PE_SRC4 R135 33R0402 CK_PE_100M_1PORT CK_PE_100M_1PORT 25
VCC3VA 35 CK_PE_SRC4# R136 33R0402 CK_PE_100M_1PORT# CK_PE_100M_1PORT# 25
VCC3 VDDA
FB1 C187 14
X_80L3_100_0805 +1 C0.1U25Y DOTT_96MHZ
DOTC_96MHZ 15 2 1
CB3 36 PCICLK_F0 4 3 PCI_CLK0
GNDA PCI_CLK0 28
C0.1U25Y EC15 FSA 6 5 ICH_PCLK
ICH_PCLK 10
2

X_CD10U16EL5 ALE 6 7 PCICLK_F0 FSB 8 7 SIO_PCLK PCI_CLK4 C580 C10P50N0402


VDDPCI PCICLK_F0 SIO_PCLK 14
C205 8 FSA RN17 8P4R-33R0402
C0.1U25Y FSLA/PCICLK_F1 FSB PCICLK3 PCI_CLK3
FSLB/PCICLK_F2 9 1 2 PCI_CLK3 28
5 53 PCICLK1 3 4 PCI_CLK1 C178 X_C10P50N0402
GND PCICLK0 PCICLK1 PCI_CLK1 PCI_CLK0 C213 C10P50N0402
PCICLK1 54 5 6 PCI_CLK1 28
56 55 PCICLK3 RN12 7 8 8P4R-33R0402 PCI_CLK3 C176 C10P50N0402
C193 VDDPCI#56 PCICLK2 1394CLK
PCICLK3 2
C0.1U25Y 3 PCICLK4 PCICLK4 R169 33R PCI_CLK4 ICH_PCLK C214 X_C10P50N0402
PCICLK4 PCI_CLK4 28
1 4 FWHPCLK FWHPCLK R170 33R FWH_PCLK FWH_PCLK C212 X_C10P50N0402
GND PCICLK5 FWH_PCLK 15
1394CLK R175 33R 1394_PCLK SIO_PCLK C215 X_C10P50N0402
1394_PCLK 17
10 1394_PCLK C208 X_C10P50N0402
B C206 VDD48 SIO48 R171 33R SIO_48 CK_48M_USB_ICHC217 X_C10P50N0402 B
**SEL24_48#/24_48MHZ 11 SIO_48 14
C0.1U25Y 12 USB48 R172 33R CK_48M_USB_ICH SIO_48 C216 C10P50N0402
USB_48MHZ CK_48M_USB_ICH 11
13 GND
46 51 FSC R130 33R0402 CK_14M_ICH EMC HF filter capacitors, located close to PLL
VDDREF REF0/FSLC CK_14M_ICH 11
C182 50 ICH14M
C0.1U25Y REF0/FSC PLL_XI C195 C179
X1 48
49 Y2 C18P50N X_C10P50N0402
GND 14.318MHZ
X2 47
PLL_XO C199 USB48 R180 X_4.7KR
SMBCLK R114 33R SMBCLK_CLK 45 C18P50N
11,22,25,26,27 SMBCLK SMBDATA R115 33R SMBDATA_CLK SCLK CK_VID_GD# EMI SUGGESTION 3/15
11,22,25,26,27 SMBDATA 44 SDATA Vtt_PwrGd#/PD 16
VCC3V R128 8.2KR CLK_RST# 52 Reset# IREF R127 475R1% SIO48 R179 4.7KR
IREF 37

SIO HI=24MHZ
ICS954119_SSOP56
SIO LOW=48MHZ

Clock Generator VTT Power Down Block


VCC3

VCC3_SB
C C
BSEL[0..2] Level Shift R181
1KR0402-1
R173
VCCP 1KR0402-1

C
VRM_GD_SB 11

BSEL TABLE CK_VID_GD# B Q33


RN14 R177 N-MMBT3904_NL_SOT23
1 2 FSB 1KR0402-1
2 1 0 FSB FREQUENCY

C
3,4,8 H_FSBSEL1

E
3 4 FSA
3,4,8 H_FSBSEL0
5 6 VIDGD B Q25
0 0 0 267 MHZ (1067) FSC
26,27 VRM_GD
N-MMBT3904_NL_SOT23
3,4,8 H_FSBSEL2 7 8
0 1 0 200 MHZ (800)

E
8P4R-10KR0402 R176
0 0 1 133 MHZ (533) 10KR0402

R178 X_0R0402

D REV:3.0 D

MICRO-START INT'L CO.,LTD.


Title
MS-7204-30-060804K1
Size Document Number Rev
Custom ICS954119DF Clock Gen 3.0
Date: Friday, August 04, 2006 Sheet 13 of 33
1 2 3 4 5
1 2 3 4 5

LPC SUPER I/O W83627DHF REV:3.0 SERIAL PORT 1


U8
30 1 DRVDEN0
15,17,26 PCIRST_BUF# LRESET# DRVDEN0
21 3 INDEX#
13 SIO_PCLK PCICLK INDEX# MOA# COM1

10
10 SERIRQ 23 SERIRQ MOA# 4
22 6 DSA#
11 LPC_DRQ#0 LDRQ# DSA# VCC3
29 8 DIR# NDCDA# 1 6 NDSRA#
11,15 LPC_FRAME# LFRAME# DIR#
86 9 STEP# NSINA 2 7 NRTSA C304 X_C0.1U25Y D15 1N4148S
11 SIO_PME# PME# STEP# +12V
10 WRDATA# NSOUTA 3 8 NCTSA# U13
WD# WE# NDTRA NRIA# C300 C0.1U25Y
11,15 LPC_AD0 27 LAD[0] WE# 11 4 9 20 VCC VDD 1
A 26 13 TRACK0# 5 VCC5 NRIA# 2 19 RIA# A
11,15 LPC_AD1 LAD[1] TRAK0# RA1 RY1
25 14 WP# CONN-COM_green NDCDA# 3 18 DCDA#
11,15 LPC_AD2 LAD[2] WP# RA2 RY2 ALARM 24
24 15 RDDATA# NDSRA# 4 17 DSRA# R116 R113
11,15 LPC_AD3

11
LAD[3] RDATA# HEAD# NSINA RA3 RY3 SINA 10KR R423 4.7KR
16 7 14

C
HEAD# DSKCHG# NCTSA# RA4 RY4 CTSA# 0R Q19
125 VID3 DSKCHG# 17 9 RA5 RY5 12
123 VID5 GP23/SCK 2 B
128 CN1 RTSA# 16 5 NRTSA
VID0 R112 X__0R-1 NRTSA SOUTA DA1 DY1 NSOUTA
121 5 1 2 8P4C-180P50N 15 6 N-MMBT3904_NL_SOT23

C
THERM# 11

E
VID7 OVT#/HM_SMI# NDSRA# DTRA# DA2 DY2 NDTRA Q53
126 VID2 3 4 13 DA3 DY3 8
124 42 S_PD0 NDCDA# 5 6 11 10 D17 1N4148S BEEP B
VID4 PD0 S_PD1 NRIA# GND VSS -12V
127 VID1 PD1 41 7 8
122 40 S_PD2 GD75232_SSOP20 C336 C0.1U25Y X_N-MMBT3904_NL_SOT23

E
VID6 PD2 S_PD3 NCTSA#
PD3 39 1 2
R149 X_15KR1%TMP_VREF 101 38 S_PD4 NDTRA 3 4 CN2
VREF PD4 S_PD5 NSINA 8P4C-180P50N CP9 CP8
102 AUXTIN PD5 37 5 6
H_THERMDA 103 36 S_PD6 NSOUTA 7 8 X_COPPER X_COPPER
3 H_THERMDA CPUTIN PD6
SYS_TMP 104 35 S_PD7 2 1 2 1
C198 C2200P50N SYSTIN PD7 SLCT
93 RSTOUT1# SLCT 31
H_THERMDC 94 32 PE
3 H_THERMDC RSTOUT0# PE
AVCC 95 33 BUSY
AVCC BUSY ACK#
96 VIN3 ACK# 34
VCC5
R156 22.1KR1% 97
98
VIN2 SLIN# 43
44
S_SLIN#
S_PINIT# PARALLAL PORT D16 1N4148S LPT_VC
VIN1 INIT# VCC5
+12V R159 56KR1% 99 45 S_ERR# RN8 PRND0 1 2
VIN0 ERR# S_AFD# PRND3 S_PD4 PRND4 PRND1 CN5
VCCP 100 CPUVCORE AFD# 46 1 2 1 2 3 4
R157 10KR1% R160 10KR S_RSTB# PRND2 4 RN30 S_PD5 PRND5 PRND2 8P4C-220P50N

26
STB# 47 3 3 4 5 6
H_THERMDC 105 PRND1 5 6 8P4R-2.2KR S_PD6 5 6 PRND6 PRND3 7 8
R158 10KR1% CPUD-(AGND) RSTB# AFD# PRND0 S_PD7 PRND7
106 PECISB GP34/RSTOUT4# 88 1 2 7 8 7 8
107 69 PRND0 3 4 ERR# PRND4 1 2
R140 0R0402 Vtt GP36 PRND1 PINIT# PRND7 8P4R-0R0402 PRND5 CN4
B 3 IO_PECI 108 PECI GP35 87 5 6 1 2 3 4 B
109 70 R152 1KR0402-1 PRND2 7 8 SLIN# PRND6 3 4 RN29 RN9 PRND6 5 6 8P4C-220P50N
SIC GP55/SUSLED PRND3 PRND5 S_PD0 PRND0 PRND7
110 SID 9 10 5 6 8P4R-2.2KR 1 2 7 8
56 DCDA# PRND4 11 12 PRND4 7 8 S_PD1 3 4 PRND1
GP61/DCDA# DSRA# PRND5 S_PD2 PRND2 ACK#
15 CPU_FAN 112 CPUFANIN0 GP66/DSRA# 50 13 14 5 6 1 2
119 53 SINA VCC5 PRND6 15 16 SLCT 1 2 S_PD3 7 8 PRND3 BUSY 3 4 CN3
GP21/CPUFANIN1 GP63/SINA RTSA# PRND7 PE PE
15 CPUFAN_PWM_1 115 CPUFANOUT0 GP65/HEFRAS/RTSA# 51 17 18 3 4 RN27 5 6 8P4C-220P50N
120 54 SOUTA RTSB#R162 X_4.7KR0402 ACK# 19 20 BUSY 5 6 8P4R-2.2KR 8P4R-0R0402 SWAP SLCT 7 8
GP20 / CPUFANOUT1 GP62/PENKBC/SOUTA CTSA# BUSY ACK#
15 SYS_FAN 113 SYSFANIN GP67/CTSA# 49 21 22 7 8
116 52 DTRA# DTRB#R163 X_4.7KR0402 PE 23 24 RN11 AFD# 1 2
15 SYSFAN_DC_1 SYSFANOUT GP64/PENROM/DTRA# RIA# SLCT SLIN# S_AFD# AFD# ERR# CN6
111 AUXFANIN0 GP60/RIA# 57 25 28 1 2 1 2 3 4
58 VCC5 PINIT# 3 4 RN32 S_ERR# 3 4 ERR# PINIT# 5 6 8P4C-220P50N
SI/AUXFANIN1 DCDB# LPT1 ERR# S_PINIT# PINIT# SLIN#
7 84 5 6 8P4R-2.2KR 5 6 7 8

27
AUXFANOUT GP41***/DCDB# DSRB# RN13 AFD# S_SLIN# SLIN#
GP46*/DSRB# 79 7 8 7 8
R165 2MR 76 82 SINB_IRRX RIB# 1 2 RSTB#
VBAT_SIO CASEOPEN# GP43***/IRRX/SINB
89 80 RTSB# DCDB# 3 4 DSUB25P_LPT RSTB# 8P4R-0R0402 C385
RSTOUT3#/GP33/SDA GP45***/RTSB# SOUTB_IRTX CTSB# R314 R126 C220P50N
90 RSTOUT2#/GP32/SCL
FAN_SET2/SOUTB / IRTX/GP42* 83 5 6
91 78 CTSB# DSRB# 7 8 2.2KR S_RSTB# RSTB#
GP31 CTSB# /GP47*** DTRB#
92
64
GP30
GP37
GP44*/DTRB#
GP40*/RIB#
81
85 RIB# remove R422 33ohm 0R0402
AP note 8P4R-4.7KR0402
VCC5_SB
D9 1N4148S
11 PWRBTN# 67
68
PSOUT#/GP57 GA20M 59
60
A20GATE
KBRST#
A20GATE 10 PS2 KEYBOARD & MOUSE CONNECTOR FLOPPY CONNECTOR
24 PWRBTIN PSIN/GP56 KBRST KBRST# 10 USB_STR1
PSON# 72 63 KBDAT#
24 PS_ON# R148 33R0402 PSON#/GP53 GP26/KDAT KBCLK# FDD1
11,23,26 SLP_S3# 73 SUSB#/GP52 GP27/KCLK 62

2
4
6
8
18 66 MSDAT# C269
13 SIO_48 IOCLK GP24/MDAT MSCLK# RN24 C0.1U25Y R212 DRVDEN0
GP25/MCLK 65 1 2
VCC3_SB C170 X_C10P50N 61 118 BEEP 8P4R-4.7KR 1KR JKBMS1 F2 4
VSB SO/BEEP

13
14
74 6

1
3
5
7
VBAT_SIO VBAT RMRST# R166 X_0R0402 120L600m_250 F-MICROSMD110 INDEX#
C GP51/RSMRST# 75 RSMRST# 11,16,26 7 8 C
C194 28 71 PWROK MSDAT# FB5 MS_DT 7 10 9 10 MOA#
C0.1U16Y0402 C200 VCC3 3VCC GP54/PWROK 120L600m_250 VCC5
12 3VCC#12 8 11 12
48 20 MSCLK# FB6 MS_CK 11 13 14 DSA#
C0.1U25Y 3VCC#48 VSS
VSS#55 55 12 9 15 16
GP50 77 19 120L600m_250 MS 17 18 DIR# INDEX# R26 1KR
GP50 /EN_GTL/WDTO# GP22/SCE# R146 X_1KR0402 KBDAT# FB3 KB_DT STEP# TRACK0#
114 SST FAN_SET /PLED 117 VCC3 1 4 19 20 7 8
R147 X_1KR0402 120L600m_250 2 21 22 WRDATA# WP# 5 6
W83627DHG-RH KBCLK# FB4 KB_CK 5 CONN-KB_MS 23 24 WE# RDDATA# 3 4
L2 6 3 25 26 TRACK0# DSKCHG# 1 2
X_0.22U200m KB 27 28 WP#
C273 C278 29 30 RDDATA# RN3

15
17
16
H_THERMDC 2 1 SIO_AGND C180P50N 31 32 HEAD# 8P4R-1KR
CP4 X_COPPER 2 1 C276 C282 33 34 DSKCHG#
CP3 X_COPPER C180P50N C180P50N
NEED INFORMED BIOS
C180P50N CONN-FDD(3)(5)V

Front LCD F3
LPC I/O STRAPPING RESISTOR Thermal Resistor Thermal Diode R155 C317 C10U10Y0805 WAKE ON RING F-MICROSMD110
BROWM
VCC5_SB
VCC3 1 2 4.7KR0402-1 PWROK
TMP_VREF R144 4.7KR LPC_FRAME# C189 C0.1U25Y H_THERMDC JFLCD
C100 IR_PWR
R142 1KR0402 SOUTA R153 C0.1U10Y 1
VCC3 R138 1KR0402 RTSA# 15KR1% SINB_IRRX 2
RI# 11 3
SYS_TMP R154 VCC3 SOUTB_IRTX 4
R137 X_1KR0402 SYS_TMP VCC5_SB 1 2 PSON# R240 5
RT1 JET1 R150 10R AVCC NRIA# Q31
D D
R141 1KR0402 DTRA# X_10KRT1% 1 C196 4.7KR0402-1 N-MMBT3904_NL_SOT23 AUDIO-CDIN1X4
Option 1
2 2 C2200P50N C169 C171 C181 C183 10KR0402
SIO_AGND R235
R161 1KR0402 GP50 When RT1 install,R153 _BH1X2BP_black SIO_AGND C0.1U25YC0.1U25YC0.1U25Y C0.1U16Y0402
change to 10K/1%. 10KR0402

JET1_X1 MICRO-START INT'L CO.,LTD.


Title
B+ MS-7204-30-060804K1
SOUTA L: KBC DISABLE H: KBC ENABLE 1 NOTE: LOCATE CLOSE
RTSA# L: CFAD=2E H: CFAD=4E 1 X_3904 with housing Size Document Number Rev
STATUS PANEL
DTRA# L: DISABLE SPI 0 H: ENABLE SPI
E-
Custom
LPC I/O - W83627EHF 3.0
GP50 L: TTL LEVEL 0 H: VRM10 LEVEL
Date: Friday, August 04, 2006 Sheet 14 of 33
1 2 3 4 5
1 2 3 4 5

C90
VCC5
CPU FAN C0.1U25Y +12V

D3 1N4148S AP note
C98 C0.1U25Y
R60 R63 R81 4.7KR R80 27KR
CPU_FAN 14
4.7KR 4.7KR

D
U5
CPUFAN_PWM_1 R71 100KR 1 14 CPUFAN_DRV G
14 CPUFAN_PWM_1 FAN1_IN FAN1_DRV
SYSFAN_DC_1 R72 100KR 2 13 CPUFAN_SEN Q4 3 R79
14 SYSFAN_DC_1 FAN2_IN FAN1_SEN
3 12 SYSFAN_DRV N-P3055LD_TO252 2 10KR
+12V

S
C96 C0.1U25Y VCC12 FAN2_DRV SYSFAN_SEN C81
4 C1 FAN2_SEN 11 1
5 10 X_C0.1U25Y
C2 FAN3_DRV C92 CPUFAN1
A 6 CHRPMP FAN3_SEN 9 A
C99 7 8 C0.1U25Y X_BH1X3B_white-2
C0.1U25Y GND FAN3_IN R51
W83391TS 10KR 4 VCC5
C97 3
2
C0.1U25Y VCC3 1 FAN_CTRL
CPUFAN2
BH1X4B_white R84

+1
R52 4.7KR D6 Q54

B
R59 3.48KR1% CT3 1N4148S N-2N7002_SOT23
4.7KR .CD470U16EL11.5

2
CPUFAN_PWM R83 C E CPUFAN_PWM_1
FAN_CTRL G Q6 200R
11 FAN_CTRL
R426 X_0R
N-2N7002_SOT23 AP note

S
+12V

+12V

R37 D2

D
4.7KR 1N4148S
SYSFAN_DRV G
Q1
C59 N-P3055LD_TO252
SERIAL ATA CONNECTOR BLOCK

S
R38 27KR
B SYS_FAN 14 B
C0.01U50X

Default 10nF ,
R62 R42 SATA1
3 Option 0 ohm
SYSFAN_SEN 2 10KR
1 9
10KR 1

+1
SYS_FAN1 C321 C0.01U10X0402SATA_CTX0 2
CT2 11 SATA_TX0
R61 BH1X3B_white-2 C322 C0.01U10X0402SATA_CTX#03
11 SATA_TX#0
3.48KR1% .CD470U16EL11.5 4

2
C327 C0.01U10X0402SATA_CRX#05
11 SATA_RX#0
C320 C0.01U10X0402SATA_CRX0 6
11 SATA_RX0
7
8

FIRMWARE HUB (FWH) CONN-SATA1P_orange


Use 4MB_[W39V040FBP] SATA2

9
CB4 VCC3 VCC3 1
C10U10Y0805 BIOS1 C352 C0.01U10X0402SATA_CTX1 2
11 SATA_TX1
1 32 C353 C0.01U10X0402SATA_CTX#13
VPP VCC 11 SATA_TX#1
PCIRST_BUF# 2 31 FWH_PCLK 4
14,17,26 PCIRST_BUF# RST# CLK FWH_PCLK 13 VCC5
REV3 3 30 F_GPI4 C348 C0.01U10X0402SATA_CRX#15
FGPI3 FGPI4 11 SATA_RX#1
REV2 4 29 C349 C0.01U10X0402SATA_CRX1 6
FGPI2 IC(VIL) 11 SATA_RX1
REV1 5 28 7
REV0 FGPI1 GNDA
6 FGPI0 VCCA 27 8
R164 1KR 7 26 CB5
C VCC3 WP# GND C
BIOS_WP# 8 25 X_C1U16Y
11 BIOS_WP# TBL# VCC
9 24 FWH_INIT# CONN-SATA1P_orange
ID3 INIT# FWH_INIT# 10
10 23 LPC_FRAME# Default 10nF ,
ID2 FWH4 LPC_FRAME# 11,14 SATA3
11 ID1 RFU 22 Option 0 ohm
R118 10KR
FWH_ID0 12 21
ID0 RFU
11,14 LPC_AD0
LPC_AD0
LPC_AD1
13
14
FWH0 RFU 20
19
FWH RESISTORS 9
1
11,14 LPC_AD1 FWH1 RFU
LPC_AD2 15 18 RN10 C346 C0.01U10X0402
SATA_CTX2 2
11,14 LPC_AD2 FWH2 RFU 11 SATA_TX2
16 17 LPC_AD3 8P4R-10KR C347 C0.01U10X0402
SATA_CTX#2 3
GND FWH3 LPC_AD3 11,14 11 SATA_TX#2
REV3 2 1 4
BIOS_4Mbit REV2 4 3 C350 C0.01U10X0402
SATA_CRX#2 5
11 SATA_RX#2
REV1 6 5 C351 C0.01U10X0402
SATA_CRX2 6
11 SATA_RX2
REV0 8 7 7
VCC3 8

F_GPI4 R145 10KR


CB6 C203 C190 CONN-SATA1P_orange
X_C0.1U25Y C1U16Y X_C0.1U25Y SATA4

9
1
C365 C0.01U10X0402SATA_CTX3 2
11 SATA_TX3
C366 C0.01U10X0402SATA_CTX#33
11 SATA_TX#3
4
If you place the jumper very closed to FWH bios socket, C367 C0.01U10X0402SATA_CRX#35
11 SATA_RX#3
C368 C0.01U10X0402SATA_CRX3 6
please use the same clock with FWH. But if you can not 11 SATA_RX3
7
VCC3 VCC5
place it so close, please use another clock to support it. 8
D D
JLPC1
FWH_PCLK R143 10R PCLK_LPC_HDR 1 2 CONN-SATA1P_orange
PCIRST_BUF# 3 4
LPC_AD0 5 6 FWH_ID0
LPC_AD1 7 8
LPC_AD2
LPC_AD3
9
11 12
MICRO-START INT'L CO.,LTD.
LPC_FRAME# 13 Title
14
MS-7204-30-060804K1
H2X7(10)_black-2pitch
Size Document Number Rev
Custom FWH/FAN/SATA 3.0
Date: Friday, August 04, 2006 Sheet 15 of 33
1 2 3 4 5
8 7 6 5 4 3 2 1

VCC3_SB VCC3_SB VCC3_SB

Ekron(82562) :10/100 LAN VCC3_SB

M10

G12
G13

H11
H12
P12

A11

K13

A10

K10
K11
F12
L12

L10
J12

J10
J11
M2

M4
G3
G5

G6
U32

D9

N6
N8

H4
H5

N7

C4
C5

H6
H7
H8
A2
A3
A7

P2

B6

B1
B2

K3
K4
K5
K6
K7
K8
K9
F3

L5
L9
J4

J5

J6
J7
J8
J9
C604 C609 C607 C603

3.3V
3.3V
3.3V

3.3V
3.3V
3.3V
3.3V
3.3V
3.3V
3.3V
3.3V
3.3V
3.3V
3.3V

3.3V
3.3V
3.3V
3.3V
3.3V
3.3V
3.3V
3.3V
NC
VCC
VCC
NC
NC
NC
NC
NC
VCC
VCC
VCC
VCC

VCC
NC
NC
VCCR
NC
VCCR
NC
VCCR
VCC
NC
NC
NC
NC
NC

NC
NC
NC
NC
NC

NC

VCC
VCC
C10U10Y0805 C10U10Y0805 X_C0.1U25Y

D D
C0.1U25Y
D1 C13 TR_D0+
NC TDP TR_D0-
C1 NC TDN C14
F1 E13 TR_D1+
NC RDP TR_D1-
F2 NC RDN E14
F13 VCC3_SB
NC
NC F14
G1 NC NC H13
G2 NC NC H14
P10 NC
P7 B11 100_LED#
NC SPDLED# ACT_LED# C508 C553 C612 C615
ACTLED# C11
M11 A12 1G_LED# C614
NC LILED# C10U10Y0805 X_C0.1U25Y
P11 NC X_C0.1U25Y
N11 K14 XTALI
NC X1 XTALO
X2 J14
A9 X_C0.1U25Y
NC X_C0.1U25Y
B9 NC NC B5
B10 NC NC A4 Giga-V
C9 P3 VCC3_SB
NC NC LAN_DISABLE# VCC3_SB
B4 NC
ADV10 / LAN_DISABLE# L7 R468 X_0R R474 X_2.2KR
LAN_DISABLE# 11 GPIO24
A5 P5 RSMRST#
NC NC RSMRST# 11,14,26
D3 C6 R464 1KR
NC NC VCC3_SB
A6 NC Only for 10/100
B12 C606 C601 C573 C579 C555
TOUT R461 649/6/1 C554
P4 NC RBIAS100 B13
P6 B14 R471 619/6/1 C4.7U10Y0805
NC RBIAS10 LAN_KIN_DISABLE_3 C4.7U10Y0805 X_C0.1U25Y
N4 NC TESTEN A13
N5 D12 LAN_KIN_DISABLE_1
C NC ISOL_TI LAN_KIN_DISABLE_0 C4.7U10Y0805 C
ISOL_EXEC D10
L3 D14 LAN_KIN_DISABLE_2 VCC3_SB C4.7U10Y0805 X_C0.1U25Y
NC ISOL_TCK
L2 NC
M14 LAN_TXD0_C
JTXD[0] LAN_TXD1_C
A8 NC JTXD[1] L13
B8 L14 LAN_TXD2_C
NC JTXD[2] LAN_RXD0_C
C8 NC JRXD[0] P13
C7 N13 LAN_RXD1_C C570 C591 C578 C557 C608 C610
NC JRXD[1] LAN_RXD2_C
JRXD[2] M12
VCC3_SB C3 M13 LAN_RSTSYNC_C C10U10Y0805 C10U10Y0805 C0.1U25Y C0.1U25Y C0.1U25Y C0.1U25Y
NC JRSTSYNC LAN_CLK_C
N10 NC JCLK N14
RN67
H1 D11 8P4R-33R0402
NC NC LAN_TXD0_C
H2 NC NC J13 2 1 LAN_TXD0 10
H3 L8 LAN_RSTSYNC_C 4 3
NC NC LAN_RSTSYNC 10
C605 J1 M5 LAN_TXD2_C 6 5
NC NC LAN_TXD2 10
X_C0.1U25Y J2
J3
NC NC M7
M9
LAN_TXD1_C
LAN_RXD0_C
8
2
7
1
LAN_TXD1 10 LAN CONNECTOR
NC NC LAN_RXD0 10
K1 N9 LAN_RXD1_C 4 3
NC NC LAN_RXD1 10
L1 P14 LAN_CLK_C 6 5
NC NC LAN_CLK 10 LAN_USB1B
M1 LAN_RXD2_C 8 7
NC LAN_RXD2 10
M3 B7 LAN_T19 19 AMBER+
NC VSS RN68 LAN_T20 AMBER-
N2 NC VCC E1 20
VCC3 P1 K12 8P4R-33R0402 R1275 X_0R 13 NC

EMI N3
M8
P9
NC
NC
NC
VSS
VSS
VSS
L11
L6
M6
VCC3_SB
TR_D0+
TR_D0-
TR_D1+
18
12
17
TD1+
TD1-
TD2+
NC VSS TR_D1- TD2-
E3 NC 3.3V L4 VCC3_SB 11
A14 E11 16 TD3+
NC VCCT TD3-
VCCT E12 10
15 TD4+
VSS
VSS
VSS

VSS

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
B C602 TD4- B
NC

NC

NC

NC

9
C576 R1276 X_0R 14 NC
X_C0.1U25Y X_0.01u/6/Y RJ45_100 GREEN+
BGA196_T1 21
A1
B3
C10
C12
C2
D13
D2
D4
D5
D6
D7
D8
E2
E4
E5
E6
E7
E8
E9
E10
F4
F5
F6
F7
F8
F9
F10
F11
G4
G7
G8
G9
G10
G11
G14
H9
H10
K2
N1
N12
P8
X_C0.1U25Y C632 RJ45_1G 22 GREEN-
C630
X_0.01u/6/Y USB/LAN_TR

VCC3_SB Integrated 10/100 LAN Transform 100_LED# RJ45_100


Applicable only for the 82562 Check P/N: N58-18F0031-S42 R458 X_330/6

82562 only
VCC3_SB Integrated Gigabit LAN Transform R456 X_0/6 RJ45_1G
VCC3_SB
10/100-54.9 ohm_1% Check P/N: N58-18F0041-S42
82573 only C625 LAN_T19
TR_D0+ R1256 54.9R1%0402 C626 X_C0.01U50X 1G_LED#R451 X_0/6
X_200R

X_200R

X_200R

X_200R

R462R463R466R473 R1253 TR_D0- R1257 54.9R1%0402


470R X_0.01u/6/Y
TR_D1+ R1258 54.9R1%0402 C627 X_C0.01U50X 82573 only

VCC3_SB RN69
TR_D1- R1259 54.9R1%0402
VCC3_SB
R453
R454
X_0/6
X_0/6
不上件
7 8 LAN_KIN_DISABLE_3
5 6 LAN_KIN_DISABLE_1 82562 only
3 4 LAN_KIN_DISABLE_0 ACT_LED# R455 X_0/6
R1267 1 2 LAN_KIN_DISABLE_2 1G_LED# R457 X_0/6
2.2KR _8P4R-100R0402-1 ] R459 TR_LED LAN_T20
X_330/6
A A
LAN_DISABLE# R1254 1KR Q64 Giga-49.9 ohm_1%
N-MMBT3904_NL_SOT23
R469 R470
C613
R1303 10KR X_200R X_4.99KR1% XTALO
11 LAN_RST#
Giga-V MSI
Stuff for
C22P50N Y5
25MHZ18P_D-1
<OrgAddr1>
MICRO-STAR INt'L CO., LTD.
C725 C611 Title
Kinnereth XTALI
C1U10Y MS-7204-30-060804K1
C22P50N Size Document Number Rev
3.0
MS-7204
Date: Friday, August 04, 2006 Sheet 16 of 33
8 7 6 5 4 3 2 1
1 2 3 4 5

XTPBIAS1 R46 54.9R1% TPA1+ VCC POWER SOUCE


VT6380P R45
R48
54.9R1%
54.9R1%
TPA1-
TPB1+
R47 54.9R1% TPB1-
C77 R58 4.99KR1%
VCC3 C0.33U16Y C78 C270P50N

P3VA CP2 X_COPPER VCC3 P3VD


R8 CLOSE TO CHIPSET P3VD 2 1
4.7KR
L1
A C6 XTPBIAS0 R44 54.9R1% TPA0+ X_0.18U240m A

+1
C0.1U50X R43 54.9R1% TPA0- C70 EC27 C66

PWRDET_VCC

+
+1

+1
C86 C87 EC16 EC20 C23
VCC3 R35 54.9R1% TPB0+ C85 C1U10X

2
C4.7U10Y0805

X_C4.7U10Y0805

X_CD22U16

CD10U16EL5
VCC3 P3VD P3VD P3VA analog PWR C68 R34 54.9R1% TPB0- REG_FB 2 1 C1U10X

2
X_CD10U16EL5

CD10U16EL5
C0.33U16Y R50 4.99KR1% C1U10X
C69 C270P50N CP1 X_COPPER

FOR 6308P

102
113
125

114
CLOSE TO CHIPSET

20
33

35

24

39
49

62
65
76
75
90
89
8
U3

PWRDET
VDD1
VDD2
VDD3
VDD4
VDD5

VDDC1

VDDC2

VDD6
VDDC3

VDDATX0
VDDARX0
VDDATX1
VDDARX1
VDDATX2
VDDARX2
RAMVDD
AD31 97 74 XTPBIAS0
10,28 AD31 AD30 AD31 XTPBIAS0 TPA0+
10,28 AD30 98 AD30 XTPA0P 73
AD29 99 72 TPA0-
10,28 AD29 AD28 AD29 XTPA0M TPB0+
10,28 AD28 100 AD28 XTPB0P 71
AD27 101 70 TPB0-
10,28 AD27 AD26 AD27 XTPB0M
10,28 AD26 104 AD26
AD25 105 81 XTPBIAS1
10,28
10,28
AD25
AD24
AD24 106
AD25
AD24
XTPBIAS1
XTPA1P 80 TPA1+ BJT_CTL REAR 1394 PORT 1394-EEPROM 24C02
AD23 109 79 TPA1-
10,28 AD23 AD22 AD23 XTPA1M TPB1+
10,28 AD22 110 AD22 XTPB1P 78 0: Internal power MOS
AD21 112 77 TPB1-
10,28 AD21 AD20 AD21 XTPB1M
10,28 AD20 116 AD20 1: External BJT
AD19 117 88
10,28 AD19 AD18 AD19 NC/REG_OUT REG_FB
10,28 AD18 118 AD18 NC/REG_fb 87
AD17 119 86 VCC3
10,28 AD17 AD16 AD17 NC#86 D11 FS4 U1
10,28 AD16 120 AD16 NC/REG_en 85
AD15 5 84 S-MBRS340_SMC F-SMD1812P150TF/24-RH I1394_USB1B 3
B 10,28 AD15 AD14 AD15 NC/INTREG +12V BUS_PWR 1394_VCC1 A2 B
10,28 AD14 6 AD14 +12V 9 PWR 2 A1
AD13 7 R30 11KR1% 1 4
10,28 AD13 AD12 AD13 R29 1KR TPA0+ A0 GND
10,28 AD12 10 AD12 XCPS 63 14 TPA+
AD11 11 TPA0- 13 R5 R4
10,28
10,28
10,28
AD11
AD10
AD9
AD10
AD9
12
13
AD11
AD10
AD9
VT6308P/VT6308S XREST 66 XREXT
C49 C0.1U50X TPB0+
TPB0-
12
11
TPA-
TPB+
TPB-
X_2.7KR X_2.7KR 7 WP VCC3
AD8 14 SDA/EEDI 5 8
10,28 AD8 AD7 AD8 SDA VCC
10,28 AD7 17 AD7 10 GND
AD6 18 52 C235 SCL/EECK 6
10,28
10,28
AD6
AD5
AD5 19
AD6
AD5
NC/D6/CMC_JMP
PHYRESET# 58 PHYRST# R14 I1394+USB*2 SCL
AD4 21 When cable power exists C0.1U25Y AT24C02/2M/SOIC8
10,28 AD4 AD3 AD4 C40 R3
10,28 AD3 22 AD3 NC/CTL0/PC0JMP 54
AD2 23 55 C1U10X XCPS status is 1 510R
10,28 AD2 AD1 AD2 NC/CTL1/PC1JMP
10,28 AD1 27 AD1 NC/D7/PC2JMP 53
AD0 28 No Cable Power
10,28 AD0 AD0
NC/LINKON 57 remove
C_BE#3 107 56
10,28 C_BE#3 C_BE#2 CBE3# NC/LREQ
10,28 C_BE#2 122 CBE2# NC/D5 51
C_BE#1 4 48 VCC3
10,28 C_BE#1 C_BE#0 CBE1# NC/D4
10,28 C_BE#0 15 CBE0# D3/CARDBUS 47
46 12CEEN R22 4.7KR
PAR D2/I2CEEN
3 45
10,28
10,28
PAR
FRAME#
FRAME# 123
PAR
FRAME#
NC/D1
NC/D0 44 I2C EEPROM ENABLE Decouping Cap.
IRDY# 124 43 24C02 : 4.7KR
10,28 IRDY# TRDY# IRDY# NC/MODE0
10,28 TRDY# 126 TRDY# NC/MODE1 42
STOP# 128 40
10,28 STOP#AD19 R27 100R 108
STOP#
IDSEL
NC/SCLK
NC/LPS 38 FRONT 1394 PORT VCC3 P3VD
DEVSEL# 127 67
10,28 DEVSEL# PREQ#4 DEVSEL# NC#67
C 10,28 PREQ#4 96 REQ# C
PGNT#4 95 32 SCL/EECK C10 C8
10 PGNT#4 GNT# EECK/SCL SDA/EEDI VCC3 C0.1U50X C0.1U50X
2 PERR# EEDI/SDA 31
10,28 PIRQ#D 91 INTA# EEDO 30
29 EECS R9 X_4.7KREEPROM LESS C9 C39
EECS C0.1U50X C0.1U50X
93 PCICLK
MOTHER BOARD ONLY
FS1 C51
10,28 PERR# C43 C12P50N F-SMD1812P150TF/24-RH C0.1U25Y C27 C7
92 PCIRST# XI 60
BUS_PWR 1394_VCC C0.1U50X C0.1U50X
13 1394_PCLK
GNDARX0
GNDARX1

GNDARX2

X1 24.576MHZ16P_D
GNDATX0

GNDATX1

GNDATX2

37
RAMVSS

PME# JFW1 C41 C37


VSSC2

VSSC1

VSSC3
VSS10

14,15,26 PCIRST_BUF# C45 C12P50N C0.1U50X C0.1U50X


VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8

VSS9

XO 61 10
1394_VCC 7 81394_VCC
TPB1+ 5 6 TPB1- C62
VT6308P-CD-RH 3 4 C0.1U50X
94
103
111
121
1
9
16
26
34

59
64
68
69
82
83

25

115
36

41
50

TPA1+ 1 2 TPA1-
BH2X5(9)USB_black
P3VA BUS_PWR

I\O GND PIN 36,41 I\O GND


PIN 25,115,50 Core GND XREXT C61 C52
C0.1U50X C1000P50X
C65 R49
analog GND C47P50N 6.2KR1% C64 C53
PIN 34 內部SRAM GND C0.1U50X C0.1U50X

REV:3.0 C63
C0.1U50X
D IDSEL REQ/GNT INTERRUPT D
--------------------------
AD19 # 4 PIRQ#D .

MICRO-START INT'L CO.,LTD.


Title
MS-7204-30-060804K1
Size Document Number Rev
Custom VIA VT6308 3.0
Date: Friday, August 04, 2006 Sheet 17 of 33
1 2 3 4 5
1 2 3 4 5

SURR_OUT_R
SURR_OUT_R 19
ALC888 CODEC SURR_OUT_L
SURR_OUT_L 19
CNT_OUT
19 CNT_OUT
LFE_OUT
19 LFE_OUT
L21
L22
SIDE_SURR_L
60L2.5_40
60L2.5_40
L20 L19
60L2.5_40 60L2.5_40
FRONT AUDIO
19 SIDE_SURR_L
SIDE_SURR_R
19 SIDE_SURR_R

A L24 A
60L2.5_40
AVDD5 MIC2_VREFO
L23
60L2.5_40 LINE2_VREFO
SPDIF_IN R353 10R
19 SPDIF_IN

3
SPDIF_OUT L17 D29 D30
19 SPDIF_OUT
120L600m_250 R434 C296 S-BAT54A_SOT23 S-BAT54A_SOT23

SPDIFO

SOT23

SOT23
SPDIFI
C464 20KR1%0402 C10U10Y0805 GPI to
VCC3 C47P50N0402 South

1
Bridge

48
47
46
45
44
43
42

41
40
39

38
37

2
4
6
8
U18
C459 RN52

SPDIFI

LFE-OUT
CEN-OUT
SPDIFO

SURR_BL

AVSS2

JDREF/JD3
SURR-OUTL

AVDD2
SURR_BR

SURR-OUT-R

L1_REFR
36 FRONTOUT_R L25 60L2.5_40 8P4R-4.7KR AVDD5
FR-OUTR FRONT_OUT_R 19
C0.1U10X0402 35 FRONTOUT_L L26 60L2.5_40
FRONT_OUT_L 19

1
3
5
7
FR-OUTL
1 DVDD1 JAUD1is failure footprint,
PERSENCE R460 X_0R 2 34 SENSE_B
R481 100KR0402 XTL_IN SENSEB/FMIC1 CVOL R352 X_10KR should be used COM_PORT R482
VCC3 3
4
XTL_OUT VREFOUT2 33 AVDD5 Input 10KR
DVSS1
MIC1_REFR/FMIC2 32
5 31 LINE2_VREFO MIC2-L EC65 1+ 2CD10U16EL5 R479 100R MIC2-2L 1 2
11 AC_SDOUT SDATA_OUT L2_REF/JD4
R351 0R ACBITCLK 6 MIC2-R EC63 1+ 2CD10U16EL5 R480 100R MIC2-2R 3 4 PERSENCE
11 AC_BITCLK BIT_CLK
7 30 MIC2_VREFO F_LINE2_R EC62 1+ 2 F_LIN2_R R387 100R FLINE2_R 5 6
R346 22R ACSDIN DVSS2 MIC2_REF/AFILT2 CD100U25EL11-RH FRONT_I/O_JD
11 AC_SDIN 8 SDATA_IN L1_REFL/AFILT1 29 7
9 F_LINE2_L EC58 1+ 2 F_LIN2_L R388 100R FLINE2_L 9 10
DVDD2 CD100U25EL11-RH
11 AC_SYNC 10 SYNC MIC1_REFL 28
11 AC_RST# 11 RESET#
B 12 27 AZ_VREF C766C767509 511 JAUD1 R439 C510 B
C454 PC_BEEP VREF R477 BH2X5(8)COM_blue 20KR1%0402 X_C0.1U50Y
Output
LINE2R/AUXR
LINE2L/AUXL

C441 26 22KR0402 R440


MIC2R/JD1

AVSS1
MIC2L/JD2

C0.1U10X0402 C22P10N 25 C287 R475 C470P50X C470P50X 39.2KR1%0402


AVDD1 AVDD5
SENSEA

CD-GND 22KR0402
C10U10Y0805

MIC2R
MIC1L

LIN1R
LIN1L
CD-R C470P50X C470P50X
CD-L

R476 R478
C288 22KR0402 22KR0402
ALC883/LQFP48 C10U10Y0805
13

14
15

16
17

18
19
20

21
22

23
SENSE_A 24
LINE1_R 19 Remove R244(4.7K)
LINE1_L 19
F_LINE_IN_R F_LINE_IN_R 19 47K change to 0ohm by RTL suggested
F_LINE_IN_L F_LINE_IN_L 19
F_LINE2_L
F_LINE2_R VDO_R
MIC2-L VDO_G
MIC2-R VDO_L

C C

AUDIO CODE REGULATORS


0.8A/15V
Trace Width 30mils.
VCC5_SB
ALC883 JACK DETECT
+12V D22
RCA Line-in ( Input) U17
1N4148S AVDD5

LT1087S_SOT89 S-1N5817_DO214AC SENSE_A R432 _5.1KR1%0402-LF FRONT_OUT_R-JD


+12VA_IN 3 2 R358 10KR1%0402 LINE1_R-JD FRONT_OUT_R-JD 19
VIN VOUT R325 X_20KR1%0402 LINE1_R-JD 19
RN70 JL_IN1 D20 R431 39.2KR1%0402 SURR_OUT_R-JD
ADJ

8P4R-47KR0402 R337 C583 SURR_OUT_R-JD 19


C428 C0.1U50Y C302 C440
VDO_R 1 2 VIDEO_R 4 C473 C10U10Y0805 C0.1U50Y SENSE_B R425 _5.1KR1%0402-LF SIDE_SURR_R-JD
1

C523 3 4 3 C4.7U16Y1206 C1U16Y 100R1% R424 10KR1%0402 CNT_OUT-JD SIDE_SURR_R-JD 19


C1U16Y0805 5 6 2 R433 0R FRONT_I/O_JD CNT_OUT-JD 19
VDO_L 7 8 VIDEO_L 1 5 AVDD5_ADJ
C525
C1U16Y0805
VDO_G R338
C524 BH1X4_black-RH 300R1%
Closer to Codec.
C1U16Y0805 S4 X_COPPER S5 X_COPPER S3 X_COPPER
D 2 1 1 2 2 1 D

MICRO-START INT'L CO.,LTD.


Title
MS-7204-30-060804K1
Size Document Number Rev
Custom
Azalia CODEC-ALC882 3.0
Date: Friday, August 04, 2006 Sheet 18 of 33
1 2 3 4 5
1 2 3 4 5

Audio Connector

EC57 AUDIO1A EC120 AUDIO1D


A CD10U16EL5-RH (Upper) CD10U16EL5-RH (Upper) A
18 FRONT_OUT_R
FRONT_OUT_R 1+ 2 FRNT_OUT_R D4 18 LFE_OUT
LFE_OUT 1+ 2 LFEOUT A4
FRONT_OUT_R-JD D3 CNT_OUT-JD A3
18 FRONT_OUT_R-JD 18 CNT_OUT-JD
D2 A2
18 FRONT_OUT_L
FRONT_OUT_L 1+ 2 FRNT_OUT_L D1 18 CNT_OUT
CNT_OUT 1+ 2 CNTOUT A1
G2 G1
EC56 _JACK-AUDIOX6-26P_L-bgp_R-bog EC121 _JACK-AUDIOX6-26P_L-bgp_R-bog
CD10U16EL5-RH CD10U16EL5-RH
Front out Center/Bass
R446 R447

2
4
6
8

2
4
6
8
PORT D 22KR0402 22KR0402 PORT G
R442 R443 CN7 LIME Output CN8 ORANGE
22KR0402 22KR0402
8P4C-100P50N 8P4C-100P50N

1
3
5
7

1
3
5
7
Output

AUDIO1E
EC122 AUDIO1B EC123
CD10U16EL5-RH (Middle) CD10U16EL5-RH (Middle)
18 SIDE_SURR_R
SIDE_SURR_R 1+ 2 SIDESUR_R E4 18 SURR_OUT_R
SURR_OUT_R 1+ 2 SURR_R B4
SIDE_SURR_R-JD E3 SURR_OUT_R-JD B3
18 SIDE_SURR_R-JD 18 SURR_OUT_R-JD
E2 B2
18 SIDE_SURR_L
SIDE_SURR_L 1+ 2 SIDESUR_L E1 18 SURR_OUT_L
SURR_OUT_L 1+ 2 SURR_L B1
G2 G1
EC124 _JACK-AUDIOX6-26P_L-bgp_R-bog EC125 _JACK-AUDIOX6-26P_L-bgp_R-bog
CD10U16EL5-RH CD10U16EL5-RH
Side Surround Back Surround
B R448 R449 B
R444 R445 PORT H 22KR0402 22KR0402 PORT A
22KR0402 22KR0402 GRAY BLOCK

Output
Output

SCART INTERFACE AUDIO OUT


AUDIO1C
EC126 _JACK-AUDIOX6-26P_L-bgp_R-bog AUDIO1F
CD10U16EL5-RH R375 (Down) C727 JSCA1
Not Used _JACK-AUDIOX6-26P_L-bgp_R-bog
18 LINE1_R 1+ 2 LINE_IN_R 47KR LI_R F4 C1U16Y (Down)
LINE1_R-JD F3 MEC1 F_LINE_IN_L1 1 C4
18 LINE1_R-JD 18 F_LINE_IN_L
F2 G5 2 C3 MEC2
18 LINE1_L 1+ 2 LINE_IN_L LI_L F1 G6 3 C2 G3
R380 G2 F_LINE_IN_R1 4 C1 G4
18 F_LINE_IN_R
EC127 47KR G1
CD10U16EL5-RH C728

3
R340 R339 C493 C486 Line in C1U16Y D24 D23 AUDIO-MONO
47KR 47KR C220P50N C220P50N 1 2 1 2 GREEN Mic in
PORT C
BLUE Input X_BAV99LT1_SOT23 X_BAV99LT1_SOT23 PORT B
PING
Output
C
RTL hope to remove AVDD5 AVDD5
C

0.1uF change to 0.01uF by RTL suggested


SPDIF OUT
SPDIF2
OPTO+RCA SPDIF OUT

C413 R330
5 5 SPDIF IN
SPDIFOUT SPDIF_O SPDIF1
18 SPDIF_OUT
3N 3N OPTO+RCA SPDIF IN
C0.01U16X 100R 2S 2S
5 5
LED
C726
A C0.01U16X
GND DRIVE L18 C404 OPT_IN
VCC5 B VCC 3N 3N
SPDIF_OUT C IC SPDIF_IN SPDIF_CIN SPDIF_I 2S
VIN 18 SPDIF_IN 2S
TX
MEC1 120L600m_250 C0.01U16X R441 LED
C422 C412 C431 MEC1 C405 VCC5 0R A VOUT
R332 R329 C100P50N B DRIVE
220R X_C100P50N C100P50N C0.1U25Y CONN-RCA_SPDIF_OUT X_75R GND IC
C VCC
RX
C396 MEC1
MEC1
VCC5 C0.1U25Y
CONN-RCA_SPDIF_IN
680pF change to 100pF by RTL suggested
R359
D 0R D
SPDOUT1
C415 R331 1
18 SPDIF_OUT 2
3 R258,R260 change from 150ohm to 10K by RTL suggested
C0.01U16X 100R C279 change from 0.1uF to 0.01uF by RTL suggested
R334
220R
C427 C434
BH1X3_black-RH
R261 change from 47K to 75ohm by RTL suggested MICRO-START INT'L CO.,LTD.
X_C100P50N C0.1U25Y Title
MS-7204-30-060804K1
Size Document Number Rev
REV:3.0 Custom
Audio Jacks 3.0
Date: Friday, August 04, 2006 Sheet 19 of 33
1 2 3 4 5
1 2 3 4 5

POWER CIRCUIT FOR USB PORT 0,1,2,3 POWER CIRCUIT FOR USB PORT 4,5,6,7

SVCC2 SVCC3

SVCC1
USB_STR1 FS3 F1
FS2
USB_STR USB_STR
A F-MINISMDM260 R187 F-MINISMDC110 R208 A

1
F-MINISMDM260 R117 R188 R213 EC28

+
27KR 27KR
27KR R129 1KR 1KR
11 OC#2 11 OC#3
1KR CD470U6.3EL11-RH
11 OC#1

2
C250 R186 C247 R207
C237 R119 C0.1U25Y 51KR1% C0.1U25Y 51KR1%
C0.1U25Y 51KR1%
FRONT USB CONNECTOR FRONT USB CONNECTOR
NEAR USB CONNECTOR

FRONT PANEL USB CONNECTOR FOR USB PORT 4,5,6,7


REAR PANEL USB CONNECTOR FOR USB PORT 0,1
SVCC3 SVCC2
SVCC1

5
+1
USB_D4- C191 USB6- 6 4 USB7- USB2- 6 4 USB3-
11 USB4- CT5
X_C0.1U25Y
1

.CD1000U6.3EL11.5 USB6+ 1 3 USB7+ USB2+ 1 3 USB3+

2
L8 I1394_USB1A
X_ACM2012-900-2P 5 15 D14 D12

2
USB_D4- 6 16 X_IPC220CZ6 /SO6 X_IPC220CZ6 /SO6
2

B USB_D4+ USB_D4+ 7 17 B
11 USB4+
8 UP 18
1 19
USB_D5- USB_D5- 2 20
11 USB5-
USB_D5+ 3 21 SVCC2
1

4 DOWN 22
L7
X_ACM2012-900-2P I1394+USB*2
2

USB_D5+
11 USB5+
NEAR USB CONNECTOR SVCC1 JUSB1
1 VCC VCC 2
USB2- 3 4 USB3-
11 USB2- USB0- USB1- USB3- 11
5

USB2+ 5 6 USB3+
11 USB2+ USB0+ USB1+ USB3+ 11
USB_D4- 6 4 USB_D5- 7 8 USBGND
GND GND
9 KEY USBOC 10
USB_D4+ 1 3 USB_D5+
MEDION-USB-IF-Y
D13
2

1
X_IPC220CZ6 /SO6

+
EC21 C233
.CD1000U6.3EL11.5 C0.1U25Y

2
USBGND
REAR PANEL USB CONNECTOR FOR USB PORT 2,3
C C

SVCC3

USB_D1-
11 USB1-
2

L4 SVCC1
X_ACM2012-900-2P JUSB2
1 VCC VCC 2
USB6- 3 4 USB7-
11 USB6- USB7- 11
1

USB_D1+ LAN_USB1A USB6+ USB0- USB1- USB7+


11 USB1+ 11 USB6+ 5 USB0+ USB1+ 6 USB7+ 11
5 23 7 8 USBGND
USB_D1- GND GND
6 24 9 KEY USBOC 10
USB_D0- USB_D1+ 7 25
11 USB0-
8 UP 26 MEDION-USB-IF
2

L3 1 27
X_ACM2012-900-2P USB_D0- 2 28
USB_D0+ 3 29
4 DOWN 30
1

USB_D0+
11 USB0+
USB/LAN_TR
NEAR USB CONNECTOR C268
CP11 X_COPPER C0.1U25Y
SVCC1 2 1 USBGND
5

D CP13 X_COPPER D
USB_D1- 6 4 USB_D0- 2 1

USB_D1+ 1 3 USB_D0+ CP12 X_COPPER


2 1
D10
MICRO-START INT'L CO.,LTD.
2

X_IPC220CZ6 /SO6
Title
MS-7204-30-060804K1
Size Document Number Rev
Custom USB CONNECTORS 3.0
Date: Friday, August 04, 2006 Sheet 20 of 33
1 2 3 4 5
1 2 3 4 5

VCC_DDR VCC3 VCC_DDR VCC3

102

191
194
181
175
170

197

172
187
184
178
189

238

161
162
167
168

102

191
194
181
175
170

197

172
187
184
178
189

238

161
162
167
168
DIMM1 DIMM2

55
18
19

68

51
56
62
72
75
78

53
59
64

69

67

42
43
48
49

55
18
19

68

51
56
62
72
75
78

53
59
64

69

67

42
43
48
49
NC/TEST

NC/TEST
RC0
RC1

VDD0
VDD1
VDD2
VDD3
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDDQ0
VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ7
VDDQ8
VDDQ9

CB0
CB1
CB2
CB3
CB4
CB5
CB6
CB7

RC0
RC1

VDD0
VDD1
VDD2
VDD3
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDDQ0
VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ7
VDDQ8
VDDQ9

CB0
CB1
CB2
CB3
CB4
CB5
CB6
CB7
NC

NC

VDDSPD

NC

NC

VDDSPD
SDQ_A0 3 SDQ_A0 3
7 SDQ_A0 DQ0 DQ0
SDQ_A1 4 7 SDQS_A0 SDQ_A1 4 7 SDQS_A0
7 SDQ_A1 DQ1 DQS0 DQ1 DQS0 SDQS_A0 7
SDQ_A2 9 6 SDQS_A#0 SDQ_A2 9 6 SDQS_A#0
7 SDQ_A2 DQ2 DQS0# DQ2 DQS0# SDQS_A#0 7
SDQ_A3 10 16 SDQS_A1 SDQ_A3 10 16 SDQS_A1
7 SDQ_A3 DQ3 DQS1 DQ3 DQS1 SDQS_A1 7
A SDQ_A4 122 15 SDQS_A#1 SDQ_A4 122 15 SDQS_A#1 A
7 SDQ_A4 DQ4 DQS1# DQ4 DQS1# SDQS_A#1 7
SDQ_A5 123 28 SDQS_A2 SDQ_A5 123 28 SDQS_A2
7 SDQ_A5 DQ5 DQS2 DQ5 DQS2 SDQS_A2 7
SDQ_A6 128 27 SDQS_A#2 SDQ_A6 128 27 SDQS_A#2
7 SDQ_A6 DQ6 DQS2# DQ6 DQS2# SDQS_A#2 7
SDQ_A7 129 37 SDQS_A3 SDQ_A7 129 37 SDQS_A3
7 SDQ_A7 DQ7 DQS3 DQ7 DQS3 SDQS_A3 7
SDQ_A8 12 36 SDQS_A#3 SDQ_A8 12 36 SDQS_A#3
7 SDQ_A8 DQ8 DQS3# DQ8 DQS3# SDQS_A#3 7
SDQ_A9 13 84 SDQS_A4 SDQ_A9 13 84 SDQS_A4
7 SDQ_A9 DQ9 DQS4 DQ9 DQS4 SDQS_A4 7
SDQ_A10 21 83 SDQS_A#4 SDQ_A10 21 83 SDQS_A#4
7 SDQ_A10 DQ10 DQS4# DQ10 DQS4# SDQS_A#4 7
SDQ_A11 22 93 SDQS_A5 SDQ_A11 22 93 SDQS_A5
7 SDQ_A11 DQ11 DQS5 DQ11 DQS5 SDQS_A5 7
SDQ_A12 131 92 SDQS_A#5 SDQ_A12 131 92 SDQS_A#5
7 SDQ_A12 DQ12 DQS5# DQ12 DQS5# SDQS_A#5 7
SDQ_A13 132 105 SDQS_A6 SDQ_A13 132 105 SDQS_A6
7 SDQ_A13 DQ13 DQS6 DQ13 DQS6 SDQS_A6 7
SDQ_A14 140 104 SDQS_A#6 SDQ_A14 140 104 SDQS_A#6
7 SDQ_A14 DQ14 DQS6# DQ14 DQS6# SDQS_A#6 7
SDQ_A15 141 114 SDQS_A7 SDQ_A15 141 114 SDQS_A7
7 SDQ_A15 DQ15 DQS7 DQ15 DQS7 SDQS_A7 7
SDQ_A16 24 113 SDQS_A#7 SDQ_A16 24 113 SDQS_A#7
7 SDQ_A16 DQ16 DQS7# DQ16 DQS7# SDQS_A#7 7
SDQ_A17 25 46 SDQ_A17 25 46
7 SDQ_A17 DQ17 DQS8 DQ17 DQS8
SDQ_A18 30 45 SDQ_A18 30 45
7 SDQ_A18 DQ18 DQS8# DQ18 DQS8#
SDQ_A19 31 SDQ_A19 31
7 SDQ_A19 DQ19 DQ19
SDQ_A20 143 188 MAA_A0 SDQ_A20 143 188 MAA_A0
7 SDQ_A20 DQ20 A0 DQ20 A0 MAA_A0 7,23
SDQ_A21 144 183 MAA_A1 SDQ_A21 144 183 MAA_A1
7 SDQ_A21 DQ21 A1 DQ21 A1 MAA_A1 7,23
SDQ_A22 149 63 MAA_A2 SDQ_A22 149 63 MAA_A2
7 SDQ_A22 DQ22 A2 DQ22 A2 MAA_A2 7,23
SDQ_A23 150 182 MAA_A3 SDQ_A23 150 182 MAA_A3
7 SDQ_A23 DQ23 A3 DQ23 A3 MAA_A3 7,23
SDQ_A24 33 61 MAA_A4 SDQ_A24 33 61 MAA_A4
7 SDQ_A24 DQ24 A4 DQ24 A4 MAA_A4 7,23
SDQ_A25 34 60 MAA_A5 SDQ_A25 34 60 MAA_A5
7 SDQ_A25 DQ25 A5 DQ25 A5 MAA_A5 7,23
SDQ_A26 39 180 MAA_A6 SDQ_A26 39 180 MAA_A6
7 SDQ_A26 DQ26 A6 DQ26 A6 MAA_A6 7,23
SDQ_A27 40 58 MAA_A7 SDQ_A27 40 58 MAA_A7
7 SDQ_A27 DQ27 A7 DQ27 A7 MAA_A7 7,23
SDQ_A28 152 179 MAA_A8 SDQ_A28 152 179 MAA_A8
7 SDQ_A28 DQ28 A8 DQ28 A8 MAA_A8 7,23
SDQ_A29 153 177 MAA_A9 SDQ_A29 153 177 MAA_A9
7 SDQ_A29 DQ29 A9 DQ29 A9 MAA_A9 7,23
SDQ_A30 158 70 MAA_A10 SDQ_A30 158 70 MAA_A10
7 SDQ_A30 DQ30 A10_AP DQ30 A10_AP MAA_A10 7,23
SDQ_A31 159 57 MAA_A11 SDQ_A31 159 57 MAA_A11
7 SDQ_A31 DQ31 A11 DQ31 A11 MAA_A11 7,23
SDQ_A32 80 176 MAA_A12 SDQ_A32 80 176 MAA_A12
B 7 SDQ_A32 DQ32 A12 DQ32 A12 MAA_A12 7,23 B
SDQ_A33 81 196 MAA_A13 SDQ_A33 81 196 MAA_A13
7 SDQ_A33 DQ33 A13 DQ33 A13 MAA_A13 7,23
SDQ_A34 86 174 SDQ_A34 86 174
7 SDQ_A34 DQ34 A14 DQ34 A14
SDQ_A35 87 173 SDQ_A35 87 173
7 SDQ_A35 DQ35 A15 DQ35 A15
SDQ_A36 199 SDQ_A36 199
7 SDQ_A36 DQ36 DQ36
SDQ_A37 200 54 SBS_A2 SDQ_A37 200 54 SBS_A2
7 SDQ_A37 DQ37 A16/BA2 DQ37 A16/BA2 SBS_A2 7,23
SDQ_A38 205 190 SBS_A1 SDQ_A38 205 190 SBS_A1
7 SDQ_A38 DQ38 BA1 DQ38 BA1 SBS_A1 7,23
SDQ_A39 206 71 SBS_A0 SDQ_A39 206 71 SBS_A0
7 SDQ_A39 DQ39 BA0 DQ39 BA0 SBS_A0 7,23
SDQ_A40 89 SDQ_A40 89
7 SDQ_A40 DQ40 DQ40
SDQ_A41 90 73 WE_A# SDQ_A41 90 73 WE_A#
7 SDQ_A41 DQ41 WE# DQ41 WE# WE_A# 7,23
SDQ_A42 95 74 CAS_A# SDQ_A42 95 74 CAS_A#
7 SDQ_A42 DQ42 CAS# DQ42 CAS# CAS_A# 7,23
SDQ_A43 96 192 RAS_A# SDQ_A43 96 192 RAS_A#
7 SDQ_A43 DQ43 RAS# DQ43 RAS# RAS_A# 7,23
SDQ_A44 208 SDQ_A44 208
7 SDQ_A44 DQ44 DQ44
SDQ_A45 209 125 SDM_A0 SDQ_A45 209 125 SDM_A0
7 SDQ_A45 DQ45 DM0/DQS9 DQ45 DM0/DQS9 SDM_A0 7
SDQ_A46 214 126 SDQ_A46 214 126
7 SDQ_A46 DQ46 NC/DQS9# DQ46 NC/DQS9#
SDQ_A47 215 134 SDM_A1 SDQ_A47 215 134 SDM_A1
7 SDQ_A47 DQ47 DM1/DQS10 DQ47 DM1/DQS10 SDM_A1 7
SDQ_A48 98 135 SDQ_A48 98 135
7 SDQ_A48 DQ48 NC/DQS10# DQ48 NC/DQS10#
SDQ_A49 99 146 SDM_A2 SDQ_A49 99 146 SDM_A2
7 SDQ_A49 DQ49 DM2/DQS11 DQ49 DM2/DQS11 SDM_A2 7
SDQ_A50 107 147 SDQ_A50 107 147
7 SDQ_A50 DQ50 NC/DQS11# DQ50 NC/DQS11#
SDQ_A51 108 155 SDM_A3 SDQ_A51 108 155 SDM_A3
7 SDQ_A51 DQ51 DM3/DQS12 DQ51 DM3/DQS12 SDM_A3 7
SDQ_A52 217 156 SDQ_A52 217 156
7 SDQ_A52 DQ52 NC/DQS12# DQ52 NC/DQS12#
SDQ_A53 218 202 SDM_A4 SDQ_A53 218 202 SDM_A4
7 SDQ_A53 DQ53 DM4/DQS13 DQ53 DM4/DQS13 SDM_A4 7
SDQ_A54 226 203 SDQ_A54 226 203
7 SDQ_A54 DQ54 NC/DQS13# DQ54 NC/DQS13#
SDQ_A55 227 211 SDM_A5 SDQ_A55 227 211 SDM_A5
7 SDQ_A55 DQ55 DM5/DQS14 DQ55 DM5/DQS14 SDM_A5 7
SDQ_A56 110 212 SDQ_A56 110 212
7 SDQ_A56 DQ56 NC/DQS14# DQ56 NC/DQS14#
SDQ_A57 111 223 SDM_A6 SDQ_A57 111 223 SDM_A6
7 SDQ_A57 DQ57 DM6/DQS15 DQ57 DM6/DQS15 SDM_A6 7
SDQ_A58 116 224 SDQ_A58 116 224
7 SDQ_A58 DQ58 NC/DQS15# DQ58 NC/DQS15#
SDQ_A59 117 232 SDM_A7 SDQ_A59 117 232 SDM_A7
7 SDQ_A59 DQ59 DM7/DQS16 DQ59 DM7/DQS16 SDM_A7 7
SDQ_A60 229 233 SDQ_A60 229 233
7 SDQ_A60 DQ60 NC/DQS16# DQ60 NC/DQS16#
SDQ_A61 230 164 SDQ_A61 230 164
C 7 SDQ_A61 DQ61 DM8/DQS17 DQ61 DM8/DQS17 C
SDQ_A62 235 165 SDQ_A62 235 165
7 SDQ_A62 DQ62 NC/DQS17# DQ62 NC/DQS17#
SDQ_A63 236 SDQ_A63 236
7 SDQ_A63 DQ63 DQ63
ODT0 195 SODT_A0 7,23 ODT0 195 SODT_A2 7,23
2 VSS ODT1 77 SODT_A1 7,23 2 VSS ODT1 77 SODT_A3 7,23
5 VSS 5 VSS
8 52 8 52 SCKE_A2
VSS CKE0 SCKE_A0 7,23 VSS CKE0 SCKE_A2 7,23
11 171 11 171 SCKE_A3
VSS CKE1 SCKE_A1 7,23 VSS CKE1 SCKE_A3 7,23
14 VSS 14 VSS
17 193 17 193 SCS_A#2
VSS CS0# SCS_A#0 7,23 VSS CS0# SCS_A#2 7,23
20 76 20 76 SCS_A#3
VSS CS1# SCS_A#1 7,23 VSS CS1# SCS_A#3 7,23
23 VSS 23 VSS
26 VSS CK0(DU) 185 SCLKA0 7 26 VSS CK0(DU) 185 SCLKA3 7
29 VSS CK0#(DU) 186 SCLKA#0 7 29 VSS CK0#(DU) 186 SCLKA#3 7
32 VSS CK1(CK0) 137 SCLKA1 7 32 VSS CK1(CK0) 137 SCLKA4 7
35 VSS CK1#(CK0#) 138 SCLKA#1 7 35 VSS CK1#(CK0#) 138 SCLKA#4 7
38 VSS CK2(DU) 220 SCLKA2 7 38 VSS CK2(DU) 220 SCLKA5 7
41 VSS CK2#(DU) 221 SCLKA#2 7 41 VSS CK2#(DU) 221 SCLKA#5 7
44 VSS 44 VSS
47 120 SMBCLK_DDR 47 120 SMBCLK_DDR
VSS SCL VSS SCL SMBCLK_DDR 22
50 119 SMBDATA_DDR 50 119 SMBDATA_DDR
VSS SDA VSS SDA SMBDATA_DDR 22
65 VSS 65 VSS
66 1 DIMM_VREF_A 66 1 DIMM_VREF_A R348 1KR1%
VSS VREF VSS VREF VCC_DDR
79 VSS 79 VSS
82 VSS 82 VSS
85 239 C447 85 239 R347
VSS SA0 VSS SA0 VCC3
88 240 C0.1U25Y 88 240 C442 1KR1%
VSS SA1 VSS SA1 C0.1U25Y
91 VSS SA2 101 91 VSS SA2 101
94 94
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS VSS
D 97 VSS 97 VSS D

DIMM-240_GREEN DIMM-240_ORG
100
103
106
109
112
115
118
121
124
127
130
133
136
139
142
145
148
151
154
157
160
163
166
169
198
201
204
207
210
213
216
219
222
225
228
231
234
237

100
103
106
109
112
115
118
121
124
127
130
133
136
139
142
145
148
151
154
157
160
163
166
169
198
201
204
207
210
213
216
219
222
225
228
231
234
237
MICRO-START INT'L CO.,LTD.
Title
MS-7204-30-060804K1
Size Document Number Rev
Custom DDR II DIMM 1 & 2 CHANNEL A 3.0
Date: Friday, August 04, 2006 Sheet 21 of 33
1 2 3 4 5
1 2 3 4 5

VCC_DDR VCC3 VCC_DDR VCC3

102

191
194
181
175
170

197

172
187
184
178
189

238

161
162
167
168

102

191
194
181
175
170

197

172
187
184
178
189

238

161
162
167
168
DIMM3 DIMM4

55
18
19

68

51
56
62
72
75
78

53
59
64

69

67

42
43
48
49

55
18
19

68

51
56
62
72
75
78

53
59
64

69

67

42
43
48
49
NC/TEST

NC/TEST
RC0
RC1

VDD0
VDD1
VDD2
VDD3
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDDQ0
VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ7
VDDQ8
VDDQ9

CB0
CB1
CB2
CB3
CB4
CB5
CB6
CB7

RC0
RC1

VDD0
VDD1
VDD2
VDD3
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDDQ0
VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ7
VDDQ8
VDDQ9

CB0
CB1
CB2
CB3
CB4
CB5
CB6
CB7
NC

NC

VDDSPD

NC

NC

VDDSPD
SDQ_B0 3 SDQ_B0 3
7 SDQ_B0 DQ0 DQ0
SDQ_B1 4 7 SDQS_B0 SDQ_B1 4 7 SDQS_B0
7 SDQ_B1 DQ1 DQS0 DQ1 DQS0 SDQS_B0 7
SDQ_B2 9 6 SDQS_B#0 SDQ_B2 9 6 SDQS_B#0
7 SDQ_B2 DQ2 DQS0# DQ2 DQS0# SDQS_B#0 7
SDQ_B3 10 16 SDQS_B1 SDQ_B3 10 16 SDQS_B1
7 SDQ_B3 DQ3 DQS1 DQ3 DQS1 SDQS_B1 7
A SDQ_B4 122 15 SDQS_B#1 SDQ_B4 122 15 SDQS_B#1 A
7 SDQ_B4 DQ4 DQS1# DQ4 DQS1# SDQS_B#1 7
SDQ_B5 123 28 SDQS_B2 SDQ_B5 123 28 SDQS_B2
7 SDQ_B5 DQ5 DQS2 DQ5 DQS2 SDQS_B2 7
SDQ_B6 128 27 SDQS_B#2 SDQ_B6 128 27 SDQS_B#2
7 SDQ_B6 DQ6 DQS2# DQ6 DQS2# SDQS_B#2 7
SDQ_B7 129 37 SDQS_B3 SDQ_B7 129 37 SDQS_B3
7 SDQ_B7 DQ7 DQS3 DQ7 DQS3 SDQS_B3 7
SDQ_B8 12 36 SDQS_B#3 SDQ_B8 12 36 SDQS_B#3
7 SDQ_B8 DQ8 DQS3# DQ8 DQS3# SDQS_B#3 7
SDQ_B9 13 84 SDQS_B4 SDQ_B9 13 84 SDQS_B4
7 SDQ_B9 DQ9 DQS4 DQ9 DQS4 SDQS_B4 7
SDQ_B10 21 83 SDQS_B#4 SDQ_B10 21 83 SDQS_B#4
7 SDQ_B10 DQ10 DQS4# DQ10 DQS4# SDQS_B#4 7
SDQ_B11 22 93 SDQS_B5 SDQ_B11 22 93 SDQS_B5
7 SDQ_B11 DQ11 DQS5 DQ11 DQS5 SDQS_B5 7
SDQ_B12 131 92 SDQS_B#5 SDQ_B12 131 92 SDQS_B#5
7 SDQ_B12 DQ12 DQS5# DQ12 DQS5# SDQS_B#5 7
SDQ_B13 132 105 SDQS_B6 SDQ_B13 132 105 SDQS_B6
7 SDQ_B13 DQ13 DQS6 DQ13 DQS6 SDQS_B6 7
SDQ_B14 140 104 SDQS_B#6 SDQ_B14 140 104 SDQS_B#6
7 SDQ_B14 DQ14 DQS6# DQ14 DQS6# SDQS_B#6 7
SDQ_B15 141 114 SDQS_B7 SDQ_B15 141 114 SDQS_B7
7 SDQ_B15 DQ15 DQS7 DQ15 DQS7 SDQS_B7 7
SDQ_B16 24 113 SDQS_B#7 SDQ_B16 24 113 SDQS_B#7
7 SDQ_B16 DQ16 DQS7# DQ16 DQS7# SDQS_B#7 7
SDQ_B17 25 46 SDQ_B17 25 46
7 SDQ_B17 DQ17 DQS8 DQ17 DQS8
SDQ_B18 30 45 SDQ_B18 30 45
7 SDQ_B18 DQ18 DQS8# DQ18 DQS8#
SDQ_B19 31 SDQ_B19 31
7 SDQ_B19 DQ19 DQ19
SDQ_B20 143 188 MAA_B0 SDQ_B20 143 188 MAA_B0
7 SDQ_B20 DQ20 A0 DQ20 A0 MAA_B0 7,23
SDQ_B21 144 183 MAA_B1 SDQ_B21 144 183 MAA_B1
7 SDQ_B21 DQ21 A1 DQ21 A1 MAA_B1 7,23
SDQ_B22 149 63 MAA_B2 SDQ_B22 149 63 MAA_B2
7 SDQ_B22 DQ22 A2 DQ22 A2 MAA_B2 7,23
SDQ_B23 150 182 MAA_B3 SDQ_B23 150 182 MAA_B3
7 SDQ_B23 DQ23 A3 DQ23 A3 MAA_B3 7,23
SDQ_B24 33 61 MAA_B4 SDQ_B24 33 61 MAA_B4
7 SDQ_B24 DQ24 A4 DQ24 A4 MAA_B4 7,23
SDQ_B25 34 60 MAA_B5 SDQ_B25 34 60 MAA_B5
7 SDQ_B25 DQ25 A5 DQ25 A5 MAA_B5 7,23
SDQ_B26 39 180 MAA_B6 SDQ_B26 39 180 MAA_B6
7 SDQ_B26 DQ26 A6 DQ26 A6 MAA_B6 7,23
SDQ_B27 40 58 MAA_B7 SDQ_B27 40 58 MAA_B7
7 SDQ_B27 DQ27 A7 DQ27 A7 MAA_B7 7,23
SDQ_B28 152 179 MAA_B8 SDQ_B28 152 179 MAA_B8
7 SDQ_B28 DQ28 A8 DQ28 A8 MAA_B8 7,23
SDQ_B29 153 177 MAA_B9 SDQ_B29 153 177 MAA_B9
7 SDQ_B29 DQ29 A9 DQ29 A9 MAA_B9 7,23
SDQ_B30 158 70 MAA_B10 SDQ_B30 158 70 MAA_B10
7 SDQ_B30 DQ30 A10_AP DQ30 A10_AP MAA_B10 7,23
SDQ_B31 159 57 MAA_B11 SDQ_B31 159 57 MAA_B11
7 SDQ_B31 DQ31 A11 DQ31 A11 MAA_B11 7,23
SDQ_B32 80 176 MAA_B12 SDQ_B32 80 176 MAA_B12
B 7 SDQ_B32 DQ32 A12 DQ32 A12 MAA_B12 7,23 B
SDQ_B33 81 196 MAA_B13 SDQ_B33 81 196 MAA_B13
7 SDQ_B33 DQ33 A13 DQ33 A13 MAA_B13 7,23
SDQ_B34 86 174 SDQ_B34 86 174
7 SDQ_B34 DQ34 A14 DQ34 A14
SDQ_B35 87 173 SDQ_B35 87 173
7 SDQ_B35 DQ35 A15 DQ35 A15
SDQ_B36 199 SDQ_B36 199
7 SDQ_B36 DQ36 DQ36
SDQ_B37 200 54 SBS_B2 SDQ_B37 200 54 SBS_B2
7 SDQ_B37 DQ37 A16/BA2 DQ37 A16/BA2 SBS_B2 7,23
SDQ_B38 205 190 SBS_B1 SDQ_B38 205 190 SBS_B1
7 SDQ_B38 DQ38 BA1 DQ38 BA1 SBS_B1 7,23
SDQ_B39 206 71 SBS_B0 SDQ_B39 206 71 SBS_B0
7 SDQ_B39 DQ39 BA0 DQ39 BA0 SBS_B0 7,23
SDQ_B40 89 SDQ_B40 89
7 SDQ_B40 DQ40 DQ40
SDQ_B41 90 73 WE_B# SDQ_B41 90 73 WE_B#
7 SDQ_B41 DQ41 WE# DQ41 WE# WE_B# 7,23
SDQ_B42 95 74 CAS_B# SDQ_B42 95 74 CAS_B#
7 SDQ_B42 DQ42 CAS# DQ42 CAS# CAS_B# 7,23
SDQ_B43 96 192 RAS_B# SDQ_B43 96 192 RAS_B#
7 SDQ_B43 DQ43 RAS# DQ43 RAS# RAS_B# 7,23
SDQ_B44 208 SDQ_B44 208
7 SDQ_B44 DQ44 DQ44
SDQ_B45 209 125 SDM_B0 SDQ_B45 209 125 SDM_B0
7 SDQ_B45 DQ45 DM0/DQS9 DQ45 DM0/DQS9 SDM_B0 7
SDQ_B46 214 126 SDQ_B46 214 126
7 SDQ_B46 DQ46 NC/DQS9# DQ46 NC/DQS9#
SDQ_B47 215 134 SDM_B1 SDQ_B47 215 134 SDM_B1
7 SDQ_B47 DQ47 DM1/DQS10 DQ47 DM1/DQS10 SDM_B1 7
SDQ_B48 98 135 SDQ_B48 98 135
7 SDQ_B48 DQ48 NC/DQS10# DQ48 NC/DQS10#
SDQ_B49 99 146 SDM_B2 SDQ_B49 99 146 SDM_B2
7 SDQ_B49 DQ49 DM2/DQS11 DQ49 DM2/DQS11 SDM_B2 7
SDQ_B50 107 147 SDQ_B50 107 147
7 SDQ_B50 DQ50 NC/DQS11# DQ50 NC/DQS11#
SDQ_B51 108 155 SDM_B3 SDQ_B51 108 155 SDM_B3
7 SDQ_B51 DQ51 DM3/DQS12 DQ51 DM3/DQS12 SDM_B3 7
SDQ_B52 217 156 SDQ_B52 217 156
7 SDQ_B52 DQ52 NC/DQS12# DQ52 NC/DQS12#
SDQ_B53 218 202 SDM_B4 SDQ_B53 218 202 SDM_B4
7 SDQ_B53 DQ53 DM4/DQS13 DQ53 DM4/DQS13 SDM_B4 7
SDQ_B54 226 203 SDQ_B54 226 203
7 SDQ_B54 DQ54 NC/DQS13# DQ54 NC/DQS13#
SDQ_B55 227 211 SDM_B5 SDQ_B55 227 211 SDM_B5
7 SDQ_B55 DQ55 DM5/DQS14 DQ55 DM5/DQS14 SDM_B5 7
SDQ_B56 110 212 SDQ_B56 110 212
7 SDQ_B56 DQ56 NC/DQS14# DQ56 NC/DQS14#
SDQ_B57 111 223 SDM_B6 SDQ_B57 111 223 SDM_B6
7 SDQ_B57 DQ57 DM6/DQS15 DQ57 DM6/DQS15 SDM_B6 7
SDQ_B58 116 224 SDQ_B58 116 224
7 SDQ_B58 DQ58 NC/DQS15# DQ58 NC/DQS15#
SDQ_B59 117 232 SDM_B7 SDQ_B59 117 232 SDM_B7
7 SDQ_B59 DQ59 DM7/DQS16 DQ59 DM7/DQS16 SDM_B7 7
SDQ_B60 229 233 SDQ_B60 229 233
7 SDQ_B60 DQ60 NC/DQS16# DQ60 NC/DQS16#
SDQ_B61 230 164 SDQ_B61 230 164
C 7 SDQ_B61 DQ61 DM8/DQS17 DQ61 DM8/DQS17 C
SDQ_B62 235 165 SDQ_B62 235 165
7 SDQ_B62 DQ62 NC/DQS17# DQ62 NC/DQS17#
SDQ_B63 236 SDQ_B63 236
7 SDQ_B63 DQ63 DQ63
ODT0 195 SODT_B0 7,23 ODT0 195 SODT_B2 7,23
2 VSS ODT1 77 SODT_B1 7,23 2 VSS ODT1 77 SODT_B3 7,23
5 VSS 5 VSS
8 52 8 52 SCKE_B2
VSS CKE0 SCKE_B0 7,23 VSS CKE0 SCKE_B2 7,23
11 171 11 171 SCKE_B3
VSS CKE1 SCKE_B1 7,23 VSS CKE1 SCKE_B3 7,23
14 VSS 14 VSS
17 193 17 193 SCS_B#2
VSS CS0# SCS_B#0 7,23 VSS CS0# SCS_B#2 7,23
20 76 20 76 SCS_B#3
VSS CS1# SCS_B#1 7,23 VSS CS1# SCS_B#3 7,23
23 VSS 23 VSS
26 VSS CK0(DU) 185 SCLKB0 7 26 VSS CK0(DU) 185 SCLKB3 7
29 VSS CK0#(DU) 186 SCLKB#0 7 29 VSS CK0#(DU) 186 SCLKB#3 7
32 VSS CK1(CK0) 137 SCLKB1 7 32 VSS CK1(CK0) 137 SCLKB4 7
35 VSS CK1#(CK0#) 138 SCLKB#1 7 35 VSS CK1#(CK0#) 138 SCLKB#4 7
38 VSS CK2(DU) 220 SCLKB2 7 38 VSS CK2(DU) 220 SCLKB5 7
41 VSS CK2#(DU) 221 SCLKB#2 7 41 VSS CK2#(DU) 221 SCLKB#5 7
44 VSS 44 VSS
47 120 SMBCLK_DDR 47 120 SMBCLK_DDR
VSS SCL SMBDATA_DDR VSS SCL SMBDATA_DDR
50 VSS SDA 119 50 VSS SDA 119
65 VSS 65 VSS
66 1 DIMM_VREF_B 66 1 DIMM_VREF_B R357 1KR1%
VSS VREF VSS VREF VCC_DDR
79 VSS 79 VSS
82 VSS 82 VSS
85 239 C461 85 239 R354
VSS SA0 VSS SA0 VCC3
88 240 C0.1U25Y 88 240 C462 1KR1%
VSS SA1 VCC3 VSS SA1
91 101 91 101 C0.1U25Y
VSS SA2 VSS SA2
94 94
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS VSS
D 97 VSS 97 VSS D

DIMM-240_GREEN DIMM-240_ORG
100
103
106
109
112
115
118
121
124
127
130
133
136
139
142
145
148
151
154
157
160
163
166
169
198
201
204
207
210
213
216
219
222
225
228
231
234
237

100
103
106
109
112
115
118
121
124
127
130
133
136
139
142
145
148
151
154
157
160
163
166
169
198
201
204
207
210
213
216
219
222
225
228
231
234
237
MICRO-START INT'L CO.,LTD.
Title

11,13,25,26,27 SMBCLK
R350 33R SMBCLK_DDR
SMBCLK_DDR 21 MS-7204-30-060804K1
R349 33R SMBDATA_DDR
11,13,25,26,27 SMBDATA SMBDATA_DDR 21 Size Document Number Rev
Custom
DDR II DIMM 3 & 4 CHANNEL B 3.0
Date: Friday, August 04, 2006 Sheet 22 of 33
1 2 3 4 5
1 2 3 4 5

CHANNEL A V_SM_VTT DECOULPING CAPS CHANNEL B V_SM_VTT DECOULPING CAPS

VTT_DDR VTT_DDR

C546 C456
C0.1U16Y C0.1U16Y
C444 C451 VTT_DDR VTT_DDR
C0.1U16Y C0.1U16Y
C453 C448 2 1 2 1
7,21 MAA_A4 7,22 MAA_B4
C0.1U16Y C0.1U16Y 4 3 RN36 4 3 RN43
7,21 MAA_A3 7,22 MAA_B3
A C545 C547 6 5 6 5 A
7,21 MAA_A2 7,22 MAA_B2
C0.1U16Y C0.1U16Y 8 7 8P4R-33R0402 8 7 8P4R-33R0402
7,21 MAA_A1 7,22 MAA_B1
C548 C542 2 1 2 1
7,21 MAA_A9 7,22 MAA_B9
C0.1U16Y C0.1U16Y 4 3 RN38 4 3 RN46
7,21 MAA_A5 7,22 MAA_B5
C544 C446 6 5 6 5
7,21 MAA_A8 7,22 MAA_B8
C0.1U16Y C0.1U16Y 8 7 8P4R-33R0402 8 7 8P4R-33R0402
7,21 MAA_A6 7,22 MAA_B6
C450 C445 2 1 2 1
7,21 SBS_A2 7,22 SBS_B2
C0.1U16Y C0.1U16Y 4 3 RN37 4 3 RN45
7,21 MAA_A12 7,22 MAA_B12
C541 C449 6 5 6 5
7,21 MAA_A11 7,22 MAA_B11
C0.1U16Y C0.1U16Y 8 7 8P4R-33R0402 8 7 8P4R-33R0402
7,21 MAA_A7 7,22 MAA_B7
7,21 RAS_A# 2 1 7,22 MAA_B0 2 1
4 3 RN39 4 3 RN47
7,21 WE_A# 7,22 SBS_B0
7,21 CAS_A# 6 5 7,22 MAA_B10 6 5
8 7 8P4R-33R0402 8 7 8P4R-33R0402
7,21 MAA_A13 7,22 SBS_B1
C543 C457 2 1 2 1
7,21 MAA_A0 7,22 WE_B#
C0.1U16Y C0.1U16Y 4 3 RN42 4 3 RN48
7,21 MAA_A10 7,22 RAS_B#
7,21 SBS_A0 6 5 7,22 MAA_B13 6 5
7,21 SBS_A1 8 7 8P4R-33R0402 7,22 CAS_B# 8 7 8P4R-33R0402

7,21 SCS_A#2 2 1 7,22 SCS_B#0 2 1


7,21 SCS_A#0 4 3 RN40 7,22 SCS_B#2 4 3 RN49
7,21 SODT_A0 6 5 7,22 SCS_B#1 6 5
7,21 SODT_A2 8 7 8P4R-43R0402-LF 7,22 SODT_B0 8 7 8P4R-43R0402-LF

7,21 SCKE_A2 2 1 7,22 SCKE_B2 2 1


7,21 SCKE_A3 4 3 RN35 7,22 SCKE_B3 4 3 RN44
7,21 SCKE_A1 6 5 7,22 SCKE_B0 6 5
7,21 SCKE_A0 8 7 8P4R-43R0402-LF 7,22 SCKE_B1 8 7 8P4R-43R0402-LF
B B

7,21 SCS_A#3 2 1 7,22 SCS_B#3 2 1


7,21 SCS_A#1 4 3 RN41 7,22 SODT_B1 4 3 RN50
7,21 SODT_A1 6 5 7,22 SODT_B2 6 5
7,21 SODT_A3 8 7 8P4R-43R0402-LF 7,22 SODT_B3 8 7 8P4R-43R0402-LF

PLACED AT LEFT AND RIGHT ENDS OF PLACED AT LEFT AND RIGHT ENDS OF
VTT ISLAND VTT ISLAND

VTT_DDR VTT_DDR

C452 C537
C4.7U16Y1206 C4.7U16Y1206
C458 C539
C4.7U16Y1206 C4.7U16Y1206

VCC_DDR VCC_DDR
C C

C499 C408 Grantsdale GMCH Power Sequencing Requirement


C1U6.3X50402
C498
C1U6.3X50402
C391
Between 1.5V Core and 2.5V DAC
C1U6.3X50402 C1U6.3X50402
C497 C373
C1U6.3X50402 C1U6.3X50402 Q31 burn issue
C502 C383 VCC3
C1U6.3X50402 C1U6.3X50402

D
R110
26 V_2P5_MCH_DRV
C496 C382 G Q14
C1U6.3X50402 C1U6.3X50402 APM2306AC
C425 C376 1KR V_2P5_MCH

S
C1U6.3X50402 C1U6.3X50402
C424 C409 VCC5_SB C131
C1U6.3X50402 C1U6.3X50402 C1U10Y
C426 C392

1
C1U6.3X50402 C1U6.3X50402 C168

+
R94 EC9 C0.1U25Y
1KR D

2
CD100U16EL7
G
Q12
C

R99 N-2N7002_SOT23
S

11,14,26 SLP_S3# B
D Q11 D
4.7KR N-MMBT3904_NL_SOT23
CE

VCC_DDR VCC_DDR V_1P5_CORE V_2P5_MCH


R109
B D8
V_1P5_CORE
1

CT7 CT8 Q13


+

4.7KR N-MMBT3904_NL_SOT23 1N4001_DO214AC MICRO-START INT'L CO.,LTD.


E

CD470U6.3EL11-RH CD470U6.3EL11-RH
2

Title
MS-7204-30-060804K1
Size Document Number Rev
Custom DDR II VTT DECOUPLING 3.0
Date: Friday, August 04, 2006 Sheet 23 of 33
1 2 3 4 5
1 2 3 4 5

BTX CONNECTOR VCC5_SB MEDION Front Panel VCC5


BTX1
VCC3 13 3.3V 3.3V 1 VCC3 JF_P1
1-2 PS-ON JF_P1 R56
-12V 14 -12V 3.3V 2
R167 CB9 CB8 330R
X_4.7KR CB10 15 3 C0.1U25Y C0.1U25Y 3-4 PWR LED 1 SWITCH_ON#
C0.1U25Y GND GND PWSW-
PWSW+ 2
16 4 5-6 HDD LED (6+) 3 PWR_LED
14 PS_ON# P_ON 5V VCC5 PLED1 PWR_LED 26
4 SUS_LED
VCC5 SLED2 SUS_LED 26
17 5 7-8 RESET 5 HDDLED
C202 GND GND CB14 CB13 HDD- HDD+
HDD+ 6
C0.1U25Y C0.1U25Y R_FPRST#
A
C1000P50X 18 GND 5V 6
R185 RESET 7 FPRST# 11 A

GND 8
19 7 4.7KR R53 10R
GND GND C71
20 8 C587 C588 C589 C0.1U25Y
-5V POK PWR_OK 26
MEDION-FP
21 9 X_C0.1U25Y X_C0.1U25Y
VCC5 5V 5VSB VCC5_SB VCC3_SB
C225 X_C0.1U25Y
22 5V +12V 10 +12V C1000P50N
CB7 23 11 R67
C0.1U25Y 5V +12V CB11 CB12 4.7KR
24 12 C0.1U25Y C0.1U25Y
GND 3.3V SWITCH_ON# R66 100R
PWRBTIN 14
2X12 POWER
VCC3
PWRCONN2*12 C94 REV:3.0
C1U10Y

VCC3 J3
1 EXTSMI# 11
2
CB1 C585
C0.1U25Y
H1X2_black-15u-in-RH X_C0.1U25X

VCC3
B IDE LED HDDLED
SERIAL ATA LED PRIMARY IDE BLOCK B

C83
C0.1U25Y R265
3

10KR
IDEACTP# 2 1 SATALED#
SATALED# 11
IDE1
S-BAT54A_SOT23
D18 HD_RST# R297 33R HDRST# 1 2
26 HD_RST#
PDD7 3 4 PDD8
11 PDD7 PDD8 11
PDD6 5 6 PDD9
11 PDD6 PDD9 11
PDD5 7 8 PDD10
11 PDD5 PDD10 11
PDD4 9 10 PDD11
11 PDD4 PDD11 11
PDD3 11 12 PDD12
11 PDD3 PDD12 11
PDD2 13 14 PDD13
11 PDD2 PDD13 11
PDD1 15 16 PDD14
11 PDD1 PDD14 11
PDD0 17 18 PDD15
11 PDD0 PDD15 11
19
VCC5 21 22
11 PD_DREQ
BUZZER 11 PD_IOW# 23
25
24
26
RN5 11 PD_IOR#
11 PD_IORDY 27 28
8 7 11 PD_DACK# 29 30
6 5 BZ1 31 32
10 IDE_IRQ
4 3 D1 1N4148S C560 33 34
14 ALARM 11 PD_A1 ATADET0 11
2 1 C0.1U16Y 11 PD_A0 35 36 PD_A2 11
37 38
C

11 PD_CS#1 PD_CS#3 11
Q2 C60 BUZZER IDEACTP# 39 40
C
R40 2.2KR 8P4R-220R C
11 SPKR B X_C0.1U25Y
C374
N-MMBT3904_NL_SOT23 R264 R294 R293 IDE/BLUE X_C4700P50X R292
E

4.7KR 8.2KR 4.7KR 10KR

VCC3

D D

MICRO-START INT'L CO.,LTD.


Title
MS-7204-30-060804K1
Size Document Number Rev
Custom
BTX,F_ PANEL AND IDE 3.0
Date: Friday, August 04, 2006 Sheet 24 of 33
1 2 3 4 5
1 2 3 4 5

+12V PCI_E2

B1
B2
12V PRSNT1# A1
A2
PCI EXPRESS x1-PORT
12V 12V +12V
A B3 12V 12V A3 A
B4 GND GND A4
SMBCLK_PCIE B5 A5
SMBDATA_PCIE SMCLK JTAG2
B6 SMDAT JTAG3 A6
B7 GND JTAG4 A7
VCC3 B8 A8
3.3V JTAG5
B9 JTAG1 3.3V A9 VCC3
VCC3_SB B10 3.3VAUX 3.3V A10
WAKE# B11 A11 PCIRST_ICH#
11 WAKE# WAKE# PWRGD PCIRST_ICH# 10,26 VCC3_SB VCC3 +12V +12V VCC3
PCI_E1
B12 RSVD GND A12 B1 12V PRSNT1# A1
B13 A13 CK_PE_100M_16PORT B2 A2
GND REFCLK+ CK_PE_100M_16PORT 13 12V 12V
EXP_A_TXP_15 C159 C0.1U16X0402 EXP_A_CTXP_15 B14 A14 CK_PE_100M_16PORT# B3 A3
8 EXP_A_TXP_15 HSOP0 REFCLK- CK_PE_100M_16PORT# 13 12V 12V
EXP_A_TXN_15 C158 C0.1U16X0402 EXP_A_CTXN_15 B15 A15 B4 A4
8 EXP_A_TXN_15 HSON0 GND GND GND
B16 A16 EXP_A_RXP_15 SMBCLK_PCIE B5 A5
GND HSIP0 EXP_A_RXP_15 8 SMCLK JTAG2
SDVO_CTRL_CLK B17 A17 EXP_A_RXN_15 SMBDATA_PCIE B6 A6
8 SDVO_CTRL_CLK PRSNT2# HSIN0 EXP_A_RXN_15 8 SMDAT JTAG3
B18 GND GND A18 B7 GND JTAG4 A7
B8 3.3V JTAG5 A8
B9 JTAG1 3.3V A9
EXP_A_TXP_14 C161 C0.1U16X0402 EXP_A_CTXP_14 B19 A19 B10 A10
8 EXP_A_TXP_14 HSOP1 RSVD 3.3VAUX 3.3V
EXP_A_TXN_14 C160 C0.1U16X0402 EXP_A_CTXN_14 B20 A20 WAKE# B11 A11 PCIRST_ICH#
8 EXP_A_TXN_14 HSON1 GND WAKE# PWRGD
B21 A21 EXP_A_RXP_14
GND HSIP1 EXP_A_RXP_14 8
B22 A22 EXP_A_RXN_14
GND HSIN1 EXP_A_RXN_14 8
EXP_A_TXP_13 C163 C0.1U16X0402 EXP_A_CTXP_13 B23 A23 B12 A12
8 EXP_A_TXP_13 HSOP2 GND RSVD GND
EXP_A_TXN_13 C162 C0.1U16X0402 EXP_A_CTXN_13 B24 A24 B13 A13 CK_PE_100M_1PORT 13
8 EXP_A_TXN_13 HSON2 GND GND REFCLK+
B25 A25 EXP_A_RXP_13 10 HSO_P1 B14 A14 CK_PE_100M_1PORT# 13
GND HSIP2 EXP_A_RXP_13 8 HSOP0 REFCLK-
B26 A26 EXP_A_RXN_13 10 HSO_N1 B15 A15
GND HSIN2 EXP_A_RXN_13 8 HSON0 GND
EXP_A_TXP_12 C165 C0.1U16X0402 EXP_A_CTXP_12 B27 A27 B16 A16 HSI_P1 10
B 8 EXP_A_TXP_12 HSOP3 GND GND HSIP0 B
EXP_A_TXN_12 C164 C0.1U16X0402 EXP_A_CTXN_12 B28 A28 B17 A17 HSI_N1 10
8 EXP_A_TXN_12 HSON3 GND PRSNT2# HSIN0
B29 A29 EXP_A_RXP_12 B18 A18
GND HSIP3 EXP_A_RXP_12 8 GND GND
B30 A30 EXP_A_RXN_12
RSVD HSIN3 EXP_A_RXN_12 8
SDVO_CTRL_DATA B31 A31
8 SDVO_CTRL_DATA PRSNT2# GND
B32 A32 SLOT-PCI-E_white-1pitch
GND RSVD

EXP_A_TXP_11 C141 C0.1U16X0402 EXP_A_CTXP_11 B33 A33


8 EXP_A_TXP_11 HSOP4 RSVD
EXP_A_TXN_11 C140 C0.1U16X0402 EXP_A_CTXN_11 B34 A34 SMBCLK R70 10R SMBCLK_PCIE
8 EXP_A_TXN_11 HSON4 GND 11,13,22,26,27 SMBCLK
B35 A35 EXP_A_RXP_11
GND HSIP4 EXP_A_RXP_11 8
B36 A36 EXP_A_RXN_11 SMBDATA R69 10R SMBDATA_PCIE
GND HSIN4 EXP_A_RXN_11 8 11,13,22,26,27 SMBDATA
EXP_A_TXP_10 C139 C0.1U16X0402 EXP_A_CTXP_10 B37 A37
8 EXP_A_TXP_10 HSOP5 GND
EXP_A_TXN_10 C142 C0.1U16X0402 EXP_A_CTXN_10 B38 A38
8 EXP_A_TXN_10 HSON5 GND
B39 A39 EXP_A_RXP_10
GND HSIP5 EXP_A_RXP_10 8 VCC3
B40 A40 EXP_A_RXN_10 +12V
GND HSIN5 EXP_A_RXN_10 8
EXP_A_TXP_9 C138 C0.1U16X0402 EXP_A_CTXP_9 B41 A41
8 EXP_A_TXP_9 HSOP6 GND
EXP_A_TXN_9 C143 C0.1U16X0402 EXP_A_CTXN_9 B42 A42 C118 C0.1U16Y0402 C133
8 EXP_A_TXN_9 HSON6 GND
B43 A43 EXP_A_RXP_9 C0.1U16Y0402
GND HSIP6 EXP_A_RXP_9 8
B44 A44 EXP_A_RXN_9 C79 C0.1U16Y0402 C80
GND HSIN6 EXP_A_RXN_9 8
EXP_A_TXP_8 C166 C0.1U16X0402 EXP_A_CTXP_8 B45 A45 C0.1U16Y0402
8 EXP_A_TXP_8 HSOP7 GND
EXP_A_TXN_8 C167 C0.1U16X0402 EXP_A_CTXN_8 B46 A46
8 EXP_A_TXN_8 HSON7 GND
B47 A47 EXP_A_RXP_8
GND HSIP7 EXP_A_RXP_8 8
B48 A48 EXP_A_RXN_8
8 EXP_EN_HDR PRSNT2# HSIN7 EXP_A_RXN_8 8
B49 GND GND A49

EXP_A_TXP_7 C152 C0.1U16X0402 EXP_A_CTXP_7 B50 A50


8 EXP_A_TXP_7 HSOP8 RSVD
EXP_A_TXN_7 C153 C0.1U16X0402 EXP_A_CTXN_7 B51 A51
8 EXP_A_TXN_7 HSON8 GND
B52 A52 EXP_A_RXP_7
C GND HSIP8 EXP_A_RXP_7 8 C
B53 A53 EXP_A_RXN_7
GND HSIN8 EXP_A_RXN_7 8
EXP_A_TXP_6 C154 C0.1U16X0402 EXP_A_CTXP_6 B54 A54
8 EXP_A_TXP_6 HSOP9 GND
EXP_A_TXN_6 C155 C0.1U16X0402 EXP_A_CTXN_6 B55 A55
8 EXP_A_TXN_6 HSON9 GND
B56 A56 EXP_A_RXP_6
GND HSIP9 EXP_A_RXP_6 8
B57 A57 EXP_A_RXN_6
GND HSIN9 EXP_A_RXN_6 8
EXP_A_TXP_5 C156 C0.1U16X0402 EXP_A_CTXP_5 B58 A58
8 EXP_A_TXP_5 HSOP10 GND
EXP_A_TXN_5 C157 C0.1U16X0402 EXP_A_CTXN_5 B59 A59
8 EXP_A_TXN_5 HSON10 GND VCC3 +12V +12V
B60 A60 EXP_A_RXP_5
GND HSIP10 EXP_A_RXP_5 8
EXP_A_RXN_5
EXP_A_TXP_4 C144 C0.1U16X0402 EXP_A_CTXP_4
B61
B62
GND HSIN10 A61
A62
EXP_A_RXN_5 8 MECHANICAL
8 EXP_A_TXP_4 HSOP11 GND
8 EXP_A_TXN_4
EXP_A_TXN_4 C145 C0.1U16X0402 EXP_A_CTXN_4 B63 HSON11 GND A63 ISSUE

+1
B64 A64 EXP_A_RXP_4
GND HSIP11 EXP_A_RXP_4 8
B65 GND HSIN11 A65 EXP_A_RXN_4
EXP_A_RXN_4 8
C115 C117 C116 C132 C95 CT4 PLACE
EXP_A_TXP_3 C146 C0.1U16X0402 EXP_A_CTXP_3 B66 A66 X_C0.1U16Y0402 .CD470U16EL11.5
8 EXP_A_TXP_3

2
8 EXP_A_TXN_3
EXP_A_TXN_3 C147 C0.1U16X0402 EXP_A_CTXN_3 B67
HSOP12
HSON12
GND
GND A67 C0.1U16Y0402 C0.1U16Y0402 C0.1U16Y0402 ABOVE PCIE
B68 A68 EXP_A_RXP_3 C0.1U16Y0402
GND HSIP12 EXP_A_RXP_3 8
B69 A69 EXP_A_RXN_3
GND HSIN12 EXP_A_RXN_3 8
EXP_A_TXP_2 C148 C0.1U16X0402 EXP_A_CTXP_2 B70 A70
8 EXP_A_TXP_2 HSOP13 GND
EXP_A_TXN_2 C149 C0.1U16X0402 EXP_A_CTXN_2 B71 A71
8 EXP_A_TXN_2 HSON13 GND
B72 A72 EXP_A_RXP_2
GND HSIP13 EXP_A_RXP_2 8
B73 A73 EXP_A_RXN_2
GND HSIN13 EXP_A_RXN_2 8
EXP_A_TXP_1 C150 C0.1U16X0402 EXP_A_CTXP_1 B74 A74
8 EXP_A_TXP_1 HSOP14 GND
EXP_A_TXN_1 C151 C0.1U16X0402 EXP_A_CTXN_1 B75 A75
8 EXP_A_TXN_1 HSON14 GND
B76 A76 EXP_A_RXP_1
GND HSIP14 EXP_A_RXP_1 8
B77 A77 EXP_A_RXN_1
GND HSIN14 EXP_A_RXN_1 8
EXP_A_TXP_0 C136 C0.1U16X0402 EXP_A_CTXP_0 B78 A78
8 EXP_A_TXP_0 HSOP15 GND
EXP_A_TXN_0 C137 C0.1U16X0402 EXP_A_CTXN_0 B79 A79
8 EXP_A_TXN_0 HSON15 GND
B80 A80 EXP_A_RXP_0
GND HSIP15 EXP_A_RXP_0 8
D B81 A81 EXP_A_RXN_0 D
PRSNT2# HSIN15 EXP_A_RXN_0 8
B82 RSVD GND A82

SLOT-PCI164_black-1pitch-RH

MICRO-START INT'L CO.,LTD.


Title
MS-7204-30-060804K1
Size Document Number Rev
Custom PCI EXPRESS X16,X1 SLOT 3.0
Date: Friday, August 04, 2006 Sheet 25 of 33
1 2 3 4 5
1 2 3 4 5

ACPI
V_1P5_CORE
VCC5_SB
3VSB MODE SELECT VDIMM LINEAR OR PWM SELECT MCH CORE POWER C239
3VSB MODE 3VDLDEC# VDIMM MODE EXTRAM +12V CP10 X_COPPER C4.7U10Y0805
+12V

Controller
SINGLE MOSFET PULL HIGH LINEAR REGULATOR PULL LOW

N-MMBT3904_NL_SOT23
R73 CD1000U16EL20-1 L04-33A7021-T15 C245 C227

1
R97 DUAL MOSFET PULL LOW PWM REGULATOR PULL HIGH D19 CD1000U16EL20-1 CHOKE1
330R 330R S-BAT54S_SOT23 C1U10Y C1U10Y

EC47
C414 3 EC37 EC42 CH-3.3U4A C236

C4.7U35Y1206 C390

C4.7U35Y1206 C399
C397

+1
C0.22U16Y C418

+
24 PWR_LED VCC5_SB C429 C1U16Y CT15

D
2

CD1000U16EL20-1
Q9 R344 C0.1U25Y .CD470U16EL11.5 C4.7U10Y0805

2
B R328 0R G 0315
10R U15 C0.1U25Y
A A
R95 VCC5 1 VCC1_5_EN N-P60N03LD_TO252 Q42 V_1P5_CORE
SS 13

S
1KR VCC
C433 VREF 12
4 OCP VSENSE 11
R343 CHOKE2
R78 4.7KR 3VDLDEC# R90 5 10 CH-1.2U18A
24 SUS_LED PHASEBOOSTH L04-42A7011-W15
330R 30KR C0.22U16X 6 9 R333

C
Q10 DH BOOSTL C417 R319
B EXTRAM 7 8 100R EC39 EC43
PGND DL

1
N-MMBT3904_NL_SOT23 C1U16Y D21 2.2R0805 C388

+
2

D
SLP_S4# 11 NC
14 3 Q40
SLP_S3# 11,14,23
E
GND NC#3

C0.1U25X0805

CD1800U6.3EL20

CD1800U6.3EL20
C423 R317 0R G
PCIRST_ICH# 10,25

2
S-SM5819A_DO214AC
R82 C0.1U25X N2101_SOIC14 C387
VCC_DDR HD_RST# 24
VCC5_SB R98 4.7KR 1KR R68 10R N-P75N02LDG_TO252
PCIRST_SLOT# 28

S
R87 10R C4700P25X R336
PCIRST_BUF# 14,15,17

PCIRST_SLT#

PCIRST_BF#
C108 536R1%
R418 R421 VCC1_5_EN C91 C20P50N
1KR0402 10KR0402
C

Q51 C100P50N
B N-MMBT3904_NL_SOT23
C

RSMRST# 11,14,16
Q50
E

VCC3
B
C112 Please connect device with tree mode, not daisy chain mode.
Dual NMOS VCC5
C0.1U25Y VCC5_SB EC6 Please refer attached file. Noticed that one of push-pull D03-0210303-N03
E

N-MMBT3904_NL_SOT23 CD470U6.3EL11-RH

+1
R419 1+ 2 reset#(PCIRST_BUF#, SLOT_RST#) at most can connect 5 D03-0731303-A30
X_1KR0402 VCC3 VCC5_SBVCC5_SB
U6
devices. EC40
D03-0731303-I08
48
47
46
45
44
43
42
41
40
39
38
37

2
MS-7-RBC C103 C1U10Y

PLED0/3VDLDEC#
S5#
S3#
PCI_RST#
HDD_RST#
DEV_RST#
SLOT_RST#
VCC3
PCIRST_BUF#
RSMRST#
AGND
PLED1/EXTRAM
B B
R103
1KR R416 R104 R105 9VSB CHARGE PUMP VOLTAGE .CD1000U6.3EL11.5
1KR 1KR 1KR OUTPUT

11,13,22,25,27 SMBCLK
R100
R101
33R
33R
MS7_SCL
MS7_SDA
1
2
SCL CHARPMP 36
35
C102 C1U16Y0805
5V DUAL Power
11,13,22,25,27 SMBDATA SDA C2
R417 X_0R0402 VRM_PWRGD 3 34
13,27 VRM_GD FP_RST# C1 V1P2_DRV 12 VCC5_SB
4 33 C101 C1U16Y0805
6,11 PWR_GD CHIP_PWGD 5VSB#33 V1P2_SEN 12
5 32 V1P2_DRV C226 Q26
CPU_PWGD VLR1_DRV V1P2_SEN C104 C0.1U25Y C2200P16X NN-P2103HV_SO8 USB_STR
6 POK1 VLR2_SEN#31 31
7 30 4 5 USB_STR
24 PWR_OK PWROK 5VUSB_DRV
AGP_PRT 8 29 3 6
PSOUT# 5V_DRV
X7R 9 DDRTYPE VLR2_DRV 28 V_2P5_MCH_DRV 23
5V_DRV 2 7
SVRAM_DRV/DMSB

DDR AND DDR II VOLT SELECT C126 C0.22U16X 10 27 V_2P5_MCH_SEN 1 8


SS VLR2_SEN V_2P5_MCH
RAM_HDRV/DMV

11 26 R76
GND GND#26 130R1% C228 C232
DDRTYPE VDIMM VCC5 12 VCC5 VAGP_SEN#25 25
R75 X_C2200P16X X_C0.1U25Y
RAM_HSEN

VAGP_SEN
3VSB_DRV
RAM_DRV
RAM_SEN

PULL LOW 2.5V C130 120R1% VCC5 REAR


VID_DRV
VID_SEN
VIDGD#

C0.1U25Y USB_STR1
5VSB

3VSB

PULL HIGH 1.8V


13
14
15
16
17
18
19
20
21
22
23
24

VCC5_SB
THIS PIN IS OPEN DRAIN OUTPUT
Q17
V_FSB_VTT NN-P2103HV_SO8
4,27 VID_GD#
945--6.2A 4 5
C124 X_C0.1U25Y 3 6
1

Wide Trace

5V_DRV
RAM_DRV

RAM_SBDRV
+

2 7
EC19 EC24 C105 C175 1 8
C .CD1000U6.3EL11.5
.CD1000U6.3EL11.5 C127 X_C0.1U25Y C109 C2200P16X C
2

X_C0.1U25Y C1000P50X C173


S

X_C2200P16X
R93 3.3R VCC5 FRONT
Q27
G VCC5_SB SWITCH:
N-P45N02LD_TO252
D03-40N030B-A36
D

C120 C135 Q16

V_1P5_CORE
C1U10Y X_C2200P16X NN-P2103HV_SO8 5VDIMM D03-20N030B-I14
VCC_VID / VID_GOOD Wide Trace
4
3
5
6
VCC5_SB
D03-45N030B-P03
Place MOSFET near CPU R92 33R RAM_VREF 5V_DRV 2 7 VCC3_SB Regulator(TO-252)
1

EC23 C410 Q44


+

VCC3 1 8
1

C234 C174 X_C2200P16X NN-P2103HV_SO8


+

X_C0.1U25Y CT6 C114 C119 EC7 X_CD470U6.3EL11-RH X_C0.1U25Y C582 RAM_SBDRV 4 5


D03-45N020B-N03
VCC5_SB
2

3 6 D03-40N030B-A36
2

CD1800U6.3EL20 C1000P50X C1000P50X C10U16Y1206 RAM_DRV 2 7 5VDIMM


Close to MS6+ CD470U6.3EL11-RH Cap ripp=2.2A*2 VCC5 1 8 D03-6530A0B-F01

1
EC41

+
Regulator(TO-263)
DDR VTT Power 945--6.3A
D25
S-1N5817_DO214AC
CHOKE3 C402
X_C0.1U25Y CD470U6.3EL11-RH
D03-50N034B-N03

2
VCC_DDR EC44 1+ 2 CD1800U6.3EL20
5VDIMM
R399
C549
X_C0.1U25Y R412 X_0R
EC45 1+
C420
2 CD1800U6.3EL20
C4.7U10Y1206
D03-50N031B-P03
EC55 VCC_DDR 5.1KR1% R410
+12V
C494 C400 CH-1.2U8A C419 C4.7U10Y1206
Dual NMOS
1+ 2 49.9KR1% C533 C4.7U10Y0805 C403 C1U16Y
D03-07D0303-N03
VCC3_SB R409 X_C0.22U16Y X_C0.1U25Y
.CD1000U6.3EL11.5 R413 X_33R1% U21 D03-0731303-A30
D
U20 5.1KR1% RAM_VREF C534 C0.22U16Y
8 1 R356
7
6
ISET BOOT 8
9 G Q46 VCC_DDR Dual NMOS
VREF2 VIN 1KR1% C517 VREF_IN H_DRV N-P50N03LD_TO252
VTT_DDR
5 FB PGND 10 945--14A D03-07D0303-N03
7 2 R392 51KR1% C2200P16X 4 11 R411 4.7KR1%
S
ENABLE GND2 COMP ISEN
D 3 12 CHOKE5 D03-0731303-A30 D
VCC1_8_EN

SS L_DRV

C455

C535
6 3 C512 X_C0.01U16X 2 13
D

VCTRL VREF1 VRM_GD GND VDD


1 PWROK VDDA 14

+1

+1
GND9

C4.7U10Y1206 C463

C4.7U10Y1206 C540
5 4 R376 X_0R G CH-1.2U18A
BOOT_SEL VOUT R355 MS-6+_SOP14 C2.2U10X0805 Q45 EC60 EC61
1

EC64 C460 1KR1% C485 C488 C2.2U10X0805 N-P50N03LD_TO252 CD1800U6.3EL20

C1U16Y

C1U16Y
+

2
S

W83310DS_SOIC8 C0.1U25Y R377


MICRO-START INT'L CO.,LTD.
9

CD470U6.3EL11-RH 200R C487


2

C491 C0.1U25Y 10R0805


R374 CLOSE TO CHIP
C0.1U25Y CD1800U6.3EL20 Title
MS-7204-30-060804K1
5VDIMM
Size Document Number Rev
5VDIMM 1000uF_1140mA; 1800uF_2220mA Custom MS7 ACPI controller 2.0
Date: Friday, August 04, 2006 Sheet 26 of 33
1 2 3 4 5
5 4 3 2 1

VCC5 VREG_12V
VREG_12V VIN

5
CHOKE4
CH-1.2U18A-LF
R363 3 1 2 1

1
2.2R0805 VREG_12V

1
V_6312

+
4 2 C438 EC8 EC14 EC46 EC48 EC49 C731 C732

2
C0.01U25X0402 C0.1U16Y0402 C0.1U16Y0402

2
R362
VCC5 2.2R0805
C733 JPWR1 CD1000U16EL20-2 CD1000U16EL20-2
PWR-2X2M_white-4.2pitch-RH X_CD1000U16EL20-2
CD1000U16EL20-2 CD1000U16EL20-2
D D
C4.7U10Y0805
R364 C734
X_4.7KR0402
C1U16Y
VIN Vcore 0.8V~1.55V/85A

10
U19 C398
C735 C1000P50X0402 C401

VCC
13,26 VRM_GD 37 PGOOD PVCC1_2 29
C738 C1000P50X0402 VID_PG 36 C10U16Y1206
EN BOOT1 R394 2.2R0805 C739 C0.1U16X C1U16Y
46 31

D
3 VID7 VID7 BOOT1
47 R408
3 VID6 VID6 VCCP
48 32 UGATE1 UGATE1 U_GATE1 G Q41
3 VID[0..7] 3 VID5 VID5 UGATE1 VCCP
1 33 PHASE1 N-P0903BD_TO252 CHOK4
3 VID4 VID4 PHASE1 VCCP
2 30 LGATE1 1R0805 R428 CH-0.25U40A-RH-1
3 VID3

S
VID3 LGATE1 10KR
3 VID2 3 VID2 EL Capacitors
4 35 ISEN1+ R395 0R0402 ISEN1 PHASE1 1 2
3 VID1 VID1 ISEN1+
5 34 ISEN1- C740 C0.1U10X0402 C741
3 VID0 VID0 ISEN1-

1
R396 X_4.7KR1%0402 C0.1U16Y0402

+
3 VRD_VIDSEL 6 VRSEL

1
R365 1.5KR1% R397 4.7KR1%0402 ISEN_1 R312 EC36 EC33 EC32

+
D

D
R366 20KR1%0402 C742 C1500P50X0402 27 BOOT2 C743 C0.1U16X R414 2.2R0805

2
C744 C12P50N0402 BOOT2 R398 2.2R0805 LGATE1 L_GATE1
13 G G

2
COMP UGATE2 CP51 CP17
Place 14 FB UGATE2 26
RT2 R367 0R0402 R369 0R0402 15 25 PHASE2 0R0805
close to

S
X_4.7KRT-RH IDROOP PHASE2 LGATE2 C381 CD560U4OS-2 EC128
LGATE2 28
inductor C746 X_C680P50X0402 R370 X_750R1%0402 C1000P50X0402 CD560U4OS-2 CD560U4OS-2 C100U2SP-LF
R368 16
X_1.6KR1%0402 VDIFF ISEN2+ R400 0R0402 ISEN2 Q38
ISEN2+ 19
R371 X_10KR0402 20 ISEN2- C747 C0.1U10X0402 C748 Q39 N-P75N02LDG_TO252 VCCP
ISEN2- R401 X_4.7KR1%0402 C0.1U16Y0402 N-P75N02LDG_TO252 OS-CON Capactiors
Reserve for R402 4.7KR1%0402 ISEN_2 ISEN_1
R372 100R0402 42 R403 2.2R0805
C VCCP ISL6312A PVCC3 VREG_12V C
C749 C1U16Y ISEN1

1
EC35 EC26 EC25

+
R373 0R0402 18 40 BOOT3 R404 2.2R0805 C750 C0.1U16X VIN
3 VCC_VRM_SENSE VSEN BOOT3 C360

2
C751 39 UGATE3 C386
R378 0R0402 UGATE3 PHASE3
3 VSS_VRM_SENSE X_C0.01U25X0402 17 RGND PHASE3 38
41 LGATE3 C10U16Y1206 CD560U4OS-2 CD560U4OS-2
LGATE3 C1U16Y CD560U4OS-2

D
R379 100R0402 C754 C755 R415
X_C0.1U16Y0402 X_C0.1U16Y0402 44 ISEN3+ R405 0R0402 ISEN3 UGATE2 U_GATE2 G Q35 VCCP
ISEN3+ ISEN3- C756 C0.1U10X0402 C757 N-P0903BD_TO252 CHOK3
ISEN3- 43
R406 X_4.7KR1%0402 C0.1U16Y0402 1R0805 R429 CH-0.25U40A-RH-1

S
R381 X_100KR0402 12 R407 4.7KR1%0402 ISEN_3 10KR
V_6312 OFS PHASE2 1 2

1
R382 X_4.99KR1%0402 EC22 EC18 EC17 EC30 EC31

+
7 DRSEL ISEN4+ 21
ISEN4- 22
R383 X_1KR0402-1 8 R307

2
OVPSEL R422 2.2R0805
11 24 LGATE2 L_GATE2 G G CP53 CP16
REF PWM4 CD560U4OS-2 CD560U4OS-2 X_CD560U4OS-2
45 FS
R384 X_0R0402 C758 9 23 0R0805 C380 CD560U4OS-2 X_CD560U4OS-2
GND

11,13,22,25,26 SMBCLK V_6312

S
SS EN_PH4
R385 X_0R0402 X_C100P16N0402 Disable PH4 the C1000P50X0402
11,13,22,25,26 SMBDATA
EN_PHN(pin23) should
49

R386 C760 ISL6312CRZ_QFN48-RH Q36 VCCP


be pull-hi 5V
R389 R390 R391 R393 Q32 N-P75N02LDG_TO252
C0.01U25X0402

33KR1% 0R0402 0R0402 120KR 240KR0402 7X7 QFN N-P75N02LDG_TO252 ISEN_2

ISEN2
C272 C275 C280 C284 C290 C298
B B
BOTTOM PAD VIN
C201
CONNECT TO GND C238
Through 8 VIAs C22U10Y1206 C22U10Y1206 C22U10Y1206
C10U16Y1206 C22U10Y1206 C22U10Y1206 C22U10Y1206
C1U16Y

D
R437
UGATE3 U_GATE3 G Q28 VCCP
N-P0903BD_TO252 CHOK2
1R0805 R438 CH-0.25U40A-RH-1

S
10KR
PHASE3 1 2
VREG_12V C297 C283 C303 C289 C279 C308

R174

D
R450 2.2R0805 CP55 CP15
LGATE3 L_GATE3 G G
R465 C22U10Y1206 C22U10Y1206 C22U10Y1206
10KR0402 0R0805 C210 C22U10Y1206 C22U10Y1206 C22U10Y1206

S
C1000P50X0402
VCCP Solder Side
VID_PG
Disable PH4 the Q29
C

R467 Q74 EN_PHN(pin23) should Q23 N-P75N02LDG_TO252


4,26 VID_GD# VID_GD# B be pull-hi 5V N-P75N02LDG_TO252

1
N-PMBS3904_SOT23-RH ISEN_3 C307 C311 C435 C436

+
10KR0402 R472 EC130 EC129
E

2.2KR0402 ISEN3

2
C765 C764
C1000P50X0402
A C1000P50X0402 X_C22U10Y1206 X_C22U10Y1206 A
X_C100U2SP-LF X_C100U2SP-LF
X_C22U10Y1206 X_C22U10Y1206

MICRO-START INT'L CO.,LTD.


Title
MS-7204-30-060804K1
Size Document Number Rev
Custom INTERSIL 6312 3PHASE 3.0
Date: Friday, August 04, 2006 Sheet 27 of 33
5 4 3 2 1
1 2 3 4 5

PCI SLOT 2 PCI SLOT1


-12V +12V -12V +12V
PCI2 PCI1
B1 A1 TRST# B1 A1 TRST#
TCK -12V TRST# -12V TRST#
B2 TCK +12V A2 13 PCI_CLK4 B2 TCK +12V A2
B3 A3 TMS B3 A3 TMS
GND TMS TDI PIRQ#F GND TMS TDI
B4 TDO TDI A4 B4 TDO TDI A4
VCC5 B5 +5V +5V A5 VCC5 B5 +5V +5V A5
B6 A6 PIRQ#A B6 A6 PIRQ#B
PIRQ#B +5V INTA# PIRQ#C PIRQ#C +5V INTA# PIRQ#D
A B7 INTB# INTC# A7 B7 INTB# INTC# A7 A
PIRQ#D B8 A8 PIRQ#A B8 A8
INTD# +5V VCC5 INTD# +5V VCC5
B9 PRSNT#1 RESERVED A9 B9 PRSNT#1 RESERVED A9 PIRQ#E 10
B10 A10 PREQ#3 B10 A10
RESERVED +5V(I/O) VCC3 RESERVED +5V(I/O)
B11 PRSNT#2 RESERVED A11 B11 PRSNT#2 RESERVED A11 PGNT#3 10
B12 A12 VCC3 B12 A12 VCC3
GND GND GND GND
B13 GND GND A13 VCC3_SB B13 GND GND A13 VCC3_SB
VCC3 B14 A14 B14 A14
RESERVED RESERVED 13 PCI_CLK3 RESERVED RESERVED
B15 A15 PCIRST_SLOT# B15 A15 PCIRST_SLOT#
GND RST# GND RST# PCIRST_SLOT# 26
13 PCI_CLK1 B16 CLK +5V(I/O) A16 13 PCI_CLK0 B16 CLK +5V(I/O) A16
B17 A17 PGNT#0 B17 A17
GND GNT# PGNT#0 10 GND GNT# PGNT#1 10
PREQ#0 B18 A18 PREQ#1 B18 A18
REQ# GND PCI_PME# REQ# GND PCI_PME#
B19 +5V(I/O) RESERVED A19 B19 +5V(I/O) RESERVED A19 PCI_PME# 10
AD31 B20 A20 AD30 AD31 B20 A20 AD30
10,17 AD31 AD31 AD30 AD31 AD30 AD30 10,17
AD29 B21 A21 AD29 B21 A21
10,17 AD29 AD29 +3.3V AD29 +3.3V
B22 A22 AD28 B22 A22 AD28
GND AD28 GND AD28 AD28 10,17
AD27 B23 A23 AD26 AD27 B23 A23 AD26
10,17 AD27 AD27 AD26 AD27 AD26 AD26 10,17
AD25 B24 A24 AD25 B24 A24
10,17 AD25 AD25 GND AD25 GND
B25 A25 AD24 B25 A25 AD24
+3.3V AD24 +3.3V AD24 AD24 10,17
C_BE#3 B26 A26 ID1R17 300R AD16 C_BE#3 B26 A26 R16 300R AD17
10,17 C_BE#3 C/BE#3 IDSEL C/BE#3 IDSEL
AD23 B27 A27 AD23 B27 A27
10,17 AD23 AD23 +3.3 AD23 +3.3
B28 A28 AD22 B28 A28 AD22
GND AD22 GND AD22 AD22 10,17
AD21 B29 A29 AD20 AD21 B29 A29 AD20
10,17 AD21 AD21 AD20 AD21 AD20 AD20 10,17
AD19 B30 A30 AD19 B30 A30
10,17 AD19 AD19 GND AD19 GND
B31 A31 AD18 B31 A31 AD18
+3.3V AD18 +3.3V AD18 AD18 10,17
AD17 B32 A32 AD16 AD17 B32 A32 AD16
10,17 AD17 AD17 AD16 AD17 AD16 AD16 10,17
C_BE#2 B33 A33 C_BE#2 B33 A33
10,17 C_BE#2 C/BE#2 +3.3V C/BE#2 +3.3V
B34 A34 FRAME# B34 A34 FRAME#
GND FRAME# GND FRAME# FRAME# 10,17
IRDY# B35 A35 IRDY# B35 A35
B 10,17 IRDY# IRDY# GND IRDY# GND B
B36 A36 TRDY# B36 A36 TRDY#
+3.3V TRDY# +3.3V TRDY# TRDY# 10,17
DEVSEL# B37 A37 DEVSEL# B37 A37
10,17 DEVSEL# DEVSEL# GND DEVSEL# GND
B38 A38 STOP# B38 A38 STOP#
GND STOP# GND STOP# STOP# 10,17
LOCK# B39 A39 LOCK# B39 A39
10 LOCK# LOCK# +3.3V LOCK# +3.3V
PERR# B40 A40 PERR# B40 A40 R19 300R AD20
10,17 PERR# PERR# SDONE PERR# SDONE AD20 10,17
B41 A41 B41 A41 R18 300R AD21
+3.3V SBO# +3.3V SBO# AD21 10,17
SERR# B42 A42 SERR# B42 A42
10 SERR# SERR# GND SERR# GND
B43 A43 PAR B43 A43 PAR
+3.3V PAR +3.3V PAR PAR 10,17
C_BE#1 B44 A44 AD15 C_BE#1 B44 A44 AD15
10,17 C_BE#1 C/BE#1 AD15 C/BE#1 AD15 AD15 10,17
AD14 B45 A45 AD14 B45 A45
10,17 AD14 AD14 +3.3V AD14 +3.3V
B46 A46 AD13 B46 A46 AD13
GND AD13 GND AD13 AD13 10,17
AD12 B47 A47 AD11 AD12 B47 A47 AD11
10,17 AD12 AD12 AD11 AD12 AD11 AD11 10,17
AD10 B48 A48 AD10 B48 A48
10,17 AD10 AD10 GND AD10 GND
B49 A49 AD9 B49 A49 AD9
GND AD9 GND AD9 AD9 10,17

AD8 B52 A52 C_BE#0 AD8 B52 A52 C_BE#0


10,17 AD8 AD8 C/BE#0 AD8 C/BE#0 C_BE#0 10,17
AD7 B53 A53 AD7 B53 A53
10,17 AD7 AD7 +3.3V AD7 +3.3V
B54 A54 AD6 B54 A54 AD6
+3.3V AD6 +3.3V AD6 AD6 10,17
AD5 B55 A55 AD4 AD5 B55 A55 AD4
10,17 AD5 AD5 AD4 AD5 AD4 AD4 10,17
AD3 B56 A56 AD3 B56 A56
10,17 AD3 AD3 GND AD3 GND
B57 A57 AD2 B57 A57 AD2
GND AD2 GND AD2 AD2 10,17
AD1 B58 A58 AD0 AD1 B58 A58 AD0
10,17 AD1 AD1 AD0 AD1 AD0 AD0 10,17
B59 +5V(I/O) +5V(I/O) A59 B59 +5V(I/O) +5V(I/O) A59
ACK#64 B60 A60 REQ#64 B60 A60 PREQ#5
ACK64# REQ64# 10 PGNT#5 ACK64# REQ64#
B61 +5V +5V A61 B61 +5V +5V A61
B62 +5V +5V A62 B62 +5V +5V A62

C
PCICONN PCISLOT-Green C
MEDION
IDSEL = AD16 IDSEL = AD17 IDSEL = AD20& AD21
MASTER = PREQ#0 MASTER = PREQ#1 MASTER = PREQ#3& PREQ#5
PIRQ#A PIRQ#B PIRQ#E& PIRQ#F

PCI SLOT DECOUPLING CAPACITORS


PCI PULL-UP / DOWN RESISTORS
VCC3
VCC5
VCC5 VCC5 VCC3
RN1
FRAME# 1 2 VCC3
VCC5
IRDY# 3 4

1
TRDY# REQ#64 R12 2.7KR0402 RN6

+
5 6 VCC5
DEVSEL# 7 8 ACK#64 R11 2.7KR0402 PIRQ#G 1 10 C19 C32 C34 C20 EC2
10 PIRQ#G
PIRQ#E 2 9 PIRQ#F C17 C33 C21 C31 EC1 CT1
10 PIRQ#E PIRQ#F 10

2
.CD1000U6.3EL11.5

C0.1U16Y0402

C0.1U16Y0402

C0.1U16Y0402

C0.1U16Y0402
8P4R-2.7KR PIRQ#A 3 8 PIRQ#H
10 PIRQ#A PIRQ#H 10
C0.1U16Y0402

C0.1U16Y0402

C0.1U16Y0402

C0.1U16Y0402
PIRQ#C 4 7 PIRQ#B
10 PIRQ#C PIRQ#B 10
5 6 PIRQ#D
PIRQ#D 10,17
RN4 10P8R-8.2KR X_.CD1000U6.3EL11.5 .CD1000U6.3EL11.5
RN2 TDI 1 2 VCC5
D STOP# 1 2 VCC5 TMS 3 4 SWAP D
LOCK# 3 4 TRST# 5 6
PERR# 5 6 TCK 7 8 VCC5
SERR# 7 8
8P4R-2.7KR0402 RN7
8P4R-2.7KR PREQ#1 1 10
10 PREQ#1
10 PREQ#3
PREQ#3
PREQ#0
2
3
9
8 PREQ#5
MICRO-START INT'L CO.,LTD.
10 PREQ#0 PREQ#5 10 Title
PREQ#2 4 7 PREQ#4
10 PREQ#2 PREQ#4 10,17
5 6 MS-7204-30-060804K1
10P8R-2.7KR Size Document Number Rev
Custom
PCI Slot 1 & 2 3.0
Date: Friday, August 04, 2006 Sheet 28 of 33
1 2 3 4 5
1 2 3 4 5

VCC3

C439 C1000P50X0402 C432 X_C1000P50X0402


A A
C430 C1000P50X0402 C125 X_C1000P50X0402

C513 C1000P50X0402 C372 X_C1000P50X0402

C324 X_C1000P50X0402 VCC5


VCC_DDR
AGND C56 X_C1000P50X0402
C495 X_C1000P50X0402 C562 X_C1000P50X0402
C209 X_C1000P50X0402
C565 X_C1000P50X0402
C184 X_C1000P50X0402
C530 X_C1000P50X0402
C561 X_C1000P50X0402
C470 X_C1000P50X0402
C281 C1000P50X0402 C552 X_C1000P50X0402
C500 X_C1000P50X0402 C46 X_C1000P50X0402
C551 C1000P50X0402
PGND C590 X_C1000P50X0402 C536 X_C1000P50X0402 C538 X_C1000P50X0402
C257 C1000P50X0402
C592 X_C1000P50X0402
C532 X_C1000P50X0402 C107 X_C1000P50X0402
C593 X_C1000P50X0402
C466 X_C1000P50X0402 C35 X_C1000P50X0402

C465 X_C1000P50X0402 C18 X_C1000P50X0402


R430 X_0R
C529 X_C1000P50X0402

B C472 X_C1000P50X0402 C507 X_C1000P50X0402 B

C469 X_C1000P50X0402 C299 X_C1000P50X0402

VIN

VTT_DDR C556 X_C1000P50X0402 C443 X_C1000P50X0402 C188 X_C1000P50X0402

C395 X_C1000P50X0402 C471 X_C1000P50X0402 C58 X_C1000P50X0402


C468 X_C1000P50X0402
C111 X_C1000P50X0402 C528 X_C1000P50X0402 C113 X_C1000P50X0402
C531 X_C1000P50X0402
C106 X_C1000P50X0402 C501 X_C1000P50X0402 C67 X_C1000P50X0402
C527 X_C1000P50X0402
C567 X_C1000P50X0402 C467 X_C1000P50X0402 C574 X_C1000P50X0402

C577 X_C1000P50X0402

C328 X_C1000P50X0402

C594 X_C1000P50X0402
V_1P5_CORE

C312 X_C1000P50X0402 C616 X_C1000P50X0402

C389 X_C1000P50X0402
C619 X_C1000P50X0402
C319 X_C1000P50X0402
C C

VCC3 VCC5
C600 X_C1000P50X0402 +12V VCC5_SB

C558 X_C1000P50X0402 C595 X_C1000P50X0402


C575 X_C1000P50X0402
C559 X_C1000P50X0402 C596 X_C1000P50X0402

C566 X_C1000P50X0402 C597 X_C1000P50X0402


C563 X_C1000P50X0402
C598 X_C1000P50X0402
C568 X_C1000P50X0402
C571 X_C1000P50X0402 C599 X_C1000P50X0402
C478 X_C1000P50X0402
C569 X_C1000P50X0402
C256 X_C1000P50X0402
C564 X_C1000P50X0402
C57 X_C1000P50X0402
C572 X_C1000P50X0402
C82 X_C1000P50X0402

VCC5 +12V VCC3 +12V

D C618 X_C1000P50X0402 C617 X_C1000P50X0402 D

MICRO-START INT'L CO.,LTD.


Title
MS-7204-30-060804K1
Size Document Number Rev
Custom EMI suggestions 3.0
Date: Friday, August 04, 2006 Sheet 29 of 33
1 2 3 4 5
1 2 3 4 5

Mounting Holes
Optical Fiducial Marks
A A

9
MH1 MH2 MH3 LP1 LP2 LP3 LP4
Simulation
7 2 7 2 7 2

6 3 6 3 6 3 OPTICS OPTICS OPTICS OPTICS


MH1 MH1 MH1 J1
FM1 FM2 FM3 FM4 1
VCC5
5

4
2

9
MH5 MH7 X_H1X2_black
OPTICS OPTICS OPTICS OPTICS
7 2 7 2 J2
1
6 3 6 3 FM5 FM6 2

MH1 MH1 X_H1X2_black

4
OPTICS OPTICS
8

MH4

7 2

9
B 6 3 MH6 B

MH1 7 2
5

6 3
MH1

MANUAL PART

BIOS1_X1 PCB1 BAT1_X1 D


3

+ SOT23
G 1 2 S
X_PLCC32-SMT BATTERY HOLDER, 2PIN
2N7002
7204-30
Top View
P30-0720430-E48
C C
P30-0720430-G37
P30-0720430-CD7

HEAT SINK HOOK

U11_X2 U11_X3 U20_X3 U20_X2


HK1*3(-2) HK1*3(-2) HK1*3(-2) HK1*3(-2)

U11_X1
U20_X1
X5 MCH X1
X6 X2 ICH XX1
X7 X3 XX2
X8 Heatsink X4 XX3
D
Heatsink XX4 D

MCH_HS
ICH6_HS

MICRO-START INT'L CO.,LTD.


Title
MS-7204-30-060804K1
Size Document Number Rev
Custom Misc 3.0
Date: Friday, August 04, 2006 Sheet 30 of 33
1 2 3 4 5
1 2 3 4 5

PWROK & PCIRST MAP


VRM_EN

VRM 10.1 VTT_PWG


ISL6316 CR Intel LGA775 Processor
A 4-Phases PWM VTT_PWRGOOD signal must be A
H_TRST# for XDP delayed 1-10ms after
H_CPURST# VTT_FSB for proper
VTT clock/cpu function
H_PWRGD VTT
5VSB

VRM_GD LAKEPORT-G VID_GD#

Vcc3
Vcc3 Vcc5
IDE
PWR_GD HD_RST#

83627EHF 1394 FWB LAN


MS7
ICH_SYNC# PCIRST_BUF#
PLTRST#
Vcc5_SB
PCIRST_SLOT#
RSMRST#
divider PCISLOT 1 PCISOLT 2 TRST#

B B
10K
PCIRST_ICH#

ICH7 PCIE_X1 PCIE_X16


SLP_S4#
SLP_S3#
AC_RST#
Azalia
5VSB Vcc5

VCC3 AGP_PRT PWR_OK


PHYRST#
PWRBTN# 1394
KBRST#
SLP_S3# 5VSB

PS_ON#
W83627EHF
VCC3
FP_RST#
C C
PWRBTIN
POWER CONN CLK_RST#
CLK_Gen

Front Panel

Reset Table Reset Table PCI Routing Table

Netname SOURCE Targets Netname SOURCE Targets PCI Device IDSEL REQ/GNT INTERRUPT
PCI Slot 1 AD16 0 A
PCIRST_ICH# ICH7 MS7, PCIE_ X1, PCIE_X16 HD_RST# MS7 IDE
PCI Slot 2 AD17 1 B
AD20 3 E
PCIRST_BUF# MS7 Super I/O, FWH, LAN, 1394 AC_RST# ICH7 Azalia (Add MEDION SPEC)
AD21 5 F
LAN AD18 2 C
PCIRST_SLOT# MS7 PCI_SLOT 1 & 2 KBRST# SuperIO ICH7
1394. AD19 4 D
D D
PLTRST# ICH7 Lakeport FP_RST# Panel ICH7

CLK_RST# Pull-up to Vcc3

PHYRST# Pull-down MICRO-START INT'L CO.,LTD.


Title
MS-7204-30-060804K1
Size Document Number Rev
Custom
PCIRST&POWER OK Map 3.0
Date: Friday, August 04, 2006 Sheet 31 of 33
1 2 3 4 5
1 2 3 4 5

Vcc3_SB

ICH7_Vcc3_SB: 0.7A
+12V V_1P5_CORE X_EC28_470u EC29_470u 83627EHF:
A A

CH-1.2U18A PCIE_X16: 375mA


2.5A 16.277A 10.4A MCH:core-8.9A
Switching PCIE & DMI-1.5A PCIE_X1(2): 375mA
CH-3.3U4A -N2101 ICH7:Vcc1_5A-0.97mA PCISLOT(4): 375mA
EC22_1800u Vcc1_5B-0.74mA

EC47_1000u EC21_1800u VTT_1.2V


EC37_1000u 1870mA*2 EC1_470u Vcc5_SB
EC19_1000u 6.2A CPU:FSB-5.3A
for DMI 4.96A Linear DDRII: 425mA
1870mA*3 MCH:0.9A
-MS7 USB: 20mA(S3)
EC27_1000u ICH7:14mA
EC55_1000u PS2: 2mA(S3)
1140mA*2
ICH7_5Verf: 10mA
V_1P05_CORE
Dual MOS to 3VSB: 1.5A

B CT5_1800u 0.917A Linear 1.31A B


ICH7:core-1.31A
2350mA -LM358
3.3V
EC2_1000u 1050mA

PCIE_X16: 3A

PCIE_X1(2): 3A

EC24_1000u PCISLOT(4): 7.6A


3.3V_spdif in
ICH7: 0.58A

Azalia: 100mA

FWH: 107mA

83627EHF: EC56_220u
Vcc5_SB VccDDR_1.8V ICS954119DF
C 5VDIMM C

5V
6.57A CH-1.2U18A 14.6A
EC25_470u Vcc5 Dual MS6+
14A DIMM(4):1.8V-9.4A
Mos CH-1.2U8A ICH7_5Verf: 6mA
MCH:4A
EC34_1800u Azalia: 100mA
EC35_1800u
2220mA*2 PCISLOTE(4): 5A
EC30_470u EC31_1800u VttDDR_0.9V
EC23_1000u EC33_1800u
1140mA Switch to VccDDR: 14.6A
2350mA*2
0.6A Linear 1.2A
Dual MOS to USB_STR:SVCC2=2.6A,SVCC3=1A
W8331DS
Dual MOS to USB_STR1:SVCC1=2A PS2: 345mA
EC36_470u USB_STR SVCC1 SVCC2 SVCC3
EC32_1000u
1140mA
D D

X_EC26_470u CT2_1000u EC17_1000u EC64_470u

MICRO-START INT'L CO.,LTD.


Title
MS-7204-30-060804K1
Size Document Number Rev
Custom POWER Map 3.0
Date: Friday, August 04, 2006 Sheet 32 of 33
1 2 3 4 5
1 2 3 4 5

MS-7204 SCHEMATIC HISTORY


Rev Date Page Description Rev Date Page Description

A
0A 2005/07/12 -All- ● first version be released. A

0B 2005/07/27 -08,10- ● Fixed DMI RX & TX link error.


-14- ● Change IR connector pin definition.
-19- ● Change SPDIF IN connector pin definition.
-24- ● Add EXTSMI function.
1.0 2005/08/10 -14- ● Add fuse for IR Power and Revise pin definition .
-14- ● Revise system temperature sense circuit.
-14- ● Revise Beep circuit for W83627EHF Ver C.
2005/08/25 -15- ● Revise Fan control circuit.
-18- ● Change D22 from 1N5817 to 1N4148 to avoid D22 can not
turn off when power on.
-18- ● Swap CNT and LFE on Audio Jack.
1.A 2005/09/09 -14- ● Change JLCD PWR to VCC5_SB
2005/09/30 -19- ● Remove R329 ,R323 change to 158R ,R327 change to 143R
B
for fixed fail SPDIF loop back test. B

2005/09/30 -30- ● Remove BIOS scoket for cost down.


1.B 2005/10/27 -All- ● Change PCB to OSP
● Transfer BOM to RoHS.
2005/11/01 ● Change Q54 to 2N7002 for GPIO pin stable in PWM mode.
2.0 2006/02/16 -10 16- ● Change LAN TO 82562GZ/82573
-18 19- ● Change AUDIO TO ALC883
LAN remove PREQ#2,PGNT#2,PIRQ#C,LAN_PCLK
ADD EEPROM for 82562
ADD LAN_RST#, LAN_DISABLE#
ADD GPIO28 do LED FOR ICH7DH
change R148, R154, R155, R166 0603=>0402
PCIE PIN A1 TO GND
C C
SATA FOOTPRINT
3.0 2006/07/20 -27- 1.Change VRM 10.1 to VRM 11.
-14- 2.Chanhe SIO to W83627DHG
-03- 3.VID6 and VID7 connected to VR controller and pulled up to
VTT via 680Ohm resistor
-05- 4.COMP8 signal pulled down via 30 Ohm resistor.
-03- 5.VID_SELECT connect from CPU to VRD Controller via
1KOhm resistor.
-04- 6.VCC_PLL connection to Vcc 1_5V and to ground via capacitors.
-18,19- 7.Change Audio Codec to ALC888.
8.Change 1394 controller to VT6308P.
-13- 9.Revise Clock generator VTT power down circuit
-19- 10.Add SPDIF OUT for HDMI
D D

MICRO-START INT'L CO.,LTD.


Title
MS-7204-30-060804K1
Size Document Number Rev
Custom History 3.0
Date: Friday, August 04, 2006 Sheet 33 of 33
1 2 3 4 5

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