Kopperundevi Calicut

H +91 9566523561
B kopperundevipj@gmail.com
https://www.linkedin.com/in/kopperundevi-p-6033bbba/
VLSI in Multimedia, P h.D.,

Meticulous and analytical researcher with 5 years of experience in

VLSI Design. Adaptive team player with in -depth knowledge of data
collection and problem solving. A highly motivated individual
committed to hard work and intensive analysis. Flexible and polished
senior Research associate promoting well developed skills. Currently
looking for an editor job in engineering filed.

Education
2018-ongoing National Institute of Technology Calicut, Ph.D., VLSI in Multimedia, CGPA-8.64/10
2015 – 2017 Sri Venkateshwara college of Engineering, M.E-Applied Electronics- Rank Holder, CGPA-
8.72/10
2011 – 2015 Prathyusha Engineering College, B.E-Electronics and Communication Engineering, CGPA-
8.32/10

Experience
2017–2018 Assistant Professor, Indira Institute of Technology and Engineering, Courses handled :VLSI
Design, Microcontroller Based System Design.
2022 onwards Freelancer, Academic editor at Enago

Key Skills
Programming Verilog,System Verilog, FPGA, ASIC, LT spice LATEX, Python, MATLAB
Language Simulink, UVM- In progress
Operating Linux, Windows
System
Codec HEVC, H.264, VVC

Thesis Topic
B.E Unmanned Aerial Vehicle
M.E Integrated Development Environment for MIPS processor
P h.D VLSI Architectures for HEVC codec

Keyskills
Strong understanding of basic ASIC/VLSI design concepts
4+ years of research experience with HDL languages such as Verilog or VHDL, System
Verilog
Comfortable working in a Linux environment
Experience with scripting languages such as perl, python, tcl, etc.
Detail oriented with strong analytical and debugging skills
Strong communication skills and works well in a team environment
Synthesis, Timing Constraints, Lint, Power Analysis Tasks using industry standard
tools i.e. Design Compiler, Genus etc
Implement modules and sub-systems in Verilog RTL
Good working experience with C/C++

Journals
2022 P. Kopperundevi , and M. S. Prakash, “Methods to develop high throughput hardware architectures
for HEVC Deblocking Filter using mixed pipelined-block processing techniques,” Microelectronics J.,
vol. 123, no. October 2021, p. 105413, 2022.
2022 P. Kopperundevi, M. S. Prakash, and S. R. Ahamed, “A high throughput hardware architecture
for deblocking filter in HEVC,” Signal Processing: Image Communication, vol. 100, no. October
2021, p. 116517, 2022.
2017 P. Kopperundevi, and S.Muthukumar, “An application oriented interfacing of keyboard with MIPS
processor,"in International Journal of Emerging Technology in Computer Science& Electronics, vol.
100, no. October 2021, p. 116517, 2017.
2017 P. Kopperundevi, and S.Muthukumar, “Simulator for MIPS processorr,"in International Journal
of Innovative Research in Computer and Communication Engineering, vol. 100, no. October 2021, p.
116517 , 2017.
2017 P. Kopperundevi, and Rajalakshmi.P , "A Novel Approach to Speech Enhancement using Modified
Spectral Subtraction,"in International Journal of Advanced Research in Electrical, Electronics and
Instrumentation Engineering, vol. 6, Special Issue 2, March , 2017.

Conference
2021 P. Kopperundevi, and M. Surya Prakash,, “An efficient hardware architecture for deblocking filter
in HEVC,"in in Lecture Notes in Electrical Engineering, vol. 661, 2021, pp. 599–609.
2022 P. Kopperundevi, and M. S. Prakash, “A Hardware Architecture for Sample Adaptive Offset
Filter in HEVC,"IEEE Int. Conf. Distrib. Comput. VLSI, Electr. Circuits Robot. Discov. 2021 −
Proc., pp. 181–186,, 2021.
2017 P. Kopperundevi, , Presented a paper “A novel approach to speech enhancement using modified
spectral subtraction” in National Conference on Advances in Electrical and Electronics Engineering
,, (NCAEEE2017).
2017 P. Kopperundevi, , Presented a paper “Simulator for MIPS processor” in International Conference
on Signal Processing, Communication Engineering , (NCSPCN2017).
2017 P. Kopperundevi, , Presented a paper “An application oriented interfacing of keyboard with MIPS
simulator” in the 2nd International Conference on Innovative & Emerging Trends in Engineering
&Technology , (ICIETET 17).
2022 P. Kopperundevi, and M. S. Prakash, “Low area and low power RNS adder and its use in DCT
of HEVC,", under correction
2022 P. Kopperundevi, and M. S. Prakash, “Modular multiplication using residue number and its use
in DCT of HEVC ,", under correction