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Epk50 La-G07cp (Rev 1.0) - PDF
Epk50 La-G07cp (Rev 1.0) - PDF
Compal Confidential
1 1
2
Intel M/B Schematics Document 2
Kabylake-U(2+2)-DDR4 SODIMMx2
nVidia N16G DDR5-2GB
Project :2018OPP_Harry Potter(15.6")
EPK50 :LA-G07CP
3 3
Date : 2018-01-08
REV : 1.0
4 4
THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENSTiIzAeL Document Number
Cover Page
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R& D
Rev
v0.3
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.
EPK50_LA-G07CP
Date: Monday, January 08, 2018 Sheet 1 of 59
Eletro-XTechnical0
A B C D E
A B C D E
JHDD
SATA 3.0 Port0
P.30 2.5" SATA HDD *sub board
(sub board) LS-G072P
DA4002LZ000
JEDP
eDPx2Lane JODD
eDP CONN SATA 3.0 Port1 M.2 SATA SSD *sub board
JHDMI eMMC
(sub board)
*sub board
LS-G075P
JSSD DA6001WS00S
HDMI CONN DDI x4Lane Port 1
PCIe 3.0:8Gb/s PCIe x2 M.2 SSD(KeyM)
P.28 NVMe P.19
Port#11~#12 *need supported Intel Optane (3D Xpoint)
2 JWLAN USB3.0 2
Charger
Port4 Card Reader DA6001WJ000
Battery AK6485RB63-GLF-GR P.29
(sub board)
P.47 P.46
UK1
JEDP
SMBus1
EC ENE LPC Port5 Camera P.27
3
KB9022QD 33MHz 3
SMBus2
P.33 JWLAN
Port6
UV1 UC3 Bluetooth
PS2 P.30
dGPU Thermalsensor JKB JTP
G753T11U P.10 Int.KBD TouchPad JEDP
P.22 SMBus Port7
P.34 P.34 TouchScreen P.27
*sub board
JFAN JKBL LS-G073PR01
DA4002M0000
Fan KBlight
75x70 P.38 P.34 SPI UA1 JSPK
50MHz
UC2 HDA 24MHz HDA Aduiocodec Internal SPK P.32
SPI ROM ALC3247-CG
P.32 JHP
8MBytes P.07
Combo Jack
P.32
UT1
TPM
SLB9670VQ2.0
4 P.35 4
THIS S H E E T O F E N G IN E E R IN G D R A W IN G IS TH E P ROP RIE TA R Y P R O P E R TY O F C O M P A L E LE CTRONICS , INC. A N D CONTA INS CONFIDENTSIiiiAzeL Document Number
Block Diagrams
A N D TR A D E S E C R E T INFORM A TI ON. THIS S HE E T M A Y N O T BE TR A N S F E R E D F R O M TH E C U S TO D Y OF TH E C O M P E TE N T DIV IS ION OF R & D Rev
DE P A RTM E NT E X C E P T A S A UTHORIZE D B Y C O M P A L E LE CTRONICS , INC. NE ITHE R THIS S H E E T N O R TH E IN F O R M A TIO N IT CONTA INS Custom v0.3
M A Y BE U S E D BY OR DIS CLOS E D TO A N Y THIRD P A R TY W ITH O U T P R IO R W R ITTE N C O N S E N T OF C O M P A L E LE CTRONICS , INC. EPK50_LA-G07CP
Date: Monday, January 08, 2018 Sheet 2 of 59
A B C D E
5 4 3 2 1
+5VALW/+3VALW
AC
Adapter 19.5V
(SY8288C/SY8286B)
P.51
DC Discharge P.48
Battery
P.46 +1.2V/+0.6VS
Vin(G5616B)
Vout +0.6V_0.6VS
+2.5V_PG Vout +1.2V_VDDQ
EN S5
C C
SM_PG_CTRL
EN S3
P.49
B PGOOD VR_PWRGD B
P.52,53
+VGA_CORE
Vin (RT8812A) Vout +VGA_CORE
VRAM_PG
PGOOD GPU_PGD
EN
P.56
+0.6V_0.6VS SUSP#
+VCC_CORE X VR12.5_VR_ON U_i5_7200U_SR342@ i5_7200U_R3@ ZZZ ZZZ ZZZ ZZZ
Power State
STATE SIGNAL SLP_S3# SLP_S4# SLP_S5# +VALW +V +VS Clock
UC1 UC1 2G Micron 2G Micron 4G Micron 4G Micron
S0 (FullON) HIGH HIGH HIGH ON ON ON ON
BOM Structure Table (1/2) U_SI_i5-7200U_SR342H02.5G
SA0000A37H0
i5_7200U
SA0000A37J0
M2G_R1@
X7674032L01
M2G_R3@
X7674032L06
M4G_R1@
X7674032L26
M4G_R3@
X7674032L29
S IC FJ8067702739739 SR342 H0 2.5GBGA S IC FJ8067702739739 SR342 H0 2.5GA32! S3 (Suspend toRAM) LOW HIGH HIGH ON ON OFF OFF
Function Stuff Un-Stuff
S4 (Suspend toDisk) LOW LOW HIGH ON OFF OFF OFF
DGPU SKU PX@ U_i7_7500U_SR341@ i7_7500U_R3@ ZZZ ZZZ ZZZ ZZZ
UMA SKU UMA@ S5 (SoftOFF) LOW LOW LOW ON OFF OFF OFF
UC1 UC1 2G Hynix 2G Hynix 4G Hynix 4G Hynix
TPM TPM@
U_SI_i7-7500U_SR341H02.7G i7_7500U H2G_R1@ H2G_R3@ H4G_R1@ H4G_R3@
SA0000A34F0 SA0000A34H0 X7674032L04 X7674032L07 X7674032L25 X7674032L28
S IC FJ8067702739740 SR341 H0 2.7GBGA S IC FJ8067702739740 SR341H0 2.7G A32! <USB2.0 port>
45@ ROYALTY HDMIW /LOGO
CPU
+3VALW 6 2 6
+3V_PRIM KBLU_UMA@
DA6001YA000
KBLR_UMA@
DA6001YB000
7 3 GPU(DIS only)
3 R9 SML0CLK R=499 R=10K 3
TP_SMBCLK PCB 29M LA-G07CP REV0 M/B 3 PCB 29L LA-G07CP REV0 M/B 3
8 4 GPU(DISonly)
SML0DATA TP_SMBDAT
W2 2N7002 TouchPad 9 5 LAN CLK1
10 6 W LAN CLK2
11 7 0 HDD X
+3V_PRIM+3VS +3VS +3VS_DGPU_AON
12 8 1a ODD CLK3
R=1K R=2.2K
13 9 X X
SML1CLK
+3VS_DGPU_AON
@ 14 10 X X
W3 SML1DATA
V3 2N7002 15 11 1b* X CLK4
EC_SMB_CK2 NVMe x2
EC_SMB_DA2 R=2.2K
16 12 2 SATASSD X
PX@
U6 2N7002 DGPU
U7 I2CS_SCL
I2CS_SDA
UK1:+3VALW_EC(+3VL)
EC_SMB_CK2
79 EC_SMB_DA2
4 4
80
EC +3V_SMBUS
R=0
GSEN_I2DAT
GSEN_I2CLK G-Sensor
HP2DC
R=2.2K
EC_SMB_CK1
77 EC_SMB_DA1
78 R=100 BAT
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2016/12/15 2019/12/15 Title
Deciphered Date
Charger THI S S HE ET O F ENGIINEERIING D RAW I NG IS THE P RO P R I E TAR Y P R O P E RTY O F C O MP AL E L EC TR O NI C S , I NC . AND CO NTAI NS CONFIDENTSSIAizLe Document Number
Notes List
AND TR AD E S E C RE T I NF O RMATI O N. THI S S HE E T MAY NO T BE TR ANS F E R E D F R O M THE C US TO DY OF THE C O MP E TE NT DIVISION OF R & D Rev
DE P AR TME NT E X CE P T AS AUTHO R I Z E D BY C O MP AL EL E CTR O NI C S , I NC . NE I THE R THI S S HE E T NO R THE I NF O R MATI O N IT C O NTAI NS Custom
MAY BE US E D BY OR D I S CLO S ED TO ANY THI RD P AR TY W I THO UT P RI O R W R I TTE N C O NS E NT OF CO MP AL E L E CTR O NI C S , I NC . LA-G07CP(KBL-U_UMA_v60.L
3
)
Date: Friday, January 05,2018 Sheet 3 of 59
A B C D E
5 4 3 2 1
+19VB +19VB
+3VLP/+5VLP +3VLP/+5VLP
D D
EC_ON EC_ON
tPCH04_Min : 9 ms
+5VALW/+3VALW/+3VALW_DSW +5VALW/+3VALW/+3VALW_DSW
Pull-up to DSW well if not implemented.
PM_BATLOW# PM_BATLOW#
+3V_PRIM +3V_PRIM
+1.8V_PRIM +1.8V_PRIM
EXT _PW R_GAT E# If EXT_PW R_GATE# Toffmin is too small, Pwr EXT_PWR_GATE#
gate may choose to completely ignore it
+1.0V_MPHYPLL +1.0V_MPHYPLL
+1.0V_PRIM_CORE +1.0V_PRIM_CORE
tPCH34_Max : 20 ms
+1.0V_PRIM tPCH06_Min : 200 us +1.0V_PRIM
SUSACK# SUSACK#
tPCH02_Min : 10 ms
PCH_DPW ROK PCH_DPW ROK
tPCH03_Min : 10 ms
EC_RSMRST# EC_RSMRST#
tPLT02_Min : 0 ms Max : 90 ms
AC_PRESENT AC_PRESENT
C C
ON/OFF ON/OFF
PM_SLP_S5# PM_SLP_S5#
tPCH18_Min : 90 us
ESPI_RST# ESPI_RST#
PM_SLP_S4# PM_SLP_S4#
SYSON SYSON
+1.0V_VCCST/+1.0V_VCCSFR +1.0V_VCCST/+1.0V_VCCSFR
+1.35V_VDDQ/+1.35V_VCCSFR_OC +1.35V_VDDQ/+1.35V_VCCSFR_OC
PM_SLP_S3# PM_SLP_S3#
SUSP# SUSP#
tCPU04 Min : 100 ns
+1.0VS_VCCSTG +1.0VS_VCCSTG
tCPU10 Min : 1 ms
+1.0VS_VCCIO +1.0VS_VCCIO
+5VS/+3VS/+1.5VS/+1.05VS
B +5VS/+3VS/+1.5VS/+1.05VS B
VR_ON VR_ON
tCPU19 Max : 100 ns
SM_PG_CTRL SM_PG_CTRL
tCPU18 Max : 35 us
+0.675VS_VTT +0.675VS_VTT
tCPU09 Min : 1 ms
+VCC_SA +VCC_SA
+VCC_CORE +VCC_CORE
+VCC_GT +VCC_GT
SYS_PWROK SYS_PWROK
SUS_STAT# SUS_STAT#
A SOC_PLTRST# A
SOC_PLTRST#
5 4 3 2 1
A B C D E
UC1A SKL-U
Rev_0.53
SKL-U_BGA1356
+1.0V_VCCST
+1.0V_PRIM RC123 1 @ 2 100K_0402_5% ENVDD_CPU
1 2 H_THERMTRIP#
1
RC2 1K_0402_5% RC3 UC1D SKL-U RC124 1 2 100K_0402_5% ENBKL
1K_0402_5% Rev_0.53
2
<33> PROCHOT# 1 2
PROCHOT# JTAG
COMPENSATIONPU FOR eDP RC4 499_0402_1% H_THERMTRIP# C63
THERMTRIP#
A65 B61 CPU_XDP_TCK0
+1.0V_PRIM SKTOCC# PROC_TCK
D60 SOC_XDP_TDI
CPUMISC PROC_TDI
1
C55 A61 SOC_XDP_TDO
DS11 D55 BPM#[0] PROC_TDO
C60 SOC_XDP_TMS
BPM#[1] PROC_TMS SOC_XDP_TRST#
RC1 1 2 EDP_COMP CK0402101V05_0402-2 B54 B59
C56 BPM#[2] PROC_TRST#
24.9_0402_1% ESD@ BPM#[3]
CAD note: PCH_JTAG_TCK
B56 PCH_JTAG_TCK1
SCV00001K00 A6 D59 SOC_XDP_TDI
Trace width=20 mils,Spacing=25mil,Maxlength=100mils A7 GPP_E3/CPU_GP0 PCH_JTAG_TDI
A56 SOC_XDP_TDO
BA5 GPP_E7/CPU_GP1 PCH_JTAG_TDO
C59 SOC_XDP_TMS
2
XDP CONN
3 3
+1.0V_PRIM
+1.0V_PRIM
SKL-U(1/12)DDI,MSIC,XDP,EDP
THIS SHEET OF ENGINEERING DRAW ING IS T HE PROPRIET ARY PROPERT Y OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTSSIAizLe Document Number
AND T RADE SECRET INFORMAT ION. THIS SHEET MAY NOT BE T RANSFERED FROM T HE CUST ODY OF T HE COMPET ENT DIVISION OF R& D Rev
DEPART MENT EXCEPT AS AUT HORIZED BY COMPAL ELECT RONICS, INC. NEITHER THIS SHEET NOR T HE INFORMAT ION IT CONTAINS Custom
MAY BE USED BY OR DISCLOSED T O ANY T HIRD PART Y W IT HOUT PRIOR W RIT T EN CONSENT OF COMPAL ELECT RONICS, INC. EPK50_LA-G07CP v0.3
PDG#543016, ODT: CPU side no connect, DRAM side connect to VDDQ(Memory down); FET+R(SO-DIMM)
S K L -U
UC1B SKL- U UC1C
Rev_0.53 Rev_0.53
SKL-U_BGA1356 SKL-U_BGA1356
+1.2V_VDDQ
For VTT power control
+1.2V_VDDQ
1
+3VS
1
DDR_PG_CTRL 2 A
2
1
4
Y SM_PG_CTRL <49>
2
RC906 3 +1.2V_VDDQ
GND @ESD@
100K_0402_5% @
74AUP1G07SE-7_SOT353-5 DDR_PG_CT RL 1 2
@ SA00007WE00 CC70 100P_0402_50V8J
2
1
DDR_PG_CTRL 3 1 SM_PG_CTRL
RC32 From ESD Team Request
470_0402_5%
2
UC9 SB000008E10
MMBT3904WH NPN SOT323-3 DDR_DRAMRST# 1 Rshort@2 DDR_DRAMRST#_R RC33 DDR_DRAMRST#_R <17,18>
SB00000QJ00,S TRDRC5115E0LNPN 0_0402_5%
SOT323-3
A A
Security Classification
2017/04/10
Compal Secret Data
2019/12/15 Title
Compal Electronics,Inc.
Issued Date DecipheredDate
THIS S H E E T O F E N G IN E E R IN G D R A W IN G IS TH E P ROP RIE TA R Y P R O P E R TY O F C O M P A L E LE CTRONICS , INC. A N D CONTA INS CONFIDENTSIiiiAzeL Document Number
SKL-U(2/12)DDRIII
A N D TR A D E S E C R E T INFORM A TI ON. THIS S HE E T M A Y N O T BE TR A N S F E R E D F R O M TH E C U S TO D Y OF TH E C O M P E TE N T DIV IS ION OF R & D Rev
DE P A RTM E NT E X C E P T AS A UTHORIZE D BY C O M P A L E LE CTRONICS , INC. NE ITHE R THIS S H E E T N O R TH E IN F O R M A TIO N IT CONTA INS Custom
M A Y BE U S E D BY OR DIS CLOS E D TO A N Y THIRD P A R TY W ITH O U T P R IO R W R ITTE N C O N S E N T OF C O M P A L E LE CTRONICS , INC. EPK50_LA-G07CP v0.3
1
HOST_SPI_0_SIO3 AU4
SPI0_IO3 RC218
HOST_SPI_0_CS0# AU3 R9 SML0CLK
AU2 SPI0_CS0# GPP_C3/SML0CLK
W 2 SML0DATA 1K_0402_1%
SPI0_CS1# GPP_C4/SML0DATA
<35> HOST_SPI_0_CS2# HOST_SPI_0_CS2# AU1 W 1 SML0ALERT#
SPI0_CS2# GPP_C5/SML0ALERT#
D W3 SML1CLK D
SPI - TOUCH GPP_C6/SML1CLK SML1
V3 SML1DATA
2
M2 GPP_C7/SML1DATA AM7 GPP_B23 1 2 SML1ALERT# (Link to EC,DGPU, LAN, Thermal Sensor)
M3 GPP_D1/SPI1_CLK GPP_B23/SML1ALERT#/PCHHOT# +3V_PRIM
RC902 @
J4 GPP_D2/SPI1_MISO 0_0201_5%
V1 GPP_D3/SPI1_MOSI TP@ T234 SML1ALERT# RC903 2 @ 1 150K_0402_1%
V2 GPP_D21/SPI1_IO2
M1 GPP_D22/SPI1_IO3 LPC
GPP_D0/SPI1_CS# AY13 LPC_AD0 SML0ALERT# RC360 2 @ 1 10K_0402_5%
GPP_A1/LAD0/ESPI_IO0 LPC_AD0 <33> +3VS
BA13 LPC_AD1 LPC_AD1 <33>
CLINK GPP_A2/LAD1/ESPI_IO1 BB13 LPC_AD2
G3 GPP_A3/LAD2/ESPI_IO2 AY12 LPC_AD3 LPC_AD2 <33> SMBALERT# 8 1
G2 CL_CLK GPP_A4/LAD3/ESPI_IO3 LPC_FRAME# LPC_AD3 <33> 7 2
G1 CL_DATA GPP_A5/LFRAME#/ESPI_CS# BA12
BA11 SUS_STAT# LPC_FRAME# <33> EC_KBRST# 6 3
CL_RST# GPP_A14/SUS_STAT#/ESPI_RESET# TP@ T2402 5 4
<33> EC_KBRST# EC_KBRST# AW13 AW9 CLK_PCI0 RC387 1 2 22_0402_5% RPC19 10K_0804_8P4R_5%
CLK_PCI_LPC <33>
GPP_A0/RCIN# GPP_A9/CLKOUT_LPC0/ESPI_CLK
AY9 To EC
To TPM SERIRQ AY11 GPP_A10/CLKOUT_LPC1 PM_CLKRUN#
<33,35> SERIRQ AW11 PM_CLKRUN# <33>
GPP_A6/SERIRQ 5 OF20 GPP_A8/CLKRUN#
LPC Mode 1
CC182
SKL-U_BGA1356
22P 50V J NPO 0402
EMI@
2
+3VS +3VS
2
RPH11
2
C HOST_SPI_0_CS0#_R 1 8 EC_SPI_CS0# RC216 RC215 C
EC_SPI_CS0# <33>
HOST_SPI_0_CS0#_R 2 7 HOST_SPI_0_CS0# 10K_0402_5% 10K_0402_5% SML0CLK RC49 1 2 499_0402_1%
HOST_SPI_0_SO_R 3 6 EC_SPI_SO EC_SPI_SO <33>
2
HOST_SPI_0_SO_R 4 5 HOST_SPI_0_SO QC1A SML0DATA RC50 1 2 499_0402_1%
1
15_0804_8P4R_5% SMBCLK 6 1
PCH_SMBCLK <17,18>
RPC7
RPH12 L2N7002SDW1T1G 2N SC88-6 SML1CLK 1 8
HOST_SPI_0_HOLD# 1 8 HOST_SPI_0_SIO3 SB00001FF00 SML1DATA 2 7
5
HOST_SPI_0_SI_R 2 7 HOST_SPI_0_SI SMBCLK 3 6
HOST_SPI_0_SI_R 3 6 EC_SPI_SI QC1B SMBDATA 4 5
EC_SPI_SI <33>
4 5 SMBDATA 3 4
PCH_SMBDATA <17,18>
1K_0804_8P4R_5%
15_0804_8P4R_5% L2N7002SDW1T1G 2N SC88-6
SB00001FF00
HOST_SPI_0_WP# 2 1 HOST_SPI_0_SIO2 +3VS +3V_SPI
RC388 15_0402_5%
HOST_SPI_0_SIO2 RC3901 @ 2 1K_0402_1%
+3V_SPI
SPI ROM ( 8MByte Only) CC8 HOST_SPI_0_SIO3 RC3911 @ 2 1K_0402_1%
UC2 1 2 0.1U_0201_10V6K
HOST_SPI_0_CS0#_R 1 8 <DB> Un-pop QC2 for new 0x90 thermal sensor
CS# VCC
2
HOST_SPI_0_SO_R 2 7 HOST_SPI_0_HOLD#
3 DO(IO1) HOLD#(IO3) 6 @
HOST_SPI_0_WP# HOST_SPI_0_CLK_R
4 W P#(IO2) CLK 5 SML1CLK 6 1
HOST_SPI_0_SI_R EC_SMB_CK2 <10,33>
GND DI(IO0) QC2A 5 HOST_SPI_0_CS0#_R 1 @ 2
XM25QH64AHIG SOP 8P L2N7002SDW1T1G 2N SC88-6 RC357 1K_0402_5%
SA0000B8300 SPI ROM Part: SB00001FF00 @
ACES_91960-0084L_8P-T Main:SA0000B8300, S IC FL 64M
2nd: SA000039A40, S IC FL
XM25QH64AHIG SOP 8P(XMC)
64M W25Q64JVSSIQ SOIC 8P SPI ROM(Winbond) SML1DATA 3 4
EC_SMB_DA2 <10,33>
Use socket footprint 3th: SA00008SL00, S IC FL 64M MX25L6473FM2I-08G SOP 8P(MXIC) QC2B
4rd: SA00007LA10, S IC FL 64M GD25B64CSIGR SOP 8P SPI ROM(GigaDevice) L2N7002SDW1T1G 2N SC88-6
SB00001FF00
B B
RC81 RC82
10K_0402_5% 10K_0402_5%
2
SB00001FF00 +3VS_PGPPA
1
SMBCLK 1 6
TP_SMBCLK <34>
QC7A PM_CLKRUN# 1 2
CLK Source CPU to SPI ROM UC2&EC L2N7002SDW1T1G 2N SC88-6 8.2K_0402_5%
RC107
15_0402_5%
5
HOST_SPI_0_CLK 2 1 HOST_SPI_0_CLK_R
HOST_SPI_0_CLK_R <33,35>
RC368 EMI@ SERIRQ 1 2
SMBDATA 4 3 RC122 8.2K_0402_5%
TP_SMBDATA <34>
12
CC9 QC7B SB00001FF00
10P_0402_50V8J L2N7002SDW1T1G 2N SC88-6 Follow 543016_SKL_U_Y_PDG_0_9
@EMI@
THIS SHEET OF ENGINEERING DRAW ING IS T HE PROPRIET ARY PROPERT Y OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTSSIAizLe Document Number
SKL-U(3/12)SPI,ESPI,SMB,LPC
AND T RADE SECRET INFORMAT ION. THIS SHEET MAY NOT BE T RANSFERED FROM T HE CUST ODY OF T HE COMPET ENT DIVISION OF R& D Rev
DEPART MENT EXCEPT AS AUT HORIZED BY COMPAL ELECT RONICS, INC. NEITHER THIS SHEET NOR T HE INFORMAT ION IT CONTAINS Custom
MAY BE USED BY OR DISCLOSED T O ANY T HIRD PART Y W IT HOUT PRIOR W RIT T EN CONSENT OF COMPAL ELECT RONICS, INC.
EPK50_LA-G07CP v0.3
Eletro-XTechnical7
5 4 3 2 1
5 4 3 2 1
UC1G SKL-U
Rev_0.53 +3V_PRIM
D AUDIO UMA DIS D
1
HDA_BIT_CLK AY22 HDA_BLK/I2S0_SCLK
HDA_SDOUT BB22 HDA_SDO/I2S0_TXD SDIO/SDXC PX@ RC127
HDA_SDIN0 BA21 HDA_SDI0/I2S0_RXD 10K_0402_5% 2G VRAM 4G VRAM
<32> HDA_SDIN0
AY21 HDA_SDI1/I2S1_RXD GPP_G0/SD_CMD AB11
2
HDA_RST# AW22 HDA_RST#/I2S1_SCLK GPP_G1/SD_DATA0 AB13
VRAMCLK_SEL VRAM Clock 0 1
J5 GPP_D23/I2S_MCLK PROJECT_ID
GPP_G2/SD_DATA1 AB12 PLAT_SEL0
AY20 I2S1_SFRM GPP_G3/SD_DATA2 W12
1
AW20 I2S1_TXD PLAT_SEL1
GPP_G4/SD_DATA3 W11 RC128
SOC_GPIOF1 AK7 GPP_G5/SD_CD# W10 UMA@ 10K_0402_5% +3V_PRIM
T38TP@
SOC_GPIOF0 AK6 GPP_F1/I2S2_SFRM GPP_G6/SD_CLK W 8
T39TP@ AK9 GPP_F0/I2S2_SCLK GPP_G7/SD_WP W 7
AK10 GPP_F2/I2S2_TXD BA9
2
GPP_F3/I2S2_RXD GPP_A17/SD_PWR_EN#/ISH_GP7 BB9 RC900
2
GPP_A16/SD_1P8_SEL X76@ 10K_0402_5%
H5 GPP_D19/DMIC_CLK0 SD_RCOMP AB7 SD_RCOMP RC76 2 1 200_0402_1%
D7 GPP_D20/DMIC_DATA0
1
D8 GPP_D17/DMIC_CLK1 GPP_F23 AF13 SOC_GPIOF17 T235 TP@ VRAMCLK_SEL
C8 GPP_D18/DMIC_DATA1
2
HDA_SPKR RC901
<10,32> HDA_SPKR AW5 GPP_B14/SPKR X76 BOM control RAM size X76@ 10K_0402_5%
7 OF20
Net Name 4G 2G
C
SKL-U_BGA1356 VRAMCLK_SEL 1 0 C
1
HDA for AUDIO
RPC9 RC367 1 Rshort@20_0402_5%
1 8 <33> ME_FLASH_EN
2
4 5 HDA_SDOUT +3V_HDA
G
<32> HDA_SDOUT_R
@
33_0804_8P4R_5% 1 @ 2 RC3801 3 HDA_SDOUT
1K_0402_1% QC380
S
MESS138W-G_SOT323-3
EMI@
RC383 33_0402_5% HDA_SDOUT: +3V_PRIM
2
CC183 22P 50V J NPO0402
High : Enabled
EMI request UC1I SKL_ULT
KBLR@ RC919 SKYL@ RC916
Rev_0.53 10K_0402_5% 10K_0402_5%
CSI-2
1
PLAT_SEL0
A36 PLAT_SEL1
CSI2_DN0 CSI2_CLKN0 C37
B36 CSI2_DP0 CSI2_CLKP0 D37
2
B B
C38 CSI2_DN1 CSI2_CLKN1 C32
D38 CSI2_DP1 CSI2_CLKP1 D32
C36 KBLU@ RC918 KBLU@ RC917
CSI2_DN2 CSI2_CLKN2 C29 10K_0402_5%
D36 10K_0402_5%
CSI2_DP2 CSI2_CLKP2 D29 PLAT_SEL1
A38 CSI2_DN3 CSI2_CLKN3 B26
1
B38 CSI2_DP3 CSI2_CLKP3 A26
1 100_0402_1%
0 1 KBLR@
C31 CSI2_DN4 CSI2_COMP E13 CSI2_COMP RC80 2 SKYL@
D31 RC918 RC917
CSI2_DP4 GPP_D4/FLASHTRIG B7 PLAT_SEL0
0 KBL-U KBL-R
C33 CSI2_DN5
D33 10K_0402_5% 10K_0402_5%
CSI2_DP5 EMMC 1 SKL-U NA SD028100280 SD028100280
A31 CSI2_DN6
B31 CSI2_DP6 GPP_F13/EMMC_DATA0 AP2
A33 CSI2_DN7 GPP_F14/EMMC_DATA1 AP1
B33 CSI2_DP7 GPP_F15/EMMC_DATA2 AP3
A29 GPP_F16/EMMC_DATA3 AN3
B29 CSI2_DN8 GPP_F17/EMMC_DATA4 AN1
C28CSI2_DP8 GPP_F18/EMMC_DATA5 AN2
D28CSI2_DN9 GPP_F19/EMMC_DATA6 AM4
AM1
A27 CSI2_DP9 GPP_F20/EMMC_DATA7
B27 CSI2_DN10 AM2
C27 CSI2_DP10 GPP_F21/EMMC_RCLK AM3
D27 CSI2_DN11 GPP_F22/EMMC_CLK AP4
CSI2_DP11 GPP_F12/EMMC_CMD
1
9 OF20 EMMC_RCOMP AT1 EMMC_RCOMP 2
RC89 200_0402_1%
SKL-U_BGA1356
A A
THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENSSTiIzAeLDocument Number
SKL-U(4/12)HDA,EMMC,SDIO,CSI2
Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
EPK50_LA-G07CP
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom v0.3
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Friday, January 05, 2018 Sheet 8 of 59
5 4 3 2 1
5 4 3 2 1
+RTCVCC
CC10 1 2 1U_0402_6.3V6K
D42 CLKOUT_PCIE_N0
CC11 1 2 1U_0402_6.3V6K
C42 CLKOUT_PCIE_P0
CLKREQ_PEG#0 AR10 GPP_B5/SRCCLKREQ0#
CLRP2 1 2 SHORT PADS CLR CMOS
CLK_PCIE_N1 B42 CLKOUT_PCIE_N1
<29> CLK_PCIE_N1
LAN CLK_PCIE_P1 A42 CLKOUT_PCIE_P1
D
RC941 2 1M_0402_5% SM_INTRUDER#
<29> CLK_PCIE_P1
CLKREQ_PCIE#1 CLKOUT_ITPXDP_N F43 D
<29> CLKREQ_PCIE#1 AT7 GPP_B6/SRCCLKREQ1# CLKOUT_ITPXDP_P E43
CLK_PCIE_N2 D41 CLKOUT_PCIE_N2 BA17 SUSCLK
<30> CLK_PCIE_N2 GPD8/SUSCLK SUSCLK <30>
PCH_RTCRST# 2 1 CLK_PCIE_P2
0_0402_5% R1088
CLR_CMOS# <33> W LAN <30> CLK_PCIE_P2 CLKREQ_PCIE#2
C41 CLKOUT_PCIE_P2
PCH_KBLU24_IN
PCH_SRTCRST# 2
<30> CLKREQ_PCIE#2 AT8 GPP_B7/SRCCLKREQ2# XTAL24_IN E37
1 XTAL24_OUT E35 PCH_KBLU24_OUT
1
0_0402_5% R1089 Clear CMOS close to RAM door D40 CLKOUT_PCIE_N3
@ C40 CLKOUT_PCIE_P3 E42 XCLK_BIASREF RC96 1 2 2.7K_0402_1% +1.0V_CLK5_F24NS
JCMOS1 CLKREQ_PCIE#3 XCLK_BIASREF
AT10 GPP_B8/SRCCLKREQ3#
0_0603_5% AM18 PCH_RTCX1
CLK_PCIE_N4 RTCX1 AM20 PCH_RTCX2
B40
2
PCH
10K_0804_8P4R_5%
KBLU@ KBLU@
PLTRST RC99 1 2 0_0402_5% PCH_KBLU24_OUT RX2 2 1 33_0402_1% PCH_XT AL24U_OUT 1
RC92
2
1M_0402_5%
PCH_RTCX1 1 2
RC98 10M_0402_5%
Buffer
+3VALW_DSW +3VS @
1 2 PCH_PW ROK CC145 YC1 KBLU@ YC2
RC925 10K_0402_5% 1 2 24MHZ 18PF XRCGB24M000F2P51R0 32.768KHZ 9PF 10PPM 9H03200055
C 1 2 LAN_W AKE# 1 2 C
5
RC926 33
+3V_PRIM
10K_0402_5% @ UC8 0.1U_0201_10V6K 11
1 2 PCH_RSMRST # PLT_RST#_PCH 1 IN1 SJ10000Q800
DS12 NC NC
RC927 10K_0402_5% O 4 PLT _RST # KBLU@ KBLU@
PLT_RST# <29,30,31,33,35>
GP
1 2 SYS_RESET # 2 1 PCH_PW ROK 2 CC12 SJ10000UJ00 CC13
CC15
6.8P 50V C NPO 0402
8 J
27P_0402_50V
8 J
27P_0402_50V
CK0402101V05_0402-2 SN74AHC1G08DCKR_SC70-5
3
SE07168AC80
ESD@ 2 2
SCV00001K00
CK0402101V05_0402-2
DS14 @ESD@
SCV00001K00
1 2 SUSACK#
CK0402101V05_0402-2
DC3 SCS00000Z00
RB751V-40 SOD-323
PCH_RSMRST # 1 2 PCH_PW ROK
ESD@
C5229 1 2 SYS_PWROK
2 1 SPOK <48>
0.1U_0402_25V6 DC4 SCS00000Z00
RB751V-40 SOD-323
RC113
1K_0402_5% Security Classification
2017/04/10
Compal Secret Data
2019/12/15 Title
Compal Electronics,Inc.
Issued Date DecipheredDate
2
AN8 GPP_B15/GSPI0_CS#
AP7 P2 DGPU_PWR_EN RC382 1 2 10K_0402_5%
GPP_B16/GSPI0_CLK GPP_D9 TS_GPIO_CPU <27>
AP8 GPP_B17/GSPI0_MISO GPP_D10 P3
GSPI0_MOSI AR7 GPP_B18/GSPI0_MOSI GPP_D11 P4 +3V_PRIM
AM5 GPP_D12 P1
AN7 GPP_B19/GSPI1_CS# M4
D AP5 GPP_B20/GSPI1_CLK GPP_D5/ISH_I2C0_SDA N3 D
SOC_GPIOB21 RPC14
GSPI1_MOSI AN5 GPP_B21/GSPI1_MISO GPP_D6/ISH_I2C0_SCL 1 8
GPP_B22/GSPI1_MOSI N1 W L_OFF# 2 7
T P@T 129 UART_0_CRXD_DT XD AB1 GPP_D7/ISH_I2C1_SDA N2 SOC_GPIOB21 3 6
T P@T 128 UART_0_CTXD_DRXD AB2 GPP_C8/UART0_RXD GPP_D8/ISH_I2C1_SCL NMI_DBG#_CPU 4 5
W 4 GPP_C9/UART0_TXD AD11 <5,33> NMI_DBG#_CPU
W L_OFF# AB3 GPP_C10/UART0_RTS# GPP_F10/I2C5_SDA/ISH_I2C2_SDA AD12
10K_0804_8P4R_5%
<30> W L_OFF# GPP_C11/UART0_CTS# GPP_F11/I2C5_SCL/ISH_I2C2_SCL
TP@T133 UART_2_CRXD_DT XD AD1
UART_2_CTXD_DRXD GPP_C20/UART2_RXD
T P@T 132 AD2 U1
GPP_C21/UART2_TXD GPP_D13/ISH_UART0_RXD/SML0BDATA/I2C4B_SDA
AD3 GPP_C22/UART2_RTS# GPP_D14/ISH_UART0_TXD/SML0BCLK/I2C4B_SCL U2
AD4 GPP_C23/UART2_CTS# GPP_D15/ISH_UART0_RTS# U3
GPP_D16/ISH_UART0_CTS#/SML0BALERT# U4
C C
CPU THERMAL SENSOR
Functional Strap Definitions Strap Pin Address : 0x48
+3VS UC3
<7,33> EC_SMB_CK2 1 SMBCLK SMBDATA 5 EC_SMB_DA2 <7,33>
SPKR (Internal Pull Down): +3VS
2
RC117 1 @ 2 100K_0402_5% HDA_SPKR GND
HDA_SPKR <8,32>
TOP Swap Override 3
ALERT # +Vs
4
1
RC118 1 @ 2 4.7K_0402_5% GSPI0_MOSI CC127
0 = Disable TOP Swap mode.---> AAX05 Use G753T 11U_SOT 23-5 0.1U_0201_10V6K
SA00008CH00
1 = Enable TOP Swap Mode. 2
RC201 1 @ 2 150K_0402_1% GSPI1_MOSI
No Reboot
B B
GSPI1_MOSI (Internal Pull Down):
1 = LPC Mode
A A
Security Classification
2017/04/10
Compal Secret Data
2019/12/15 Title
Compal Electronics,Inc.
Issued Date DecipheredDate
SKL-U(6/12)GPIO
THIS S H E E T O F E N G IN E E R IN G DRA W ING IS TH E P R O P R IE TA R Y P R O P E R TY O F C O M P A L E LE CTRONICS , INC. A N D CONTA INS CONFIDENTSIiiAzeL Document Number
A N D TR A D E S E C R E T INFORM A TI ON. THIS S H E E T M A Y N O T BE TR A N S F E R E D F R O M TH E C U S TO D Y OF TH E C O M P E TE N T DIV IS ION OF R & D Rev
DE P A RTM E NT E X C E P T AS A U TH O R IZ E D BY C O M P A L E LE CTRONICS , INC. NE ITHE R THIS S H E E T N O R TH E IN F O R M A TIO N IT CONTA INS Custom
M A Y BE U S E D BY OR DIS CLOS E D TO A N Y THIRD P A R TY W ITH O U T P R IO R W R ITTE N C O N S E N T OF C O M P A L E LE CTRONICS , INC. EPK50_LA-G07CP v0.3
UC1H SKL-U
Rev_0.53
SSIC / USB3
PCIE/USB3/SATA
SATA_GP0 10K_0804_8P4R_5%
N/A
A
SATA_GP1 ODD_PLUG# A
SATA_GP2 PCIE/SATA
THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENSSTiiIzzAeLDocumentNumber
SKL-U(7/12)PCIE,USB,SATA
Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
EPK50_LA-G07CP
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom v0.3
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Friday, January 05, 2018 Sheet 11 of 59
5 4 3 2 1
5 4 3 2 1
+1.0V_PRIM TO +1.0V_VCCSTU
+1.2V_VDDQ +1.0V_PRIM
UC1N SKL-U
Rev_0.53
+5VALW +1.0V_PRIM +1.0V_PRIM +1.0V_VCCSTU CPU POWER 3 OF 4
I (Max) : 4.5 A
AU23 VDDQ_AU23 VCCIO AK28
R51881 @ 2 0_0603_5%
AU28 VDDQ_AU28 VCCIO AK30 I (Max) : 3.4 A
AU35 VDDQ_AU35 VCCIO AL30
1 1 AU42 VDDQ_AU42 VCCIO AL42
1U_0402_6.3V6K
1U_0402_6.3V6K
I (Max) : 0.04 A(+1.0V_VCCSTU) 1 BB23 VDDQ_BB23 VCCIO AM28
CC98
CC97
1@ CC96
RON(Max) : 25 mohm BB32 VDDQ_BB32 VCCIO AM30
0.1U_0402_25V6
D D
@ 0.1U_0201_10V6K BB41 VDDQ_BB41
V drop : 0.001 V VCCIO AM42
CC151
2 2
BB47 VDDQ_BB47
2
BB51 VDDQ_BB51 VCCSA AK23 +VCC_SA
2
UC5 VCCSA AK25
1 14 AM40 VCCSA G23
RC142 1 2 0_0402_5% 2 VIN1 VOUT1 13 +1.2V_VDDQ VDDQC VCCSA G25
<33,40,49> SYSON VIN1 VOUT1 A18 VCCSA G27
RC144 1 @ 2 0_0402_5% EN_1.0V_VCCSTU 3 12 1.0V_VCCSTU_CT1 1 2
+1.0V_VCCST VCCST VCCSA G28
<9,33,40,49> PM_SLP_S4# ON1 CT1 CC95 VCCSA J22 I (Max) : 5 A
A22
RC168 1 2 0_0402_5% 11 10P_0402_50V8J
+1.0V_PRIM VCCSTG_A22 VCCSA J23
4
<33,40,49> SUSP# VBIAS GND VCCSA J27
AL23
EN_1.8VS 1 2
+1.2V_VCCSFR_OC VCCPLL_OC VCCSA K23
RC194 1 @ 2 0_0402_5% 5 ON2 CT2 10 VCCSA K25
1.8VS_CT2
1U_0402_6.3V6K
VSSSA_SENSE VSSSA_SENSE <52>
CC100 H20 VCCSA_SENSE
0.1U_0201_10V6K 543977_SKL_PDDG_Rev0_91,
CC99 VCCSA_SENSE <52>
I (Max) : 0.536 A(+1.8VS) 14 OF20VCCSA_SENSE
@
RON(Max) : 25 mohm change CC95 value from
2
V drop : 0.013 V
2 1000pf to 10pf for meet SKL-U_BGA1356
<= 65us timing for
+1.0V_VCCSTU power rail.
C C
+1.0V_VCCSTU +1.0V_VCCST
RC140 1 2 0_0402_5%
PSC Side
+1.0V_PRIM TO +1.0VS_VCCSTG / +1.0VS_VCCIO
1
1U_0402_6.3V6K
CC48
+5VALW +1.0V_PRIM I (Max) : 3 A(+1.0VS_VCCIO) +1.0V_PRIM
RON(Max) : 6.2 mohm near pin A22 2
V drop : 0.019 V @
Imax : 2.77 A CC89 1 2 0.1U_0201_10V6K
1 1
0.1U_0201_10V6K
1U_0402_6.3V6K
@
CC88
CC117
1U_0402_6.3V6K
ON GND
1
1U_0402_6.3V6K
B RC187 1 2 0_0402_5% B
CC56
<33> EC_S0IX_EN @ TPS22961DNYR_WSON8
CC55
Part Number = SA00007XR00 2
2
For Verify S0IX <Cocoa_1027>
connect to EC, check /w EC
RC208 Follow 544669_SKL_U DDR3L_RVP7_Schematic_Rev0_53
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
10U_0603_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
CC47 Follow 543016_SKL_U_Y_PDG_0_9
CC27
CC28
CC29
CC30
CC31
CC32
CC33
CC34
CC35
CC36
CC47
CC37
CC38
CC39
CC40
CC41
CC42
CC43
CC44
CC45
CC46
2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2
+1.35V_VDDQ_CPU : 10UF/6.3V/0603 *6
A 1UF/6.3V/0402 * 4 A
THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENSTiIzAeL Document Number
SKL-U(8/12)Power
Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
EPK50_LA-G07CP
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom v0.3
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Friday, January05,2018 Sheet 12 of 59
5 4 3 2 1
5 4 3 2 1
+1.0V_PRIM
+1.0V_PRIM
+1.0V_PRIM +1.0V_APLL +3V_PRIM +3V_HDA
K
1U_0201_6.3V6
1
UC1O SKL- U
0.69A Rev_0.53
1209_follow G group GPIO
M
22U_0603_6.3V6
M
22U_0603_6.3V6
K
1U_0402_6.3V6
CC91
CPUPOWER4 OF 4
RC148 1 Rshort@2 0_0603_5% RC150 1 Rshort@2 0_0402_5% 1 1 1 powe rail to +3V_PRIM
@ @ 2 AB19
M
22U_0603_6.3V6
M
22U_0603_6.3V6
CC147
CC148
CC61
AB20 VCCPRIM_1P0
1 1 AK15 +3V_PGPPA
VCCPRIM_1P0 VCCPGPPA
near pin K15,L15 P18 AG15
K
1U_0402_6.3V6
@ @
CC142
CC134
1 1 2 2 2 VCCPRIM_1P0 VCCPGPPB +3V_PGPPB
CC63 Y16 +3V_PGPPC
AF18 VCCPGPPC Y15
1U_0201_6.3V6K
CC72
+1.0V_PRIM VCCPRIM_CORE +3V_1.8V_PGPPD
2 2 2.574A AF19
VCCPRIM_CORE
VCCPGPPD T16 +3V_PGPPE
2 2 +1.0VO_DSW V20 VCCPGPPE AF16
VCCPRIM_CORE +1.8V_PRIM
V21 VCCPGPPF AD15
VCCPRIM_CORE +3V_PRIM For SD CARD
VCCPGPPG
D D
+1.0V_PRIM AL1 V19 +3V_PRIM
DCPDSW_1P0 VCCPRIM_3P3_V19
Follow 543016_SKL_U_Y_PDG_1_0 K17 T1
K
1U_0201_6.3V6
1 +1.0V_MPHYAON VCCMPHYAON_1P0 VCCPRIM_1P0_T 1 +1.0V_DTS
L1
CC85
+1.0V_CLK5_F24NS +3V_PGPPA VCCMPHYAON_1P0 AA1
K
1U_0402_6.3V6
VCCAT S_1P8 +1.8V_PRIM
+3V_PRIM +1.0V_PRIM N15
VCCMPHYGT _1P0_N15
2 1.87A N16 AK17
CC68
1 VCCMPHYGT _1P0_N16 VCCRT CPRIM_3P3 +3V_PRIM_RT C
RC152 1 Rshort@2 0_0603_5% N17
VCCMPHYGT _1P0_N17
near pin N18 P15
VCCMPHYGT _1P0_P15 VCCRT C_AK19
AK19
+RTCVCC
P16 BB14
2 VCCMPHYGT _1P0_P16 VCCRT C_BB14
M
10U_0402_6.3V6
M
10U_0402_6.3V6
1 1
@ @ K15 BB10 +DCPRTC 1 2
+1.0V_PRIM VCCAMPHYPLL_1P0 DCPRTC
RC197 1 Rshort@2 0_0402_5% L15 CC71 0.1U_0201_10V6K
CC135
CC130
VCCAMPHYPLL_1P0 A14
2 2 VCCCLK1 +1.0V_CLK6_24TBT
+3V_SPI +1.0V_APLL V15
VCCAPLL_1P0 K19
K AB17 VCCCLK2
1U_0402_6.3V6
1 +1.0V_PRIM VCCPRIM_1P0_AB17
@ Y18 L21 +1.0V_APLL
RC154 1 Rshort@20_0402_5% VCCPRIM_1P0_Y18 VCCCLK3
CC67
+1.0V_PRIM +3VALW_DSW AD17 VCCCLK4 N20 +1.0V_CLK4_F100OC
2 VCCDSW_3P3_AD17
AD18
VCCDSW_3P3_AD18
AJ17 VCCCLK5 L19 +1.0V_CLK5_F24NS
VCCDSW_3P3_AJ17
+1.0V_CLK4_F100OC +3V_PGPPB
AJ19 A10
+3V_HDA VCCHDA VCCCLK6 +1.0V_CLK6_24TBT
K
1U_0201_6.3V6
1
RC190 1 Rshort@2 0_0603_5% near pin AF20, +3V_SPI AJ16
VCCSPI GPP_B0/CORE_VID0
AN11 PRIMCORE_VID0 T 130 T P@
RC161 1 Rshort@2 0_0402_5% AF21,T19, T20 AN13 PRIMCORE_VID1
CC141
GPP_B1/CORE_VID1 T 131 T P@
AF20
M
22U_0603_6.3V6
M
22U_0603_6.3V6
+1.0V_PRIM
2 0.64A AF21 VCCSRAM_1P0
K
1U_0402_6.3V6
1 1 1 VCCSRAM_1P0
@ @ T 19
CC136
CC137
T 20 VCCSRAM_1P0
CC102
VCCSRAM_1P0
2 2 2 AJ21
+3V_PRIM VCCPRIM_3P3_AJ21
+1.0V_PRIM +1.0V_PRIM AK20 VCCPRIM_1P0_AK20
C C
N18 VCCAPLLEBB
+1.0V_PRIM
+3V_PGPPC 15 OF 20
+1.0V_PRIM
SKL-U_BGA1356
Imax : 2.57A RC163 1 Rshort@2 0_0402_5% near pin N15, N16,
N17,P15,P16
K
1U_0402_6.3V6
M
22U_0603_6.3V6
M
22U_0603_6.3V6
K 1 1 1
1U_0402_6.3V6
1 @
RTC Battery
K
1U_0402_6.3V6
CC80
CC81
CC82
1
near pin AF18,
CC73
2 2 2
AF19,V20,V21
CC76
2 MAX. 8000mil
2
Per 543016_SKL_U_Y_PDG_0_9
1
@ BAT54C(VF) 240 mV 1
3
CC103
1 +3VL
CC7
K
1U_0402_6.3V6
2
2 Result : Pass
+3V_PGPPE
B B
1
RC169 1 Rshort@2 0_0603_5%
BOM +3VALW TO +3V_PRIM
CC74
2
K
1U_0402_6.3V6
K
1U_0402_6.3V6
M
22U_0603_6.3V6
M
10U_0402_6.3V6
@
1
@
1
@
1
@
1 I (Max) : 0.46 A(+3V_PRIM)
I (Max) : 0.1 A RDS(Typ) : 65 mohm
CC86
CC75
CC138
CC139
2 2 2 2 V drop : 0.03 V
+3V_PRIM_RT C
1 1
K CC78
CC77
+1.2V_VCCSFR_OC +3V_PRIM
+1.2V_VDDQ +3VALW
0.1U_0201_10V6
0.1U_0201_10V6
Follow 543016_SKL_U_Y_PDG_0_9 1 1
@
1 1
K
1U_0402_6.3V6
CC150
K CC49
K CC51
K CC50
1U_0402_6.3V6
+1.0V_PRIM +3V_PRIM +1.8V_PRIM
2 2 2 2
A
+3VS +3VS_PGPPA 1 2 2 1 A
RC141 0_0402_5% RC393 0_0805_5%
M
22U_0603_6.3V6
M
22U_0603_6.3V6
M
22U_0603_6.3V6
M
22U_0603_6.3V6
M
22U_0402_6.3V6
M
22U_0402_6.3V6
1 1 1 1 1 1
@ @ @ @ @ @
CC111
CC112
CC113
CC114
CC116
CC115
2 2 2 2 2 2
+3VALW +3VALW_DSW
+VCC_GT_VR +VCC_GT
J U42A
+VCC_CORE +VCC_CORE 1 2 +VCC_GT
+VCC_CORE 12
J UMP@ UC1M SKL-U
UC1L SKL-U JUMP_43X39_0805 Rev_0.53
Rev_0.53 CPUPOW ER 2 OF 4
CPUPOW ER 1 OF 4
J U22 N70
1 2 VCCGT N71
A30 G32 A48
A34 VCC_A30 VCC_G32 G33 +VCC_GT 1 2 A 53 VCCGT VCCGT
J UMP@ R63
A39 VCC_A34 VCC_G33 G35 A 58 VCCGT VCCGT R64
A 44 VCC_A39 VCC_G35 G37 JUMP_43X39_0805 A 62 VCCGT VCCGT R65
AK 33 VCC_A 44 VCC_G37 G38 A 66 VCCGT VCCGT R66
AK35 VCC_AK33 VCC_G38 G40 AA 63 VCCGT VCCGT R67
AK37 VCC_AK35
AK38 VCC_AK37
VCC_G40
VCC_G42 J 30
G42
JU42A/JU42B for KBLR AA 64 VCCGT
AA 66 VCCGT
VCCGT
VCCGT
R68
R69
D
AK 40 VCC_AK38 VCC_J30 J33 JU221 for KBLU AA 67 VCCGT VCCGT R70
D
13 OF 20
Trace Length < 25 mils
1
SKL-U_BGA 1356
RC179
56_0402_5%
2
+1.0V_VCCST
RC181
100_0402_1%
2
B B
A A
TAIL SKL-U(10/12)Power,SVID
THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDEN AND Si zee
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R& D Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Custom
EPK50_LA-G07CP v0.3
5 4 3 2 1
5 4 3 2 1
D D
UC1P SKL-U UC1Q SKL-U
Rev_0.53 Rev_0.53 UC1R SKL-U
GND 1 OF3 GND 2 OF3
Rev_0.53
GND 3 OF3
A5 VSS VSS AL65 AT63 VSS VSS BA49 F8 VSS VSS L18
A67 VSS VSS AL66 AT68 VSS VSS BA53 G10 VSS
VSS L2
A70 VSS VSS AM13 AT71 VSS VSS BA57 G22 VSS VSS L20
AA2 VSS VSS AM21 AU10 VSS VSS BA6 G43 VSS
VSS L4
AA4 VSS VSS AM25 AU15 VSS VSS BA62 G45 VSS
VSS L8
AA65 VSS VSS AM27 AU20 VSS VSS BA66 G48 VSS VSS N10
AA68 VSS VSS AM43 AU32 VSS VSS BA71 G5 VSS VSS N13
AB15 VSS VSS AM45 AU38 VSS VSS BB18 G52 VSS VSS N19
AB16 VSS VSS AM46 AV1 VSS VSS BB26 G55 VSS VSS N21
AB18 VSS VSS AM55 AV68 VSS VSS BB30 G58 VSS
VSS N6
AB21 VSS VSS AM60 AV69 VSS VSS BB34 G6 VSS VSS N65
AB8 VSS VSS AM61 AV70 VSS VSS BB38 G60 VSS VSS N68
AD13 VSS VSS AM68 AV71 VSS VSS BB43 G63 VSS VSS P17
AD16 VSS VSS AM71 AW10 VSS VSS BB55 G66 VSS VSS P19
AD19 VSS VSS AM8 AW12 VSS VSS BB6 H15 VSS VSS P20
AD20 VSS VSS AN20 AW14 VSS VSS BB60 H18 VSS VSS P21
AD21 VSS VSS AN23 AW16 VSS VSS BB64 H71 VSS VSS R13
AD62 VSS VSS AN28 AW18 VSS VSS BB67 J11 VSS
VSS R6
AD8 VSS VSS AN30 AW21 VSS VSS BB70 J13 VSS VSS T15
AE64 VSS VSS AN32 AW23 VSS
VSS C1
J25 VSS VSS T17
AE65 VSS VSS AN33 AW26 VSS VSS C25 J28 VSS VSS T18
AE66 VSS VSS AN35 AW28 VSS
VSS C5
J32 VSS
VSS T2
AE67 VSS VSS AN37 AW30 VSS VSS D10 J35 VSS VSS T21
AE68 VSS VSS AN38 AW32 VSS VSS D11 J38 VSS
VSS T4
C AE69 VSS VSS AN40 AW34 VSS VSS D14 J42 VSS VSS U10 C
AF1 VSS VSS AN42 AW36 VSS VSS D18 J8 VSS VSS U63
AF10 VSS VSS AN58 AW38 VSS VSS D22 K16 VSS VSS U64
AF15 VSS VSS AN63 AW41 VSS VSS D25 K18 VSS VSS U66
AF17 VSS VSS AP10 AW43 VSS VSS D26 K22 VSS VSS U67
AF2 VSS VSS AP18 AW45 VSS VSS D30 K61 VSS VSS U69
AF4 VSS VSS AP20 AW47 VSS VSS D34 K63 VSS VSS U70
AF63 VSS VSS AP23 AW49 VSS VSS D39 K64 VSS VSS V16
AG16 VSS VSS AP28 AW51 VSS VSS D44 K65 VSS VSS V17
AG17 VSS VSS AP32 AW53 VSS VSS D45 K66 VSS VSS V18
AG18 VSS VSS AP35 AW55 VSS VSS D47 K67 VSS VSS W13
AG19 VSS VSS AP38 AW57 VSS VSS D48 K68 VSS
VSS W 6
AG20 VSS VSS AP42 AW6 VSS VSS D53 K70 VSS
VSS W 9
AG21 VSS VSS AP58 AW60 VSS VSS D58 K71 VSS VSS Y17
AG71 VSS VSS AP63 AW62 VSS
VSS D6
L11 VSS VSS Y19
AH13 VSS VSS AP68 AW64 VSS VSS D62 L16 VSS VSS Y20
AH6 VSS VSS AP70 AW66 VSS VSS D66 L17 VSS VSS Y21
AH63 VSS VSS AR11 AW8 VSS VSS D69
AH64 VSS VSS AR15 AY66 VSS VSS E11
AH67 VSS VSS AR16 B10 VSS VSS E15 18 OF20
AJ15 VSS VSS AR20 B14 VSS VSS E18
AJ18 VSS VSS AR23 B18 VSS VSS E21 SKL-U_BGA1356
AJ20 VSS VSS AR28 B22 VSS VSS E46
AJ4 VSS VSS AR35 B30 VSS VSS E50
AK11 VSS VSS AR42 B34 VSS VSS E53
AK16 VSS VSS AR43 B39 VSS VSS E56
AK18 VSS VSS AR45 B44 VSS
VSS E6
AK21 VSS VSS AR46 B48 VSS VSS E65
B
AK22 VSS VSS AR48 B53 VSS VSS E71 B
AK27 VSS VSS AR5 B58 VSS
VSS F1
AK63 VSS VSS AR50 B62 VSS VSS F13
AK68 VSS VSS AR52 B66 VSS
VSS F2
AK69 VSS VSS AR53 B71 VSS VSS F22
AK8 VSS VSS AR55 BA1 VSS VSS F23
AL2 VSS VSS AR58 BA10 VSS VSS F27
AL28 VSS VSS AR63 BA14 VSS VSS F28
AL32 VSS VSS AR8 BA18 VSS VSS F32
AL35 VSS VSS AT2 BA2 VSS VSS F33
AL38 VSS VSS AT20 BA23 VSS VSS F35
AL4 VSS VSS AT23 BA28 VSS VSS F37
AL45 VSS VSS AT28 BA32 VSS VSS F38
AL48 VSS VSS AT35 BA36 VSS
VSS F4
AL52 VSS VSS AT4 F68 VSS VSS F40
AL55 VSS VSS AT42 BA45 VSS VSS F42
AL58 VSS VSS AT56 VSS BA41
AL64 VSS VSS AT58
16 OF20 17 OF20
SKL-U_BGA1356 SKL-U_BGA1356
A A
THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENSSTiIzAeLDocument Number
SKL-U(11/12)GND
Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
EPK50_LA-G07CP
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom v0.3
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Friday, January 05, 2018 Sheet 15 of 59
5 4 3 2 1
5 4 3 2 1
D D
UC1S SKL-U
Rev_0.53
RESERVED SIGNALS-1
27P_0402_50V8J
27P_0402_50V8J
G65 VSS_F65 RSVD_TP_AW71 AW70 PM_ZVM# CC168 CC169
VSS_G65 RSVD_TP_AW70 PM_MSM# 42
SI1/15 F61 RSVD_F61 MSM# AP56 PM_MSM# T230 TP@ +1.0V_VCCST
E61 RSVD_E61 PROC_SELECT# C64 SKL_CNL#
19 OF20 1@ 2
RC184 100K_0402_5%
SKL-U_BGA1356
Follow 544669_SKL_U_DDR3L_RVP7_schematic_rev1.0 24MHzParrrttt::::::
Maiiiiiin::::::SJ10000X700,,,,,,SCRYSTAL 24MHZ 18PF+-20PPM
8Y24000033(((TXC)))
2nd::::::SJ10000TK00,,,,,,S CRYSTAL24MHZ18PF+-20PPM
7M24000027(((TXC)))
CFG_RCOMP 1 2
RC185 49.9_0402_1%
CFG4 1 2
RC193 1K_0402_1%
A A
Interleaved Memory
<6> DDR_M0_CLK0 CK0(T)
DDR_M0_CLK#0 139 DDR_M0_D4
<6> DDR_M0_CLK#0
DDR_M0_CLK1 CK0#(C) DQ1 7
<6> DDR_M0_CLK1 138 CK1(T) DQ2 20 DDR_M0_D3
<6> DDR_M0_CLK#1 DDR_M0_CLK#1 140 CK1#(C) DQ3 21 DDR_M0_D7
DDR_M0_D1
DQ7 17 DDR_M0_D6
DDR_M0_CS#0 149 S0# DQS0(T) 13 DDR_M0_DQS0
<6> DDR_M0_D[16..31] <6> DDR_M0_CS#0 DDR_M0_DQS0 <6>
DDR_M0_CS#1 157 S1# DQS0#(C) 11 DDR_M0_DQS#0
D +3VS +3VS +3VS <6> DDR_M0_CS#1 DDR_M0_DQS#0 <6> D
<6> DDR_M0_D[32..47] 162 S2#/C0
165 28 DDR_M0_D8
S3#/C1 DQ8 29 DDR_M0_D12
<6> DDR_M0_D[48..63] DDR_M0_ODT0 155 DQ9 41 DDR_M0_D14
1
1
<6> DDR_M0_ODT0 161 ODT0 DQ10 42 DDR_M0_D10 DQ11 24
RD1 RD4 RD2 <6> DDR_M0_ODT1 DDR_M0_ODT1
JDIMM1B ODT 1 DDR_M0_D9
@ 0_0402_5% @ 0_0402_5% @ 0_0402_5% DQ12
STD DDR_M0_BG0 115 25 DDR_M0_D13
<6> DDR_M0_BG0 113 BG0 DQ13 38 DDR_M0_D11
111 141 DDR_M0_BG1
+1.2V_VDDQ VDD1 VDD11 +1.2V_VDDQ <6> DDR_M0_BG1
150 BG1 DQ14 37 DDR_M0_D15 DQ15 34
2
2
SA0_CHA_DIM1 SA1_CHA_DIM1 SA2_CHA_DIM1 112 142 <6> DDR_M0_BA0 DDR_M0_BA0
117 VDD2 VDD12 147 DDR_M0_BA1 145 BA0 DDR_M0_DQS1
VDD3 VDD13 <6> DDR_M0_BA1 BA1 DQS1(T) 32 DDR_M0_DQS#1 DDR_M0_DQS1 <6>
118 148
VDD4 VDD14 DQS1#(C) DDR_M0_DQS#1 <6>
1
1
123 153 DDR_M0_MA0 144
<6> DDR_M0_MA0
RD3 RD5 RD6 124 VDD5 VDD15 154 DDR_M0_MA1 133 A0 50 DDR_M0_D21
<6> DDR_M0_MA1 DQ16 49 DDR_M0_D17
0_0402_5% 0_0402_5% 0_0402_5% 129 VDD6 VDD16 159 <6> DDR_M0_MA2 DDR_M0_MA2 132 A1
130 VDD7 VDD17 160 <6> DDR_M0_MA3 DDR_M0_MA3 131 A2 DQ17 62 DDR_M0_D23
135 VDD8 VDD18 163 DDR_M0_MA4 128 A3 DQ18 63 DDR_M0_D18
<6> DDR_M0_MA4
+3V_PRIM_DA 136 VDD9 VDD19
<6> DDR_M0_MA5 DDR_M0_MA5 126 A4 DQ19 46 DDR_M0_D16
VDD10 DDR_M0_MA6 127 A5 DQ20 45 DDR_M0_D20
<6> DDR_M0_MA6
2
2
258 DDR_M0_MA7 122 A6 DQ21 58 DDR_M0_D19
255 VT T +0.6V_0.6VS <6> DDR_M0_MA7
VDDSPD DDR_M0_MA8 125 A7 DQ22 59 DDR_M0_D22
<6> DDR_M0_MA8
PLACE ALL THE BELOW RESISTORS CLOSE TO SODIMM 164 257 DDR_M0_MA9 121 A8 DQ23 55 DDR_M0_DQS2
K
0.1U_0201_10V6
+0.6V_DDR_VREFCA +2.5V <6> DDR_M0_MA9 A9 DQS2(T) 53 DDR_M0_DQS#2 DDR_M0_DQS2 <6>
2.2U_0402_6.3V6M
VREFCA VPP1 259 DDR_M0_MA10
<6> DDR_M0_MA10 146
CD1
2 2 VPP2 DQS2#(C) DDR_M0_DQS#2 <6>
<6> DDR_M0_MA11 DDR_M0_MA11 120 A10_AP
1 99 <6> DDR_M0_MA12 DDR_M0_MA12 119 A11 70 DDR_M0_D25
CD2
2 VSS VSS 102 <6> DDR_M0_MA13 DDR_M0_MA13 158 A12 DQ24 71 DDR_M0_D28
VSS
VSS DDR_M0_MA14_WE# 151 A13 DQ25 83 DDR_M0_D30
SPD ADDRESS FOR CHANNEL A :
1 1 5 103
VSS 9/8 Modify <6> DDR_M0_MA14_WE#
6 VSS 106
<6> DDR_M0_MA15_CAS# DDR_M0_MA15_CAS# 156 A14_W E# DQ26 84 DDR_M0_D31
VSS
VSS DDR_M0_MA16_RAS# 152 A15_CAS# DQ27 66 DDR_M0_D24
WRITE ADDRESS: 0XA0 9 107
VSS VSS <6> DDR_M0_MA16_RAS# A16_RAS# DQ28 67 DDR_M0_D29
10 167
PLACE NEAR TO PIN VSS VSS DQ29 79 DDR_M0_D27
READ ADDRESS: 0XA1 14
15 VSS
VSS
VSS
VSS
168
171 <6> DDR_M0_ACT#
DDR_M0_ACT# 114
ACT # DQ30 80 DDR_M0_D26
DQ31 76 DDR_M0_DQS3
SA0 = 0; SA1 = 0; SA2 = 0. 18
19 VSS
VSS
VSS
VSS
172
175
176
<6> DDR_M0_PAR
<6> DDR_M0_ALERT#
DDR_M0_PAR
DDR_M0_ALERT# 116
143
PARIT Y
ALERT #
DQS3(T) 74 DDR_M0_DQS#3
DQS3#(C)
DDR_M0_DQS3 <6>
DDR_M0_DQS#3 <6>
RD7 2 1 DIMM1_CHA_EVENT# 134 EVENT#
DDR4 POR OPERATING SPEED: 1867 MT/S
22 VSS VSS +1.2V_VDDQ
C
23 VSS VSS 180 240_0402_<16,18> DDR_DRAMRST#_R DDR_DRAMRST#_R 108 RESET# DQ32 174 DDR_M0_D32 C
26 VSS 181 DQ33 173 DDR_M0_D37
STRETCH GOAL IS 2133 MT/S 27
30
VSS
VSS VSS
VSS
184
185
<7,18> PCH_SMBDATA
PCH_SMBDAT A 254 SDA
DQ34 187 DDR_M0_D34
DQ35 186 DDR_M0_D39
VSS 188 253 SCL
31 VSS VSS <7,18> PCH_SMBCLK PCH_SMBCLK DQ36 170 DDR_M0_D36
35 VSS VSS 189 DQ37 169 DDR_M0_D33
Layout Note: Layout Note: 36 VSS VSS 192 SA2_CHA_DIM1 166
SA2 DQ38 183 DDR_M0_D35
SA1_CHA_DIM1 260
Place near JDIMM1.257,259 Place near JDIMM1.258 39 VSS VSS 193
SA1 DQ39 182 DDR_M0_D38
SA0_CHA_DIM1 256
40 VSS VSS 196 SA0 DQS4(T) 179 DDR_M0_DQS4 DDR_M0_DQS4 <6>
43 VSS VSS 197 DQS4#(C) 177 DDR_M0_DQS#4 DDR_M0_DQS#4 <6>
44 VSS 201
VSS 202 195 DDR_M0_D44
47 VSS 92 DQ40
VSS 205 91 CB0_NC 194 DDR_M0_D45
48 VSS VSS DQ41
+2.5V 10uF*2 +0.6V_0.6VS 10uF*2 51 206 101 CB1_NC 207 DDR_M0_D42
VSS VSS DQ42
209 105 CB2_NC 208 DDR_M0_D43
1uF*2 1uF*1 52 VSS
56
VSS
VSS VSS 210
213
For ECC DIMM 88
87
CB3_NC
CB4_NC
DQ43
DQ44
191 DDR_M0_D41
190 DDR_M0_D40
@ESD@ 57 VSS DQ45
VSS 214 100 CB5_NC 203 DDR_M0_D46
60
M
10U_0603_6.3V6
M
10U_0603_6.3V6
M
10U_0603_6.3V6
K
0.1U_0201_10V6
1 1 1 1 1 1 1 1 VSS
K
1U_0402_6.3V6
K
1U_0402_6.3V6
K
1U_0402_6.3V6
CD4
CD7
CD8
VSS
CD5
CD6
CD9
21
B
DQ57 236 DDR_M0_D57 B
1 2 262 GND GND 261 DQ58 249 DDR_M0_D59
RD32 0_0402_5% DQ59 250 DDR_M0_D62
DQ60 232 DDR_M0_D56
+0.6V_DDR_VREFCA 2.2uF*1 FOX_AS0A827-H2RB-7H DQ61 233 DDR_M0_D61
0.1uF*1 DQ62 245 DDR_M0_D58
CONN@ DQ63 246 DDR_M0_D63
2 2 DQS7(T) 242 DDR_M0_DQS7 DDR_M0_DQS7 <6>
DQS7#(C) 240 DDR_M0_DQS#7 DDR_M0_DQS#7 <6>
CD11 CD12
1 0.1U_0201_10V6K 1 2.2U_0402_6.3V6M Part Number:LTCX0069GA0
Part Value:S SOCKET FOX AS0A827-H2RB-7H 260P DDR4 FOX_AS0A827-H2RB-7H
+1.2V_VDDQ CONN@
2
Layout Note: RD8 +0.6V_DDR_VREFCA +0.6V_VREFCA
Place near JDIMM1 @2 1K_0402_1%
CD13
1
1 0.1U_0402_10V6K
1 RD9 2
VREF traces should be at least 20 mils
10uF*6 2_0402_1% wide with 20 mils spacing to other
+1.2V_VDDQ 1uF*8 +1.2V_VDDQ 1 signals
330uF*1 2
2
CD15
+1.2V_VDDQ RD10 CD14 0.022U_0402_25V7K
1K_0402_1% 2
0.1U_0402_10V6K
1
M
10U_0603_6.3V6
M
10U_0603_6.3V6
M
10U_0603_6.3V6
M
10U_0603_6.3V6
M
10U_0603_6.3V6
M
10U_0603_6.3V6
M
10U_0603_6.3V6
M
10U_0603_6.3V6
M
10U_0603_6.3V6
M
10U_0603_6.3V6
2
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
K
1U_0402_6.3V6
K
1U_0402_6.3V6
K
1U_0402_6.3V6
K
1U_0402_6.3V6
K
1U_0402_6.3V6
K
1U_0402_6.3V6
K
1U_0402_6.3V6
K
1U_0402_6.3V6
K
1U_0402_6.3V6
K
1U_0402_6.3V6
RD11
CD93
CD16
CD17
CD18
CD19
CD20
CD21
CD22
CD23
CD95
A 1 A
24.9_0402_1%
CD96
CD24
CD25
CD26
CD27
CD28
CD29
CD30
CD31
CD94
C174 +
2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 Part Number = SF000006S00
330U_2.5V_M
2
1
@
P18-DDRIV_CHA: DIMM0
THIS S H E E T O F E N G IN E E R IN G DRA W ING IS TH E P R O P R IE TA R Y P R O P E R TY O F C O M P A L E LE CTRONICS , INC. A N D CONTA INS CONFIDENTSIiAzeL Document Number
A N D TR A D E S E C R E T INFORM A TI ON. THIS S H E E T M A Y N O T BE TR A N S F E R E D F R O M TH E C U S TO D Y OF TH E C O M P E TE N T DIV IS ION OF R & D Rev
v0.3
DE P A RTM E NT E X C E P T AS A U TH O R IZ E D BY C O M P A L E LE CTRONICS , INC. NE ITHE R THIS S H E E T N O R TH E IN F O R M A TIO N IT CONTA INS M
A Y BE U S E D BY OR DIS CLOS E D TO A N Y THIRD P A R TY W ITH O U T P R IO R W R ITTE N C O N S E N T OF C O M P A L E LE CTRONICS , INC. EPK50_LA-G07CP
Date: Friday, January 05, 2018 Sheet 17 of 59
5 4 3 2 1
5 4 3 2 1
DIMM
DDR_M1_CLK#0 139 DDR_M1_D10
<6> DDR_M1_CLK#0
DDR_M1_CLK1 CK0#(C) DQ1 7 DDR_M1_D11
<6> DDR_M1_D[0..15] <6> DDR_M1_CLK1 138 CK1(T) DQ2 20
TOP: JDIMM2 CONN Non-ECC
+3VS +3VS +3VS <6> DDR_M1_D[16..31]
<6> DDR_M1_CLK#1
DDR_M1_CLK#1
DDR_M1_CKE0
140 CK1#(C)
109 CKE0
DQ3 21 DDR_M1_D12
DQ4 4
DDR_M1_D14
DDR_M1_D9
<6> DDR_M1_CKE0
DDR_M1_CKE1 DQ5 3
<6> DDR_M1_D[32..47] <6> DDR_M1_CKE1 110 CKE1 DQ6 16 DDR_M1_D8
DQ7 17 DDR_M1_D13
1
DDR_M1_CS#0 149 S0# DQS0(T) 13 DDR_M1_DQS1
<6> DDR_M1_CS#0
1
1
D RD20 <6> DDR_M1_D[48..63] DDR_M1_DQS1 <6> D
RD19 RD21 <6> DDR_M1_CS#1 DDR_M1_CS#1 157 S1# DQS0#(C) 11 DDR_M1_DQS#1 DDR_M1_DQS#1 <6>
0_0402_5% @ 0_0402_5% JDIMM2B 162
@ 0_0402_5% STD S2#/C0
165 S3#/C1 DQ8 28 DDR_M1_D0
+1.2V_VDDQ 111 VDD1 VDD11 141 +1.2V_VDDQ DQ9 29 DDR_M1_D5
2
2
1
123 153 DDR_M1_BG0 115 BG0 DQ13 25 DDR_M1_D1
RD22 RD24 VDD5 VDD15 <6> DDR_M1_BG0
RD23 124 154 DDR_M1_BG1 113 BG1 DQ14 38 DDR_M1_D3
VDD6 VDD16 <6> DDR_M1_BG1
0_0402_5% @ 0_0402_5% 0_0402_5% 129 159 <6> DDR_M1_BA0 DDR_M1_BA0 150 BA0 DQ15 37 DDR_M1_D2
VDD7 VDD17
130 VDD8 VDD18 160 <6> DDR_M1_BA1 DDR_M1_BA1 145 BA1 DQS1(T) 34 DDR_M1_DQS0 DDR_M1_DQS0 <6>
135 VDD9 VDD19 163 DQS1#(C) 32 DDR_M1_DQS#0 DDR_M1_DQS#0 <6>
+3V_PRIM_DB 136 DDR_M1_MA0 144 A0
VDD10 <6> DDR_M1_MA0 50 DDR_M1_D20
<6> DDR_M1_MA1 DDR_M1_MA1 133 A1
2
2
2
DQ16 49 DDR_M1_D17
255 258 DDR_M1_MA2 132 A2
VDDSPD VTT +0.6V_0.6VS <6> DDR_M1_MA2
DDR_M1_MA3 131 A3
DQ17 62 DDR_M1_D19
<6> DDR_M1_MA3 DQ18
164 257 DDR_M1_MA4 128 A4 63 DDR_M1_D22
+0.6V_DDRB_VREFCA +2.5V <6> DDR_M1_MA4
2.2U_0402_6.3V6M
VREFCA VPP1 259 DDR_M1_MA5 126 A5 DQ19 46 DDR_M1_D21
1 2 <6> DDR_M1_MA5 DQ20
PLACE ALL THE BELOW RESISTORS CLOSE TO SODIMM CD60 VPP2
<6> DDR_M1_MA6 DDR_M1_MA6
DDR_M1_MA7
127 A6
122 A7
DQ21
45 DDR_M1_D16
58 DDR_M1_D18
1 99
CD61
<6> DDR_M1_MA7
0.1U_0201_10V6K 2 VSS VSS 102
<6> DDR_M1_MA8 DDR_M1_MA8 125 A8 DQ22 59 DDR_M1_D23
2 1 5 VSS VSS 103 DDR_M1_MA9 121 A9 DQ23 55 DDR_M1_DQS2
SPD ADDRESS FOR CHANNEL B :
<6> DDR_M1_MA9 DDR_M1_DQS2 <6>
6 VSS VSS 106 <6> DDR_M1_MA10 DDR_M1_MA10 146 DQS2(T) 53 DDR_M1_DQS#2
DQS2#(C) DDR_M1_DQS#2 <6>
9 VSS VSS 107 <6> DDR_M1_MA11 DDR_M1_MA11 120 A10_AP
WRITE ADDRESS: 0XA4
A11 70 DDR_M1_D25
10 VSS VSS 167 DDR_M1_MA12 119 A12
PLACE NEAR TO PIN 14 VSS VSS 168
<6>
<6>
DDR_M1_MA12
DDR_M1_MA13 DDR_M1_MA13 158 DQ24 71 DDR_M1_D24
READ ADDRESS: 0XA3 15 VSS
18 VSS
VSS 171
VSS 172 9/8 Modify <6> DDR_M1_MA14_WE#
<6> DDR_M1_MA15_CAS#
DDR_M1_MA14_WE# 151
DDR_M1_MA15_CAS# 156
A13
A14_W E#
DQ25
DQ26
83 DDR_M1_D31
84 DDR_M1_D27
SA0 = 0; SA1 = 1; SA2 = 0. 19 VSS
22 VSS
VSS 175
VSS 176 <6> DDR_M1_MA16_RAS#
DDR_M1_MA16_RAS# 152
A15_CAS#
A16_RAS#
DQ27
DQ28
DQ29
66 DDR_M1_D28
67 DDR_M1_D29
DDR4 POR OPERATING SPEED: 1867 MT/S 23 VSS VSS 180 DDR_M1_ACT # 114 79 DDR_M1_D30
26 VSS VSS 181 <6> DDR_M1_ACT# ACT# DQ30 80 DDR_M1_D26
27 VSS VSS 184 DQ31 76 DDR_M1_DQS3
STRETCH GOAL IS 2133 MT/S 30 VSS
31 VSS
VSS 185
VSS 188
<6> DDR_M1_PAR
RD25 2 <6> DDR_M1_ALERT#
1
DDR_M1_PAR
DDR_M1_ALERT#
143
116 PARITY
DIMM2_CHB_EVENT# 134 ALERT#
DQS3(T) 74 DDR_M1_DQS#3
DQS3#(C)
DDR_M1_DQS3 <6>
DDR_M1_DQS#3 <6>
C 35 VSS VSS 189 +1.2V_VDDQ DDR_DRAMRST#_R 108 EVENT# 174 DDR_M1_D37 C
240<_064,1072>_1%DDR_DRAMRST#_R DQ32
Layout Note: Layout Note: 36 VSS VSS 192 RESET# 173 DDR_M1_D33
39 VSS VSS 193 DQ33
187 DDR_M1_D35
Place near JDIMM2.257,259 Place near JDIMM2.258 40 VSS VSS 196 PCH_SMBDAT A 254
DQ34 186 DDR_M1_D38
43 VSS VSS 197 <7,17> PCH_SMBDATA 253 SDA DQ35 170 DDR_M1_D32
<7,17> PCH_SMBCLK PCH_SMBCLK
44 VSS VSS 201 SCL DQ36 169 DDR_M1_D36
47 VSS VSS 202 DQ37 183 DDR_M1_D34
SA2_CHB_DIM2 166
48 VSS VSS 205 260 SA2 DQ38 182 DDR_M1_D39
SA1_CHB_DIM2
+2.5V +0.6V_0.6VS 51 VSS VSS 206 256 SA1
10uF*2 10uF*2 VSS 209
SA0_CHB_DIM2 DQ39 179 DDR_M1_DQS4
DDR_M1_DQS4 <6>
52 VSS SA0 DQS4(T) 177 DDR_M1_DQS#4
1uF*2 1uF*1 56 VSS VSS 210 DQS4#(C) DDR_M1_DQS#4 <6>
57 VSS VSS 213 92 195 DDR_M1_D44
60 VSS VSS 214 91 CB0_NC DQ40 194 DDR_M1_D45
M
10U_0603_6.3V6
M
10U_0603_6.3V6
M
10U_0603_6.3V6
M
10U_0603_6.3V6
1 1 1 1 1 1 1
K
1U_0402_6.3V6
K
1U_0402_6.3V6
K
1U_0402_6.3V6
CD63
CD66
CD67
CD64
CD65
CD68
21
0.1U_0402_25V6
B FOX_AS0A827-H2SB-7H DQ56 237 DDR_M1_D60 B
DQ57 236 DDR_M1_D57
+0.6V_DDRB_VREFCA 2.2uF*1 CONN@ DQ58 249 DDR_M1_D58
0.1uF*1 DQ59 250 DDR_M1_D62
Part Number:LTCX0069FA0 DQ60 232 DDR_M1_D56
2 2
PLACE NEAR TO SODIMM DQ61 233 DDR_M1_D61
Part Value:S SOCKET FOX AS0A827-H2SB-7H 260P DDR4 DQ62 245 DDR_M1_D59
CD69 CD70 DQ63 246 DDR_M1_D63
1 0.1U_0201_10V6K 1 2.2U_0402_6.3V6M +1.2V_VDDQ DQS7(T) 242 DDR_M1_DQS7 DDR_M1_DQS7 <6>
DQS7#(C) 240 DDR_M1_DQS#7 DDR_M1_DQS#7 <6>
+3V_PRIM +3V_PRIM_DB
1 2
RD33 0_0402_5% FOX_AS0A827-H2SB-7H
CONN@
Layout Note:
2
DIMM Side CPU Side
2
Place near JDIMM2 @
CD71
RD26
1 0.1U_0402_10V6K
1K_0402_1% +0.6V_DDRB_VREFCA +0.6V_B_VREFDQ
1
10uF*6
+1.2V_VDDQ 1uF*8 +1.2V_VDDQ
1 RD27 2
330uF*1
2_0402_1%
VREF traces should be at least 20 mils
2 wide with 20 mils spacing to other
2
2
RD28 CD72
1
signals
M
10U_0603_6.3V6
M
10U_0603_6.3V6
M
10U_0603_6.3V6
M
10U_0603_6.3V6
M
10U_0603_6.3V6
M
10U_0603_6.3V6
M
10U_0603_6.3V6
M
10U_0603_6.3V6
K
1U_0402_6.3V6
K
1U_0402_6.3V6
K
1U_0402_6.3V6
K
1U_0402_6.3V6
K
1U_0402_6.3V6
K
1U_0402_6.3V6
K
1U_0402_6.3V6
2 0.022U_0402_25V7K
CD73
CD74
CD75
CD76
CD77
CD78
CD79
CD80
1 0.1U_0402_10V6K
CD83
CD84
CD87
CD88
CD89
1
CD85
CD86
CD90
A A
2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2
2
RD29
24.9_0402_1%
@ @
1
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2017/04/10 DecipheredDate 2019/12/15 Tiiitlle
P19-DDRIV_CHB: DIMM0
THIS S H E E T O F E N G IN E E R IN G D R A W IN G IS TH E P ROP RIE TA R Y P R O P E R TY O F C O M P A L E LE CTRONICS , INC. A N D CONTA INS CONFIDENTSIiiiAzeL Document Number
A N D TR A D E S E C R E T INFORM A TI ON. THIS S HE E T M A Y N O T BE TR A N S F E R E D F R O M TH E C U S TO D Y OF TH E C O M P E TE N T DIV IS ION OF R & D Rev
v0.3
DE P A RTM E NT E X C E P T AS A UTHORIZE D BY C O M P A L E LE CTRONICS , INC. NE ITHE R THIS S H E E T N O R TH E IN F O R M A TIO N IT CONTA INS M
A Y BE U S E D BY OR DIS CLOS E D TO A N Y THIRD P A R TY W ITH O U T P R IO R W R ITTE N C O N S E N T OF C O M P A L E LE CTRONICS , INC. EPK50_LA-G07CP
Date: Friday, January 05, 2018 Sheet 18 of 59
5 4 3 2 1
5 4 3 2 1
4.7U_0402_6.3V6M
0.1U_0201_10V6K
1 1 SD002000080
CG3
CG2 @ L2 1 @ 2 0_0805_5%
SD002000080
2 2
@EMI@ C117
1 1
C118 1 2
<EC> < 33> EC_BKOFF# R166
1 2
33_0402_5%
DISPOFF#
1
*UG1 +LCDVDD Current Limit : 0.8A 680P_0402_50V7K 68P_0402_50V8J FU1 0.75A_24V_MF-MSMF075/24
SP 040009I00 R5176
2 2 10K_0402_5%
D D
2
UG2
9
GND
Rshort@
< 5> ENVDD_CPU
R6 1
0_0402_5%
2 ENVDD_CPU_R 1 EN1
IN1
8 +3VS <CPU> < 5> BKL_PW M_CPU R259
1 Rshort@2
0_0402_5%
INVTPW M
1
R5198 1 @ 2 UG2_FLAG1 2 FLAG1 7
+3VS OUT1 +LCDVDD
100K_0402_5%
ENVDD_CPU R5200 1 @ 2 UG2_EN2 3 EN2 6 @ R163
IN2 +3VS
0_0402_5% 100K_0402_5%
R52011 2 4 5
0.1U_0402_16V7K
+3VS +3VS_CAMERA
2
100K_0402_5% FLAG2 OUT2
0.1U_0201_10V6K
1U_0402_6.3V4Z
1U_0402_6.3V4Z
0.1U_0402_16V7K
1U_0402_6.3V4Z
1 1 1 1 1 1
R5199 1 @ 2 UG2_FLAG2 G510F51U_MSOP 8
C5232
CG76
CG75
C5231
+3VS
100K_0402_5% SA 0000BEY00 @
CG1
CG4
2 2 2 2 2 2
<CPU> RT34 1 Rshort@2 0_0201_5% EDP_HPD_R
Camera
< 5> EDP_HPD
1
RT11
100K_0402_5%
R170 EMI@ 1
2
2
SM070005U00 MURATA DLM0NSN900HY2D @ESD@
4 4 0_0201_5% 3 3 USB20_N5_R D7 SCA00000U10
< 11> USB20_N5
@EMI@ USB20_P5_R 2
L12 1 2 USB20_P5_R 1
< 11> USB20_P5 1 2 2 .1U_0402_16V 7K EDP_AUXP_C
USB20_N5_R 3 CT102 1
< 5> EDP_AUXP
EMI@ CT101 1 2 .1U_0402_16V 7K EDP_AUXN_C
PESD5V0U2BT_SOT23 -3 < 5> EDP_AUXN
1 2
R171 0_0201_5%
CT98 1 2 .1U_0402_16V 7K EDP_TXP 0_C
< 5> EDP_TXP 0
1@2
R5196 0_0603_5%
<CPU> CT97 1 2 .1U_0402_16V 7K EDP_TXN0_C
C < 5> EDP_TXN0 C
SD013000080
D_MIC_CLK
< 32> D_MIC_CLK CT103 1 2 .1U_0402_16V 7K EDP_TXP 1_C
+3VS_CAMERA < 5> EDP_TXP 1
D_MIC_DATA 1 Rshort@2 D_MIC_L_DATA CT100 1 2 .1U_0402_16V 7K EDP_TXN1_C
<32> D_MIC_DATA < 5> EDP_TXN1
R175 0_0402_5%
1 1
@
+3VS
C5221 C5222
2 .1U_0402_16V 7K 2 4.7U_0402_6.3V6M
SE00000SO00
eDP
Touch Screen R5175 EMI@
1 2
0_0201_5%
CONN@
JEDP
L13 EDP_TXP1_C 1
1 1 @EMI@ 2 2 USB20_P7_R TS_GPIO EDP_TXN1_C 2 1
1@2
@ESD@ < 11> USB20_P7 <10> TS_GPIO_CPU 2
R260 0_0402_5% 3
EDP_TXP0_C 3
D6 4
EDP_TXN0_C 4
4 3 USB20_N7_R 1 2 5
< 11> USB20_N7 3 < 33> TS_GPIO_EC 5
USB20_P7_R 2 SM070005U004 R5187 0_0402_5% 6
6
1 MURATA DLM0NSN900HY2D EDP_AUXP_C 7 7
USB20_N7_R 3 EMI@ EDP_AUXN_C 8 8
1 2 9 9
+LCDVDD
PESD5V0U2BT_SOT23-3 R173 0_0201_5% 10 10
B EDP_HPD_R 11 11 B
SCA 00000U10 12 12
Touch screen USB20_P7_R 13 13
USB20_N7_R 14 14
DISPOFF# 15 15
+3VS_TOUCH
Touch Screen Power Selection: INVTPW M
TS_GPIO
16
17
16
17
18 18
19 19
INVPW R_B+
RTS 7 1 @ 2 0_0402_5% 20 20
21 21
22 22
+5VS_TOUCH 23
+3VS_TOUCH 23
24 24
@ 25 GND
FG4 +3VS_TOUCH only for FHD with TS +3VS_CAMERA
USB20_N5_R
25
26 GND
36
26 35
+3VS USB20_P5_R 27 GND 34
3 Cam era 27
OUT 28 GND 33
1 28
D_MIC_CLK 29 GND 32
@ 1 29
IN D_MIC_L_DATA 30 GND 31
CTS3 20m il 30
4.7U_0402_6.3V6M 2
2 GND ACES_50203-03001-002
1
@ CTS7 SP 010023710
SA 00004ZA00 0.1U_0402_16V4Z
G5250Q1T73U SOT-23 3P POWERSWITCH
2
+5VS_TOUCH
RTS 8 1 @ 2 0_0402_5%
TS@
FG2 +5VS_TOUCH only for HD with TS
3 +5VS
A OUT A
1
TS@ 1 20m il
IN
CTS6
4.7U_0402_6.3V6M 2
2 GND TS@
1
CTS1
SA 00004ZA00 0.1U_0402_16V4Z
G5250Q1T73U SOT-23 3P POWERSWITCH
2
THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTSIiiAzeeLDocument Number
eDP CONN/Camera/TS
Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R& D
v0.3
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY
BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC. EPK50_LA-G07CP
Date: Friday, January 05, 2018 Sheet 27 of 59
5 4 3 2 1
Eletro-XTechnical19
5 4 3 2 1
1
RG47
HOST_DP1_P2 0.1U_0402_16V7K 1 2 CG12 HDMI_TX_P0
<5> HOST_DP1_P2 HOST_DP1_N2 0.1U_0402_16V7K 1 2 CG13 HDMI_TX_N0 1M_0402_5%
<5> HOST_DP1_N2
HOST_DP1_P3 0.1U_0402_16V7K 1
2
<5> HOST_DP1_P3 2 CG14 HDMI_CLKP
HOST_DP1_N3 0.1U_0402_16V7K 1 RG108
2
D <5> HOST_DP1_N3 2 CG15 HDMI_CLKN D
1 6 HDMI_HPD 1 2 HP_DETECT
<5> HOST_DP1_HPD
QG1A 10K_0402_5%
20K_0402_5%
5
6
7
8
5
6
7
8
L2N7002SDW1T1G2N SC88-6
1
SB00001FF00
1
5V Level RG56 @
CM17
QG1B SB00001FF00
L2N7002SDW1T1G2NSC88-6 220P_0402_50V7K
4
3
2
1
4
3
2
1
3 4 2
RP1 RP2
2
470_0804_8P4R_5% 470_0804_8P4R_5%
5
+3VS
+3VS
2
360 +-5%0402
SD028360080 HDMI_R_CLKP 5 5 6 6 HDMI_R_CLKP
HOST_DP1_CTRL_CLK 1 6 HDMI_CTRL_CLK
<5> HOST_DP1_CTRL_CLK
1
SC300001Y00
CG72 EMI@
5
360 +-5%0402
SD028360080
HOST_DP1_CTRL_DATA 4 3 HDMI_CTRL_DAT
<5> HOST_DP1_CTRL_DATA
1
SC300001Y00
CG74 EMI@ 2.2K_0804_8P4R_5%
360 +-5%0402 HDMI Conn.
SD028360080
1
10P_0402_50V8J
10P_0402_50V8J
1 10 CK+
8 CM26 CM27 HDMI_R_TX_N0 9 D0-
FG1 +HDMI_CRT_5V 8 D0_shield
AZ1045-04F.R7G DFN2510P10EESD HDMI_R_TX_P0 7 D0+
3 SC300001Y00 2 2 HDMI_R_TX_N1
OUT 6 D1-
5 D1_shield
+5VS 1 HDMI_R_TX_P1 4 D1+ 23
IN HDMI_R_TX_N2 GND1 22
1 1 3 D2- GND2
2 2 D2_shield GND3 21
GND HDMI_R_TX_P2 1 D2+ GND4 20
CG46 CG47
0.1U_0402_16V7K 2 4.7U_0402_6.3V6M 2 ACON_HMRBL-AK120H
A AP2330W-7_SC59-3 A
DC231709273
SA00004ZA00
THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENSSTiIzAeLDocument Number
HDMI Conn/Level shift
Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
v0.3
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY
BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC. EPK50_LA-G07CP
Date: Friday, January 05, 2018 Sheet 28 of 59
5 4 3 2 1
5 4 3 2 1
JL33
+LAN_VDD_3V3 Rising
1 1 22
JUMP@
time
+3VALW @
JUMP_43X79 need>0.5mS and
UL2
1
<100mS+LAN_VDD_3V3 CL8, CL23 closeLL2.
5 VOUT CL26 close UL1 Pin 3.
VIN CL12 close UL1 Pin 8.
1
@ 2 +LAN_VDD_1V0
4 GND CL13 ~ CL15 close UL1 Pin 22.
CL28 <33> LAN_PW R_EN EN
1500P_0402_50V7K LL2 CL11, CL27 close UL1 Pin30.
2 3 +LAN_REGOUT
/OC 1 2
1U_0402_6.3V6K
1U_0402_6.3V6K
2.2UH +-20% 1239AS-H-2R2M=P22A
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
4.7U_0402_6.3V6M
4.7U_0603_6.3V6K
G524B1T11U_SOT23-5 1 1 1 1 1 1 1 1 1 1
SH000014700 @ @
CL23
CL8
CL29
SA00006Y800
CL11 CL12 CL13 CL14 CL15 CL26 CL27
D @ D
2 2 2 2 2 2 2 2 2 2
EC_LAN_ISOLATEB#_R 2 1 +3VS
RM6
RTL8107ESH-CG/RTL8111HSH-CG Co-Lay 1K_0402_5%
2
+LAN_VDD_3V3 +LAN_VDD_3V3
RM11
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
0.1U_0402_16V7K
1 1 1 1 1 1 RTL8111HSH-CG
0.1U_0402_16V7K
L
1
@ +LAN_VDD_1V0
CL16
CL20 CL19 CL9 CL5 CL10
SA000084T00 +VDDREG=40mil
@
2 2 2 2 2 2 +LAN_REGOUT=60mil
LAN_MDIP0 1 3
LAN_MDIN0 2 MDIP0 AVDD10 8
LAN_MDIP1 4 MDIN0 AVDD10 3 0 +LAN_VDD_3V3 XTLI
LAN_MDIN1 5 MDIP1 AVDD10 2 2 +LAN_VDD_3V3
6 MDIN1 DVDD10 XTLO
LAN_MDIP2 2 1
LAN_MDIN2 7 MDIP2 11 1M_0402_5% RL7
LAN_MDIP3 9 MDIN2 AVDD33 3 2 +LAN_VDD_3V3
1
LAN_MDIN3 10 MDIP3 AVDD33 RL15
CL9, CL20 close to UL1 Pin 11 MDIN3 YL1
CL10& CL16 close to UL1: Pin 23 23
VDDREG(VDD33) 24 +LAN_REGOUT 10K_0402_5%
REGOUT
CL5 & CL19 close to UL1: Pin 32 <9> CLKREQ_PCIE#1 CLKREQ_PCIE#1 2 Rshort@1 CLKREQ_PCIE#1_R 12
CLKREQB
1
1 3
3
2
PLT_RST# RL6 0_0201_5% 19 21 EC_PME#
<9,30,31,33,35> PLT_RST# PERSTB LANW AKEB 20 EC_PME# <33> NC NC
ISOLATEB EC_LAN_ISOLATEB#_R
15 +LAN_VDD_3V3
<9> CLK_PCIE_P1 CLK_PCIE_P1 REFCLK_P 2 24 2
16 LAN_ACT#
LED0 27
10P_0402_50V8J
CL25
CL24
10P_0402_50V8J
<9> CLK_PCIE_N1 CLK_PCIE_N1 REFCLK_N LED1/GPO
26 1@2
13 LED1/GPO 25 LAN_LINK#
PCIE_CTX_C_DRX_P5 LED2(LED1) RL56 4.7K_0402_5%
<11> PCIE_CTX_C_DRX_P5
PCIE_CTX_C_DRX_N5 14 HSIP 1 SJ10000UP00 1
<11> PCIE_CTX_C_DRX_N5
<11> PCIE_CRX_DTX_P5 PCIE_CRX_DTX_P5 CR11 1 2 0.1U_0402_10V7K PCIE_CRX_C_DTX_P5 17 HSIN HSOP 28 25MHZ 10PFXRCGB25M000F2P34R0
PCIE_CRX_DTX_N5 CR13 1 2 0.1U_0402_10V7K PCIE_CRX_C_DTX_N5 CKXTAL1 29
18 XTLO
I
<11> PCIE_CRX_DTX_N5 HSON CKXTAL2
RSET 31 RSET
GND 33
2
C
RL11 C
TSL1 2.49K_0402_1%
LANGND
25 XGND RL55 1 @ 2 0_0805_5% (SA0000ALR00) RTL8107ESH-CG 10/100
+V_DAC 1 24
TCT1 MCT1
LAN_MDIP0 2
TD1+ MX1+ 23 RJ45_MDIP0
RP5 (SA000084T00) RTL8111HSH-CGGiga
1
LAN_MDIN0 3 MCT1 1 8
TD1- MX1- 22 RJ45_MDIN0
MCT2 2 7
4 21 MCT3 3 6
TCT2 MCT2
LAN_MDIP1 5 TD2+ MX2+ 20 RJ45_MDIP1 MCT4 4 5
LAN_MDIN1 6 TD2- MX2- 19 RJ45_MDIN1
75_0804_8P4R_1%
7 TCT3 MCT3 18 SD300002E80 2
LAN_MDIP2 8 17 RJ45_MDIP2 CL2 +LAN_VDD_3V3
TD3+ MX3+
LAN_MDIN2 9 16 RJ45_MDIN2 SE167100J80
TD3- MX3-
JLAN
10 15 1 10P_1808_3KV
TCT4 MCT4 A1
LAN_MDIP3 11 14 RJ45_MDIP3 White_LED+
1
LAN_MDIN3 12 TD4+ MX4+ CL3 LAN_LINK# 2 1 LAN_LINK#_R LAN_ACT#_R A2
13 RJ45_MDIN3
TD4- MX4- White_LED-
120P_0402_50V8J RL30 1K +-5%0402
LANGND EMI@ RJ45_MDIN3 8 DI_D4-
3
2
LAN-8100G1G DL1 RJ45_MDIP3 7
2 1 DI_D4+
3
1 0.01U_0402_16V7K 2 0.1U_0402_16V7K
RJ45_MDIN2 5
BI_D3-
RJ45_MDIP2 4 BI_D3+
1
RJ45_MDIP1 3 RX_D2+
RJ45_MDIN0 2 TX_D1-
GND1 9
RJ45_MDIP0 1 GND2 10
TX_D1+ GND3 11
B1 GND4 12
Amber_LED+
LAN_ACT# 2 1 LAN_ACT#_R LAN_LINK#_R B2 Amber_LED-
RL31 510_0402_5%
SINGA_2RJ3081-1A8211F LANGND
DC231710035
@ESD@ @ESD@
B DM13 B
DM12
LAN_MDIP0 44 3 3 LAN_MDIN0 LAN_MDIP2 4 4 3 3 LAN_MDIN2
YSUSB2.0-5_SOT-23-6-6 YSUSB2.0-5_SOT-23-6-6
SC300001G00 SC300001G00
A A
D D
+3VS_W LAN
CONN@
2
JW LAN +3VS_W LAN
+3VS_W LAN
RN7
1 2 4.7K_0402_5%
3 1_GND 3.3V_2 4
< 11> USB20_P6 5 3_USB_D+ 3.3V_4 6
1
< 11> USB20_N6 5_USB_D- LED1#_6 8
7
7_GND N/C_8 10 @RF@
9 @RF@ @RF@ @RF@
0.1U_0402_25V6
100P_0402_50V8J
0.1U_0402_25V6
100P_0402_50V8J
9_N/C N/C_10 12
11 R5179 R5180 R5181 R5182 R5183 R5184
100P_0402_50V8J
0.1U_0402_25V6
11_N/C N/C_12 14
13
2 1
2 1
2 1
2 1
@RF@ @RF@
13_N/C N/C_14 16
15
2 1
2 1
15_N/C LED2#_16 18
17
17_N/C GND_18 20
19
19_N/C N/C_20 22
21
21_N/C N/C_22
23
23_N/C
1
39_GND CLink Reset_38 32 E 51TXD_P80DATA < 33>
1
33
< 11> PCIE_CRX_DTX_P6 41_PETp0 CLink DATA_ 40 34 E 51RXD_P80CLK <33>
35 RN15 @RF@
< 11> PCIE_CRX_DTX_N6 43_PETn0 CLink CLK_42 36
RN3 37 45_GND 10K_0402_5%
10K_0402_5% COEX3_44 38
39 47_REFCLKP0
< 9> CLK_PCIE_P2 COEX2_46 40
2
41 49_REFCLKN0 COEX 1_48 42
< 9> CLK_PCIE_N2
2
0.1U_0402_16V7K
55 61_N/C N/C_60 54
CN3
1 1
57 63_GND N/C_62 56
CN2
65_N/C RESERVED_64 58 +3VS_W LAN
59
R5185
R5186
1
1
10P_0402_50V8J
10P_0402_50V8J
67_N/C N/C_66 60
@RF@ @RF@ 61 22U_0603_6.3V6K
69_GND N/C_68 62 2 2
63
71_N/C N/C_70 64
2
65 73_N/C 3.3V_72
67 75_GND 3.3V_74 66
GND 68
GND 69
NC_70 70
NC_71 71
LOTES_APCI0019 -P 003H
SP 070010DA 0
Active Low
W L_PWREN_EC# <33>
1
NGFF and WLAN RW L1
200K_0402_5%
Unpop QB8 and RL25 for not supportOBFF CW L1
1 2
+3VS_W LAN
22
+3VS +3VS_W LAN 0.1U_0402_16V4Z
QW L1
G
B B
1 3 +3VALW
S
D
2
1
RL25 @ CW L2 PJ 2301 1P SOT23-3
100K_0402_5% 0.1U_0402_16V4Z SB 00000T900
2
G
@ 2
1 3 EC_PCIE_W AKE# 1@ 2
< 9> W AKE#
RW L2 0_0603_5%
D
SB 00000EN00
QB 8
2N7002H_SOT23-3
A A
THIS SHEET OF ENGINEERING DRAW ING IIIS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONIIICS,,, IIINC. AND CONTAINS CONFIDENTSIiiiAzeeLDocumenttt Number
WLAN-BT
Rev
AND TRADE SECRET INFORMATION... THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISIIION OF R& D
v0.3
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, IIINC... NEITHER THIIIS SHEET NOR THE IIINFORMATION IIIT CONTAIIINS MAY
BE USED BY OR DISCLOSED TO ANY THIIIRD PARTY W ITHOUT PRIOR W RIIITTEN CONSENT OF COMPAL ELECTRONICS, INC. EPK50_LA-G07CP
Date: Friday, January 05,,, 2018 Sheet 30 of 59
5 4 3 2 1
5 4 3 2 1
+3VS +3VS_SSD
47U_0603_6.3V6M
10U_0603_10V6M
0.1U_0201_10V6K
1U_0402_6.3V6K
RF@ RF@ CS10
18P_0201_50VNPO
10P_0201_50V
21
2 2 2 2 2 2 10P_0201_50V
RF@
D D
JSSD
1 GND 3P3VAUX 2 +3VS_SSD
3 GND 3P3VAUX 4
5 PETn3 NC 6
7 PETp3 NC 8 TS123
9 GND DAS/DSS# 10 TP@
11 PERn3 3P3VAUX 12
13 PERp3 3P3VAUX 14
15 GND 3P3VAUX 16
17 PETn2 3P3VAUX 18
19 PETp2 NC 20
21 GND NC 22
23 PERn2 NC 24
NC 26
<11> PCIE_CRX_DTX_N11
27
GND Key TYP.M
25 PERp2
29 PETn1
NC 28
NC 30
<SSD> <11> PCIE_CRX_DTX_P11 31 PETp1 NC 32
33 GND NC 34
<11> PCIE_CTX_C_DRX_N11 35 PERn1 NC 36
<11> PCIE_CTX_C_DRX_P11 37 PERp1 DEVSLP 38 DEVSLP2 <11>
C 39 GND NC 40 C
@ RS21 1 2
+3VS
RS22 10K_0402_5%
73 GND 3P3VAUX 74
100K_0402_5% 75 GND
76
GND1 77
GND2
<11> SSD1_IF
11
D YPCI0016-P003A 67PA32
DC04000L9A0CONN@
2
G
S QS1 SB000009Q80
3
2N7002KW_SOT323-3
B pre PV: change to 10K for redriver detect pin voltage level B
A A
4.7U_0402_6.3V6M CA32
10U 6.3V M X5R 0603 CA19
0.1U 16V K X7R 0402 CA20
4.7U_0402_6.3V6M CA36
4.7U_0402_6.3V6M
4.7U_0402_6.3V6M
GNDA VREF
CA8
CA39 1 2 10U 6.3V M X5R 0603 CPVDD 29 CPVDD LINE1_L 18 AZ5125-01H.R7G_SOD523-2
CBN 28 CBN
CA5
CA6
SC400005Q00
+1.8VS
CA16 2 1 1U_0402_6.3V6K CBP 30 CBP LINE1_R 17 2 2 2 2
2 2
21
D_MIC_DATA 2 GPIO0/DMIC_DATA12
<27> D_MIC_DATA
2 1 D_MIC_CLK_R 3 GPIO1/DMIC_CLK LDO2_CAP 32 CA27 1 2 10U 6.3V M X5R 0603 GNDA
<27> D_MIC_CLK
BLM15PX221SN1DEMI@ LA6 LDO3_CAP 6 CA28 1 2 10U 6.3V M X5R 0603
GNDA
1 @EMI@ RA41 10 DCDET GNDA
CA41 +DVDD 1 2 100K_0402_1% 12 JD1
10P_0402_50V8J PLUG_IN# 1 2 200K_0402_1% 19
AVSS1 31 GNDA
RA42
2 PDB AVSS2 41 GNDA
40
PDB THERMALPAD
ALC3247-CG_MQFN40_5X5
Internal SPK
CONN@
JSPK
SPK_R- RA36 1 EMI@ 2 0_0603_5%SPK_R-_CONN 1
+3VS +DVDD RA34 1 EMI@ 2 0_0603_5% SPK_R+_CONN 2 1
SPK_R+ 2
SPK_L- RA33 1 EMI@ 2 0_0603_5%SPK_L-_CONN 3
C 3 C
RA35 1 EMI@ 2 0_0603_5% SPK_L+_CONN 4
PC Beep SPK_L+ 4
1
RA10 5
G1
1
10K_0402_0.5% RA9 6
@ 100K_0402_5%
wide 40 MIL G2
ACES_50278-00401-001
220P_0402_50V7K
220P_0402_50V7K
220P_0402_50V7K
220P_0402_50V7K
2
22
@EMI@ C11
@EMI@ C12
@EMI@ C13
@EMI@ C14
HDA_RST#_R 3 1 PDB
E
1
0.1U 16V K X7R 0402 CA23
SB000008E10 0.1U 16VK X7R0402
@
EC_MUTE# 1 2 RA17
<33> EC_MUTE# 2
DA2 SCS00000Z00 10K_0402_5%
RB751V-40SOD-323
Close to Codec pin34
2
R5260
1 2
0_0201_5%
3
RA51 1 2 0_0603_5%
DA4
Rshort@ L03ESDL5V0CC3-2_SOT23-3 DA5
RA52 1 2 0_0603_5% L03ESDL5V0CC3-2_SOT23-3
SCA00002900
ESD@ SCA00002900
Rshort@ @ESD@
RA54 1 2 0_0603_5%
Rshort@
1
1 2
RA6 0_0402_5%
1/20:Swap DA3
RA7 @
B 1 2 B
0_0402_5%
12
CA9 EMI@ JHP
0.1U16VK X7R 0402 INT_MIC 1 RA13 2 0_0402_5% INT_MIC_R 3 3:M/G_EARTH
EMI@ HP_OUTL 1 RA14 2 0_0402_5% HP_OUTL_R 1 1:L/R_TIP SPRING
EMI@
1 2
CA10 PLUG_IN# 5 5:TRANSFER TERMINAL
0.1U16VK X7R 0402
EMI@
6 6:MAKE TERMINAL
1 2 HP_OUTR 1 RA15 2 0_0402_5% HP_OUTR_R 2 2:R/L_RINGA
CA11 @EMI@ EMI@
0.1U 16V K X7R0402 4 4:G/M_RING B
1 1 1 7 7:MS_SHELL
100P_0603_50V7 CA24
100P_0603_50V7 CA25
100P_0603_50V7 CA26
12
CA12 @EMI@ SINGA_2SJ3095-067111F
0.1U 16V K X7R0402
@EMI@
@EMI@
@EMI@
DC23000DY00
2 2 2 GNDA Pin6 and Pin5
12 Normal OPEN
CA13
0.1U16VK X7R 0402
EMI@
GNDA
GNDA
A A
<6,7,9,10,11,13,17,18,19,22,23,24,27,28,29,30,31,32,36,39,40,52,55>
+3VS
+3VS LK1 SM01000Q 500
S SUPPRE_ TAI-TECH HCB1005KF-221T15 0402
+3VALW _EC
EC Board ID (UMA, DIS, phase) control table
1 2 +3VALW _EC 1 2 +EC_VCCA
K
0.1U_0201_10V6
K
0.1U_0201_10V6
+3VALW _EC
RK1 0_0603_5% 1 KBL-U KBL-R
CK1
CK2
1 1
<22,45> +3VALW _EC
RK4
2
RK2
+3VL
<13,39,46,47,48> +3VL CK3 100K_0402_1% DB SI PV MV DB SI PV MV
2 0.1U_0201_10V6K
2 2 UMA 15K 27K 43K 75K 130K 200K 270K 430K
ECAGND
1
BOARD_ID DIS 20K (0x02)
(0x03) 33K 56K
(0x04)
(0x05)
(0x06)
(0x07) 100K (0x08)
(0x09) 160K (0x0A)
(0x0B) 240K 330K (0x0C)
(0x0D)
(0x0E)
(0x0F) 560K (0x10)
(0x11)
+3V_EC_VDD +3VL
2
+3V_LID U_PX@ U_UMA@
RK4 RK4
D
2
ESD@
1 PLT_RST#
1 RK3 2
56K +-1% 0402 43K +-1% 0402 U_DB_UMA_15kohm:SD034150280, S RES 1/16W 15K+-1%0402 Reserve EC_CLR_CMOS for clear CMOS D
CK4 0.1U_0402_25V6 0_0402_5% SD034560280 SD034430280 U_DB_ DIS_20kohm:SD034200280, S RES 1/16W 20K +-1% 0402 (2016-03-04 ::::ConfirmintelplatformnotsupportECClear CMOS function)
U_SI_UMA_27kohm:SD034270280, S RES 1/16W 27K +-1% 0402(2017-10-05 : 2018OPP Add EC Clear CMOS function)
U_SI_ DIS_33kohm:SD034330280, S RES 1/16W 33K +-1%0402
111
125
R_PX@ R_UMA@ U_PV_UMA_43kohm:SD034430280, S RES 116W 43K +-1% 0402 RK106 1 2 0_0402_5%
22
33
96
67
CLR_CMOS# <9>
1
UK1
9
RK4 RK4 U_PV_ DIS_56kohm:SD034560280, S RES 1/16W 56K +-1%0402
330K +-1% 0402 270K +-1% 0402 U_MV_UMA_75kohm:SD034750280, S RES 1/16W 75K +-1% 0402
VCC0
VCC_LPC
AVCC
1
U_MV_ DIS_100kohm:SD034100380, S RES 1/16W 100K+-1% 0402
VCC
VCC
VCC
VCC
SD034330380 SD00000G280 @
@ D
RK7 2 1 330K_0402_5% EC_RST # EC_CLR_CMOS 2 Q51
+3VALW _EC Pin111:VCC0
TOUCH_ON G 2N7002K_SOT23-3
T2403 TP@ 1 GATEA20/GPIO00 EC_VCCST_PG/GPIO 0F 21 EC_VCCST_PG_R EC_VCCST_PG_R <9,40>
2
@1 2 EC_KBRST # 2 R_DB_UMA_130kohm:SD034130380, S RES 116W 130K+-1%0402 S SB00000 EN00
0.1U_0402_16V7K
<7> EC_KBRST#
SERIRQ KBRST#/GPIO01 BEEP#/GPIO10 23 EC_BEEP# <32> R_DB_ DIS_160kohm:SD034160380, S RES 116W160K +-1%0402 R483
CK5 <7,35> SERIRQ 3 26 EC_FAN_PW M1
SERIRQ EC_FAN_PW M/GPIO12 27 EC_FAN_PW M1 <36>
3
LPC_FRAME# 4 PWMOutput AC_OFF/GPIO13 EC_CLR_CMOS R_SI_UMA_200kohm:SD034200380, SRES 1/16W 200K+-1% 0402 @ 10K_0402_5%
<7> LPC_FRAME# LPC_FRAME#
LPC_AD3 5 R_SI_ DIS_240kohm:SD000001B80, S RES 116W 240K+-1%0402
<7> LPC_AD3 LPC_AD2 LPC_AD3
<7> LPC_AD2 7 R_PV_UMA_270kohm:SD00000G280, S RES 1/16W 270K +-1% 0402
1
LPC_AD1 LPC_AD2
<7> LPC_AD1 8 63 B/I# R_PV_ DIS_330kohm:SD034330380, S RES 1/16W 330K +-1%0402
LPC_AD0 LPC_AD1 VCIN1_BATT_TEMP/AD0/GPIO38 B/I# <46>
10
<7> LPC_AD0 LPC_ADL0 PC &MISC VCIN1_BATT_DROP/AD1/GPIO39 64
ADP_I
CLK_PCI_LPC 65
ADP_I/AD2/GPIO3A ADP_I <45,47>
El
CLK_PCI_LPC 12 BOARD_ID
<7> CLK_PCI_LPC
13
CLK_PCI_EC ADInput AD_BID/AD3/GPIO3B 66
ADP_ID
PLT_RST# 75
<9,19,29,30,31,35> PLT_RST# AD4/GPIO42 ADP_ID <45>
1 21 2 EC_RST # 37 PCIRST#/GPIO05 EC_PME#_ EC_R R5178 1 2
AD5/GPIO43 76 EC_PME# <29>
CK9 RK109 22_0402_5% EC_SCI# 20 EC_RST # 0_0201_5% VR_HOT# 1 2 0_0402_5%
<5> EC_SCI# <52> VR_HOT# PROCHOT# <5>
22P 50V J NPO 0402 EMI@ 1@2 PM_CLKRUN#_R 38 EC_SCI#/GPIO0E RK8
<7> PM_CLKRUN# CLKRUN#/GPIO1D
EMI@ RK10 1 @ 2 0_0402_5%
<9,30> EC_PCIE_W AKE# RK6 0_0402_5% 68
DA0/GPIO3C 70 NMI_DBG# KBL_ON# <34>
<34> KSI[0..7] DA Output EN_DFAN1/DA1/GPIO3D D
et
1
KSI0 55 71 VR_PW RGD
KSI1 56 KSI0/GPIO30 DA2/GPIO3E VR_PW RGD <52>
72 EC_MUTE# H_PROCHOT#_EC 2
57 KSI1/GPIO31 DA3/GPIO3F EC_MUTE# <32>
KSI2 G
KSI3 58 KSI2/GPIO32 83 @QK1 S
KSI4 59 KSI3/GPIO33 EC_MUTE#/PSCLK1 /GPIO 4A 84 2N7002_SOT23-3
C 60 KSI4/GPIO34 USB_EN#/PSDAT 1/GPIO4B 85 VR_ON SB00000 EN 00 C
KSI5
3
61 KSI5/GPIO35 PSCLK2/GPIO4C 86 VR_ON <40,52>
1 @ 2 VCIN1_ACOK_R KSI6 PS2Interface
<47> VCIN1_ACOK 62 KSI6/GPIO36 PSDAT 2/GPIO 4D 87 TP_CLK LAN_PW R_EN <29>
R4958 0_0402_5% KSI7
ro
<34> KSO[0..17] 39 KSI7/GPIO37 TP_CLK/GPIO4E 88 TP_DATA TP_CLK <34>
KSO0
40 KSO0/GPIO20 TP_DATA/GPIO4F TP_DATA <34>
KSO1 RK91 2 0_0402_5%
KSO2 41 KSO1/GPIO21
1 2 VCIN1_AC_IN_R KSO3 42 KSO2/GPIO22 97 ENBKL +3VALW
43 KSO3/GPIO23 ENKBL/GPXIOA00 98 ENBKL <5>
R5094 0_0402_5% KSO4
44 KSO4/GPIO24 W OL_EN/GPXIOA01 99 ME_FLASH_ EN W L_PW REN_EC# <30>
KSO5
KSO5/GPIO25
Int. K/B ME_EN/GPXIOA 02 ME_FLASH_EN <8>
T P_CLK RK12 1 2 4.7K_0402_5%
KSO6 45 109 VCIN0_PH
KSO7 46 KSO6/GPIO26 Matrix VCIN0_PH1/GPXIOD00 VCIN0_PH <45>
-
TP_DATA RK13 1 2 4.7K_0402_5%
KSO8 47 KSO7/GPIO27
KSO9 48 KSO8/GPIO28 SPI DeviceInterface
VCIN1_AC_IN 1 @ 2 VCIN1_AC_IN_R R4960 119
49 KSO9/GPIO29 MISO/GPIO5B 120 EC_SPI_ SO <7>
XT
0_0402_5% KSO10
50 KSO10/GPIO 2A MOSI/GPIO5C 126 EC_SPI_SI <7> +3VL
KSO11 EC_SPI_CLK
51 KSO11/GPIO 2B SPI FlashROM SPICLK/GPIO58 128
For Solve tPCH04(Min 9ms) Sequence Timing KSO12
KSO13 52 KSO12/GPIO 2C SPICS#/GPIO 5A EC_SPI_CS 0# <7>
KSO14 53 KSO13/GPIO 2D RP12
KSO15 54 KSO14/GPIO 2E 73 8 1
81 KSO15/GPIO2F EC_CIR_RX/AD6/GPIO40 74 SYS_PW ROK TS_GPIO_EC <27> PLT_RST# 7 2
KSO16
82 KSO16/GPIO48 SYS_PW ROK/AD7/GPIO 41 89 EC_S0IX_ EN SYS_PW ROK <9> EC_ON 6 3
KSO17
KSO17/GPIO49 GPIO50 90 EC_S0IX_ EN <12> PCH_PW R_EN 5 4
BAT_CHG_LED
BATT_CHG_LED#/GPIO52 91 CAP_LOCK# BAT_CHG_LED <45>
CAPS_LED#/GPIO53 92 PW R_LED# CAP_LOCK# <34>
77 GPIO 100K_0804_8P4R_5%
<46,47> EC_SMB_CK 1 PW R_LED#/GPIO54 93 PW R_LED# <39>
78 EC_SMB_CLK 1/GPIO 44
ec
<46,47> EC_SMB_DA 1 BATT_LOW _LED#/GPIO55 ACIN <9>
RK15 1 2 0_0402_5% EC_SMB_CK 2_R 79 EC_SMB_DAT 1/GPIO 45 95 SYSON PBTN_OUT# R295 1 @ 2 1K_0402_5%
<7,10,22> EC_SMB_CK 2 SYSON/GPIO 56
RK16 1 2 0_0402_5% EC_SMB_DA 2_R 80 EC_SMB_CLK 2/GPIO 46 121 BT_ON_EC SYSON <12,40,49>
<7,10,22> EC_SMB_DA 2 EC_SMB_DAT 2/GPIO 47 VR_ON/GPIO57 127 BT_ON_EC <30>
PCH_DPW ROK EC_CLR_CMOS 1 @ 2 RK107
DPW ROK_EC/GPIO59 PCH_DPW ROK <9> 10K_0402_5%
SMBus +3VALW _EC
PM_SLP_S3# 6 100 PCH_RSMRST#
+5VS <9,12,40> PM_SLP_ S 3 # PM_SLP_S3#/GPIO04 EC_RSMRST#/GPXIOA 03 101 PCH_RSMRST# <9>
PM_SLP_S5# 14 USB_ON# LID_SW # RK18 2 @ 1 47K_0402_5%
<9> PM_SLP_ S5# GPIO07 GPXIOA04 USB_ON# <38,39>
SUSACK# VCIN1_PH
B <9> SUSACK# 15 GPIO08 VCIN1_ADP_ PROCHOT /GPXIOA 05 102 VCIN1_PH <45> +3V_SMBUS
B
<9> PM_SLP_ SUS# PM_SLP_ SUS# 16 103 H_PROCHOT#_EC
GPIO0A VCOUT 1_PROCHOT#/GPXIOA06
hn
PCH_SUSW ARN# 17 MAINPW ON
<9> PCH_SUSW ARN# GPIO0B VCOUT 0_MAIN_ PW R_ON/GPXIOA 07 104 MAINPW ON <48> EC_SMB_CK 1 8 1 RP11 +3VS
EC_BKOFF#
RK28 18 GPIO0C BKOFF#/GPXIOA08 105 RK25 1
EC_BKOFF# <27>
2 0_0402_5% EC_SMB_DA 1 7 2
2 19 AC_PRESENT/GPIO 0D GPIOGPO GPXIOA09 106 DGPU_PW R_EN <10,24>
EC_SMB_CK 2
1 MUTE_LED_OUT MUT E_LED_IN 25 PW M2/GPIO11 PCH_PW R_EN 6 3
<32> MUTE_LED_IN
FAN_SPEED1 PCH_PW R_EN/GPXIOA 10 107 PCH_PW R_EN <40,51>
EC_SMB_DA 2 5 4
+1.0VS_PG
<36> FAN_SPEED 1 VCIN1_ACOK_R
28 FAN_SPEED1 /GPIO 14 PW R_VCCST_PG/GPXIOA 11 108 +1.0VS_PG <50>
100K_0402_5% 29 FANFB1/GPIO15
E51T XD_P80D AT A 30 EC_TX/GPIO16 2.2K_0804_8P4R_5%
<30> E51TXD_P80DATA E51RXD_P80CLK 110 VCIN1_AC_IN_R
RK26 <30> E51RXD_P80CLK 31 EC_RX/GPIO 17 VCIN1_AC_IN/GPXIOD01
PCH_PW ROK 32 PCH_PW ROK/GPIO18 112 EC_ON
<9> PCH_PW ROK ALW_PWE_EN EC_ON/GPXIOD 02 EC_ON <39,48>
2 1 E51TXD_P80DATA AC_LED# 34 SUSP_LED#/GPIO19 114 ON/OFF# EC_SCI# RK14 2 1 10K_0402_5%
<45> AC_LED#
ic
ON/OFF#/GPXIOD03 ON/OFF# <39>
<34> MUTE_LED_OUT 36 NUM_LED#/GPIO1A GPI LID_SW #/GPXIOD04 115
LID_SW #
LID_SW # <39>
100K_0402_5% 116 SUSP#
SUSP#/GPXIOD 05 VCIN1_AC_IN SUSP# <12,40,49>
GPXIOD06 117
PECI/GPXIOD07 118 EC_PECI RK17 1 2 43_0402_1%
H_PECI <5>
PBTN_OUT# 122 PBTN_OUT#/GPIO5D SYSON RK23 1 @ 2 100K_0402_5%
<9> PBTN_OUT#
PM_SLP_ S4# 123 PM_SLP_ S4#/GPIO 5E +V18R
<9,12,40,49> PM_SLP_ S 4 # V18R/VCC_IO2 124 +3VALW _EC
al
1
CK8 SUSP# RK27 1 2 100K_0402_5%
AGND
GND
GND
GND
GND
GND
69
113
1 2 MUTE_LED_IN 20mil
RK108 10K_0402_5%
EC_SPI_CLK RC369 1 2 HOST_SPI_0_CLK_R
SA000075S30 EMI@ 15_0402_5% HOST_SPI_0_CLK_R <7,35>
LK2 SM01000Q 500
ECAGND 2 1
TAI-TECH HCB1005KF-221T15 0402 CC144 22P
CC128 RC369 place near ECSide 50V J NPO 0402
@EMI@
+3VALW _EC
ECAGND <45>
A
EMI request A
1
RK21
10K_0402_5%
2
3
KSO17 KSO0 26
1 1 26
DM5 @ @ KSO16 JKB1 KB Spec KSI2 25
KSO15 24 25
PESD5V0U2BT 3P CC SOT23ESD C135 C136 KSI3 24
SCA00000T00 KSO14 Pin1 KSI1 KSI1 KSO5 23
2 2 KSO13 23
ESD@ KSO1 22
KSO12 22
Pin32 5V 5V KSI0 21
470P_0402_50V8J
470P_0402_50V8J
KSO11 21
KSO2 20
KSO10 20
KSO4 19
KSO9 19
KSO7 18
18
1
KSO8 KSO8 17
KSO7 17
KSO6 16
KSO6 16
KSO3 15
KSO5 15
KSO12 14 14
KSO4 KSO13 13
KSO3 13
KSO14 12
KSO2 12
KSO11 11
KSO1 11
KSO10 10 10
KSO0 KSO15 9 9
KSO16 8 8
R203 KSO17 7 7
1K_0402_5% 6 6
1 2 +5VS 5
<33> CAP_LOCK# CAP_LOCK# CAP_LOCK#_R 5
1 2 MUTE_LED_OUT_R 4 4
+5VALW +5VS <33> MUTE_LED_OUT
R207 3 3
549_0402_1% 2 2
1 1
+5VS
1
R23 ACES_50690-0320N-P01
100K_0402_5% CAP_LOCK# SP01001RG00
Q9 +5VS_KBL MUTE_LED_OUT
3
S
2
2 G
<33> KBL_ON# ESD@
ACES_51575-00401-001 KSI0 C193 2 1 100P_0402_50V8J
D 1 1
1
4 6
0.047U_0402_16V7K
4 G2 5
1 PJ2301 1PSOT23-3 3 CC122 CC123
3 G1
@ SB00000T900 2 2 2 100P_0402_50V8J 2 100P_0402_50V8J
1 1 ESD@ ESD@
C68
2 JKBL
SP01002BY00
THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENSSTiIzAeLDocument Number
KB/TP
Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom v0.3
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC. EPK50_LA-G07CP
Date: Friday, January 05, 2018 Sheet 34 of 59
5 4 3 2 1
D Screw Hole D
TPM2.0 UT1
+3VS_TPM +3VALW
H1 H2
H_2P4N H_3P0
H4
H_3P0
CPU
H8 H9 H10 H11 H_5P0
H_5P0 H_5P0H_5P0
TPM@
1 TPM@ 2 PLT_RST#_TPM 17 RST# RC9341 2 0_0402_5%
<9,29,30,31,33> PLT_RST#
R28 0_0402_5% VDD 1 @ @ @ @ @ @ @
8
VDD
1
1 TPM@ 2 TPM_SERIRQ 18 PIRQ# 2
VDD 2 1 1 1 1
1
<7,33> SERIRQ R5202 0_0402_5% CT1 CT3 CT4 CT2
<7,33> HOST_SPI_0_CLK_R RT6 1 2 HOST_SPI_0_CLK_R_TPM 19 SCLK 3
TPM@ 33_0402_5% NC
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1U_0402_6.3V6K
RT7 1 2 HOST_SPI_0_CS2#_TPM 20 CS# NC 4 2 2 2 2
<7> HOST_SPI_0_CS2# TPM@ 33_0402_5% NC 5
NC 10
RT8 1 2 HOST_SPI_0_SI_TPM21 NC 11
<7> HOST_SPI_0_SI TPM@ 33_0402_5% MOSI
NC 12 TPM@ TPM@ TPM@ TPM@ H13 H14 H16 H17 H18 H19
RT9 1 2 HOST_SPI_0_SO_TPM 24 NC 13 H_2P3 H_3P3 H_2P3 H_2P4X2P9N H_6P0N H_6P0N
<7> HOST_SPI_0_SO MISO
TPM@ 33_0402_5% NC 14
+3VS_TPM 2 1 TPM_GPIO 6 GPIO NC 15
RT10 TPM@ 4.7K_0402_5%
NC 16 @ @ @ @ @ @
1
1@2 TPM_PP 7 NC 25
1
RT35 PP
4.7K_0402_5% NC 26
2
9 GND NC 27
23 GND NC 28
1
32 GND NC 29
RT12 NC 30
33 GND
C 4.7K_0402_5% NC 31 FD1 FD2 FD3 FD4 C
PAD
TPM@
TPM@
SLB9670VQ1.2 FW6.40_VQFN32_5X5 @ @ @ @
2
1
SA00009N230
FIDUCIAL_C40M80 FIDUCIAL_C40M80 FIDUCIAL_C40M80 FIDUCIAL_C40M80
JESD JUMP@
1 2
1 2
JUMP_43X39
B B
A A
THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENSSTiIzAeLDocument Number
TPM/Screw
Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
v0.3
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY
BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC. EPK50_LA-G07CP
Date: Friday, January 05, 2018 Sheet 35 of 59
5 4 3 2 1
A B C D E
+5VS
1A 40 mils +3VS
1
R5177
1 Rshort@2+FAN1
L Layout notes
C4801 C5214 close to CONN CONN@ 1
JFAN
1
0_0603_5% RE50 6
10K_0402_5% GND2
5
GND1
1 1
10U_0603_10V6M
C4801
0.1U_0402_16V7K
C5214
+FAN1 4
4
Close to Connector
2
3
<33> FAN_SPEED1
1 2 3
2 2 <33> EC_FAN_PWM1 2
CE24 1
1
0.01U_0402_25V7K
ACES_50271-0040N-001
2 SP02000TS00
+FAN1
RE51
1 @ 2 EC_FAN_PWM1
10K_0402_5%
2 2
3 3
4 4
<7,13,29,30,33,34,35,40,48,49,50,51> +3VALW
+5VALW
+3VALW
D D
<PV> change short pad
CONN@
+5VS JHDD
*Design Constraint:AC capacitors to be placed as close 1
as possible to the connector.
Maximum distance from AC capacitors to connector is 500
+5VS_HDD1 2 1
mils.
C155 1 2 0.01U_0402_16V7K 2
R201 1 Rshort@20_0603_5% +5VS_HDD1 <11> SATA_CTX_DRX_P0 SATA_CTX_C_DRX_P0 3
C156 1 2 0.01U_0402_16V7K 3
<11> SATA_CTX_DRX_N0 SATA_CTX_C_DRX_N0 4
4
R202 1 Rshort@20_0603_5% 5 5
C153 1 2 0.01U_0402_16V7K SATA_CRX_C_DTX_N0 6
<11> SATA_CRX_DTX_N0 C154 1 2 0.01U_0402_16V7K 6
SATA_CRX_C_DTX_P0 7 7
<11> SATA_CRX_DTX_P0
8 8
2 9 GND
10 GND
C140
1 470P_0402_50V8J ACES_51524-00801-001
EMI@ SP01001A910
C C
SATA ODD
+5VALW
1
ROD1
100K_0402_5%
2
JODD
1
D +5VS_ODD
1
S1
2 QOD2 ROD2 <11> SATA_CTX_DRX_P1 CS11 2 1 0.01U_0402_16V7K SATA_CTX_C_DRX_P1 S2 GND
<10> ODD_PWR G CS14 2 1 0.01U_0402_16V7K S3 A+
2N7002K_SOT23 1K_0402_5% <11> SATA_CTX_DRX_N1 SATA_CTX_C_DRX_N1
S SB00000EN00 COD1 S4 A-
S5 GND
3
B P2 DP B
1 1 1
QOD1 @ P3 +5V
COD2
10U_0603_6.3V6M
0.1U_0402_16V4Z
4.7U_0603_6.3V6K
COD
COD
SDAN_603010-013041_13P
CONN@
A A
RS 2 EMI@ 0_0402_5%
2 1 USB 3_CTX_C_DRX_N1 1 2 USB3_CTX_L_DRX_N1 +5VALW
< 11> USB3_CTX_DRX_N1 <12,24,34,37,39,40,48,49,52,53> +5VALW
CS2 0.1U_0402_16V7K
2
RG75
@ 150_0402_5% +USB_VCCA
+5VALW
US1 W =100mils
1
W =100mils OUT
1
RS 1 EMI@ 0_0402_5% 1 5
150U_B2_6.3VM_R45M
1 USB 3_CTX_C_DRX_P1 1 IN
2 2 USB3_CTX_L_DRX_P1 2 1 @
<11> USB3_CTX_DRX_P1
1000P_0402_50V7K
GND
47U_0805_6.3V6M
CS1 0.1U_0402_16V7K CS3 4
0.1U_0402_16V7K
EN 1 1 1 +
CS 6
3
CS22
2 0.1U_0402_16V7K OCB CS5 CS28
CS 4
EMI@
2 1
RS 6 EMI@ 0_0402_5% 1 390P_0402_50V7K
2 USB3_CRX_L_DTX_N1 2 2 2 2 EMI@
EM5203J-20 SOT23 5P LOAD SW ITCH
< 11> USB3_CRX_DTX_N1
SA00008RA00
1 1
2
RG76 USB_ON# 1 2
< 33,39> USB_ON#
@ 150_0402_5% RS 4 Rshort@ 0_0402_5%
1
RS 3 EMI@ 0_0402_5% 1
2 USB3_CRX_L_DTX_P1
<11> USB3_CRX_DTX_P1
USB2.0/USB3.0 port 1
RS 47 @EMI@ +USB_VCCA
1 2 JUSB1
0_0201_5% DM2 ESD@ 1
USB20_N1_R VBUS
USB3_CTX_L_DRX_P1 1 1 10 9 USB3_CTX_L_DRX_P1 2
D-
SM070005U00 DLM0NSN900HY2D_4P 1 USB20_P1_R 3
D+
1 2
2 USB20_P1_R USB3_CTX_L_DRX_N1 22 9 8 USB3_CTX_L_DRX_N1 4
< 11> USB20_P1 USB3_CRX_L_DTX_N1 GND1
5
USB3_CRX_L_DTX_P1 SSRX-
USB3_CRX_L_DTX_P1 4 4 7 7 USB3_CRX_L_DTX_P1 6 10
SSRX+ GND3
4 3 USB20_N1_R 7 11
< 11> USB20_N1 GND2 GND4
LM3 4 3 USB3_CRX_L_DTX_N1 55 6 6 USB3_CRX_L_DTX_N1 USB3_CTX_L_DRX_N1 8 12
EMI@ SSTX- GND5
USB3_CTX_L_DRX_P1 9 13
SSTX+ GND6
RS 48 @EMI@ 3 3
1 2 ACON_TARAW -9U1395_9P-T
0_0201_5% 8 DC231709285
USB2.0ChokePart:
Main:SM070005U00, S COM FI_ MURATA DLM0NSN900HY2D(MURATA) DT1140-04LP-7 U-DFN2510-10 CONN@
2nd:SM070004X00, S COM FI_PANASONICEXC14CE900U(PANASONIC)
SC300005M00
2 2
DM1
USB20_P1_R 6 3 USB20_P2_R
USB2.0ChokePart: I/O4 I/O2
Main:SM070005U00, S COM FI_ MURATA DLM0NSN900HY2D(MURATA)
2nd:SM070004X00, S COM FI_PANASONICEXC14CE900U(PANASONIC)
RS 49 @EMI@ +USB_VCCA 5 2
VDD GND
1 2
0_0201_5%
7 11
GND2 GND4
RS 7 EMI@ 0_0402_5% 1 USB3_CTX_L_DRX_N2 8 12
SSTX- GND5
2 1 USB3_CTX_C_DRX_P2 2 USB3_CTX_L_DRX_P2 USB3_CTX_L_DRX_P 2 9 13
<11> USB3_CTX_DRX_P2 SSTX+ GND6
CS24 0.1U_0402_16V7K
ACON_TARAW -9U1395_9P-T
DC231709285
RS 10 EMI@ 0_0402_5% 1
3 2 USB3_CRX_L_DTX_N2 CONN@ 3
< 11> USB3_CRX_DTX_N2 DM14 ESD@
USB3_CRX_L_DTX_N2 1 1 10 9 USB3_CRX_L_DTX_N2
USB3_CRX_L_DTX_P2 2 2 9 8 USB3_CRX_L_DTX_P2
2
RG107
@ 150_0402_5% USB3_CTX_L_DRX_N2 4 4 7 7 USB3_CTX_L_DRX_N2
USB3_CTX_L_DRX_P2 5 5 6 6 USB3_CTX_L_DRX_P2
1
RS 9 EMI@ 0_0402_5% 1 33
2 USB3_CRX_L_DTX_P2
<11> USB3_CRX_DTX_P2 8
DT1140-04LP-7 U-DFN2510-10
SC300005M00
USB3.0ESDPart:
Main:SC300005M00, S DIO(BR) DT1140-04LP-7U-DFN2510-10(DIODES))))
2nd:SC300003Z00, S DIO(BR)PUSB3F96DFN2510A-10ESD(NXP)
3rd:SC300005N00, SDIO(BR)L02U5V0NA-4C SLP2510P8(LITE ON)
4 4
THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTSIiiAzeeLDocument Number
USB 3.0/2.0 conn
Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R& D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom v0.3
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC. EPK50_LA-G07CP
Date: Tuesday, January 09, 2018 Sheet 38 of 59
A B C D E
A B C D E
+3V_LID
+3VL <13,33,46,47,48> +3VL +3VL
1
R215 <6,7,9,10,11,13,17,18,19,22,23,24,27,28,29,30,31,32,33,36,40,52,55> +3VS +3VS
100K_0402_5% SW1 SN10000CU00
G2
Q4108 +3VALW
SW TJG-533KQRH SPST DIP H1.55 6P <7,13,29,30,33,34,35,40,48,49,50,51,55> +3VALW
2
<33> ON/OFF# ON/OFF# 1 3 ON/OFF#_R 1 3
S
2 4
2N7002K_SOT23-3
SB00000EN00 @
L Layout notes
6
5
JP6
IO BD Connector ( USB2.0,Card reader,HDD & PWR LED )
12
JP6 place Bottom layer SHORT PADS
EMI@ C139 470P_0402_50V8J
1 1
12
CONN@
JIO
1
ESD Diode +5VALW
2
3
1
2
LID_SW# 3
4
5 4
ON/OFF#_R 6 5
+3VS 6
7
7
3
USB20_N4_R 8
9 8
Cardreader USB20_P4_R
10 9
ESD@
USB20_N3_R 11 10
D1
USB20_P3_R 12 11
SCA00001B00 USB2.0 ( on small BD)
AZ5123-02S.R7G 3P CA SOT23 13 12
<33,38> USB_ON# 13
14
15 14
<11> SATA_LED# 15
16
<33> PWR_LED# 16
17
18 17
1 1
1
EMI@ EMI@ 18
C138 C137 19
G1 20
2 2 G2
Lid Switch (Hall Effect Sensor) CVILU_CF31181D0R4-10-NH
470P_0402_50V8J
470P_0402_50V8J
SP011411241
RB751V-40 SOD-323
+3V_LID
+3VL +3V_LID
1
DH2 R126
4.7K_0402_5% RS51 @EMI@
1 2
2 LM4 0_0201_5% 2
2
12
U4018 EMI@
3 LID_SW#_OUT 1 2 4 4 33 USB20_N3_R
OUT LID_SW# <33> <11> USB20_N3
2 R5197
VDD 1 0_0402_5% 3.3P_0402_50V8J CC152
1 1
8 J
10P_0402_50V
GND 1 2 USB20_P3_R
1 2
C19
8 J
100P_0402_50V
C5228
<11> USB20_P3
1 APX8131AI-TRG SOT-23
SA00009EM00 EMI@
C18 SM070005U00 DLM0NSN900HY2D_4P
2 2 ESD@ RS52 @EMI@
0.1U_0201_10V6K 1 2
2 0_0201_5%
RS53 @EMI@
1 2
0_0201_5%
LM6 EMI@
+3V_LID 4 4 USB20_N4_R
<11> USB20_N4 33
3.3P_0402_50V8J CC154
+3VL 1 2 2 USB20_P4_R
2
<11> USB20_P4 1
R13
EMI@
DB@ 470K_0402_5% SM070005U00 DLM0NSN900HY2D_4P
RS54 @EMI@
2
Q32 1 2
G
0_0201_5%
3 1
DB@
S
2N7002K_SOT23-3 +3V_LID
SB00000EN00
+3V_LID
U4019
2
LID_SW#_OUT R125
1 CP VCC 8
3 DB@ 10K_0402_5% 3
2 1 R124
10K_0402_5% 2 D PR# 7
1
DB@ 3 Q# CLR# 6
4 GND Q5
NL17SZ74USG US 8P FLIP-FLOP
SA00003ML00
DB@
2 1
+3VL
DH4
RB751V-40 SOD-323
2 1
<33,48> EC_ON
DH5
RB751V-40 SOD-323
4 4
+3VS
+5VALW
1
+3VALW
10U_0603_6.3V6M
C570
Q21
1 VR_ON <33,52>
14
2 VIN1 VOUT1 13 2
VIN1 VOUT1
6
+5VALW
1 For meet tPLT17 & tCPU28 powerdown sequence. 1
SUSP# 3 12 C557 1 2 680P_0402_50V7K @
ON1 CT1 tPLT17 : 1us (Max)
4 11 tCPU28 : 1us(Max) 2
VBIAS GND Q5002A
5 10 C554 1 2 100P_0402_50V8J L2N7002SDW1T1G2NSC88-6
ON2 CT2
1
<12,33,49> SUSP# SB00001FF00
6 9
VIN2 VOUT2 +5VS +3VALW
7 8
VIN2 VOUT2
1 1 1
10U_0603_6.3V6M
22U_0805_6.3V6M
0.1U_0402_25V6
15 @RF@ @ESD@
C575
CC140
CC163
GPAD
1
EM5209VF_DFN14_3X2 R5096
2 2 2 EC_VCCST_PG_R<9,33>
1 1 1 1 1 SA00007PM00 @ 100K_0402_1%
CC162
CC158
0.1U_0402_25V6
0.1U_0402_25V6
0.1U_0402_25V6
0.1U_0402_25V6
0.1U_0402_25V6
CC16
CC16
CC15
3
2
@ Q5002B
2 2 2 2 2
L2N7002SDW1T1G2N SC88-6
PM_SLP_S3_H 5 SB00001FF00
1
4
@ESD@ @ESD@ @ESD@ @ESD@ @ESD@
6
@
PM_SLP_S3# 2
<9,12,33> PM_SLP_S3# Q5003A
L2N7002SDW1T1G2N SC88-6 SUSP#
1
SB00001FF00
2 2
6
@
1
+5VALW +1.8V_PRIM
+3VALW
1
1
R5092 R5093
100K_0402_1% 22_0603_1%
1
SYSON <12,33,49>
R5095 @
2
3
100K_0402_1%
3
2
Q5004B
Q5001B PM_SLP_S4_H 5 L2N7002SDW1T1G2N SC88-6
PCH_PWR_EN# 5 L2N7002SDW1T1G2NSC88-6 SB00001FF00
3
SB00001FF00
4
@ Q5003B
4
2
L2N7002SDW1T1G2N SC88-6
5 SB00001FF00
<9,12,33,49> PM_SLP_S4#
6
4
Q5001A
2 L2N7002SDW1T1G2N SC88-6
3 <33,51> PCH_PWR_EN SB00001FF00 3
1
4 4
THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENSTiIzAeL Document Number
DC Interface
Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom v0.3
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC. EPK50_LA-G07CP
Date: Friday,January 05, 2018 Sheet 40 of 59
A B C D E
5 4 3 2 1
1000P_0402_50V7K
0.022U_0402_25V7K
44
<33> AC_LED#
1000P_0402_50V7K
100P_0402_50V8J
55 6
1
ADP_SIGNAL
EMI@ PC2
EMI@ PC4
EMI@ PC1
EMI@ PC3
6
1
7 Charge_LED
78
21
21
21
ACIN_LED PR2
8
2
9 100K_0402_5%
10 GND
GND
2
PR3
10K_0402_5% PR4
ADP_SIGNAL1 2 750_0402_1%
ADP_ID <33> 1 2 Charge_LED
<33> BAT_CHG_LED
3
1
LUDZS3.6BT1G_SOD323-2
PR6
1000P_0402_50V7K
100P_0402_50V8J
1
100K_0402_5%
1
10K_0402_5%
PC6
PR5
2
@ PC5
PD3
2
ESD@ PD1 ESD@ PD2
1
2
L30ESD24VC3-2_SOT23-3 L30ESD24VC3-2_SOT23-3
C C
<33,47> ADP_I
+3VALW _EC
1
PR9 PR10
16.2K_0402_1% 5.9K_0402_1%
12
12
PH1
100K_0402_1%_B25/50 4250K PR13
B 10K_0402_1% B
2
ECAGND <33>
2
A A
D D
+3V_LID
@ PR18
0_0402_5% EMI@ PL13
1 2 5A_Z80_0805_2P
1 2 +12.6V_BATT +3V_LID +19VB
OCTEK_BTJ-08KPBR4B
10 +12.6V_BATT+
GND 9
EMI@ PL14
GND 8 5A_Z80_0805_2P
87 1 2
76 EC_SMB_CK1_R
100P_0402_50V8J
0.01U_0402_50V7K
65
1
PC9
EC_SMB_DA1_R
1.8K+-1%0805
@EMI@ PC10
54 +3V_LID_R PR20
EMI@ PC8 @EMI@
43 B/I#_R
EMI@
1000P_0402_50V7K PC11 470K_0402_5%
32
21
21
21
21
100P_0402_50V8J
PR19
21
1
2
2
@ PJPB1
6
PR14
100_0402_5%
1 2
C EC_SMB_CK1 <33,47> 2 PQ2A C
PR15 L2N7002SDW1T1G2NSC88-6
100_0402_5%
3
1 2
EC_SMB_DA1 <33,47>
1
+3VL
1
5
1M_0402_5%
+3VL
PR21
1
PR16 PQ2B
4
100K_0402_5% L2N7002SDW1T1G2N SC88-6 @
PR17
2
100_0402_5%
1 2 2
B/I# <33>
B B
A A
1
+19VB
2
G @ PQB2
2N7002KW_SOT323-3
CHG_N002
S
3
PRB2 @ @ PRB3
1
1M_0402_5% 3M_0402_5% 1
1 2 1 2
+19V_VIN +19VB_CHG
PQB11 P1 PQB12 P2
AON7506_DFN33-8-5 PRB1 PQB13
EMB04N03H_EDFN5X6-8-5 1 EMI@ PLB11 AON7506_DFN33-8-5
0.01_1206_1%
1 2 1UH_2.8A_30%_4X4X2_F
2 3 5 1 4 1 2 1
5 3 2
2 3 5 3
PCB25
10U_0805_25V6
K
0.1U_0402_25V
21
2200P_0402_50V7
2200P_0402_50V7
+19V_VIN
PCB7
10U_0805_25V6K
10U_0805_25V6K
@ PCB6
@EMI@ PCB8
0.01U_0402_50V7
PCB4
PCB5
4
4
21
21
21
PCB9
21
21
21
3
2
6
PDB1
K
K
ACDRV_CHG_R BAS40CW_SOT323-3
K
BATDRV_CHG 1 2 BATDRV_CHG_R
0.1U_0402_25V
0.1U_0402_25V
PRB5
PCB1
PCB11
12
11
CHG_N003 PCB12 4.12K_0603_1%
2 1
21
0.047U_0402_25V7K PQB1
PCB10
PRB6 10_1206_1%
1 2 CHG_N001 AONH36334_DFN3X3A8-10
10
0.1U_0402_25V6
1
1
4
D1
2.2_0603_5%
PDB2 5 S2 D1
PRB7
2
RB751V-40_SOD323-2 3
2 6 S2 D1 2
VCC_CHG
2
7 S2 D1
2
+12.6V_BATT
D2/S1
1 UG_CHG
G1
REGN_CHG
1
1
PCB13 8 G2
BTST_CHG
4.12K_0603_1
4.12K_0603_1
PRB9
PRB10
1 2 PLB1 PRB11
UG_CHG
LX_CHG
9
4.7UH_5.5A_20%_7X7X3_M 0.01_1206_1%
1U_0603_25V6K 1 2
ACP_CHG
ACN_CHG
LX_CHG 1 2 CHG 1 4
2
2
PCB14
1U_0603_25V6K 2 3
18
20
17
19
16
1
VCC
BTST
REGN
HIDRV
PHASE
10U_0805_25V6K
10U_0805_25V6K
21
EMI@PRB12
4.7_1206_5%
PAD
1 SRN_R
1 SRP_R
0.1U_0402_25V
0.1U_0402_25V
PCB15
PCB16
1
1
1 15 LG_CHG
ACN LODRV
PCB17
PCB18
2
1 SNUB_CHG 2
2 14
ACP GND
PRB13
2
2
10_0603_1%
6
CMSRC_CHG 3 13 SRP1 2 SRP_R
CMSRC SRP
1
PUB1 PRB14
BQ24725ARGRR_QFN20_3P5X3P5 6.8_0603_1% PCB20
ACDRV_CHG 4 12 SRN1 2 SRN_R .1U_0402_16V7K
ACDRV SRN
680P_0402_50V7
EMI@ PCB19
2
1 2 5 11 BATDRV_CHG
+3VL ACOK BATDRV
PRB15
ACDET
100K_0402_1%
IOUT
SDA
SCL
ILIM
K
3 3
<33> VCIN1_ACOK
6
9
7
10
+3VL
ILIM_CHG 1 2
IOUT_CHG
ACDET_CHG
SDA_CHG
SCL_CHG
PRB16
100K_0402_1
453K_0402_1%
PRB20
1
PRB17
422K_0402_1% PCB21
1 2 0.01U_0402_50V7K
+19V_VIN
2
%
2
02_5% PRB19
0_0402_5% PRB18
1
1
2
2
@ 0_04
EC_SMB_CK1 <33,46>
@
0.22U_0402_16V7
100P_0402_50V
PCB23
PRB21
66.5K_0402_1
PCB22
EC_SMB_DA1 <33,46>
21
2 1
@ PRB22
2
0_0402_5%
8 J
%
K
1 2
ADP_I <33,45>
1
PCB24
4 4
0.1U_0402_25V6
Vin Dectector
2
2200P_0402_50V7
0.1U_0402_25V
@EMI@ PC303
6
2 1
10U_0805_25V6
EMI@ PC304
1
PC305
2 1
2 1
PL302
BS
IN
IN
IN
IN
1.5UH_6A_20%_5X5X3_M
LX_3V6 20 LX_3V 1 2
D LX LX +3VALWP D
K
7 19
GND LX
680P_0402_50V7K 4.7_1206_5%
+3VALW
1
1
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
8 18
@EMI@
GND GND
PR30
PC306
PC307
PC308
PC309
2 1
2 1
21
9 17
3
PG LDO +3VLP
2
1
2N
10 16
13V_S
NC NC PC310
OUT
EN2
EN1
21
PR304 21 4.7U_0603_6.3V6M
NC
FF
100K_0402_5% GND
@EMI@
3.3V LDO 150mA~300mA
11
12
13
14
15
PC311
2
<9> SPOK
ENLDO_3V5V PC312 PR305 Fsw : 600K Hz
1000P_0402_50V7K 1K_0402_1%
5V_3V_EN 3V_FB 1 2 3V_FB_1 1 2
@ PJ302
112 2
+3VALW P +3VALW
JUMP_43X118
@ PJ303
JUMP_43X39
1 1 2
2 Cell battery : Cin=10uF*2pcs +3VLP 2 +3VL
C C
3 Cell ~ 4 Cell battery : Cin=10uF*1pcs
+19VB EMI@ PL303 +19VB_5V @ PR306 PC313
5A_Z80_0805_2P 0_0402_5% 0.1U_0201_10V6K
1 2 +19VB_5V BST _5V1 2 BST_5V_R 1 2
PU302
1
SY8288CRAC_QFN20_3X3
BS
IN
IN
IN
IN
PL301
LX_5V 6 20 2.2UH_7.8A_20%_7X7X3_M
0.1U_0402_25V6
LX LX
2200P_0402_50V7
10U_0805_25V6
7 19 LX_5V 1 2 +5VALWP
GND LX
PC314
EMI@ PC316
@EMI@ PC317
8 18
GND GND PC318
2 1
2 1
2 1
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
9 17 VCC_5V 1 2
PG VCC
K
1
1SPOK_5V
PC322
PC301
PC323
PC319
PC328
PR308
4.7_1206_5%
K
2 1
2 1
2 1
2 1
21
PR307 10 16
@EMI@
499K_0402_1% NC NC 2.2U_0402_6.3V6M
OUT
LDO
EN2
EN1
1 2 ENLDO_3V5V 21
+19VB
FF
GND
2
1
@ PR310
12
13
15
14
11
5V_SN
PR309 0_0402_5%
499K_0402_1%
2
SPOK
+5VL
680P_0402_50V7K
1
5V LDO 150mA~300mA
PC324
@EMI@
2
ENLDO_3V5V
4.7U_0603_6.3V6
2
B B
PC325
PR301
Fsw : 600K Hz
21
2.2K_0402_5% 5V_3V_EN
1 2
<33,39> EC_ON @ PR311
0_0402_5% M
1 2
<33> MAINPWON PC326 PR312
1000P_0402_50V7K 1K_0402_1%
5V_FB 1 2 5V_FB_1 1 2
5V_3V_EN
@PJ305
1 2
+5VALW P 12 +5VALW
1
1M_0402_1
4.7U_0402_6.3V6
JUMP_43X118
PC327
PR313
21
%
2
A A
D D
EMI@ PLM2
5A_Z80_0805_2P
1 2 +19VB_DDR PRM1
+19VB 2.2_0603_5%
BST_DDR_R 1 2 BST_DDR
+1.2VP
10U_0805_25V6K
2200P_0402_50V7K
PCM2
@EMI@ PCM1
+0.6VSP
21
PCM4 UG_DDR
21
0.1U_0603_25V7K
21
LX_DDR
10U_0603_6.3V6M
10U_0603_6.3V6M
PCM5
PCM6
PUM1
17
18
19
16
20
G5616BRZ1U_TQFN20_3X3
21
21
LX
DH
BST
VTT
VLDOIN
PAD 21
LG_DDR 15 DL
VTTGND 1
1
4
2
14 PGND VTTSNS 2
D1
D1
D1
G1
PLM1 PRM2
1UH_11A_20%_7X7X3_M 11.5K_0402_1%
1 2LX_DDR 10 D1 1 2 CS_DDR 13 CS
D2/S1 9 GND 3
+1.2VP PCM7
1
1U_0402_6.3V6K
1 2 VTTREF_DDR
12 VPP VTTREF 4
G2
S2
S2
S2
@EMI@ PRM3 PRM4
4.7_1206_5% 5.1_0603_5%
5
8
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
VDDQSET
SNB_DDR +5VALW +1.2VP
PCM8
PCM9
PCM10
PCM11
PCM12
PCM13
PGOOD
PCM15
2 1
2 1
2 1
2 1
2 1
21
VDDP_DDR
2 1
21 2
TON
@EMI@ PCM14 0.033U_0402_16V7K
S5
S3
C 680P_0402_50V7K PCM16 C
2 1
1U_0402_6.3V6K
6
8
7
9
10
PQM1
AONH36334_DFN3X3A8-10 PRM5
5.1_0603_5%
FB_DDR
1 2 PRM6
TON_DDR
6.04K_0402_1%
+1.2VP
S5_DDR
S3_DDR
@ PW ROK_DDR PRM7 1 2
PTPM1 470K_0402_1%
@ PJM2 +19VB_DDR 1 2
JUMP_43X118
1
+1.2VP 112 2 +1.2V_VDDQ @ PRM8
0_0402_5%
PG_+2.5V 1 2 PRM9
10K_0402_1%
1 2
@ PJM3 <12,33,40> SYSON @PRM10
2
0.1U_0402_10V7K
JUMP_43X39 0_0402_5%
1 1 2
PCM17
+0.6VSP 2 +0.6V_0.6VS
2 1
@ Vout=0.75* (1+PRM6/PRM9)=1.2V
@ PRM11
0_0402_5%
1 2
<12,33,40> SUSP#
@ PRM12
0_0402_5%
1 2
<6> SM_PG_CTRL
@ PCM18
2 1
0.1U_0402_10V7K
B B
@ PJ2502
JUMP_43X39
PC2501 1122
22U_0603_6.3V6M +2.5VP +2.5V
12
PU2501
@ PJ2501 PL2501
JUMP_43X39 1UH_MHCD252012A-1R0M-A8S_3A_20%
+3VALW 1 1 2 IN_2.5V 4 3 LX_2.5V 1 2
2 VIN LX +2.5VP
2016.12.27 @ PR2501 1 2 5 PG GND 2
+3VALW
68P_0402_50V8J
0_0402_5%
1 2 PR2504 6 1
PC2504
22U_0603_6.3V6M
22U_0603_6.3V6M
100K_0402_5%
PC2505
PC2506
1
21
SNB_2.5V
PC2502
PR2503 FB_2.5V
1M_0402_1%
21
@
2
A A
@EMI@ PC2503
2 1
680P_0402_50V7K PRM2507
10K_0402_1% Vout=0.6V *(1+PR2506/PR2507)=2.544V
Imax= 2A, Ipeak= 3A
2
THI S S HE E T O F ENG I NE E R I NG DRAW IIING I S T HE P R O P RI E TAR Y P R O P E R T Y O F C O MP AL ELECTRONIIICS, INC... A ND CO NTAI NS CONFIDENTSIiAzLe DocumentttNumber
1.2VP/0.6VSP/2.5V
A ND T R A D E S E C R E T INFORMATI ON. .. THI S S H E E T M A Y NO T BE T R A NS F E R E D F R O M T HE CUS TO D Y OF T HE C O M P E T E NT DIIIVISION OF R &D Rev
DE P AR TME NT E X C E P T A S AUTHO R I Z E D BY C O MP AL ELECTRONICS,,, I NC . NEIITHER THI S S H E E T N O R T HE I NF O R MAT I O N I T C O NTAI NS Custom v0.3
M A Y BE US E D BY OR DI S C L O SE D TO A N Y THI R D P A R T Y W I T H O U T P RI O R W R I TTE N C O NS E NT OF C O MP AL E L E CTR O NI C S , IIINC.
Date::: Friday,,, January 05 , 2 0 1 8 Sheettt 49 of 59
5 4 3 2 1
A B C D
+1.0V_PRIMP +1.0V_PRIM
@ PJ1002
1 JUMP_43X118 1
1 2
1 2
<33> +1.0VS_PG
@EMI@ @EMI@
PR1007 PC1009
PR1005
100K_0402_1% +3VALW 1 2SNB_1V 1 2
EMI@ PL1002 2 1
PU1001
5A_Z80_0805_2P
4.7_1206_5% 680P_0402_50V7K
1 2 +19VB_1V 2 9 @ PR1006 PC1007
+19VB IN PG 0_0402_5% 0.1U_0402_25V6
1 BST_1V 1 2 BST_1V_R 1 2 PL1001
3 IN BS
2200P_0402_50V7K
10U_0805_25V6
1UH_6.6A_20%_5X5X3_M
0.1U_0402_25V
6 @EMI@ PC1004
K PC1001
1
6 LX_1V 1 2
1
+1.0V_PRIMP
EMI@ PC1003
4 IN LX
19
LX
2
5 IN
330P_0402_50V7
2
PR1008
22U_0603_6.3V6
22U_0603_6.3V6
22U_0603_6.3V6
22U_0603_6.3V6
20 20K_0402_1%
PC1011
PC1012
PC1013
PC1010
7 LX
GND
VGA@ PC1014
2 1
FB_1V
21
21
21
21
8 14
GND FB
1
2
PR1001 18 17 VCC_1V 2
GND VCC
K
0_0402_5%
M
1
1 2 EN_1V 11 10
<51> +1.8V_PG EN NC
PC1008
2.2U_0402_6.3V6M
21
ILMT_1V 13 12
ILMT NC
1
1K_0402_1
0.1U_0402_25V7
15 16
PR1010
1M_0402_1
PR1002
+3VALW BYP NC
2
PC1005
FB=0.6V
2 1
21
K @
+3VALW PAD
%
2
%
1
SY8286RAC_QFN20_3X3
1
1
PC1006 PR1009
@ PR1003 1U_0402_6.3V6K 30K_0402_1%
2
0_0402_5%
N :H>0.8V ; L<0.4V
2
2
3 3
2
4 4
D D
PC1801
22U_0603_6.3V6M
@PJ1802
12 1 2
+1.8VSP 1 2 +1.8V_PRIM
JUMP_43X79
PU1801
@PJ1801 PL1801
+3VALW JUMP_43X39 1UH_MHCD252012A-1R0M-A8S_3A_20%
11 2 IN_1.8V 4 LX_1.8V 1 2
2 VIN LX 3 +1.8VSP
1 2 5 PG
+3V_PRIM GND 2
C C
PR1801 6 1
68P_0402_50V8
VFB EN
22U_0603_6.3V6
22U_0603_6.3V6
PC1803
PC1804
PC1802
<50> +1.8V_PG 100K_0402_5%
1
@EMI@ PR1803
G5719CTB1U_SOT23-6
21
21
21
PR1802 20K_0402_1%
4.7_0603_5%
1 2 EN_1.8V
<33,40> PCH_PWR_EN
2
2
M
@PR1804
SNUB_1.8V
.1U_0402_16V7K
1
0_0402_5% 2016.11.23
PR1805
@PC180
1M_0402_1
FB_1.8V
21
5
1
@EMI@
%
2
PC1806
680P_0402_50V7K PR1806
2
10K_0402_1%
Vout=0.6V*(1+PR1803/PR1806)=1.8V
2
Imax= 2A, Ipeak= 3A
B B
A A
Date: Sheet 51 of 59
5 4 3 2 1
1 2 3 4 5
A A
RT3602_VREF Vref=0.6V
PCZ3
0.1U_0402_50V7K
953_0402_
1
6.8K_0402_
11K_0402_1% 1.78K_0402_1%
1
1
PRZ2
PRZ3
2
PRZ
%
1
AISPVCCSA <53>
<53> AVCCSA
1
@ PCZ4
2
0.47U_0402_25V6K
4 10_0402_1%
12
1 2
+VCC_SA
1
V6K
PRZ1 PRZ8 PRZ10
VSSSA_SENSE
RT3602_VREF
<14>
0.47U_040P2C_Z62.32<1
PRZ6
VSSCORE_SENSE
2 1 2
PRZ5
1 2 VCCSA_SENSE_R 1 2 1 2 1
21
PRZ13 PRZ14
2
PRZ15
2
12 12
%2
<12> VCCSA_SENSE
RT3602_SET3 PCZ5 390P_0402_50V7K PCZ6 68P_0402_50V8J
2>
100_0402_1
8
VR_PSYS 0_0402_5%
+3VS
RT3602_VREF 3.9_0402_1%
PRZ23
PRZ24
1
1
10K_0402_5%
PRZ22 100_0402_1%
close to chock
10K_0402_1
1
% PRZ94
PRZ20
2 0_0402_5%
PRZ19
464_0402_
1
5.23K_0402_
1 2
1.1K_0402_
1 PRZ18
FB_SA
PRZ17
VR_PWRGD <33>
2
@ PHZ1 PRZ26
% 2
2
2
1
2
1
1
%
100K_0402_1%_B25/50 4250K
%
42.2K_0402_1%
PRZ21
PRZ95 PRZ25
1
2
1
2
@ PCZ7 1 2 PHZ1_R 1
1
2 0_0402_5% 0_0402_5%
0.1U_0402_10V6K RT3602_VREF 1 2 VR_ON <33,40>
2
+1.0V_VCCST
2
1
2.211K_0402_1
RT3602_EN
IMON_SA
PRZ30
PRZ29
536_0402_
10_0402_
2.1K_0402_
1 PRZ31
1 2 IMON_CORE_R 1 2
PRZ28
B PRZ33 RGND_MAIN B
VSEN_CO
VR_PSYS
%
38.3K_0402_1% PRZ35
RGND_S
COMP_S
5
14.7K_0402_1%
2
2
2
% 2
%
FB_SA
1
0.1U_0402_25V
PCZ22
1
R E
1
@ PCZ9
100_0402_
75_0402_
45.3_0402_
0.1U_0402_10V6K PUZ1
21
PRZ36
PR1Z39
12
PRZ38
49
48
47
46
45
44
43
42
41
40
39
38
37
RT3602AEGQW_WQFN48_6X6
%
2
2
2
1
1
1
%
PRZ43 PRZ45
1
%
GND
RGND_MAI
ISENN_SA
I
VSEN_MA
PS
RGND_SA
COMP_SA
ISENP_SA
IMON_SA
VR_READY
Y S FB_SA
VREF06/PS
N
EN
1
E T
6
10K_0402_1% 52.3K_0402_1% VR_SVID_CLK <14>
1 2 1 2 VR_ALERT# <14>
+VCC_CORE PRZ41 VR_SVID_DATA <14>
100_0402_1% PCZ1282P_0402_50V8J IMON_COR1E 36 PWM_SA <53>
1 2 VSEN_CORE 12 12 RT3602_SET12 IMON_MAIN PWM_SA 35
DRVEN <53>
VR_HOT# <33>
PRZ47 FB_CORE 3 SET1 DRVEN 34 1 2
0_0402_5% 270P_0402_50V7K COMP_CORE4 FB_MAIN VCLK 33 PRZ98 49.9_0402_1% RT3602_VREF
<53> AVCORE1 PCZ13 ALERT# 32
<14> VCCCORE_SENSE 1 2 PCZ11 0.1U_0402_50V7K RT3602_SET2 5 COMP_MAIN PRZ991 210_0402_1% PRZ48
12 RT3602_SET3 6 SET2 VDIO 31 PR1Z100 100_20402_1% 28.7K_0402_1% PRZ49 866_0402_1%
U42@ PRZ106 Ra 7SET3 VR_HOT# 30 IMON_GT 1 2 1 2
12 1 2 ISEN1N_MAIN 8 ISEN1N_MAIN IMON_AUXI 29 @PCZ15 0.47U_0402_25V6K
U42@ 0_0402_5% 9 ISEN2N_MAIN ISENP_AUXI 28
1 2
PCZ16 0.1U_0402_50V7K 10 ISEN2P_MAIN ISENN_AUXI 27 VSEN_GT
<53> AVCORE2 TSEN_CORE 11 ISEN1P_MAIN
Ra Rb/Rc VSEN_AUXI 26 COMP_GT AISP1 <53> PRZ50
1
Rb 2
RT3602_V1IN2 TSEN_MAIN
VIN
COMP_AUXI 25
RGND_AUXI AVGT1 <53> 0_0201_5%
+5VALW
PWM_AUXI
12
PW M1_MA
PW M2_MA
U22@ PRZ105 10K_0402_1% VSEN_GT 1 2
DRVEN_S
TSEN_AU
VCCGT_SENSE <14>
U22 N/A Stuff PCZ18
FB_AUXI
0.22U_0402_25V
2.2_0805_
<53> AISPCORE2 PRZ59
0.1U_0402_50V7K PRZ54 PRZ56
PRZ53
Rc +VCC_GT
T NC
X I
100_0402_1%
I N
I N
121
29.4K_0402_1% 10K_0402_1%
PCZ19
1 2
C
C
N
C
N
C
N
C
N
C
V
E
1 2 1 2 1 2
U42 Stuff N/A +5VALW U22@ PRZ104 10K_0402_1%
2
%
1
PRZ107
19
20
21
16
17
22
14
15
DRVEN_SET 18
TSEN_GT 23
13
<53> AISPCORE1
A K
FB_GT 24
2 1 RGND_AUXI
1 2 12 12
RT3602_VREF PRZ51 PRZ52
RT3602_VCC
1
110K_0402_1% 1.65K_0402_1% 0_0402_5% PCZ20 82P_0402_50V8J PCZ21 270P_0402_50V7K
TSEN_CORE_R 1 2 1 2 +19VB_CPU PCZ230
1U_0603_25V6K
PHZ2
PRZ93
C C
1 2 0_0201_5%
2
1
FB_GT
1
115_0402_1% 8.25K_0402_1%
100K_0402_1%_B25/50 4250K
PRZ6
<53>
<53>
<53>
PWM_GT
PRZ63
PW M_COR
PW M_COR
+5VALW PRZ65 VSSGT_SENSE <14>
10_0402_1%
12
4 374_0402_1%
8.25K_0402_1%
1 2
1 2
E 1
E 2
PRZ68
PRZ67
1
PCZ23
2
21
TSEN_CORE_R 4.7U_0603_10V6K PRZ66
TSEN_GT_R 110K_0402_1%
1
100K_0402_1%_B25/50
PRZ71
549K_0402_
182K_0402_
+5VALW
12
PRZ70
2
PHZ3
PRZ69
2
1
2
1
1.65K_0402_1%
%
1
1
@ PRZ72
4250K
1
0_0402_5%
11.5K_0402_
PRZ74
4.02K_0402_
TSEN_GT_R 2
PRZ73
DRVEN_SET
%
1
1
2
2
12
%
1
PRZ75
0_0402_5%
D D
2
+19VB_CPU
EMI@ PLZ3
5A_Z80_0805_2P +19VB
1 2 +19VB_CPU
PRZ76
2200P_0402_50V7K
10U_0805_25V6K
10U_0805_25V6K
100U_25V_NC_6.3X6
100U_25V_NC_6.3X6
2.2_0603_5%
PCZ31
PCZ32
1 1
0.1U_0402_25V6
@EMI@ PCZ29
EMI@ PCZ30
CORE1_BST 1 2 CORE1_BST_R
+ +
5
U22@ PCZ26 U42@ PRZ77
PCZ229
10U_0603_25V6M
10U_0603_25V6M
2200P_0402_50V7K
2 1
PQZ1 68U_25V_M_R0.36 2.2_0603_5%
U42@ PCZ26
EMIU42@ PCZ36
EMIU42@ PCZ33
0.1U_0402_25V6
21
PCZ28
2 1
21
CORE2_BST 1 2 CORE2_BST_R
U42@ PCZ37
U42@ PCZ34
PUZ2 2 2
5
21
0.1U_0402_25V6
AON6380_DFN5X6-8-5
1
U42@
2 1
21
21
4 BOOT UGATE 3 CORE1_UG 1 2 CORE1_UG_R 4 PUZ3 U42@ PCZ35
2
21
PRZ78 0.1U_0402_25V6
5 PW M PHASE 2 CORE1_LX 0_0603_5%
<52> PWM_CORE1 4 BOOT UGATE 3 CORE2_UG 1 2 CORE2_UG_R 4
+5VALW
<52> DRVEN
1
EN PGND
6 Rdc=1.19 mohm U42@ PRZ79 U42@
3
2
1
+VCC_CORE 5 2 CORE2_LX 0_0603_5% PQZ3
PLZ1 <52> PWM_CORE2 PW M PHASE
1 PRZ802 VCC_CORE1 8 7 AON6380_DFN5X6-8-5
VCC LGATE 9
GND
1 4 +5VALW DRVEN1
EN PGND
6 Rdc=1.19 mohm
3
2
1
1_0402_5% +VCC_CORE
2 3 1 2 VCC_CORE2 8 7 U42@ PLZ2
A RT9610CGQW_WDFN8_2X2 PQZ2 VCC LGATE 9 1 4 A
4.7_1206_5%
@EMI@PRZ82
5
PCZ40 U42@ PRZ81 GND
0.24UH_22A_+-20%_ 7X7X3_M
21
2.2U_0402_16V6K 1_0402_5% 2 3
RT9610CGQW_WDFN8_2X2
AISPCORE1_R
U42@
AON6314_N_DFN56-8-5
4.7_1206_5%
@EMIU42@ PRZ84
5
PCZ41 0.24UH_22A_+-20%_ 7X7X3_M
21
AISPCORE2_R
2.2U_0402_16V6K
CORE1_LG 4 PCZ42
0.1U_0402_25V6
2 1CORE1_SNUB 2 1
1212 12
CORE2_LG 4 U42@ PRZ87 U42@ PRZ103 U42@ PCZ43
PRZ85 PRZ102 2.1K_0603_1% 2.1K_0603_1% 0.1U_0402_25V6
2 1CORE2_SNUB 2 1
3
2
1
2.1K_0603_1% 2.1K_0603_1% PRZ88 1 2 1 2 12
4.22K_0402_1% U42@
@EMI@PCZ44
1 2 PQZ4 U42@ PRZ90
680P_0402_50V7K
3
2
1
AON6314_N_DFN56-8-5 4.22K_0402_1%
1 2
@EMIU42@ PCZ45
680P_0402_50V7K
AVCORE1 <52>
AVCORE2 <52>
AISPCORE1 <52>
AISPCORE2 <52>
+19VB_CPU
VCC_CORE VCC_GT VCC_SA
FSW=500kHz FSW=500kHz FSW=600kHz
Choke=0.24uH Choke=0.24uH DCR=6.2 mohm +/- 5%
PRG2
DCR=1.19 mohm +/- 5% DCR=1.19 mohm +/- 5%
PCG5
PCG6
PCG10
PCG11
0.1U_0402_25V6
10U_0805_25V6K
10U_0805_25V6K
10U_0805_25V6K
2200P_0402_50V7K
10U_0805_25V6K
2.2_0603_5%
EMI@ PCG12
U22
0.1U_0402_25V6
GT_BST 1 2 GT_BST_R
EMI@ PCG3
EMI@ PCG4
5 U22 U22 LL=10.3 mohm
PQG1
LL=2.4 mohm LL=3.1 mohm TDC=4A
2 1
2 1
2 1
2 1
2 1
2 1
PCG2
21
B B
PUG1
21
0.1U_0402_25V6
AON6380_DFN5X6-8-5
TDC=21A TDC=18A ICCMAX=4.5A
GT_UG 1 2 GT_UG_R 4
4 BOOT UGATE 3
PRG3 ICCMAX=32A ICCMAX=31A OCP=9.5A
<52> PWM_GT
5
PW M PHASE
2 GT_LX 2.2_0603_5% OCP=40A OCP=39A
+5VALW DRVEN 1 EN Rdc=1.19 mohm U42
PGND 6
3
2
1
1 PRG1 2 VCC_GT 8 7
PLG1
+VCC_GT
U42 U42 LL=10.3 mohm
VCC LGATE 9
GND
1 4 LL=2.4 mohm LL=3.1 mohm TDC=
1_0402_5%
RT9610CGQW_WDFN8_2X2
2 3 TDC=42A TDC=12A ICCMAX=5A
PQG2
ICCMAX=64A ICCMAX=28A OCP=9.5A
4.7_1206_5%
EMI@ PRG4
5
PCG1
1
0.24UH_22A_20%_7X7X3_M
OCP=70A OCP=39A
21
2.2U_0402_16V6K
AON6314_N_DFN56-8-5
AISP1_R
2
PRG7 PRG8
3
2
1
2 1GT_SNUB
3K_0402_1% 10K_0402_1%
1 2 1 2
AVGT1_R
330P_0402_50V7K
EMI@ PCG9
1 2
PHG1
10K_0402_1%_B25/503370K
AVGT1 <52>
AISP1 <52>
C C
+19VB_CPU
10U_0805_25V6K
10U_0805_25V6K
2200P_0402_50V7K
PRA2
0.1U_0402_25V6
@EMI@ PCA6
2.2_0603_5%
EMI@ PCA2
SA_BST 1 2 SA_BST_R
PCA4
PCA5
2 1
2 1
2 1
2 1
PCA3
PUA1
21
0.1U_0402_25V6
5 PW M PHASE 2 SA_LX
<52> PWM_SA Rdc=6.2 mohm
1
D1
D1
G1
EN PGND +VCC_SA
AONH36334_DFN3X3A8-10
1 2 VCC_SA 8 VCC LGATE 7 1 4
GND 9 9 D2/S1 D1 10
PRA1 1_0402_5% 2 3
RT9610CGQW_WDFN8_2X2
G2
4.7_1206_5%
@EMI@ PRA4
0.47UH_NA 12.2A_20%
S
PCA1
2
2
S
S
2
21
2.2U_0402_16V6K
7
5
8
AISPVCCSA_R
SA_LG
PCA7
0.1U_0402_25V6
1 212 12
2 1 SA_SNUB 2 1
1 2
PHA1
1K_0402_5%_TSM0B102J3652RE
AVCCSA <52>
D D
AISPVCCSA <52>
2
1
2
1
2
1
PCZ210 PCZ200 PCZ187 PCZ167 PCZ147 PCZ100 PCZ78
1U_0201_6.3V6 1U_0201_6.3V6 1U_0201_6.3V6 1U_0201_6.3V6 22U_0603_6.3V6 22U_0603_6.3V6 22U_0603_6.3V6
M M M M M M M
2
1
2
1
2
1
2 1 2 1 2 1 2 1
PCZ148 PCZ101 @ PCZ79
2
1
+
5
5
2
1
2
1
2
1
M M M M 6
PCZ150 PCZ102 @ PCZ80
2
1
2 1 2 1 2 1 2 1
+
2
1
2
1
2
1
1U_0201_6.3V6 1U_0201_6.3V6 1U_0201_6.3V6 1U_0201_6.3V6
M PCZ213 M PCZ203 M PCZ190 M PCZ170 PCZ154 PCZ103 PCZ81
1U_0201_6.3V6
2 1 1U_0201_6.3V6
2 1 1U_0201_6.3V6
2 1 1U_0201_6.3V6
2 1 22U_0603_6.3V6 22U_0603_6.3V6 22U_0603_6.3V6
M M M M M M M
2
1
2
1
2
1
2 1 2 1 2 1 2 1
PCZ214 PCZ204 PCZ191 PCZ171 PCZ155 PCZ104 PCZ82
1U_0201_6.3V6 1U_0201_6.3V6 1U_0201_6.3V6 1U_0201_6.3V6 22U_0603_6.3V6 22U_0603_6.3V6 22U_0603_6.3V6
2016.12.29
M M M M M M M
2
1
2
1
2 1 2 1 2 1
PCZ205 PCZ192 PCZ172 PCZ127 PCZ83
1U_0201_6.3V6 1U_0402_6.3V6 1U_0201_6.3V6 22U_0603_6.3V6 22U_0603_6.3V6
M K M M M
2
1
2
1
2016.11.21
2 1 21 2 1
PCZ206 PCZ193 PCZ173 PCZ129 PCZ84
1U_0201_6.3V6 1U_0201_6.3V6 1U_0201_6.3V6 22U_0603_6.3V6 22U_0603_6.3V6
M M M M M
2
1
U42
U22
21 21 21
@ PCZ97
PCZ207 PCZ194 PCZ174 22U_0603_6.3V6
2016.11.21
1uF*35
1uF*35
390uF*2
2
1
K M M
2 1 2 1 2 1 @ PCZ98
22U_0603_6.3V6
VCC_CORE:
2016.11.21
2 1 2 1 2 1
M
PCZ209 PCZ196 PCZ176
4
4
21 21
2
1
2
1
2
1
2
1
2
1
+
2 1 2 1
PCZ198 PCZ178 PCZ158 PCZ132 PCZ110 PCZ71
1U_0201_6.3V6 1U_0201_6.3V6 22U_0603_6.3V6 22U_0603_6.3V6 22U_0603_6.3V6 22U_0603_6.3V6
2016.11.21
M M M M M M
2
1
2
1
2
1
2
1
2 1 2 1
PCZ199 PCZ179 PCZ159 PCZ134 PCZ111 PCZ72
1U_0201_6.3V6 1U_0201_6.3V6 22U_0603_6.3V6 22U_0603_6.3V6 22U_0603_6.3V6 22U_0603_6.3V6
M M M M M M
2
1
2
1
2
1
2
1
2 1
PCZ180 PCZ160 PCZ135 PCZ112 PCZ73
1U_0201_6.3V6 22U_0603_6.3V6 22U_0603_6.3V6 22U_0603_6.3V6 22U_0603_6.3V6
M M M M M
1uF*13
2
1
1
2
1
2
1
2 1
22uF*33
390uF*1
BOM option
U22 & U42
M M M M M
2
1
2
1
2
1
2
1
2
1
2016.11.10
2 1
PCZ130 U42@ PCZ162 PCZ137 PCZ114 PCZ75
Issued Date
22U_0603_6.3V6 PCZ182 22U_0603_6.3V6 22U_0603_6.3V6 22U_0603_6.3V6 22U_0603_6.3V6
M 1U_0201_6.3V6 M M M M
+VCC_GT_VR
2
1
2
1
1
3
3
SecurityClassification
PCZ163 PCZ115 PCZ76
2@
2 1
@
2
1
22U_0603_6.3V6 22U_0603_6.3V6 22U_0603_6.3V6
PCZ133 PCZ183 M M M
2
1
2
1
2
1
22U_0603_6.3V6 1U_0201_6.3V6
M M PCZ184 PCZ164 PCZ116 PCZ77
1U_0201_6.3V6
2 1 22U_0603_6.3V6 22U_0603_6.3V6 22U_0603_6.3V6
M M M M
2
1
2
1
2
1
2 1
PCZ185 PCZ165 PCZ117 PCZ85
1U_0201_6.3V6 22U_0603_6.3V6 22U_0603_6.3V6 22U_0603_6.3V6
by JU22(for GT) and JU42A (for IA)
M M M M
2
1
2
1
2 1
2016/09/01
PCZ186 PCZ166 PCZ86
1U_0201_6.3V6 22U_0603_6.3V6 22U_0603_6.3V6
M M M
U42@
2
1
U42@ PCZ149
22U_0603_6.3V6
M
+VCC_GTX_VR
DecipheredDate
U42@ PCZ152
2016.11.21
+VCC_SA
22U_0603_6.3V6
M 21
2
1
PCZ140 PCZ87
1U_0402_6.3V6 22U_0603_6.3V6
2
2
K M
2
1
2 1
PCZ141 PCZ88
1uF*7
22uF*9
1U_0201_6.3V6 22U_0603_6.3V6
M M
VCC_SA:
2
1
2 1
U22 & U42
BE USED BY OR DISCLOSED T O ANY T HIRD PART Y W IT HOUT PRIOR W RIT T EN CONSENT OF COMPAL ELECT RONICS, INC. PCZ142 PCZ89
2019/09/01
1U_0201_6.3V6 22U_0603_6.3V6
M M
2
1
2 1
PCZ143 PCZ90
1U_0201_6.3V6 22U_0603_6.3V6
M M
2
1
2 1
DEPART MENT EXCEPT AS AUT HORIZED BY COMPAL ELECT RONICS, INC. NEITHER THIS SHEET NOR T HE INFORMAT ION IT CONTAINS MAY
AND T RADE SECRET INFORMAT ION. THIS SHEET MAY NOT BE T RANSFERED FROM T HE CUST ODY OF T HE COMPET ENT DIVISION OF R& D
PCZ144 PCZ91
1U_0201_6.3V6 22U_0603_6.3V6
M M
Date:
Title
2
1
2 1
PCZ119
PCZ145 22U_0603_6.3V6
1U_0201_6.3V6 M
2
1
M
THIS SHEET OF ENGINEERING DRAW ING IS T HE PROPRIET ARY PROPERT Y OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTSSIAizLe Document Number
2 1 PCZ93
22U_0603_6.3V6
PCZ146 M
2
1
1U_0201_6.3V6
M PCZ94
22U_0603_6.3V6
M
Friday, January 05, 2018
2
1
EPK50_LA-G07CP
PCZ96
22U_0603_6.3V6
M
2
1
1
1
PCZ95
@
PROCESSOR DECOUPLING
22U_0603_6.3V6
M
Sheet
Compal Electronics, Inc.
of 54
59
Rev
v0.3
A
B
C
D