Week 3

Testability Measures
Ganesh C. Patil
History
 During early years, design and test were separate
 The final quality of the test was determined by keeping
track of the number of defective parts shipped to the

customer
 Defective parts per million (PPM) shipped was a final
test score.
 This approach worked well for small-scale integrated
circuit
 During 1980s, fault simulation was used
 Failed to improve the circuit’s fault coverage beyond
80%
 Increased test cost and decreased test quality lead to
DFT engineering
Monday, August 29, 2022

2
Cont…..
 Various testability measures & ad hoc testability
enhancement methods
 – To improve the testability of a design
 – To ease sequential ATPG
 –Difficult to reach more than 90% fault coverage
 Structured DFT
 – To conquer the difficulties in controlling and
observing the internal states of sequential circuits
 – Scan design is the most popular structured DFT
approach
 DFT has migration recently
 – From gate level to register-transfer level (RTL)

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Testability Analysis
 Testability:
 A relative measure of the effort or cost of testing a logic circuit
 Testability Analysis:
 The process of assessing the testability of a logic circuit
 Testability Analysis Techniques:
 Topology-based Testability Analysis
 – SCOAP - Sandia Controllability/Observability Analysis
Program
 – Probability-based testability analysis
 Simulation-based Testability Analysis

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Testability Analysis – SCOAP
 Controllability
 Reflects the difficulty of setting a signal line to a
required logic value from primary inputs
 Observability
 Reflects the difficulty of propagating the logic value of
the signal line to primary outputs

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Purpose
 Need approximate measure of:
 Difficulty of setting internal circuit lines to 0 or 1
by setting primary circuit inputs
 Difficulty of observing internal circuit lines by
observing primary outputs
 Uses:
 Analysis of difficulty of testing internal circuit parts
– redesign or add special test hardware
 Guidance for algorithms computing test patterns
– avoid using hard-to-control lines
 Estimation of fault coverage
 Estimation of test vector length
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Origins
 Rutman 1972 -- First definition of controllability
 Goldstein 1979 -- SCOAP
 First definition of observability
 First elegant formulation
 First efficient algorithm to compute controllability and
observability
 Parker & McCluskey 1975
 Definition of Probabilistic Controllability
 Brglez 1984 -- COP
 1st probabilistic measures
 Seth, Pan & Agrawal 1985 – PREDICT
 1st exact probabilistic measures
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Types of Measures-SCOAP
 SCOAP – Sandia Controllability and
Observability Analysis Program
Combinational measures
 Calculates six numerical values for each
signal s in a logic circuit
 CC0(s): combinational 0-controllability of s
 CC1(s): combinational 1-controllability of s
 CO(s): combinational observability of s
 SC0(s): sequential 0-controllability of s
 SC1(s): sequential 1-controllability of s
 SO(s): sequential observability of s
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Testability Analysis – SCOAP
 The value of controllability measures range
between 1 to infinite
 The value of observability measures range
between 0 to infinite
 The CC0 and CC1 values of a primary input are
set to 1
 The SC0 and SC1 values of a primary input are
set to 0
 The CO and SO values of a primary output are
set to 0

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SCOAP Controllability Calculations
 Controllability calculations begins from PIs
and ends at POs
 Levelize the circuit
 i.e. Assign level 0 to PI and give levels to the next
gates in the paths still PO
 Apply the SCOAP controllability calculations
for Logic gate Rules

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SCOAP Controllability Calculation
Rule for AND Gate a b z
CC0(a), CC1 (a) 0 0 0
a
CC0(z), CC1 (z) 0 1 0
AND
z
b 1 0 0
CC0(b), CC1 (b)
1 1 1
CC0 (z)= min[CC0 (a), CC0 (b)] + 1
CC1 (z)= CC1 (a) + CC1 (b) + 1

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Rule for OR Gate a b z
CC0(a), CC1 (a) 0 0 0
a
CC0(z), CC1 (z) 0 1 1
OR
z
b 1 0 1
CC0(b), CC1 (b)
1 1 1
CC0 (z)= CC0 (a) + CC0 (b) + 1
CC1 (z)= min[CC1 (a), CC1 (b)] + 1

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Rule for NAND Gate a b z
CC0(a), CC1 (a) 0 0 1
a CC0(z), CC1 (z)
NAND 0 1 1
z
b 1 0 1
CC0(b), CC1 (b)
1 1 0
CC0 (z)= CC1 (a) + CC1 (b) + 1
CC1 (z)= min[CC0 (a), CC0 (b)] + 1

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Rule for NOR Gate a b z
CC0(a), CC1 (a)
0 0 1
a CC0(z), CC1 (z)
NOR 0 1 0
z
b 1 0 0
CC0(b), CC1 (b)
1 1 0
CC0 (z)= min[CC1 (a), CC1 (b)] + 1
CC1 (z)= CC0 (a) + CC0 (b) + 1

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Rule for XOR Gate a b z
CC0(a), CC1 (a)
0 0 0
a
CC0(z), CC1 (z) 0 1 1
XOR
z
b 1 0 1
CC0(b), CC1 (b)
1 1 0
CC0 (z)= min[CC0(a)+CC0(b), CC1(a)+CC1(b)] + 1


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Rule for XNOR Gate a b z
CC0(a), CC1 (a)
0 0 1
a CC0(z), CC1 (z)
XNOR 0 1 0
z
b 1 0 0
CC0(b), CC1 (b)
1 1 1


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Rule for NOT Gate a z
0 1
a NOT z 1 0
CC0(a), CC1 (a) CC0(z), CC1 (z)
CC0 (z)= CC1 (a) + 1
CC1 (z)= CC0 (a) + 1

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and ends at POs

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Controllability Rules of Logic Gates

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Controllability Rules of Logic Gates

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Controllability Example-1
x1
x2
z1
z2
z3
x3

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and ends at POs

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Levelize the Circuit
x1
x2
z1
z2
z3
x3

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Controllability Through Level 0
Circled numbers give level number. (CC0, CC1)
x1
x2
z1
z2
z3
x3

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x1
x2
z1
z2
z3
x3

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Final Combinational Controllability
x1
x2
z1
z2
z3
x3

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Controllability Example-2

27

28

29

30

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Final Combinational Controllability

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SCOAP Observability Calculations
 Observability is calculated in a reverse pass
starting from POs and moving backward to
the PIs.
 First set Pos Observability to ‘0’.
 Levelize from outputs towards the inputs
 Apply the SCOAP Observability calculations

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SCOAP Observability Calculation
Rule for AND Gate a b z
CC0(a), CC1 (a),
CO(a) CC0(z), CC1 (z), 0 0 0
a CO(z)
AND 0 1 0
z
b 1 0 0
CC0(b), CC1 (b),
CO(b) 1 1 1
CO (a)= CO (z) + CC1 (b) + 1
CO (b)= CO (z) + CC1 (a) + 1

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Rule for OR Gate a b z
CC0(a), CC1 (a),
CO(a) CC0(z), CC1 (z), 0 0 0
a CO(z)
OR 0 1 1
z
b 1 0 1
CC0(b), CC1 (b),
CO(b) 1 1 1
CO (a)= CO (z) + CC0 (b) + 1
CO (b)= CO (z) + CC0 (a) + 1

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Rule for NAND Gate a b z
CC0(a), CC1 (a),
CO(a) CC0(z), CC1 (z), 0 0 1
a CO(z)
NAND 0 1 1
z
b 1 0 1
CC0(b), CC1 (b),
CO(b) 1 1 0
CO (a)= CO (z) + CC1 (b) + 1
CO (b)= CO (z) + CC1 (a) + 1

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Rule for NOR Gate a b z
CC0(a), CC1 (a),
CO(a) CC0(z), CC1 (z), 0 0 1
a CO(z)
NOR 0 1 0
z
b 1 0 0
CC0(b), CC1 (b),
CO(b)
1 1 0
CO (a)= CO (z) + CC0 (b) + 1
CO (b)= CO (z) + CC0 (a) + 1

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Rule for XOR Gate a b z
CC0(a), CC1 (a),
CO(a) CC0(z), CC1 (z), 0 0 0
a CO(z)
XOR 0 1 1
z
b 1 0 1
CC0(b), CC1 (b),
CO(b) 1 1 0
CO (a)= CO (z) + min[CC0(b), CC1(b)] + 1
CO (b)= CO (z) + min[CC0(a), CC1(a)] + 1

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Rule for XNOR Gate a b z
CC0(a), CC1 (a),
CO(a) CC0(z), CC1 (z), 0 0 1
a CO(z)
XNOR 0 1 0
z
b 1 0 0
CC0(b), CC1 (b),
CO(b) 1 1 1
CO (a)= CO (z) + min[CC0(b), CC1(b)] + 1
CO (b)= CO (z) + min[CC0(a), CC1(a)] + 1

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Rule for NOT Gate a z
CC0(a), CC1 (a),
CC0(z), CC1 (z), 0 1
CO(a)
CO(z)
a NOT z 1 0
CO (a)= CO (z) + 1

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Rule for Fanout
CO(z )
Branches
1
z1
CO(z2)
z2
CO(a) CO(z3) z3
CO(z4)
z4
CO(zn)
zn
CO (a)= min[CO(z1), CO(z2), CO(z3),-----CO(zn)]
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Observability Rules of Logic Gates

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Observability Rules of Logic Gates

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Observability Example-1
x1
x2
z1
z2
z3
x3

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Levelize the Circuit Example-1
Number in square box is level from primary outputs (POs). (CC0, CC1) CO
x1
x2
z1
z2
x3 z3

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Combinational Observability for Level 1
Number in square box is level from primary outputs (POs).
(CC0, CC1) CO
x1
x2
z1
z2
z3
x3

46
Combinational Observability for Level 2
x1
x2
z1
z2
z3
x3

47
Final Comb. Controllability/Observability
x1
x2
z1
z2
z3
x3

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Observability Example-2

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Observability Through Level 0

51

52

53

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Final Comb. Controllability/Observability

55
Thank you !!!

56

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Testability Measures

track of the number of defective parts shipped to the

Monday, August 29, 2022

Monday, August 29, 2022

Monday, August 29, 2022

Monday, August 29, 2022

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CC0 (z)= min[CC0 (a), CC0 (b)] + 1

CC1 (z)= CC1 (a) + CC1 (b) + 1

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CC0 (z)= CC0 (a) + CC0 (b) + 1

CC1 (z)= min[CC1 (a), CC1 (b)] + 1

Monday, August 29, 2022

CC0 (z)= CC1 (a) + CC1 (b) + 1

CC1 (z)= min[CC0 (a), CC0 (b)] + 1

Monday, August 29, 2022

CC0 (z)= min[CC1 (a), CC1 (b)] + 1

CC1 (z)= CC0 (a) + CC0 (b) + 1

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CC0 (z)= min[CC0(a)+CC0(b), CC1(a)+CC1(b)] + 1

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CC0 (z)= min[CC0(a)+CC1(b), CC1(a)+CC0(b)] + 1

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CC0 (z)= CC1 (a) + 1

CC1 (z)= CC0 (a) + 1

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Monday, August 29, 2022

Monday, August 29, 2022

Monday, August 29, 2022

Monday, August 29, 2022

Monday, August 29, 2022

Monday, August 29, 2022

Monday, August 29, 2022

Monday, August 29, 2022

Monday, August 29, 2022

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CO (a)= CO (z) + CC1 (b) + 1

CO (b)= CO (z) + CC1 (a) + 1

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CO (a)= CO (z) + CC0 (b) + 1

CO (b)= CO (z) + CC0 (a) + 1

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CO (a)= CO (z) + CC1 (b) + 1

CO (b)= CO (z) + CC1 (a) + 1

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CO (a)= CO (z) + CC0 (b) + 1

CO (b)= CO (z) + CC0 (a) + 1

Monday, August 29, 2022

CO (a)= CO (z) + min[CC0(b), CC1(b)] + 1

CO (b)= CO (z) + min[CC0(a), CC1(a)] + 1