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Multilevel inverter; A review

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 MULTILEVEL INVERTER; A REVIEW

GAYATRI MOHAPATRA

gayatrim79@gmail.com

ASST PROFESSOR, DEPT OF EE, S’O’A UNIVERSITY

ABSTRACT

This paper presents a review and analysis of multilevel topologies as well as different control techniques that can be applied for
modulation. Multilevel power conversion technology is an alternative that address high power medium voltage application requirement.
In these area numbers of multilevel inverter topologies like diode clamped, flying capacitor, H Bridge is analyzed as well as their
advantages and drawbacks are discussed.

Keywords: Multilevel inverter, topology, DCMI,SVM.

capacitor voltages in series using a center tapped

1. INTRODUCTION neutral. As the number of level increases, the
developed output waveform adds more steps
Numerous industrial applications have begun to producing a stair case waveform which will approach
require higher power apparatus in recent years. Some to sinusoidal with minimum harmonic distortion. In
medium voltage motor drives and utility applications the same context a zero harmonic distortion can be
require medium voltage and MW power level. For a obtained by infinite number of levels. More number
medium voltage grid it is difficult to connect single of levels means higher voltage levels can be achieved
semiconductor switch directly. Now a day’s without having the problem due to voltage sharing.
Multilevel inverter has drawn tremendous interest in More over the maximum number of levels that can be
the power industry. The general configuration of the achieved is limited due to voltage imbalance and
Multilevel converter is to synthesize a sinusoidal requirement of voltage clamping, circuit complexities
voltage from several levels of voltages typically from and packaging problem.
n number of levels of voltages [1], obtained from
capacitor voltage source. Multilevel inverters not
only achieve high power ratings but also enable the
use of renewable energy sources such as PV, wind
and fuel cells. Multilevel inverter includes an array of
power semiconductor and capacitor voltage sources.
The commutation of the switches permits the addition
of the capacitor voltages, which reach high voltage at
the output, while the power semiconductor must
withstand only reduced voltage.

Fig 2(Classification of Multilevel Inverter on the

basis of voltage source) [23]

Fig 1(One phase leg of an inverter with (a) two
levels, (b) three levels, and(c) n levels[10])
Considering that m is the number of levels of the
phase voltage w.r.t the negative terminal of the
inverter then the number of levels in the voltage
across the load will be k  2m 1
The multilevel converter starts from three levels, also
called as neutral clamped comprising of two
A transformer coupled multiphase voltage source
converter has been a popular method to synthesize
the staircase voltage by varying transformer turns
ratio.
The capacitor voltage synthesis method is preferred
to magnetic coupling to have simpler connections as
compared to that in transformer. Neutral Point
Clamped Multilevel Inverters (NPCMI) uses
capacitors in series to divide up the DC bus voltage
into a set of voltage levels. The most attractive
features of multilevel inverter areas follow
1) They can generate output voltage with very low
distortion and lower rate of change of voltage.
2) They can generate very low distorted input
current and can operate with a lower switching
frequency.
3) The voltage handling capacity of the existing
devices can be enhanced in multiple folds, not
disturbing the complications of static and
dynamic voltage sharing that occur in series-
connected devices.
4) Spectral performance of multilevel waveforms is
superior to that of their two- level counterparts.
5) Multilevel waveforms naturally rectifies the
challenges of large voltage transients that occur
due to the reflections on cables, which can
damage the motor windings as well as adding
extra problems.
Usually, the name multilevel is defined as follow
a. p:number of steps in a quarter-cycle;
2. CLASSIFICATION OF MULTILEVEL
INVERTER
There can be three basic types of multilevel
topologies as follows
1) Diode clamp Multilevel inverter
2) Flying Capacitor Multilevel inverter
3) Cascaded Multilevel inverter with separate
dc source
2.1 DIODE CLAMP MULTILEVEL CONVERTER
BASIC PRINCIPLE
An m level DCMI consists of m-1 capacitors on the
dc bus and produces m levels of the phase voltage .It
 
requires 2m  2 no of diode clamped switches ,
m  2 diodes for without neutral point clamping
and m  1 m  2 diodes for with neutral point
clamping inverter. Each switch peak blocking voltage
will be limited to one capacitor voltage level through
clamping diodes.
phase voltage of DCMI

b. 2*p + 1: number of levels of a converter;(NPC) 500

400
c. p number of levels of a converter (without NPC)
300
d. 4*p: number of steps of a converter.
200

100
1.1 QUARTER WAVE SYMMETRIC MULTILEVEL

v oltage in v olt
0
WAVEFORM
-100

-200

The optimized harmonic stepped waveform is -300

assumed to be the quarter-wave Symmetric. The first -400

half cycle of the quarter-wave symmetric waveform -500

0 0.005 0.01 0.015 0.02 0.025 0.03 0.035 0.04
of phase voltage is depicted in the fig below. time in sec

(a) (b)
Fig 4((a)A diode clam 6 level converter circuit
diagram and (b) output voltage waveform)

Table 1 signifies the voltage magnitudes and their

Fig3 (First half cycle of quarter wave symmetric
waveform [24])
The output voltage takes zero from t0 to t1. At t1, the
output voltage s changed from zero to +V1, and from
+V1 to V2 at t2. The process will be repeated until t=
T/2 and the output voltage becomes +V1
+V2+…+V(S-1) +VS. Then, in the second quarter, the
level of output voltage wil changed to +V1
+V2+…+V(S-1) +VS at t = T/4. The process will be
repeated until output voltage becomes zero again. In
the second half of the waveform, the process will be
repeated all of previous steps except the amplitude of
the dc sources change from positive to negative. The
next period will then repeat the same cycle.
corresponding switching states. State condition 1
means switch is on and 0 means it is off. A point here
is to be noted that each switch is only switched once
per cycle. There is m-1 complementary switch pair in
each phase
SIGNIFICANT FEATURES AND RATING
1) Each switch is required to block a voltage value
of V m  1  
2) The clamping diode needs to block the reverse
voltage depending upon their switching.
3) The number of diode required for each phase will
   
be m  1  m  2 which signifies a quadratic
increase in m.
Table 1 (Diode clamp 11 level converter phase 3) This type of inverter uses very simple method of
voltage switch states representing the capacitor control due to back to back intertie system
voltage in DCMI) Disadvantages
OUT SWITCH STATES 1) Increased number of clamping diodes with the
PUT S1 S2 S3 S4 S5 S6 S7 S8 S9 S10 increased number of levels.
5V 1 1 1 1 1 0 0 0 0 0 2) Real power flow of individual converter is
4V 0 1 1 1 1 0 0 0 0 0 difficult.

3V 0 0 1 1 1 0 0 0 0 0 FLYING CAPACITOR
2V Principle of operation
0 0 0 1 1 0 0 0 0 0
V 0 0 0 0 1 0 0 0 0 0 The voltage steps defined in the flying capacitor type
0 0 0 0 0 0 0 0 0 0 0 converter is same as that of diode clamp. The phase
voltage of an m level converter has m-1 capacitors
-V 0 0 0 0 0 1 0 0 0 0 with 2m-1 steps in the line voltage. [8]
-2V 0 0 0 0 0 1 1 0 0 0
-3V 0 0 0 0 0 1 1 1 0 0 phase voltage of Cascaded MI
500

-4V 0 0 0 0 0 1 1 1 1 0 400

300

-5V 0 0 0 0 0 1 1 1 1 1 200

100

voltage in sec
UNEQUAL DEVICE RATING 0

1) The switching time of different switch is -100

different depending upon the on time and duty -200

cycle. -300

2) There will be variation of the size of the switch -400

depending upon the width of the gate pulse. -500

0 0.005 0.01 0.015 0.02 0.025 0.03 0.035 0.04
time in sec

This unequal size may results in the flow of

circulating current in the converter through the
transformer.
CAPACITOR VOLTAGE UNBALANCE
The charging time for each capacitor is different. This
profile repeats itself in every half cycle which results
in unbalanced capacitor voltage between different
levels. The problem of voltage imbalance is common
in multilevel inverter which can be minimized by
either replacing capacitors by controlled dc voltages
(voltage regulators using PWM techniques to control
the dc voltage). This can any way add to cost of the
converter. Another main problem in multilevel
inverter is the disturbance due to electromagnetic
interference, which can be kept under control by
controlling the switching frequencies. The overall
advantages and disadvantages of Diode clamp
multilevel inverter are as follows
(a) (b)
Fig 5 ((a) A Flying capacitor 11level converter circuit
diagram and (b)output voltage waveform)
It has also unequal device duty problem and large
number of storage capacitors.. Here an m level
  
converter requires m  1  m  2 2 auxiliary 
 
capacitor per phase in addition to m  1 number of
dc bus capacitors.
By proper selection of switch combination the flying
capacitor multilevel converter may be used in real
power conversion. The basic problem lies in the
selection of switch combination as well as the
frequency of operation is much higher than the
fundamental frequency. This can be summed up with
the following advantages and disadvantages as
follows,[7]

Advantages
1) With the increase in the level of the voltage, the
harmonic content decreases which can signifies
minimum requirement of filters.
2) This provides high efficiency with controlled
reactive power flow.
Advantages
1) Large number of storage capacitor implies extra
ride through capabilities during power outages.
2) Provides switch combination redundancy for
balancing different voltage levels.
3) Harmonic content reduces with the increased
number of voltage levels.
4) Both real and reactive power flow can be TYPE OF DCMI FCMI CASCADED
controlled. CONVERTER
MAIN (M-1)X2 (M-1)X2 (M-1)X4
Disadvantages SWITCHING
1) An excessive number of storage capacitors are DEVICE
required when the number of converter level is MAIN DIODE (M-1)X2 (M-1)X2 (M-1)X4
high which can be more costly. CLAMPING 2(M-2) to 0 0
DIODE
2) Inverter control will be more complicated (M-1)X(M-2)
DC (M-1) (M-1) (M-1)
CASCADED INVERTER CAPACITOR
BALANCING 0 (M-1)X2 0
In accordance to the diode clamp and flying capacitor CAPACITOR
converter has m=2s+1 , where m is the output phase Table 4 (Comparison of component required per
voltage and s is the number of dc source. For three phase leg among three basic multilevel
phase cascaded three voltage sources can be converters)[14]
connected in Y or delta. [24]
3. HARMONIC ELLIMINATION METHODS
500
phase voltage of Cascaded MI
OF MULTILEVEL INVERTER
400

300 There are many industrial applications which may

200 allow a harmonic content of 5% of its fundamental
100 component of input voltage when inverters are used.
voltage in sec

0 Actually the inverter output may have harmonic

-100
content much higher than 5% of its fundamental
-200
components .In order to bring this harmonic content
-300
to a maximum limit of 5% , one method is to insert
-400
filters between the load and inverter[7]. The size of
-500
0 0.005 0.01 0.015 0.02
time in sec
0.025 0.03 0.035 0.04 the filter is directly proportional to the high frequency
harmonics of the inverter. This makes the filter
circuit costly, bulky and weighty and in addition the
(a) (b) transient response of the system becomes sluggish.
Lower order harmonics from the inverter output
Fig 6 ((a) A cascaded 11 level converter circuit voltage should be reduced by many other
diagram and (b) output voltage waveform) methods.[15]

The structure of the cascaded has an advantage of 4. MODULATION TECHNIQUES

separate dc source. The structure of separate dc
source can be manipulated for various renewable Sequel to the increased number of level, higher level
energy sources like fuel cell, photovoltaic and of complexity is experienced while controlling MLI.
biomass etc. However, this complexity could be used to add
additional factors to enhance the modulation
Advantages technique, such as; to reduce the switching
1) Requires least number of components in frequency, minimize the common-mode voltage, or
comparison with any other type of converters. reduce the DC link voltage imbalance. Several
2) Modularized circuit layout and packaging is modulation techniques have been proposed for
possible because each level has some multilevel inverters which are usually an extension of
configuration and there are no extra clamping the two-level modulations. These techniques can be
diodes and flying capacitors. classified based on switching frequencies. As the
3) Soft switching can be possible to avoid bulky number of level increases the voltage waveform
and lossy resistor capacitor combination becomes more sinusoidal and there will be reduction
Disadvantages in harmonic content in the fundamental frequency of
1) It needs separate dc source for real power the voltage and current waveform. Various
conversion hence limited in use modulation techniques are used to eliminate the
harmonics and to improve the total harmonics
distortion in the inverter current or voltage. Some of
the modulation methods proposed by various
researchers as per the requirement represented in It is an extension of quasi square wave frequency
block diagram in Fig 6. converter to a number of levels exceeding two. It is
used to approximate the sinusoidal reference basing
Modulation index on the use of available voltage levels. This has an
advantage of having low switching frequency with a
M a  M r / n  1M c 1 variable dc voltage. This can be used in utility system
applications like static VAR compensators where
achievement of variable dc voltage is not a major
M a = Modulation index issue.
500

M r =Amplitude of the reference modulating signal 400

Vref
Vactual

300

M c = Amplitude of carrier wave 200

voltage in volt
100

n = No of level in the inverter 0

n  1 = No of carrier wave required in multilevel

-100

-200

-300

inverter -400

-500
0 0.005 0.01 0.015 0.02 0.025 0.03 0.035 0.04
time in sec

4.1.2 Selective Harmonic Elimination

The figure.8 shows the generalized quarter wave
symmetric stepped voltage waveform synthesized by
a (2m+1) level inverter where m is the number of
switching angles. By applying Fourier analysis the
amplitude of the stepped wave can be expressed as
[9]

 V cosn k 
4 2
hm 
n
k
k 1

Fig 6 (Modulation sratategy of multilevel

inverter)[25]
Carrier based modulation
The common PWM techniques have been further
developed by using multiple carriers to have a control
on power switch where a low frequency fundamental
reference waveform is to be compared with high
frequency carrier waveform. There can different
types of carrier arrangements as follows,
4.1. Phase shifted PWM
Between carrier signal a phase shift is to be
introduced so as to produce phase shifted switching
pattern so that a stair case waveform can be
generated.
Where
Vk k th level of dc voltage
m Number of switching angles
k th
Angle of k level of dc voltage
n Odd harmonic order
This method is used to produce high quality power
output at fundamental switching frequency, minimize
harmonic distortion and to achieve adjustable
amplitude of fundamental component. Some
switching angle per quarter fundamental cycle are
predefined and evaluated earlier by Fourier series to
eliminate undesired low order harmonics

Fig 7 (Phase shifted PWM waveform)

Fig 8 (Phase voltage to obtain the Fourier series
4.1.1 Multistep expansion)
4.2 Level shifted PWM
It is a method where only one carrier signal is to be
compared with the reference. For a multilevel (m-1)
carriers are used. There are to be arranged in vertical
shift where each carrier is to be set between two
voltage levels. There are three alternatives as follows
4.2.1 PD pulse width modulation
In phase disposition all carriers are selected with the
same phase. This method generates to the lowest
harmonic distortion in higher modulation indices
when compared to other disposition method. This
method can be applied to the cascaded inverters. In
this method carriers are in the same frequency,
amplitude and phrases. In order to cancel line voltage
harmonics the PD technique puts the harmonic
energy directly into a common mode carrier
component.[24]
4.2.2 POD PWM
In this method carriers of same frequency and
amplitude and different phase with DC offset are
used. [24] This method has lower modulation indices
resulting in higher harmonic reduction[23]. Here
there is no harmonic at the carrier frequency and it
multiplies and the dispersion of harmonics occurs
around them.
4.2.3 APOD PWM
In this method each carrier is phase shifted by 180
degree from its adjacent one .
Fig 9(a represents PD, b represents POD and c
represents APOD)
4.3 Space vector Modulation technique
The space vector modulation technique is based on
reconstruction of sampled reference voltage with the
help of switching space vectors of voltage source
inverter in a sampling period. Each multilevel
inverter has several switching state which generates
different voltage vectors and can be used for
modulated reference. In this method reference signal
is generated from its closest signals. Multilevel SVM
regulates the process to optimize the search of
modulating vectors and apply an required switching
state. This method is one of the efficient methods that
need to be applied in any type of multilevel
inverter.[23]
V   T jV j  T j 1V j 1  T j 2V j 2  T 3
Where
T j is the duty cycle and
V j are the required unit vector.
Space vector PWM generally has the following
advantages
1. Good utilization of the dc link voltage
2. Low current ripple
3. Relatively easy hardware implementation
Fig 10 (a represents two level, b represents 3 level
and c represents 5 level MLI switching states)
A conceptually different control method for
multilevel inverter based on space vector theory has
been introduced. This control works with low
switching frequencies and does not generates the
mean values of desired load voltage as in SVM The
basic objective of Space Vector Control is to provide
a load voltage vector that reduces the space error or
distance to the reference vector.
5. CONCLUSION
This paper has explained the state of the art of
multilevel power converter technology and also has
discussed several topologies for multilevel inverters
(MLI), some of them well known with applications
on the market. Each topology has been described in
detail. Today, more and more commercial products
are based on the multilevel inverter structure, and
more and more worldwide research and development
of multilevel inverter-related technologies is
occurring. The main advantage of MLI family is that
it finds a solution to the problems of total harmonics
distortion, EMI, and dv/dt stress on switch. In
industrial and commercial market areas, more and
more product are available that depends on the multi-
level inverter topologies. Research works are in
progress considering the structure complexity and
control circuits. This helps to reduce the power
electronics components and improve total harmonics
profile and total cost of the system.
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