Problem 1

Problem 2
 Problem 3
As Out-of-Order (OOO) cores scale to very large instruction windows to extract higher instruction
level parallelism (ILP), the cost of mis-speculation increases tremendously. Branch predictors sitting
at the head of the pipeline are a significant contributor to the speculatively executed code. It is
critical to limit the execution time down the wrong path for the sake of performance and energy
efficiency. Architects continue to increase the branch predictor sizes and improve the prediction
algorithms to mitigate the increasing cost of the mis-speculations. Unfortunately, there still exists
branches whose outcomes are predominantly data dependent, and that significantly contribute to the
overall mispredictions. This work is the first to characterize data dependent branches at a scale
spanning 100+ workloads drawn from several application categories and establish a clear motivation
to address them. We find that branches which have only one load instruction feeding them and only
simple operations to compute the branch direction from the load value are responsible for a
significant fraction of the overall mispredictions. We call such branches Direct Data Dependent (3D)
branches. We develop a family of synergistic techniques to avoid mispredictions from such 3D-
branches. We describe 3D-Branch Overrider, our novel branch overriding technique that operates in
the front-end of the pipeline to minimize the branch misprediction penalties. On a modern Icelake-
like OOO core equipped with the state-of-the-art branch predictor, we find that our technique
provides a 12.7% reduction in branch mispredictions resulting in 3.1% Instructions Per Cycle (IPC)
gain while needing just 5.7KB in additional storage. As future cores become wider and deeper, we
show that the gains from 3D-Branch Overrider nicely increases, even if the size of the underlying
branch predictor is aggressively scaled.