Name: mansour Alhammami

ID:441104126
Section: Wednesday 4:00
Experiment: 3part2
Introduction:
In this experiment, we designed a BCD to 7Segment decoder using Verilog
HDL and implemented the design on the FBGA board .

Function Analysis:
Truth Table:

Output Functions:
f- [ 4) I Iz 24 Xo % Is

§
1- I
} Nz
=
}

51322542%-1%35<2%1×0
,

f- £-6] = I
} Nz
54 % 1- I} Az ×
, % -1×5×254 %

1-
I Iz il ka
1-
☒32294 Xo }

Iz Kiko I} > Lz Ñ, Io I}
[ 3] I} > to
F =
+ + >
Lz 04

qq.gg zggggyg.gg,
,
,, , , , gig , ,,
,
,,
p ,,, , § ,,
, ,, , ,
,
,, ,,
,
,,
,
,
,

I
>
xiii Is +732225 ✗ •
f- [ ] 0 =
is Iz 54 > to
+ I> xÑÑ
Simulation waveform: