Unit-II AE-I Notes

SRM VALLIAMMAI ENGINEERING COLLEGE
(An Autonomous Institution)

SRM Nagar, Kattankulathur – 603 203.
Department of Electronics & Communication Engineering
1906302 - ANALOG ELECTRONICS - I
UNIT – II
BJT AMPLIFIERS
Prepared by:
Dr.S.RAMESH
Dr. S. RAMESH,
Associate Professor – ECE
Prepared by:Dr.S.RAMESH,Asso.Prof-ECE,SRM VEC.
OUTLINE
UNIT - II: BJT AMPLIFIERS
Small Signal Hybrid π equivalent circuit of BJT – Early
effect - Analysis of CE, CC and CB amplifiers using
Hybrid π equivalent circuits - AC Load Line Analysis-
Darlington Amplifier - Bootstrap technique - Cascade,
Cascode configurations - Differential amplifier, Basic BJT
differential pair – Small signal analysis and CMRR.
Prepared by:
References: Robert L. Boylestad and Louis Nasheresky,
“Electronic Devices
Dr.S.RAMESH
and Circuit Theory”, 11th Edition, Pearson Education, 2013.Chapter-7, 8.
Donald. A. Neamen, “Electronic Circuits Analysis and Design”, 3rd Edition,
McGraw Hill Education (India) Private Ltd., 2010. Chapter-4, 5, 6, 11.
INTRODUCTION - BJT AMPLIFIERS
 DC biasing of device was examined in Unit-I.
 Need to examine small-signal AC response of BJT amplifier by
reviewing the models most frequently used to represent transistor
in sinusoidal AC domain.
 Concerns in sinusoidal AC analysis of transistor networks is
magnitude of input signal.
 2 models commonly used in small-signal AC analysis of transistor
networks: re model & hybrid π equivalent model.
 BJT LINEAR AMPLIFIER:
 Understand the concept of an analogPrepared
signal by:
& principle of linear
Dr.S.RAMESH
amplifier.
 Investigate the process a single-transistor circuit can amplify a
small, time-varying input signal.
 Signals contain some type of information.
 Electrical signals in form of time-varying I &V are analog signal.
 Electronic circuit that process analog signal: Analog circuit, Ex: linear
amplifier.
 Linear amplifier: magnify an input signal & produce an output signal
whose magnitude is larger & directly proportional to input signal.
 Ex: Block diagram of a compact disc player system
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Dr.S.RAMESH

 From figure, a DC voltage source connected to amplifier.
 Amplifier contain transistors that must be forward biased so that
they can act as amplifying devices.
 Need an linear amplifier: o/p signal to be linearly
proportional to i/p signal to o/p of speaker is an exact
reproduction of signal from compact disc.
 2 types of amplifier analysis:
 DC analysis due to applied DC voltage source.
 AC analysis due to time-varying signal source.
 DC analysis is performed by AC source set to zero ~ large
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signal analysis.
 AC analysis is performed by DC source set to zero ~ small
signal analysis.
SMALL SIGNAL HYBRID π EQUIVALENT CIRCUIT OF BJT
 Transistor Modeling: A model is combination of circuit elements,
properly chosen, that best approximates the actual behavior of a
semiconductor device under specific operating conditions.
 Objectives: Develop small-signal models of transistor that are used
in analysis of linear amplifier.
 BJT – Small Signal Amplifier
 Small-signal hybrid-π equivalent circuit of BJT
 Small-signal hybrid-π equivalent circuit using transconductance
(gm)
 Small-signal hybrid-π equivalent circuit using common current
gain (Ii) Prepared by:
Dr.S.RAMESH
 Small-signal voltage gain (Av)
 Hybrid- π equivalent circuit including Early Effect
 Expanded hybrid- π equivalent circuit
 Other small-signal parameters
Prepared by:Dr.S.RAMESH,Asso.Prof-ECE,SRM VEC.(R , R )& equivalent circuits
i o
 Need to develop a small-signal equivalent circuit-using hybrid-π
model because it is closely related to physic of transistor.
 Treat transistor as two-port network.
 AC analysis require simplification of transistors as 2-port system.

 Simplification leads to new parameters/definitions.
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 ‘Single ended’ 2-port system has 1 input port shorted to 1 output port.
 Alternative view: System has a common input/output port.
 3 terminal device: Device which is having only 3 connection leads, i.e.,
transistor falls into this category. VEC.
Prepared by:Dr.S.RAMESH,Asso.Prof-ECE,SRM
 2-port system
 ‘Differential 2-port’ network are basis for forthcoming analysis of all types of transistors
(BJT & FET).
 2-port network analysis is all about I & V by breaking down voltage direction
(-Ve to +Ve or +Ve to –Ve) & I direction (to or from).by:
Prepared
 Each I &V has 2 possible directions. Dr.S.RAMESH

 Based on 2-port network, 1 input port & 1 output port shorted together to
form a common port of both input & output.
 Transistor has input & output ports shorted (Emitter) resulting a small-
signal 2-port hybrid- π network.
 Figure shows iB Vs vBE with small-time
varying signal superimposed at Q-point.
 Sinusoidal signals are small, slope at Q-pt
treated as a constant, has units
of conductance.
 Inverse of conductance is small-signal Prepared by:
Dr.S.RAMESH
resistance, rπ.
 We can relate small-signal input base
current to small-signal input voltage by:
 Finding rπ from Q-point slope lead to:
 rπ also known as diffusion resistance
& function of Q-point parameters.VT =Thermal voltage.
 Now, consider output terminal characteristic of BJT.
 Assume o/p collector current is independent of VCE , IC is a function of
B-E voltage, so equation:
(From eqn. 5.2 in Chapter 5 Neaman)
 After substitution & rearrange above, we obtain:
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 Term ICQ/VT is a conductance, relates current in collector to a voltage in
B-E circuit, it is called transconductance & is written:
 Note: gm also function of Q-point parameters & directly proportional to
DC bias current.
 Using these new parameters to develop a simplified small-signal hybrid-
π equivalent circuit for NPN BJT.
 Phasor components given in parentheses.
 This circuit can be inserted into AC equivalent circuit shown previously.
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 We can relate small-signal collector current to small-signal base current for
o/p of equivalent circuit. ∂i C
ic = .i b
∂i B Q − pt
∂i C
≡β
 Where ∂i B Q − pt
 β is called AC common-emitter current gain.Thus,

i c = βi b
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 Combine BJT equivalent circuit to AC equivalent circuit.
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 Voltage gain, Av = ratio of o/p voltage to i/p voltage.
 Small-signal B-E voltage is called control voltage,Vbe or Vπ.
 Dependent current source is gm Vπ flows through RC, to produce –Ve C-E
voltage at the output.
 From input portion of circuit, using voltage divider:
 Small-signal voltage gain: Prepared by:

Dr.S.RAMESH

 Example:
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Hybrid-π equivalent circuit - EARLY EFFECT
 EarlyVoltage (VA)
 Figure shows I-V characteristic for constant
values of B-E voltage.
 Curves are linear with respect to C-E voltage
in forward-active mode.
 Slope is due to base-width modulation effect
is Early Effect.(ic vary w.r.to vce)
 When curves extrapolated at zero current, they meet a point on –Ve voltage axis,
Vce = -VA. (Typical value: 50 < VA < 300V ).
 Early Effect: Collector current, iC is dependent to collector-emitter voltage, vce.
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(Refer Chapter 5-Neaman):
Dr.S.RAMESH
 Output resistance (ro):

 Substitute & rearrange both equation,
 Hence, small-signal transistor output resistance, ro become:
 ro is equivalent to Norton resistance & ro is parallel with dependent current

sources. Prepared by:
Dr.S.RAMESH

 Modified bipolar equivalent circuits including rO due to Early Effect.
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Hybrid-π equivalent circuit
 Self study for PNP transistor
 From Neaman text book,
 AC equivalent circuit – pg 386
 Transconductance & current gain – pg 386 & 387
 Small-signal hybrid-π equivalent circuit – pg 387
 Do example 6.3
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Expanded hybrid-π equivalent circuit
 Include 2 additional resistance, rb & rμ.
 rb is series resistance of semiconductor material.
 Since rb << rμ, rb is neglected (short circuit) at low freq.
 rμ is reverse-biased diffusion resistance of B-C junction. Typically in
mega ohms & neglected (open circuit).
 Normally, in hybrid-π model, we neglect both rb & rμ.
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Dr.S.RAMESH

ANALYSIS OF CE, CC AND CB AMPLIFIERS USING
HYBRID π EQUIVALENT CIRCUITS
 Objective:
 Analyze the amplifiers and become familiar with characteristics
of this circuit.
 Analysis of amplifiers using hybrid π equivalent
circuits:
 1. CE AMPLIFIERS,
 2. CC AMPLIFIERS,
 3. CB AMPLIFIERS. Prepared by:
Dr.S.RAMESH

1. ANALYSIS OF CE AMPLIFIERS USING HYBRID π EQUIVALENT CIRCUITS
 Objective: Analyze common-emitter amplifier & familiar with general
characteristics.
 Basic amplifier: Common Emitter (CE) circuit.
 Apply equivalent (hybrid-π model) circuit of BJT that was developed.
 Figure: CE circuit with voltage-divider biasing & coupling capacitor.
 Signal from signal source is coupled into base
of transistor through CC, which provides DC
isolation between amplifier & signal source.
 DC transistor biasing is established by R1 & R2,
and is not disturbed when signal source is Prepared by:
Dr.S.RAMESH
capacitively coupled to amplifier.
 Neglecting any capacitance effects within transistor.
 Assume that signal frequency is sufficiently high that any coupling
capacitance acts as a perfect short VEC.
Prepared by:Dr.S.RAMESH,Asso.Prof-ECE,SRM circuit.
ANALYSIS OF CE AMPLIFIERS USING HYBRID π EQUIVALENT CIRCUITS
 Transistor capacitances can be neglected.
 Figure: Small-signal equivalent circuit, assuming CC is a short circuit.
 Small-signal variables (input signal voltage & input base current) are given
in phasor form. Control voltage Vπ is also given as a phasor.
 Output voltage is, & control voltage
Prepared by: Vπ is found to be,
Dr.S.RAMESH
 ; Combining 2 Eqns., Small-signal voltage gain is,
 Circuit is not very practical.

2. ANALYSIS OF CC AMPLIFIERS USING HYBRID π EQUIVALENT CIRCUITS
 Objective: Analyze the CC (emitter-follower) amplifier & familiar with
general characteristics.
 Figure: Circuit & Output signal is at emitter terminal with respect to
ground.
 Output signal is taken off of emitter
with respect to ground & collector is
connected directly toVCC. SinceVCC is at
signal ground in AC equivalent circuit.
(common-collector)
Figure: Small-signal equivalent circuit. Prepared by:
Dr.S.RAMESH

ANALYSIS OF CC AMPLIFIERS USING HYBRID π EQUIVALENT CIRCUITS
 Small-SignalVoltage Gain (Av):
 Hybrid-π model of BJT can also be used in small-signal analysis of this
circuit. Assuming CC acts as a short circuit.
 Collector terminal is at signal ground & transistor output resistance ro is in
parallel with dependent current source.
 Figure: Small-signal equivalent circuit with all signal grounds connected
together.
Prepared by:
Dr.S.RAMESH

ANALYSIS OF CC AMPLIFIERS USING HYBRID π EQUIVALENT CIRCUITS
 Input & Output Impedance:
 Input Resistance:
 Output Resistance:
 Small-Signal Current Gain:
 ; combining Io & Ie;
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 Small-signal voltage gain of emitter follower is slightly less than 1, small-
signal current gain is normally greater than 1.
 Emitter follower circuit produces a small-signal power gain.
3. ANALYSIS OF CB AMPLIFIERS USING HYBRID π EQUIVALENT CIRCUITS
 Objective: Analyze common-base amplifier & familiar with general
characteristics.
 To determine small-signal voltage & current gains, input & output
impedances using hybrid-π equivalent circuit.
 DC analysis of CB circuit as CE circuit.
 Small-SignalVoltage and Current Gains (Av & Ai):
 Input applied to E terminal & output signal is measured at C terminal.
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 Assume a load
Prepared is connected to output
by:Dr.S.RAMESH,Asso.Prof-ECE,SRM VEC. through a coupling capacitor C .
C2
ANALYSIS OF CB AMPLIFIERS USING HYBRID π EQUIVALENT CIRCUITS
 (a) Simplified hybrid-π model (b) Small-signal equivalent circuit
 Output resistance ro assumed to be infinite.

 Hybrid-π model in small-signal equivalent circuit may look a little strange.
 Small signal output voltage is given by,
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 RS approaches zero, small-signal voltage gain becomes

ANALYSIS OF CB AMPLIFIERS USING HYBRID π EQUIVALENT CIRCUITS
 Ai=Io/Ii.
 Load current is given by,
 If we take limit as RE approaches infinity & RL approaches zero, then current gain becomes
short-circuit current gain given by,
 α = CB current gain.
 Small-signal voltage gain is usually greater than 1 & small-signal current gain is slightly
less than 1.
 Input & Output Impedance: Prepared by:
Dr.S.RAMESH
 Output resistance looking back into ‘C’ terminal is very large, CB circuit looks
almost like by:Dr.S.RAMESH,Asso.Prof-ECE,SRM
Prepared an ideal current source.VEC. Circuit is also referred as current buffer.
SUMMARY & COMPARISON OF AMPIFIERS
• Ri: CE: low KΩ range; CC: 50 to100 k Ω; CB: Tens of Ω.

• CE & CC circuits can be greatly affected by bias circuitry.
• Ro: CC: few Ω to tens of Ω. CE & CB: K Ω.
few by:
Prepared
Dr.S.RAMESH
• Note: characteristics of these single-stage amplifiers will be
used in the design of multistage amplifiers.

AC LOAD LINE ANALYSIS
 Objective: Understand concept of AC load line & calculate maximum
symmetrical swing of output signal.
 DC load line gives us a way of visualizing relationship between Q-point &
transistor characteristics.
 When capacitors are included in a transistor circuit, a new effective load
line called AC load line.
 AC load line helps in visualizing relationship between small-signal response
& transistor characteristics.
 AC Load Line:
 Consider circuit has emitter
Prepared by:
resistors & emitter bypass capacitor.Dr.S.RAMESH

ANALYSIS OF CE AMPLIFIERS USING HYBRID π EQUIVALENT CIRCUITS
 DC load line is found by writing KVL equation around C-E loop,
 Noting that IE = [(1 + β)/β]IC , Equation can be written as,
 which is equation of DC load line.

 Figure: DC & AC load lines for the circuit & signal responses to input signal.
Prepared by:
Dr.S.RAMESH

DARLINGTON AMPLIFIER
 Provides very high current gain (Ai).
 βD= β1β2.
 Practically: Provides very high input impedance.
 ‘E’ of Q1 is connected to B of Q2.
 ‘C’ terminals of both connected together.
 Characteristics:
 Extremely high input impedance (MΩ).
 Extremely high current gain (Several thousands).
 Extremely low output impedance (a few Ω).
Prepared
 Characteristics of Darlington amplifier are sameby:as emitter follower
Dr.S.RAMESH
(CC), both circuits are used for similar applications.

DARLINGTON AMPLIFIER - Analysis
 IE of Q1 is IB of Q2.
 So β= β1β2.
 Note: high current gain (Ai)
is generally achieved with a
min. no. of components.
 Two VBE drops are to be
considered. Otherwise biasing
analysis is similar to transistor.
 Voltage across R= R2
2, V2 × VCC ; Voltage across RE,
R1 + R2 Prepared by:
Dr.S.RAMESH
 Current through RE, ;
 Since Q1, Q2 directly coupled,
 NowPrepared by:Dr.S.RAMESH,Asso.Prof-ECE,SRM
;Therefore VEC.
; which means 𝐼𝐼𝐸𝐸2 = 𝐼𝐼𝐸𝐸1 𝛽𝛽2
DARLINGTON AMPLIFIER - Analysis
 We have ; Hence, as
 We can write
 Therefore, Current Gain can be given as
 Input impedance of the Darlington amplifier is
 In practice, two transistors are placed in a single transistor housing & 3
terminals are taken out of housing as shown in the following figure.
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Dr.S.RAMESH

BOOTSTRAP TECHNIQUE
 Bootstrapping:Technique where some part of output is used at startup.
 Bootstrap circuit: where part of output of an amplifier stage is applied to
input, to alter input impedance of amplifier.
 Used to increase input impedance.
 Due to which the loading effect on input source also decreases.
 Design looks similar to Darlington pair, having a bootstrap capacitor.
 Bootstrap capacitor is used to provide AC signal’s positive feedback to
base of transistor.
 This positive feedback help in improving the effective value of base
resistance.
 This increment in base resistance also determined Prepared by: by voltage gain of
amplifier circuit. Dr.S.RAMESH
 Why do we need High Input Impedance for Amplifier Transistor?
 Improves amplification of input signal & required in various amplifier
applications. If we have low input impedance & we will get low
amplification .
BOOTSTRAP TECHNIQUE
 BJT has an inherently low input impedance (1 Ω to 50 kΩ), this reduces
further after addition of biasing transistors such as a potential divider
network connected to base junction of a transistor.
 Improves DC stability, these resistors have effect of shunting the input
thereby reducing input resistance. Its problem where high input impedance
is required, bootstrapping increase input impedance.
 Emitter follower (CC) circuit, will achieve a one hundred-fold increase in
effective value of Rb, when voltage gain is 0.99. For a further increase in
impedance, usually a two stage direct-coupled circuit is utilized.
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Dr.S.RAMESH

MULTISTAGE AMPLIFIERS
 Need: single transistor amplifier will not be able to meet combined
specifications of a given amplification factor, Ri, Ro.
 Transistor amplifier circuits can be connected in series or cascaded.
 To increase overall small-signal Av or to provide an overall Av >1, with a very

low output resistance.
 Overall voltage or current gain is not simply product of individual
amplification factors. Prepared by:
 Ex, gain of stage 1 is a function of input Dr.S.RAMESH
resistance of stage 2. So loading
effects may have to be taken into account.

CASCADE CONFIGURATIONS
 Output of one amplifier is input to next amplifier.
 Overall Av is determined by product of gains of individual stages.
 DC bias circuits are isolated from each other by coupling capacitors.
 DC calculations are independent of cascading.
 AC calculations for gain & impedance are interdependent.
 Ex: RC Coupled BJT CE Amplifier, CE-CC Amplifier.
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CASCODE CONFIGURATIONS
 Ex: CE-CB combination.
 Arrangement provides high Ri or Zi but a low Av.
 Low Av of input stage reduces Miller input capacitance, making this
combination suitable for high-frequency applications.
 Advantage: Ro looking into collector of Q2 is
much larger than Ro of a single CE circuit.
 Frequency response
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DIFFERENTIAL AMPLIFIER (DA)
 Produces outputs is function of difference between two input voltages.
 2 modes of operation: Differential (2 inputs are different) & Common
mode (2 inputs are same).
 Important in operational amplifiers (Op-Amp). Used in low & high
frequency amplifiers, analog modulators & digital logic states.
 Basic Operation
 Assumed transistors are identically matched.
 IE are same when no input signal.
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BASIC BJT DIFFERENTIAL PAIR
 Two input terminals & one output terminal.
 Ideally, output signal is proportional to only difference between two input
signals. ; Avol is open-loop voltage gain.
 Ideal case, if v1=v2, Vo=zero. We obtain a nonzero output voltage if v1 & v2
are not equal.
 Differential-mode input voltage:
 Common-mode input voltage:
 Equations show that if v1=v2, differential-mode input signal is zero &
common-mode input signal is vcm=v1= v2.
 Amplifiers are not ideal, & common-mode Preparedinput
by: signal does affect
output. Dr.S.RAMESH
 Goal: Design of DA is to minimize the effect of common-mode input

signal.
 Objective: Describe characteristics & analyze basic bipolar DA.
 BJT DA Operation - Qualitative Description
 2 identical transistors (Q1 , Q2), whose
emitters are connected together, biased by a
constant current source IQ, which is connected to a
negative supply voltage V−.
 Collectors of Q1 & Q2 are connected through
resistors RC to a positive supply voltage V+.
 By design, Q1 & Q2 are to remain biased in
forward-active region. Prepared by:
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 Assume that two RC are equal, vB1 & vB2 are ideal sources, meaning that Ro of
sources are negligibly small.

 Both +Ve & -Ve bias voltages are used in circuit, need for coupling capacitors
& voltage divider biasing resistors at inputs of Q1 & Q2 has been
eliminated.
 If input signal voltages vB1 & vB2 in the circuit are both zero, Q1 & Q2 are still
biased in active region by current source IQ.
 VE is order of −0.7V.
 Circuit referred as DC coupled DA, so differences in DC input voltages can be
amplified.
 DA contains two transistors, it is considered a single-stage amplifier.
 Analysis will show that it has characteristics similar to CE amplifier.
 Basic DA with applied common-mode voltage
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 1st, consider the circuit in which two base terminals are connected together
& a common-mode voltage Vcm is applied.
 Transistors are biased “ON” by IQ, and voltage at common emitters is.
V E =Vcm−VBE(on).
 Q1 & Q2 are identical, IQ splits evenly between 2 transistors,
 If base currents are negligible, then iC1≈iE1
& iC2 ≈iE2, and
 From above Eqn., for an applied common
mode voltage, IQ splits evenly between
Q1 & Q2 and difference between
VC1 &VC2 is zero.
 Basic DA with applied differential-mode voltage:

Prepared by:
 Now, if VB1 increases by a few mV & VB2 decreases by same amount, or VB1
Dr.S.RAMESH
=Vd/2 &VB2=−Vd/2, voltages at the bases of Q1 & Q2 are no longer equal.
 Since emitters are common, this means that B–E voltages on Q1 & Q2 are
no longer equal.
 Since VB1 increases & VB2 decreases, then VBE1>VBE2, which means that iC1
increases by ΔI above its Q value & iC2 decreases by ΔI below its Q value.
 Potential difference now exits between two collector terminals.
 Voltage difference is created between

VC2 & VC1 when a differential-mode input Prepared by:
voltage is applied. Dr.S.RAMESH

 DC Transfer Characteristics
 Provide insight into operation
of DA.
 2 basic observations
 Gain is proportional to slopes of transfer curves about the point Vd=0.

 To maintain a linear amplifier, excursion of Vd about zero must be kept
small. Prepared by:
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 Magnitude of Vd becomes sufficiently large, essentially all of current IQ goes
to one transistor, and 2nd transistor effectively turns OFF.
 This characteristic is used in emitter-coupled logic (ECL) family of digital
logicPrepared
circuits.
by:Dr.S.RAMESH,Asso.Prof-ECE,SRM VEC.
SMALL SIGNAL ANALYSIS OF DA
 Assuming we are operating in linear range, we can also derive gain & other
characteristics of DA, using small signal equivalent circuit.
Prepared by:
 Assume that Early voltage (VA) is infiniteDr.S.RAMESH
for 2 emitter pair transistors, and
constant-current source (IQ) is not ideal but can be represented by a finite
output impedance Ro.
 Resistances RB are also included. These represent output resistance of signal
voltage sources.
 All voltages are represented by their phasor components. Since two
transistors are biased at same quiescent (Q) current, we have
 Writing a KCL equation at node Ve, using phasor notation, we have

(or)
𝑔𝑔𝑚𝑚 = 𝛽𝛽⁄𝑟𝑟𝜋𝜋
where gmrπ=β. From circuit, we see that
Solving forVπ1 & Vπ2 and substituting into Eqn.,
 We find
Prepared by:
 Solving forVe, we obtain, Dr.S.RAMESH
 One-Sided Output:
 If we consider a one-sided output at collector of Q2, then

 Substituting Eqn.Ve intoVo & rearranging terms yields,
 In an ideal constant-current source, output resistance is Ro=∞, and above

Eqn. reduces to,
 Differential-mode input is,Vd =Vb1−Vb2
 Then differential-mode gain is, 𝑔𝑔𝑚𝑚 = 𝛽𝛽⁄𝑟𝑟𝜋𝜋
 which for RB = 0 is identical to Eqn. , which was

developed from voltage transfer characteristics.
 Here & ;
Prepared by:
 Since we are dealing with a linear amplifier,Dr.S.RAMESH
superposition applies.
 Sub. above 2 Eqns. in 1st Eqn., & rearranging,

 We can write output voltage in general form,
 Compare above Eqn. with previous Eqn., then
 Observe that Acm goes to zero for an ideal current source (IQ)in
which Ro=∞.
 For a non-ideal IQ, Ro is finite & Acm is not zero for this case of a one-
sided output.
 A non-zero Acm implies that DA is not ideal.
Prepared by:
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CMRR OF DA
 Common Mode Rejection Ratio (CMRR): Ability of a DA to reject a
common-mode signal.
 Figure of merit for the diff-amp. Its defined as,
 For an ideal DA, Acm=0 & CMRR=∞.
 CMRR in decibels (dB),
 From small signal analysis, we can express the CMRR as,
 Note: Acm decreases as Ro increases. Therefore, we see that CMRR increases

as Ro increases. Prepared by:
Dr.S.RAMESH

CONCLUSION
 Small Signal Hybrid π equivalent circuit of BJT.
 Analysis of CE, CC and CB amplifiers using Hybrid π
equivalent circuits.
 Darlington Amplifier
 Bootstrap technique
 Cascade, Cascode configurations
 Differential amplifier
 Basic BJT differential pair Prepared by:
Dr.S.RAMESH
 Small signal analysis & CMRR.

REFERENCES
 Donald. A. Neamen, “Electronic Circuits Analysis and Design”,
3rd Edition, McGraw Hill Education (India) Private Ltd., 2010.
 Robert L. Boylestad and Louis Nasheresky, “Electronic Devices
and CircuitTheory”, 11th Edition, Pearson Education, 2013.
 Salivahanan and N. Suresh Kumar, “Electronic Devices and
Circuits”, 4th Edition, McGraw Hill Education (India) Private
Ltd., 2017.
Prepared by:
Dr.S.RAMESH

THANK YOU
Queries….Prepared by:
Dr.S.RAMESH
See you in the next Class!
Don’t forget to do revision.

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SRM VALLIAMMAI ENGINEERING COLLEGE

(An Autonomous Institution)

Department of Electronics & Communication Engineering

1906302 - ANALOG ELECTRONICS - I

Prepared by:Dr.S.RAMESH,Asso.Prof-ECE,SRM VEC.

 AC analysis require simplification of transistors as 2-port system.

Prepared by:Dr.S.RAMESH,Asso.Prof-ECE,SRM VEC.

Prepared by:Dr.S.RAMESH,Asso.Prof-ECE,SRM VEC.

 β is called AC common-emitter current gain.Thus,

Prepared by:Dr.S.RAMESH,Asso.Prof-ECE,SRM VEC.

Prepared by:Dr.S.RAMESH,Asso.Prof-ECE,SRM VEC.

 From input portion of circuit, using voltage divider:

 Small-signal voltage gain: Prepared by:

Prepared by:Dr.S.RAMESH,Asso.Prof-ECE,SRM VEC.

Prepared by:Dr.S.RAMESH,Asso.Prof-ECE,SRM VEC.

Prepared by:Dr.S.RAMESH,Asso.Prof-ECE,SRM VEC.

 Hence, small-signal transistor output resistance, ro become:

 ro is equivalent to Norton resistance & ro is parallel with dependent current

Prepared by:Dr.S.RAMESH,Asso.Prof-ECE,SRM VEC.

Prepared by:Dr.S.RAMESH,Asso.Prof-ECE,SRM VEC.

Prepared by:Dr.S.RAMESH,Asso.Prof-ECE,SRM VEC.

Prepared by:Dr.S.RAMESH,Asso.Prof-ECE,SRM VEC.

Prepared by:Dr.S.RAMESH,Asso.Prof-ECE,SRM VEC.

 Circuit is not very practical.

Prepared by:Dr.S.RAMESH,Asso.Prof-ECE,SRM VEC.

Prepared by:Dr.S.RAMESH,Asso.Prof-ECE,SRM VEC.

 ; combining Io & Ie;

 Output resistance ro assumed to be infinite.

 RS approaches zero, small-signal voltage gain becomes

 Load current is given by,

• Ri: CE: low KΩ range; CC: 50 to100 k Ω; CB: Tens of Ω.

Prepared by:Dr.S.RAMESH,Asso.Prof-ECE,SRM VEC.

Prepared by:Dr.S.RAMESH,Asso.Prof-ECE,SRM VEC.

 Noting that IE = [(1 + β)/β]IC , Equation can be written as,

 which is equation of DC load line.

Prepared by:Dr.S.RAMESH,Asso.Prof-ECE,SRM VEC.

Prepared by:Dr.S.RAMESH,Asso.Prof-ECE,SRM VEC.

Prepared by:Dr.S.RAMESH,Asso.Prof-ECE,SRM VEC.

Prepared by:Dr.S.RAMESH,Asso.Prof-ECE,SRM VEC.

 To increase overall small-signal Av or to provide an overall Av >1, with a very

Prepared by:Dr.S.RAMESH,Asso.Prof-ECE,SRM VEC.

Prepared by:Dr.S.RAMESH,Asso.Prof-ECE,SRM VEC.

Prepared by:Dr.S.RAMESH,Asso.Prof-ECE,SRM VEC.

Prepared by:Dr.S.RAMESH,Asso.Prof-ECE,SRM VEC.

 Goal: Design of DA is to minimize the effect of common-mode input

Prepared by:Dr.S.RAMESH,Asso.Prof-ECE,SRM VEC.

 Basic DA with applied differential-mode voltage:

 Voltage difference is created between

Prepared by:Dr.S.RAMESH,Asso.Prof-ECE,SRM VEC.

 Gain is proportional to slopes of transfer curves about the point Vd=0.

 Writing a KCL equation at node Ve, using phasor notation, we have

Prepared by:Dr.S.RAMESH,Asso.Prof-ECE,SRM VEC.

 In an ideal constant-current source, output resistance is Ro=∞, and above

 which for RB = 0 is identical to Eqn. , which was

Prepared by:Dr.S.RAMESH,Asso.Prof-ECE,SRM VEC.

Prepared by:Dr.S.RAMESH,Asso.Prof-ECE,SRM VEC.

 Note: Acm decreases as Ro increases. Therefore, we see that CMRR increases

Prepared by:Dr.S.RAMESH,Asso.Prof-ECE,SRM VEC.

Prepared by:Dr.S.RAMESH,Asso.Prof-ECE,SRM VEC.

Prepared by:Dr.S.RAMESH,Asso.Prof-ECE,SRM VEC.

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