Manal Abdulelah Areqi

manalalareqi@su.edu.ye

DL, Lecture8 Eng. manal A.al-Areqi

 Sequential Logic

The next state is dependent on the current inputs and

current state.
Next state = f (inputs, state)

DL, Lecture8 Eng. manal A.al-Areqi

 Outputs functions

Moore machine:
Current state
Output= f (state)

Mealy machine:
Current state and inputs
Output= f (inputs, state)

DL, Lecture8 Eng. manal A.al-Areqi

 Types of sequential circuits

Asynchronous Circuits:
The output depends on the input signals at any instant of
time and the order which inputs change.
Synchronous Circuits:
Storage elements observe inputs and can change state only
in relation to a timing signal (clock pulses).
When changes occur? With clock pulses
What are changes? Depends on external inputs and
otherwise

DL, Lecture8 Eng. manal A.al-Areqi

 Storage Elements

• A storage element can be constructed using two

inverters in closed loop:
.Problem: no way to change the information stored??

• To be able to change the stored value, replace

inverters with NOR gates:

Q Q’ Q
A A
’ ’
Rearrange
DL, Lecture8 Eng. manal A.al-Areqi
 SR latch

• Replace ground connections with inputs S (Set) and

R(Reset)

S R Q
0 0 Q0 No Change
0 1 0 Reset
1 0 1 set
1 1 ??? invalid condition

DL, Lecture8 Eng. manal A.al-Areqi

 S R Q
0 0 Q0 No Change
SR latch 0 1 0 Reset
1 0 1 set
1 1 ??? invalid condition

DL, Lecture8 Eng. manal A.al-Areqi

 S’R’ Latches with NAND gates

S R Q
0 0 ??? invalid
condition
0 1 1 Set
1 0 0 Reset
1 1 Q0 No Change

DL, Lecture8 Eng. manal A.al-Areqi

 SR Latches with Control input

A control input that acts as an enable signal

can be added
If C=0, S and R can’t change output
S’R’

DL, Lecture8 Eng. manal A.al-Areqi

 D Latch

Want to get rid of the undesirable S R condition where both S

and R are 1.

0 1 0
1 1
1

1
1
0 1

DL, Lecture8 Eng. manal A.al-Areqi

 D Latch………………. Cont’

Want to get rid of the undesirable S R condition where both S

and R are 1.
1 0 1
1
1
1 1
0 1
0

DL, Lecture8 Eng. manal A.al-Areqi