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Linear Lab 4
Linear Lab 4
EXPERIMENT NO 4
Lab Title: How to make Schematics and Run Simulation Environment on Cadence Virtuoso
Student Name: Amber Malik,Zainab Ali,asad Abbas Reg. No: 190340, 190350, 190380
Objective: Design Simple Circuit on Cadence software, run stimulation and generate graph
of the circuit.
LAB ASSESSMENT:
Data presentation
Experimental results
Conclusion
Date: Signature:
Lab no. 4: Designing a N-MOS transistor using Virtuoso
Objective:
Apparatus:
VMware workstation
CentOS 6.5
Candence Virtuoso
Procedure:
1. Open Virtuoso using the terminal. Open the library manager and in the
manager click on the gpdk090. In this library create a new library as shown
below.
2. After setting the name of the library, a dialog box will appear as
follows. Check Add to Existing Technology as show
3. Now select the gpdk090 in the dialog box shown
4. A window will appear in which we can design the circuit of N-MOS transistor.
5. Before starting to design the device go to options and then click on
Display Options. Set the parameters as shown below
6. After pressing OK go to the left of the screen and above these options right
Click on a box a click on Set Valid Layers. A Dialog Box will appear as follows.
Check all the options.
7. After clicking on OK a list of all the options will appear as shown
8. Now design the circuit as instructed. Use poly for gate oxide, Nwell for n + for
both Drain and Source. Cont for contacts and Metal for thin metal strip.
Oxide for the layer that will isolate the N-MOS from the outside environment.
Result:
Conclusion:
In this lab, we learned how to use the Virtuoso programme to construct an NMOS transistor.
Prior to creating the circuit specified in the task, we first choose the desired libraries. Then we
went on to choose the various kinds of layers to make the NMOS transistor.