Salim AOULMIT: Simulation de L'effet Des Pièges Sur L'efficacité de Transfert de Charge Dans Les Circuits À Transfert de Charge (CCDS)

Examination committee:
Full Name Title Quality University

Abderrachid Helmaoui Pr Chairman Bechar
Nouredine Sengouga Pr Supervisor Biskra
Lakhdar Dehimi Pr Co- supervisor Biskra
Abderrahmane Belghachi Pr Examiner Bechar
Fayal Djeffal M.C.A Examiner Batna
Amjad Meftah M.C.A Examiner Biskra
Andr Sopszak Pr Invited Lancaster

by : Salim AOULMIT

Thesis
Submitted in fulfilment of the requirements of the degree of Doctor of Science in Physics
of Semiconductors
Entitled:

Simulation de l'effet des piges sur l'efficacit de transfert
de charge dans les circuits transfert de charge (CCDs)

Democratic and Popular Republic of Algeria
Ministry of Higher Education and Scientific Research
Mohammed Khider University
Faculty of Fundamental Sciences, Biology and Nature
Dpartement of Materials Science

June 2010

i
Abstract

Charge Coupled Devices (CCDs) have been successfully used in several high energy
physics experiments over the past two decades. Their high spatial resolution and thin
sensitive layers make them an excellent tool for studying short-lived particles. The
results of detailed simulations of the charge transfer inefficiency (CTI) of a 3-phases
and 2-phases CCD are performed with the Integrated Systems Engineering Technology
Computer Aided Design (ISE-TCAD) carried out by the LCFI group at Lancaster
University (UK). Full TCAD simulations are very CPU intensive, hence the need of an
analytic modeling. In this work an analytic model has been developed for the
determination of the charge transfer inefficiency (CTI). The CTI values determined with
this model agree largely with those obtained from a full TCAD simulation. The model
allows efficient study of the variation of the CTI on parameters like readout frequency,
operating temperature, occupancy, shape of the signal charge and the clock form
voltage. Several types of defects are created in the irradiated CCDs, but only the 0.17
eV and 0.44 eV trap levels are considered since they are the most effective. At low
temperatures (< 230K) the 0.17 eV traps dominate the CTI, whereas the 0.44 eV traps
dominate at higher temperatures. The effects of the background and the Occupancy on
the CTI were observed only at low temperatures. The CTI decreases by increasing the
signal charge density while it increases with increasing trap density. The signal shape
affects the CTI mostly in the peak region. A smaller width of the potential well
decreases the CTI. The inclusion of the clock voltage effects leads to smaller CTI values
only at high temperatures. In summary it was found that the optimum operating
temperature for the both 3-phases CCD and 2-phases CCD in a high radiation
environment is found to be about 230 K for readout frequencies in the range 10 to
50MHz.

ii
Acknowledgements

First of all I should thank Allah the almighty who has helped me to accomplish this
work.

This work was carried out partly in the Laboratory of Metallic and Semiconducting
Materials (LMSM) of the University of Biskra and The Department of Physics of
Lancaster University. Therefore many people have contributed to the work presented in
this thesis. I would like to thank them for their help and support. First, I would like to
thank my thesis advisor, Professor Nouredine Sengouga and Professor Lakhdar Dehimi
for the guidance and encouragement. I would like to thank Professor Andr Sopszak for
the help and the excellent conditions that he provided for my work at Lancaster
University (UK). His leading role was crucial for the progress of the study presented in
this thesis. I would like to thank Khaled bekhouche for his invaluable help throughout
the study. I would like also to thank all LCFI members for their critical remarks and
suggestions especially Konstantin Stefanov, Steve Worm (STFC Rutherford Appleton
Laboratory, UK) and Chris Bowdery (Lancaster University, UK). Thanks to Alex
Chilingarov for his useful discussion at Lancaster University (UK) and Dahmane
Djendaoui for his cooperation. Lastly but not least I would like express my sincere
appreciations for the University of Biskra for providing short term grants during my
visits to Lancaster University.

iii
Contents

Introduction..................................................................................................................... 1
1. History .......................................................................................................................... 1
2. Problematic .................................................................................................................. 3
3. Aims and Objectives..................................................................................................... 3
4. Layout of the thesis....................................................................................................... 4
Chapter I Charge Coupled Devices (CCDs)................................................................ 5
I. 1 Introduction ................................................................................................................ 5
I. 2 MOS capacitor structure and operation modes .......................................................... 5
I. 2. 1 The metal is at a negative voltage....................................................................... 6
I. 2. 2 The metal is at a moderate positive voltage........................................................ 7
I. 2. 3 The metal is at a large positive voltage............................................................... 8
I. 3 Charge Coupled Devices ............................................................................................ 8
I. 3. 1 Surface Charge Coupled Device (SCCD) ........................................................... 9
I. 3. 1. 1 Three phases CCD structure and operation...................................................... 10
a. Charge generation ............................................................................................ 11
b. Charge collection ............................................................................................. 11
c. Charge transfer................................................................................................. 12
d. Read and measurement of the charge .............................................................. 14
I. 3. 1. 2 Two phases CCD structure and operation........................................................ 15
I. 3. 2 Buried Channel Charge-Coupled Devices (BCCD).......................................... 17
I. 3. 2. 1 Capacitance MOSnSp....................................................................................... 17
I. 3. 2. 2 Charge transfer in 3-phases BCCD.................................................................. 20
I. 3. 2. 3 Charge transfer in 2-phases BCCD.................................................................. 20
I. 4 Multi Pinned operation mode of CCD (MPCCD).................................................... 21
I. 5 CCD architectures .................................................................................................... 22
Chapter II Radiation Damage in Charge Coupled Device ...................................... 25
II. 1 Introduction............................................................................................................. 25
II. 2 Ionization damage ................................................................................................... 27
II. 3 Displacement damage ............................................................................................. 27
II. 4 Surface damage ....................................................................................................... 27
II. 5 Bulk damage............................................................................................................ 29

iv
II. 5 Deep traps in semiconductors ................................................................................. 33
Chapter III Analytic Modeling for Charge Transfer Inefficiency ......................... 35
III. 1 Introduction............................................................................................................ 35
III. 2 Theory of charge trapping...................................................................................... 37
III. 2. 1 Shockley-Read-Hall statistics......................................................................... 37
III. 2. 2 Principle of detailed balance .......................................................................... 39
III. 3 Previous works....................................................................................................... 40
III. 3. 1 Hopkinson Model ........................................................................................... 40
III. 3. 2 Hardy Model................................................................................................... 41
III. 3. 3 James Model ................................................................................................... 42
III. 4 Proposed Analytic Model (PAM) ....................................................................... 43
III. 3. 1 Introduction .................................................................................................... 43
III. 3. 2 Proposed Analytic Model for 3-phases CCD................................................. 44
III. 3. 3 Proposed Analytic Model for 2-phases CCD................................................. 46
III. 3. 4 Determination of the background state........................................................... 48
Chapter IV Results and discussion ............................................................................ 50
III. 1 Introduction............................................................................................................ 50
III. 2 Validity of the proposed analytic model................................................................ 51
III. 3 Temperature and read out frequency effect ........................................................... 54
III. 4 Background effect.................................................................................................. 61
III. 5 Occupancy effect ................................................................................................... 65
III. 6 Charge signal density effect................................................................................... 70
III. 7 Traps density effect................................................................................................ 72
III. 8 Signal shape effect ................................................................................................. 74
III. 9 Clock voltage waveform effect.............................................................................. 79
Conclusion and Outlook .............................................................................................. 84
Bibliography .................................................................................................................. 86

1
Introduction
1. History
In 1969 F. Sangster and K. Teer of the Philips Research Labs invented the Bucket-
Brigade Device or BBD. This device basically transfers charge signals from one
transistor to another [1, 2]. Not long ago, the Charge Coupled Devise CCD was
invented October 19, 1969, by Willard S. Boyle and George E. Smith at Bell Telephone
Laboratories extended the concept of BBD by inventing a transport mechanism from
one capacitor to another one [3-8]. The first notebook drawing by the others of the
device is shown in figure 1. In the notebook, presents a basic three phase configuration
[3]. CCD was born to replace the magnetic bubble memory by an analogous device
made by semiconductor and ameliorate the picture phone was being developed using
diode arrays [3, 6]. Boyle and Smith fabricated and tested in the same year the first
three phase device it was a simple row of nine 100 m metal plates separated by 3 m
spacings. The first gate electrode was used to inject charge into the second plate. The
ninth plate was used to detect charge. Plates 2 to 8 were clocked to demonstrate the
transfer process. The experiment was a success. The first technical paper was presented
by Smith at the device research conference Seattle, June 1970 [3, 4].
Although The CCD was originally conceived as a memory device, since its conception,
the charge coupled device (CCD) has found wide-spread use in image sensing
applications especially in infrared imaging system [9, 10]. Charge coupled device kept
the intention of astronomers in the detection of photons from far-away places. NAZA
used the charge coupled device in two big space projects; the Large Space Telescope
(LST) called later Hubble Space telescope (HLP 1972) and the unmanned space probes
for solar system exploration 1972 [3,10-12]. The images taken in this time were not
good enough, to reduce the dark current Boyle and Smith had invented the Buried
Charge Coupled Device BCC in 1974 [3-5]. The largest CCD developed at that time
was 512 vertical pixels by 312 horizontal pixels intended for commercial TV
applications. NASA was continuing support research in developing the CCD. In August
1992 Galileo orbited around Jupiter equipped by 800 x 800 x15 m pixels CCD [3].
Since that time the CCD image sensors are currently finding wide use in many areas of
scientific imaging, from optical astronomy, high physics energy for particles detection
to medical research. Today, the term CCD is know by many people because of their use
of video cameras and digital still cameras. The CCD has matured over the last forty

2

Figure I.1: a) Boyle and smith's original laboratory notebook entry describing the CCD
concept. b) Boyle and smith's original schematic and timing diagram for a three
phases CCD from [3].

(a)
(b)

3
years to the point that we can get a reasonable quality picture in an inexpensive toy
camera.

2. Problematic
Charge Coupled Devices (CCDs) have been successfully used in several high energy
physics experiments over the past two decades. Their high spatial resolution and thin
sensitive layers make them an excellent tool for studying short-lived particles [11-15].
These particles have lifetimes on the order of picoseconds. Following production in a
high-energy collision, particles will travel a short distance, typically several millimeters,
depending on particle energy and type and then decay into several other particles.
The Linear Collider Flavour Identification (LCFI) Collaboration has been developing
and testing new CCDs detectors for about 10 years [13, 16, 17]. Experimental results on
CCD radiation hardness were reported for example in [13, 16, 19-22]. The most recent
studies are of devices designed to reduce both the CCDs intergate capacitance and the
clock voltages necessary to drive it [20, 27]. It is well known that CCDs suffer from
both surface and bulk radiation damage. However, when considering charge transfer
losses in buried channel devices only bulk traps are important [13]. These defects create
energy levels (traps) between the conduction and valence band, and electrons are
captured by them. These electrons are also emitted back to the conduction band after a
certain time [23]. It is usual to define the Charge Transfer Inefficiency (CTI) as the
fractional loss of charge after transfer across one pixel [9-14, 23]. Charge Transfer
Inefficiency (CTI) is an important aspect in the CCD development for operation in High
Energy Physics colliders [13-17].

3. Aims and Objectives
The purpose of this work is to determine the effect of radiation damage on the Charge
Transfer Efficiency (CTE) or the Charge Transfer Inefficiency (CTI). The lake of
experimental results of the radiation damage effect on charge transfer inefficiency make
the modeling study very helpful. Full simulations of a simplified model of this device
have been performed with the Integrated Systems Engineering Technology Computer
Aided Design (ISETCAD) package version 7.5, particularly the DESSIS program
(DEvice Simulation for Smart Integrated System). Full TCAD simulations for a CCD58
and CP-CCD were performed for different readout frequencies and operating
temperatures. We expect the TCAD simulation to describe well the shape of the CTI.

4
The CTI depends on many parameters, such as readout frequency and operating
temperature. Some parameters are related to the trap characteristics like trap energy
level, capture cross-section and trap concentration (density). Other factors are also
relevant, such as the occupancy of the pixels (hits). Full TCAD simulations are very
CPU intensive and take much time to get one result, so the need to an analytic modeling
studies. An Analytic Model for the CCD58 and the CP-CCD prototypes is proposed.
The further development of Analytic Model leads to better understanding of the relevant
parameters in order to deduce the effect of radiation damage on CTI and reduce the CTI
in future CCD. This work has shown the effect of the most important parameters on CTI
such as the operating temperatures, Read out frequency of the transfer, Background
charge, Pixel occupancy, traps defect density, signal charge density and induced
waveform clock voltage.

4. Layout of the Thesis
To make the work understandable and more consistent this thesis is divided into four
chapters.
Chapter I presents the most common types of the CCD and the operation principle of
each one. Also because of the MOS capacitor is the essential element of the CCD a
review of the structure and the different operation modes of the capacitor is presented.
An overview of the defects created in the semiconductor during the process of
fabrication and the defects created in the CCD during the operation as a detector of
particles such as surface and bulk damage are given in chapter II. Chapter III concerns
the details of the Proposed Analytic Model (PAM). Results and interpretations of the
results are presented in chapter IV before presenting the conclusions as well as some
suggestions on how to reduce the charge transfer inefficiency in CCDs.

Chapter I Charge Coupled Devices (CCDs)

5

Chapter I
Charge Coupled Devices (CCDs)

I. 1 Introduction
The first digital imagers developed were called Charge-Coupled Devices (CCD)
because of the way in which accumulated charges are passed along rows in order to read
the contents of each element of an array [3]. The CCD chip is an array of Metal-Oxide-
Semiconductor capacitors (MOS capacitors) placed very close to each other; hence the
MOS capacitor is the backbone of the CCD device. Each capacitor represents a node.
Charges can be stored in a potential well created by applying an external voltage to the
top plates of the MOS structure before allowing it to spill from one capacitor to the
next, thus the name ''Charge Coupled'' [3-5]. Thus the MOS capacitor is the heart of the
CCD. This structure is not the aim of this study, but because it is much related to the
CCD, a brief study is very helpful to understand the principle operation of the Charge
Coupled Device (CCD).

I. 2 MOS capacitor structure and operation modes
The MOS structure was first proposed as a voltage-variable capacitor in 1959 by Moll,
Pfann and Garrett [3]. Its characteristics were then analyzed by Frankl and Lindner [4,
5, 23]. The MIS (Metal Insulator Semiconductor) diode was first employed in the study
of a thermally oxidized silicon surface by Terman, Lehovec and Slobodskoy [4]. A
comprehensive and in-depth treatment of Si-SiO
2
MOS diode can be found [4]. The
MOS diode is the most useful device in the study of semiconductor surfaces. Since the
reliability of all semiconductor devices are intimately related to their surface conditions,
an understanding of the surface physics with the help of MOS diodes is of great
importance to device operations.
An ideal MOS structure and its band diagram are shown in Figure I.1 for a p type
semiconductor. An ideal structure means that:
1. At zero applied bias the work functions of the metal and the semiconductor are
the same.

6
2. The only charges that can exist in the structure under any biasing conditions are
those in the semiconductor and those with equal and opposite sign on the metal surface.
3. There is no carrier transport through the insulator (oxide).

Figure I.1: Structure (a) and energy band diagram (b) of ideal Metal-Oxide-
Semiconductor for a p type semiconductor.

In Figure I. 1b,
m
is the metal work function,
b
the potential barrier between the Fermi
level E
f
and intrinsec Fermi level E
i
and
s
(
i
) is the semiconductor (oxide) electron
affinity.
When the MOS capacitor is biased with a positive or negative voltage, basically three
cases may exist at the semiconductor surface.

I. 2. 1 The metal is at a negative voltage
The top metal gate is at a negative voltage with respect to the substrate. An electric filed
will be induced with the direction shown in Figure I.2a (left). If the electric filed were to
penetrate into the semiconductor the majority carriers (holes) would experience a force
towards the oxide-semiconductor interface, and a layer of accumulated holes appears at
the Si-SiO
2
interface. In this case the MOS capacitor is in the accumulation mode.
Figure I.2a (right) shows the energy band diagram of the semiconductor in
accumulation mode. The valance band edge is closer to the Fermi level at the oxide-
semiconductor interface than in the bulk of the semiconductor, which implies that there
is an accumulation of holes. The Fermi level remains constant in the semiconductor
since there is no current through the oxide (Ideal MOS).
Metal
Oxide
(a)
V
G
S
e
m
i
c
o
n
d
u
c
t
o
r

(b)
E
c

E
v

E
f

q
b

Vacum level E
v

O
x
i
d
e

q
s

q
m

E
i

Metal Semiconductor
q
i


7

Figure I.2: Operation modes of ideal MOS capacitor (p type semiconductor): a)
accumulation, b) depletion and c) inversion modes.

I. 2. 2 The metal is at a moderate positive voltage
Figure I.2b (left) shows the same MOS capacitor in which the top metal gate is at a
positive voltage with respect to the substrate. This figure shows the direction of the
induced electric filed. If the electric filed penetrates the semiconductor the majority
carriers (holes) experience a force away from the oxide semiconductor interface. Due to
the pushing away from the interface, a negative space charge region is created because
of the fixed ionized acceptor atoms and then the capacitor is operating under the
E
c

E
fi

E
f

E
v

P (sc)
E
c

E
fi

E
f

E
v

P (sc)
Metal
Oxide Semiconductor (p)
E
c

E
fi

E
f

E
v

P (sc)
Accumulation layer
Depletion layer
Inversion layer
(a)
(b)
(c)
V
G
< 0
V
G
> 0
V
G
>> 0

8
depletion mode. Figure I.2b (right) shows the energy band diagram of the
semiconductor in the depletion mode. The conduction and valance bands bend
downwards. The conduction band and intrinsic Fermi level bends towards the Fermi
level at the oxide-semiconductor interface. The valance band bends to became away
from the Fermi level indicating a space charge region. The width of the induced space
charge region
d
x is given by [3],
A
s s
d
qN
x
2
= , (I.1)
Where
s
is the permittivity of silicon,
s
is the surface potential, q is the electron
charge and
A
N is the acceptor doping.

I. 2. 3 The metal is at a large positive voltage
Now a large positive voltage is applied to the metal with respect to the substrate. This
implies a large induced electric filed (fig 1.2c left). The electric filed pushes away from
the oxide-semiconductor more holes than the first case and also can pull minority
carriers (electrons) to the interface. Thus, at the interface there are more electrons than
holes and in this case the semiconductor at the interface becomes an n type. The MOS
capacitor is in the inversion mode (the p type semiconductor becomes n type at the
interface). Figure I.2c (right) shows the energy band diagram in the inversion mode.
The bands bend more than the previous case (depletion mode) so that the intrinsic Fermi
level at the interface is below the Fermi level and the conduction band is closer to the
Fermi level than the valance band.

I. 3 Charge Coupled Devices
As mentioned above a MOS capacitor operates in d de ee ep p d de ep pl le et ti io on n which is the basic
element of a CCD. The charge signal can be stored in the MOS capacitor and
transferred from one capacitor to another. There are two classes of charge coupled
devices: Surface Charge Coupled Device (SCCD) and buried charge coupled device
(BCCD). In each class there are several kinds: one phase, two-phase, three-phase, four-
phase and so on depending on the manner in which the clock used for the marching
orders. The most used in practice are 2-phases and 3-phases CCD. In this section we
will develop a brief study, structure and operation, of the two types of the CCD. We will
begin with the latter since it is historically the first to be conceived.

9
I. 3. 1 Surface Charge Coupled Device (SCCD)
The energy band diagram for a MOS in deep depletion mode with no stored charge
signal is shown in Figure I.3a [4] where
0 s
is the surface potential. Figure I.3b shows
the variation of the potential for an empty well (absence of charge) in the p-SCCD (p
type semiconductor) from the surface to the substrate bulk for two different values of
the gate voltage.

Figure I.3: a) Energy band diagrams for a surface channel MOS capacitor in deep
depletion without signal in the potential well, b) variation of the potential well from the
surface to substrate bulk [4].
V
G

Empty potential well
V
G

q
s

q
s

SiO
2

Metal
E
f

Silicon (p)
(a)
P
o
t
o
n
t
i
a
l

(
V
)

h
+

e
-

Si-SiO
2
interface
Surface potential
Potential well
Depletion region
Epitaxial layer (p 10m )
SiO
2

Substrate (p
+
500m )
Distance
V
G
=10
V
G
=5
Gate
(b)

10
The depletion region (channel) where the charge is generated and the potential wells are
formed by clocking phases is close to the Si-SiO
2
interface. The charge signal is
transferred throughout the channel just at the Si-SiO
2
interface, hence the name surface
channel CCD.

I. 3. 1. 1 Three phases CCD structure and operation
Figure I.4 shows the basic structure of 3-phases surface CCD, the simplest CCD which
was conceived by Boyle and Smith [3, 4]. The basic cell which corresponds to one
pixel, is formed by three adjacent MOS capacitors. The 3-phases CCD appellation is
because every third gate is connected to the same clock driver (fig I.4). In addition to
the two pixels (main body) shown in the figure, there are an input part, containing an
input diode and an input gate to inject the charge in the device and an output part which
is constituted of an output gate and an output diode that serves to collect the charge
from the device (CCD body).

Figure I.4: A cross-section view of a 3-phases SCCD. The input stage is constituted of
an input drain (ID) and an input gate (IG). The output stage is constituted of an output
gate (OG) and an output drain (OD).

The CCD must perform four primary tasks in order to generate an image of an incoming
photon (particle). These performance functions are: charge generation, charge
collection, charge transfer and charge measurement. We will give in this section a terse
study of each performance. A detailed study is out of the scope of this work.

P
1

P
3

P
2

n n
ID
IG
OG
OD
P substrat
Input
stage
Output
stage
Transfer stage (main body of 3phs CCD)

11
a. Charge generation
The first step in the operation of the CCD is charge generation which is the ability of a
CCD to capture an incoming particle (or photon) and generate an electric charge. The
fraction of incident particles (photons) that produces a useful charge in the
semiconductor

Figure 1.5: Schematic description of (a) particle penetration through de device and
charge generation, (b) collection of the generated charge within the well formed by the
applied clock voltage on the gate.

is called Quantum Efficiency (QE). The incoming particle (or photon) goes through the
CCD, interact with the silicon layer and generate electron-hole pairs.
A particle or a photon with an energy less than 1.14 eV (the energy gap of silicon)
passing through silicon can not generate free electron-hole pairs, it is said that silicon is
transparent. If the particle or the photon has an energy in the range of 1.14 to 3.1 eV, it
will be absorbed and a single electron-hole pair is generated. A particle (photon) with an
energy greater than 3.1 eV generate multiple electron-hole pairs at each (fig I.5). The
average number of electrons generated by a particle (photon) with energy E > 10 eV is
given by [3]
( )
( ) eV
eV E
n
65 . 3
_
= , (I.2)
Where 3.65 eV is the energy required to generate an electron-hole pair in silicon. For
example the number of electrons generated by 5.9 KeV x-ray is 1620 electrons.

b. Charge collection
Charge collection is the ability of the CCD to accurately reproduce an image from the
generated electrons. The electron-hole pairs are free to move and diffuse in the silicon
(a) (b)

12
lattice. The life time of electrons and holes in high quality silicon are about 10
-3
s, and
decrease with traps until 10
-9
s, before recombining [4, 26]. Holes are pushed away to
the substrate (for p type silicon substrate) by the electric filed (fig I.3b). The charge
storage in the potential well is a very important step, otherwise information will be lost.
By manipulating the clock voltage, the generated charge is spontaneously collected
under one phase of the pixel (fig I.5b). Note that even the charge created under other
phases is rapidly collected in the same well due the induced electric filed by the applied
voltage.

c. Charge transfer
Once the charge has been collected into the pixels, the charge signal must be transferred
from one pixel to the next until it reaches the output register. This step is accomplished
by manipulating the clock voltage on a parallel sequence of gates that form a CCD
register. In a typical 3-phase CCD, the charge contained in the potential well beneath a
CCD gate (collected charge) is transferred to the next and following gates by what is
usually described as a simple process of phased clocking. As mentioned above all
capacitors are in a depletion regime, so all gates are initially at a V
0
voltage (V
0
is
positive if the substrate is p type as in our case). The charge collected under one phase
(gate), p
1
for example (fig I.6a), which is held at a positive voltage greater than V
0
,
while the other two phases (p
2
and p
3
) are still at V
0
(fig I.7). The charge signal is kept
into the potential well under the phase p
1
. The adjacent phase in the desired direction of
motion (p
2
) is taken at the same voltage as at the first phase (fig I.7). The charge signal
becomes distributed under p
1
and p
2
, the potential well is extended under the two phases
(Fig I.6b). To force the entire charge signal to be collected under p
2
(Fig I.6c), the
voltage at p
1
is reduced to V
0
(fig I.7). After that the voltage at the third phase (p
3
) is
increased to the same value as at p
2
(fig I.7), so that the potential well is formed under
p
2
and p
3
and the charge signal is shared between the two phases (Fig I.6d). The next

13

Figure I.6: Mechanism of charge transfer in 3-phases CCD, the square pulse is
considered.
a
b
c
e
d
P
1
>V
0

P
2
V
0

P
3
V
0

P
1
>V
0

P
3
=V
0

P
2
>V
0

P
3
=V
0

P
2
>V
0

P
1
=V
0

P
1
=V
0

P
2
>V
0

P
3
>V
0

P
3
>V
0

P
2
=V
0

P
1
=V
0


14
transfer begins when p
2
is returned to V
0
(Fig I.7e) and ends with the entire charge
signal under p
3
. Repeating a similar sequence with p
3
and p
1
will move the charge signal
under the next p
1
phase (next pixel), completing a one-pixel transfer for the 3-phase
CCD.

Figure 1.7: Square clock sequence applied to the gates for transferring the charge signal
from one pixel to another until reaches the output register for 3-phases CCD. Not that
the charge signal is completely transferred to the next pixel at the step (g).

a. 4 Read and measurement of the charge
The last step of the CCD operation is to measure and read the charge collected in each
pixel. This is accomplished by dumping the charge onto a small capacitor connected to
an output MOSFET amplifier. A small capacitance means a great gain; a 50 fF
capacitance produces a gain of 3.2 V per electron [3]. The output amplifier generates a
voltage for each pixel proportional to the charge signal transferred. Figure I.8 illustrates
the on-chip amplifier; its main purpose is the conversion of a charge signal into a
voltage or a current. By accomplishing this step an image corresponding to the
incoming particles (photons) is produced.

V
V
V
P
1
=V
0

P
1
= 0
P
2
=V
0

P
2
= 0
P
3
=V
0

P
3
= 0
time
time
time
(a) (b) (c) (d) (e)
(f)
(g)

15

P
2
P
3 OG RG RD
Reset
First
SF
Second
SF
Load
CCD Output
OD
Substrate
C
n
0V
CS
External load

Figure I.8: A diagram of a CCD output circuit showing a cross section of the last few
gates and a schematic representation of the output on-chip amplifier with a floating
diffusion detection node (OG: Output Gate, RG: Reset Gate, OD: Output Drain, RD:
Reset Drain) [27].

I. 3. 1. 2 Two phases CCD Structure and operation
Figure I.9 shows a schematic view of a cross section of the 2-phases CCD. The basic
cell, which corresponds to one pixel, is formed by two adjacent MOS capacitors (two
gates or two phases). The 2-phases CCD appellation is because every second gate is
connected to the same clock driver. As for the three phases, the input part constituted by
an input diode and input gate that serves to inject the charge in the device. Also the
output part is constituted by an output gate and an output diode which serves to collect
the charge from the body of the CCD. The body is constituted of many pixels according
to the application of the device.
The fundamental idea is to create a difference of surface potential between the two gates
connected to the same clock, which constitute one phase. The two metals which form
the gates are not at the same depth of the oxide. Thus, even the two gates are connected
to the same clock voltage; the potential created under these two gates is different due to
the difference of the oxide thickness.


16

Figure I.9: A cross-section view of a 2-phases surface channel charge coupled device
(2-SCCD). The input stage constituted by Input Drain (ID) and Input Gate (IG), the
Output Stage constituted by Output Gate (OG) and Output Drain (OD).

Like for the 3-phases CCD, the charge is generated by the incoming particle (or
photon). The charge reaches the output stage and is amplified for reading in the same
manner as in the 3-phases CCD. The difference in the operation compared to the 3-
phases CCD is only in how the charge is transferred through the device. First the SMOS
(Surface MOS) capacitors are all in the depletion regime. If the substrate is p type the
gates must be at a positive voltage with respect to the substrate (:I. 2. 2). The charge is
collected into the deeper potential well (under the second gate of the phase) (fig I.10).
The barrier potential created by the first gate of the phases serves to:
1) Prevent charge to move back to the previous phase.
2) Prevent charge to split with the neighboring phase.
To move the charge from one phase to the next, one should increase the voltage in the
latter to which the charge would be moved (in the desired direction). The charge signal
stabilises in the deeper well under the second gate (fig I.10). By repeating these
sequences to p
1
and p
2
the charge signal reaches the output stage.

P substrat
Input
stage
Output
stage
P
P
2

OG
OD
n
ID
IG
n

17

Figure I.10: A square clock sequence applied to the gates for transferring the charge
signal from one pixel to another until it reaches the output register for 2-phases CCD.
Note that the charge signal is completely transferred to the next pixel at the step (b).

I. 3. 2 Buried Channel Charge Coupled Device (BCCD)
In the SCCD the charge is collected and transferred at the oxide-semiconductor (Si-
SiO
2
) interface. There is a big limitation of the SCCD, due to the large density of defect
(traps) at the Si-SiO
2
interface [4, 5] because of the surface irregularities at the interface.
To alleviate this problem, the buried channel CCD (BCCD) was invented in 1974 by
Boyle and Smith [3, 4]. In the BCCD a layer of a semiconductor of opposite type to the
substrate is added just at the Si-SiO
2
interface. The charge signal in BCCD, is not
transferred at the Si-SiO
2
interface. To clarify how the BCCD works, a brief study of
the Metal Oxide n-Semiconductor p-Semiconductor structure (MOSnSp) is presented.

I. 3. 2. 1 The MOSnSp Capacitance
The MOSnSp Capacitance structure is shown in the figure I.11a, it is constituted of a
MOSn capacitance in series with an n-p junction. If the gate (metal or polysilicon), the p
substrate and the n region are all taken at zero voltage the depletion zone is formed
between the p and n regions. The MOSn capacitance is in the flat band regime (fig
P
2
=V
0

P
2
>V
0

P
1
>V
0

P
1
=V
0

P
a1

P
b1

P
a2

P
b2

V
V
(a) (b)
time
time

18
I.11b). When the n region is biased with a positive voltage, the depletion region
between n and p increases (the pn junction is reversely biased) and the MOSn
capacitance is in the depletion regime. A potential well full of electrons is created in the
n semiconductor (Fig I.11c). To create an empty well, the n region is reduced until the
depletion zones overlap (the MOSn depletion zone resulting from biasing the gate and
the depletion zone resulting from reversely biased np junction). By this way, an empty
potential well is created far from the the Si-SiO
2
interface (fig I.12). In three
dimensions, this well is like a buried channel within the device (this is why it is called
the buried channel) where the charge is transferred along this channel.
Figure I.13 shows the potential profile in the BCCD for different voltages applied to the
gate. The minimum of the potential well, where the channel is formed, is entirely within
the n-type layer, away from the problems that would occur near the interface with the
oxide layer. The most used types of the BCCD are three and two phases.

Figure I.11: Structure of metal oxide semiconductor type n and semiconductor p in
serial (MOSnSp) (a), energy band at no polarization and (c) energy band with V
n

positive.
V
G
= 0 V
V
n
> 0V
B
C

E
f

B
V

(c)
V
G

(a)
V
n p
V
n
= 0V
V
G
= 0V
B
C

E
f

B
V

(b)

19

Figure I.12: The energy band of the MOSnSp structure: (a) with no gate bias and (b)
with negative gate bias.

Figure I.13: Variation of the potential from the surface to the bulk for different
voltages applied to the gate of the MOSnSp structure [13].

E
C

E
F

E
V

Bottom of the potential well
V
n
> 0
V
G
= 0
(a)
E
F

E
V
E
C

V
G
< 0
V
n
> 0
Bottom of the potential well
(b)

20
I. 3. 2. 2 Charge transfer in three BCCD
Figure I.14 shows a schematic cross section view of 3-phases BCCD. To move the
charge signal collected in the well from one phase to the adjacent, two conditions
should be accomplished. First, the output diode and input diode are at a positive voltage
with respect to the substrate to reverse bias the pn junction (the voltage at the output
diode is greater than the voltage at the input diode). Second, the gate in which the
charge would be moved is negatively biased to make the potential under it deeper than
its precedent. This will make the MOSn capacitance in deep depletion (fig I. 12).

Figure I.14: A cross section view of 3-phases buried channel. The input stage
constituted by Input Drain (ID) and Input Gate (IG), the output stage constituted by
Output Gate (OG) and Output Drain (OD).

I. 3. 2. 3 Charge transfer in two phases BCCD
As mentioned before in 2-phases CCD a difference of surface potential should be
created between the two gates in the same phase. In 2-phases BCCD the surface
potential difference is created by adding a layer of a semiconductor of the same type as
the substrate in the buried layer under the first gate of the phase (fig I. 15). The transfer
process of the charge signal is the same as in the 2-phases SCCD. Figure I.16 shows the
potential in two phases BCCD obtained by the DESSIS TCAD simulator. The potential
well under the second gate of each phase is deeper than under the first gate.

P
1

P
3

P
2

n
n
ID
IG
OG
OD
P substrate
Input
stage
Output
stage
n buried channel

21

Figure I.15: A cross section view of two phases buried channel CCD

Figure I.16: The potential distribution in two phases buried channel CCD obtained by
the DESSIS TCAD simulation.

I. 4 Multi Pinned operation mode of CCD (MPCCD):
The charge signal in the BCCD is transferred throughout the device in the volume not at
the Si-SiO
2
interface. Electrons have mobility in the volume much greater than in the
interface which gives an improvement in transfer efficiency, in addition to minimizing
the effect of the interface traps which give a maximum transfer. The disadvantage of the
BCCD is the weak transfer ability which is two times less than in the SCCD [3]. The
One pixel
ID
IG
P
1

P
2

a b a b
OG
OD
p substrat
n buried channel
p
+

n
+

n
+

Transfer stage
Input
stage
Output
stage

22
dark current due to nSi-SiO
2
interface

of 5-10 nAs
-1
cm
-1
is still not acceptable in
scientific applications. To reduce the dark current to the range of 100-300 pAs
-1
cm
-1

requires the elimination of the surface states contribution [3]. This elimination can be
achieved by the Multi Pinned Phases (MPP) operation mode [18]. To operate the
BCCD in MPP mode, the array clocks are sufficiently negatively biased (about 4V,
the MOSn capacitor is in inversion regime) to allow holes to populate the surface states
at the Si-SiO
2
interface and eliminating the surface dark current generation. In this
mode the surface potential is pinned at the substrate potential. Pinning is not possible
during charge transfer. However if this period is much shorter than the integration time,
the dark current will not deteriorate significantly [13]. A potential barrier between the
pixels is required to provide potential wells for charge collection during integration,
when all the gates are equally biased. In MPP CCDs additional p-type implant is
introduced under one of the gates of each pixel to provide the barrier [13].

I. 5 CCD architectures
In the application for the imagery detection or in the particle detection, an enormous
number of pixels are planted on an area that designed to this purpose. Figure 1.17 shows
a schematic cross section of an area constituted by many pixels. Pixels are arranged in
lines and each line is separated from the adjacent lines by a stop channel to avoid
smearing of the charge signal. The charge signal is transferred in lines from one pixel to
the other till it reaches the end of the device (output register) where it is read and
measured.
In a classic CCD the charge signal is transferred across each vertical line to the end (fig
I.18a), called the vertical register. Then the charge signal is transferred along the
horizontal line until it reaches the output register, called the horizontal register (fig
I.18a). In the modern CCD the charge is only transferred in the vertical register to the
amplifier directly (fig I.18a). This type of CCD is called Column Parallel Charge
Coupled Device (CP-CCD). Figure I.19 shows two pictures of 2-phases CP-CCD made
by the LCFI group in Oxford (UK). The first one (Fig I.19a), 8X enlarged shows a part
of columns and the read out circuit. The second one (Fig I.19b), 25X enlarged shows
the nearest part of columns to the read out circuit. The columns are clearly shown and it
can be seen that the charge is only read from four columns.

23

Figure 1.17: A schematic view of an area where many pixels are planted in lines and
each line is separated from its neighbor by a stop channel to prevent charge to smear
between lines.

Figure I.18: a) The classic CCD: the charge is transferred horizontally and then
vertically to the read out. b) the modern CCD: the charge is transferred only vertically
to the read out.
One pixel
Stop channel
V
e
r
t
i
c
a
l

t
r
a
n
s
f
e
r

R
e
a
d

O
u
t

Horizontal transfer
Amplifier
Read Out
(a) (b)

24

Figure I.19: Pictures of 2-phases CP-CCD used by the LCFI group at Oxford
University. a) 8X enlarged shows a part of columns and the read out circuit. b) 25X
enlarged shows the nearest part of columns to the read out circuit.

C
P
C
C
D

1
0

x

4
0
0

p
i
x
e
l
s

R
e
a
d

o
u
t

O
n
e

c
o
l
u
m
n

R
e
a
d

o
u
t

o
f

4

c
o
l
u
m
n
s

(a)
(b)
Chapter II Radiation Damage in Charge Coupled Devices

25

Chapter II
Radiation Damage in Charge Coupled Devices

II. 1 Introduction
Silicon is one of the most commonly used materials in semiconductor detectors. It is
extensively used in recent high-energy physics experiments for its compactness, low
energy required for the generation of electron-hole pairs and capability of high precision
tracking [28, 31]. The high density (2.33 gcm
-3
) leads to a large energy loss per
traversed length of ionizing particle. Length of the ionizing particle (3.8 MeV /cm for a
minimum ionizing particle), means that one can build extremely thin detectors that
produce signals large enough to be measured (the energy loss allows measurable signals
even for thin detectors) [32]. Low electron-hole pair energy threshold ensures good
energy resolution and a large number of charge carriers generated. The mobilities of
electrons (1350 cm
2
V
-1
s
-1
) and holes (450 cm
2
V
-1
s
-1
) are quit high in silicon, which
gives a short time of collection (10 ns) [32].
Like in every material, silicon contain surface and bulk defects. The bulk defects may
be;
1) Either foreign atoms (impurities), which are intentionally introduced as dopant
atoms (shallow-level impurities), recombination centers (deep-level impurities)
to reduce the minority carrier lifetime, or deep-level impurities to increase the
substrate resistivity or unintentionally incorporated during crystal growth and
device processing (oxygen) [28-34].
2) Crystalline defects, which are characterized by their geometry. Various types of
defects are shown schematically in Fig. 2.1. The open circles represent the host
atoms (e.g., silicon). The defects are: (1) foreign interstitial (e.g., oxygen in
silicon), (2) foreign substitutional (e.g., dopant atom), (3) vacancy, (4) self
interstitial, (5) stacking fault, (6) edge dislocation, and (7) precipitate.
3) Surface defects (and interface, for example Si-SiO
2
interface in MOS
technology) which result from the strained or dangling silicon bonds at the
boundary between the two materials [3, 29-34]. Surface and interface defects are

26
important in density, and affect the silicon electrical and mechanical properties,
which leads to a decrease in the performance of semiconductor devices. The
surface and interface defects are more directly responsible for the increase of the
leakage current, and also contribute to a loss of detector resolution owing to
fluctuations in the leakage current [3-6, 29-34].

(a)

(b) (c)

Figure II.1: a) The corncob illustrates a native vacancy and interstitial defects. b, c) A
schematic representation of defects in semiconductors [32].

In the field of Charge Coupled Device radiation detection, while passing through the
detector, radiation causes lattice defects in the silicon. These defects affect both the
sensitivity and the lifetime of the detector. Radiation deposits its energy in the silicon
lattice in various ways. The radiation energy may simply be transferred to mechanical
vibration of silicon atoms and be manifested as heat. Some of which can result in
permanent damage. Two of the more harmful effects are of most concern in electronic

27
devices: the first is ionization damage, the second is atomic displacement (bulk
damage).

II. 2 Ionization damage
Low energy particles (such as beta particles, gamma rays, not accelerated electrons and
X-rays) deliver only a small energy to recoil the Si atom and mainly isolated
displacements, or point defects, can be created. This energy hence creates maily
electron-hole pairs and is called Ionizing Energy Loss (IEL) [13, 29, 34]. If the incident
radiation causes ionization in the active silicon layer, the effect is not permanent. Holes
will migrate towards the substrate or the channel stop, and the electrons towards the
potential wells where they will be collected as part of the signal. This is precisely the
desired effect used to detect the passage of high-energy particles or X-rays. If the
incident radiation causes ionization in the oxide or other insulator, however, the effect
can be permanent. Essentially, the ionization damage will be permanent in the Si-SiO
2

interface. We will discuss how the ionization damage affects the CCD performance in a
later section.

II. 3 Displacement damage
Major damage arises from heavy charged particles, with sufficiently high energy, like
protons, neutrons and accelerated electrons. A Si atom can be knocked out from its
lattice position forming a point defect, an interstitial silicon atom and a vacancy,
(Frenkel pair). The displaced atom is also referred to as a Primary Knock on Atom
(PKA). The energy transmitted to the atom is called Non Ionizing Energy Loss (NIEL).
The PKA may have sufficient energy to undergo collisions with lattice leaving a trail of
displaced atoms which is referred to as a cluster defect. It should be noted, that CCDs
are made of relatively high doped device-grade silicon. Radiation induced point defects
and damage clusters in such material have been studied extensively in the past decades
and significant knowledge about their properties has been accumulated [31, 33].

II. 4 Surface damage
At the Si-SiO
2
interface there are a number of interface traps, which result from the
strained or dangling silicon bonds at the boundary between the two materials (fig II.2).
Ionizing radiation will break weak bonds and causes the density of these traps to
increase, giving raise to radiation-induced interface traps [3]. Ionizing radiation also

28
creates electron-hole pairs in the silicon dioxide (S
i
O
2
). The silicon dioxide has a much
wider band gap than the semiconductor, and therefore about 18 eV of deposited energy
is required for the creation of one electron-hole pair by ionizing radiation, and the mid-
gap trapping states are correspondingly deeper [13, 34].

Figure II.2: A schematic view of Si-SiO
2
interface region showing dangling and
hydrogen-passivated bonds.

Some pairs recombine, but some of them drift in the oxide electric field. The existence
of large numbers of deep trapping centers in the oxide means that electron-hole pairs
created in the oxide layer which escape recombination can be trapped for long periods
of time, or essentially permanently. Electrons which escape recombination, usually
swept out of the oxide very quickly, reach the positive electrode and are not captured by
traps because of their high mobility. Electrons mobility is about 20 cm
2
V
-1
s
-1
in SiO
2
at
room temperature and increases to about 40 cm
2
V
-1
s
-1
at temperatures below 150 K.
Therefore, for typical 100 nm thick oxide it takes about 5 ps for all electrons to reach
the positive electrode, if the applied electric field is 10
5
V/cm [13]. Holes mobility has
been measured in SiO
2
at room temperature in the range 10
-4
to 10
-11
cm
2
V
-1
s
-1
. Because
holes are very slow, transport through the oxide takes place in the time scale of seconds
or hours. Over time, they move towards the negative electrode and some of them are
captured by oxide traps within several nanometers from the Si-SiO
2
interface [3-6, 13].
For a positive bias (i.e., the gate is positive with respect to the silicon surface, the case
in SCCD with a p substrate) holes are trapped near the Si-SiO
2
interface. The positive
charge buildup due to the trapped holes alters the electric field in the CCD, and results
in a shift in the flat-band voltage. Trapped holes change the parameters of MOS
S
i
l
i
c
o
n

d
i
o
x
i
d
e

S
i
O
2

S
i
l
i
c
o
n

Oxygen
Silicon
Hydrogen
Hydrogen-passivated bond
Dangling bond

29
structures in a way identical to applying an external voltage to the gate. The radiation-
induced voltage shift V
sh
can be expressed as
,
ch ox
ox
sh
Q d
q
V =
(II. 1)
where
ox
is the oxide permittivity, d
ox
is the oxide thickness and Q
ch
is the change of
the surface charge density at the Si-SiO
2
interface [3, 4, 13].
In the buried n-channel CCDs, gate voltage is negative, therefore, the radiation-induced
voltage shifts are not a significant problem. Small band voltage shifts in the order of
few mvolts can be accommodated by the adjustment of the amplitude of the gate drive
voltages. However, a limitation can be imposed from the maximum allowed supply
current and power dissipation in the gate drivers and the CCD chip, because the
dissipated power is proportional to the voltage amplitude squared [35]. The failure
mode can be caused from parasitic charge injection from the input structures, or if the
output node becomes negative with respect to the potential of the output gate [35]. In
the second case the electrons are not attracted to the output node. It is also possible that
the output node cannot be reset to V
rd
because of the threshold voltage shift in the reset
MOSFET. Severe band voltage shifts can distort the shape of the potential wells and
cause large charge transfer losses.
In summary, ionizing radiation creates trapping states at the Si-SiO
2
interface. Theses
states can be deep or shallow trapping states. If they are deep, holes or electrons can be
held semi permanently at the interface, resulting in charge buildup. Interestingly, the
negative trapped electrons can compensate for trapped holes and actually reverse the
damage. The shallower trapping states can severely degrade the charge transfer
efficiency in a surface channel CCD [35]. Finally, the interface traps due to ionization
damage can affect the output transistor on the CCD, manifesting itself as increased read
noise due to trapping. The interface states are the source of dark current especially in
SCCDs.

II. 5 Bulk damage
As mentioned above the displacement damage is divided into two types, point and
cluster defects. The permanent effects of displacement damage are not confined to the
surface as in ionization damage; they are also seen in the semiconductor bulk. Therefore
in modern CCDs (BCCDs), the displacement damage is more important than ionization
damage. The primary recoil atom (or PKA) can only be displaced if the imparted energy

30
is higher than the displacement threshold energy E
th
of approximately 25 eV [33]. A
recoil Si atom needs about 5 KeV of energy to displace other Si atoms in the crystal.
The maximum energy E
max
imparted to the silicon depends on the type of the particle
and its kinetic energy and is given by [3, 33],
( )
2 max
4
Si p
Si p
c
m m
m m
E E
+
= , (II. 2)
Where, m
p
and m
Si
are the particle and silicon masses respectively and E
c
is the kinetic
energy of the particle. This equation, (considering the elastic scattering between the
incoming particle and the Si atom in a no relativistic approach), reveal that neutrons
need a kinetic energy of about 185 eV for the production of a Frenkel pair and more
than 35 KeV to produce a cluster. Electrons, however, need a kinetic energy of about
255 KeV to produce a Frenkel pair and need more than 8 MeV to produce a cluster.
The more complicated radiation damage phenomena arise from the presence of defect
clusters which take place in a small region, usually several tens of nanometers wide
[13]. A defect cluster contains a high density of interstitial (I) and vacancy (V) pairs, as
well as a significant volume disordered regions which probably amalgamate into multi-
vacancy complexes [36]. Figure II.3 shows a Monte Carlo simulation of a recoil atom
track of a primary energy of 50 KeV [36]. Clusters often have a complicated behavior
and a more damaging effect on the properties of semiconductor devices than point
defects and they are not discussed in this work.
The generated interstitial (knocked out) Si atoms and vacancies (empty lattice sites) are
mobile above 100 K and are considered unstable defects when first created [3, 13, 33].
Most of these defects recombine before they form stable defects and cause permanent
damage. On the average only 2% of the initially generated pairs remain. The pairs
which do not recombine will migrate to more favorable positions in the lattice to form
stable defects [3, 35]. These defects also interact with atoms introduced during crystal
growth (like Oxygen, Carbon) or dopants (Phosphorus, Arsenic) and form stable
defect complexes. Figure II.4 shows a schematic description of the stable defect
complexes in silicon. These stable defects locally distort the symmetry of the crystal
and introduce energy levels in the silicon band-gap. The common radiation defects in
silicon are:
Interstitial Oxygen + Vacancy (O-V) called A-center.
Substitutional Phosphorous + Vacancy (P-V) called E-center.

31
Formation of two vacancies (two missing silicon atoms right next to each other
V-V) called Divacancy.
Interstitial Silicon + Vacancy (Si
i
+ V) called Substitutional Si, or defect repair.

Figure II.3: A typical trajectory of a recoil Si atom and the production of terminal
clusters [36].

Figure II.4: A schematic view showing the different radiation damage (point defect) in
silicon.
Interstial
Oxygen
Divacancy (VV)
Vacancy (V)
Interstitial (Si)
Substitutional
Phosphorus
V
V V
V
A-center
E-center
V

32
In BCCDs, charge is stored and transported in the buried channel which is n-type
phosphorus doped epitaxial silicon. The most important radiation-induced defects,
observed in n BCCDs are the A-center at 0.17eV from the conduction band with a
capture cross section
2 14
10

= cm
n
[3] and the E-center, situated at 0.44 eV from the
conduction band with a capture cross section
2 15
10

= cm
n
. The divacancy has two
states (has two levels in bandgap). One of them at 0.41 eV from the conduction band
with
2 15
10 . 2

= cm
n
(single charged when occupied,
1 0
V V ). The other one at 0.25
eV from the conduction band with
2 16
) 017 . 0 exp( 10 . 4

= cm KT
n
(doubly charged
when occupied,
=
V V ). Table II.1 presents the most important results and data from
studies on radiation-induced bulk defects in n-type silicon, along with some
experimental conditions [13].

A-Center
(E
c
-E
t
) eV
Divacancy
(E
c
-E
t
) eV
E-Center
(E
c
-E
t
) eV
Conditions

0.44 FZ Si, annealing: N
d
= 510
15
cm
-3
, 1 MeV
electrons
0.18 0.39 0.44 CZ Si, N
d
= 610
15
cm
-3
, 10 MeV electrons
0.15 0.39 0.39 CZ Si, N
d
=1.2 10
16
cm
-3
, 2MeVelectrons,
neutrons
0.17 0.413 0.456 NTD FZ Si ~ 60 cm, 1 MeV, 12 MeV
electrons
0.17 0.43 FZ Si, oxygen rich ~ 70 cm, 1.3 MeV
electrons
0.14

0.41 0.41 CZ Si, CCD N
d
= 2.10
16
cm
-3
, ~15 MeV
neutrons
0.42 CCD, annealed at 150C, 1.25 MeV
60
Co -
rays
0.47 CCD, annealed at 150C,
90
Sr source
0.12 0.42 CCD , 10 MeV protons
0.17 0.42 0.42 CCD, N
d
= 10
14
cm
-3
, 10 MeV protons

Table II.1: Parameters of the most important radiation-induced defects in n-type,
phosphorus-doped silicon. The dopant concentration is N
d
. Most studies have identified
defects by annealing. (Note: FZ = Float Zone Si, CZ = Czochralski grown Si, NTD =
Neutron Transmutation Doped Si, CCD = measurements on CCD) compiled by [13].


33
The presence of defect centers in the silicon bandgap can affect the electrical
characteristics of the CCD in three major ways:
Trapping charge from signal: producing deferred charge (losses charge from the
signal charge). The trapping process can have a profound effect on Charge
transfer efficiency (CTE) performance. This effect is dominant if the defect level
is not very close to either band [37].
Generation charge: this process creates thermally generated dark current
emission of electrons and holes. This effect is dominant for defects with the
energy levels close to the band gap center [37].
The effective doping concentration (Neff), and consequently the operational
voltage must be raised to compensate.

II. 6 Deep traps in semiconductors
The most widely used technique for the study of radiation-induced bulk defects is the
Deep Level Transient Spectroscopy (DLTS) [38]. DLTS is used to measure the energy
positions, capture cross sections and concentration of defects. Determination of defect
concentrations in high resistivity Si by DLTS has to be done with caution, because the
dopant and defect concentrations can be comparable, which can distort the results [39].
The stability of defects is highly temperature dependent. Heating may move or break up
defects. The removal of defects in this way is termed thermal annealing and to some
extent occurs at room temperature. However, new types of defect complexes may be
generated in the process [29]. It is well known, that the A-center anneals at about 350
C, the divacancy at 300 C and the E-center at 150 C [40, 41]. By carrying out
isochronal anneals with increasing temperature, it is possible to determine the
contribution of the E-center and the divacancy to the common DLTS peak they form.
From the published results on irradiation damage effects in n-type silicon and CCDs,
the following conclusions can be made:
The dominant radiation-induced defects in low resistivity, low oxygen content
silicon (e.g. in the CCD buried channel) are the A-center and the E-center;
The concentration of the divacancy is generally smaller, however it may be
important in oxygen-rich silicon, in which the formation of E-centers has been
suppressed;

34
In low resistivity silicon (high phosphorus doping), irradiation by electrons and
neutrons produces very similar or indistinguishable macroscopic effects.

The trap is called acceptor if it is negatively charged when occupied by an electron and
neutral when occupied by a hole. And it is called donor if it is neutral when occupied by
an electron and positively charged when occupied by a hole. In thermal equilibrium the
charge state of defects is ruled by the Fermi level E
f
. If E
f
is located above the defect
level, acceptors are negatively charged and donors are neutral; if it is below the defect
level, acceptors are neutral and donors are positively charged (fig. 2.5).

Figure II.5: A schematic description of neutral and ionized traps; a) acceptor traps and
b) donor traps.

Acceptor trap
E
C

E
t

E
V

E
f

Space charge
(a)
Distance
E
E
C

E
f

E
t

E
V

Donor trap
Space charge
(b)
Distance
E
Chapter III Analytic Modeling for Charge Transfer Inefficiency

35

Chapter III
Analytic Modeling for Charge Transfer Inefficiency

III. 1 Introduction
In order to explain the processes of charge signal transfer during the operation of a
Charge Coupled Device (CCD), Kristian and Morley presented an elegant analogy,
which uses the concepts of a bucket brigade to describe the CCD operation for imaging
application (Fig III.1) [42]. Determining the brightness distribution in a CCD image can
be likened to measuring the rainfall at different points in a filed with an array of
buckets. Ones the rain has stopped, the buckets in each row are moved down vertically
across the field on conveyer belts. As the buckets in each column reach the end of the
conveyor, they are emptied into another bucket system on a horizontal belt that carries it
to a metering station where its contents are measured.
Because of the presence of traps in the CCD, during the transfer of the charge signal,
some electrons are captured and deferred. These electrons considered as lost from the
charge signal, a schematic view describing this phenomenon is presented in figure III.2.
The parameter characterizing the charge losses during the transfer is called Charge
Transfer Efficiency (CTE). CTE is the percentage of charge in a given signal which is
successfully transferred from one pixel to the next and is usually represented as a single
fraction, typically 0.99999 for a modern CCD [3, 43-45]. It is equivalently expressed by
the Charge Transfer Inefficiency CTI ( CTE CTI =1 ).
The CTI depends strongly on the presence of defects (traps). Since traps are
characterized by an energy level, a capture cross section and a concentration (density),
operating conditions affect the CTI as there is a strong temperature dependence on the
trap emission rate and also a variation of the CTI with the readout frequency.

36

Figure III.1: A bucket brigade analogy used to describe a CCD operation [42].

Figure III.2: A schematic representation of the mechanism of the charge transfer losses.
Only one pixel is assumed to contain defect for simplicity.

Pixel contain defects
Deferred charge
Direction of transfer

37
The determination of the CTI in a CCD is a very delicate task, costs so much and can be
time assuming. So there is a lack of experimental results, except a few at low
frequencies [12, 46, 47]. So other methods to determine this important characteristic of
the CCD are used. It is very common to use numerical simulation and analytical
modeling. The first one, in general uses a huge computer programming. This
programming is time consuming and convergence problems may be difficult to achieve.
Some CTI evaluation on 3-phases CCD (CCD58) and 2-phases CCD (CP-CCD) were
obtained with the Integrated Systems Engineering Technology Computer Aided Design
(ISETCAD) package version 7.5, particularly the DESSIS program (Device Simulation
for Smart Integrated System) in Lancaster, hereafter referred to as full TCAD
simulation. Results obtained with full TCAD simulation also take a long time (one set
of CTI at one temperature may take a day). Thus analytic modeling will be very
convenient to determine the CTI since it is less time consuming. The analytic modeling
is based on a given theory and takes into account some assumptions to simplify the
resolution and leads to a simple equation which solves the problem.
The motivation for introducing an Analytic Model is to understand the underlying
physics. The analytic modeling is validated by comparisons with the TCAD
simulations. Once validated, it can be used to predict the CTI for other CCD geometries
without requiring a full simulation. The main objective of this work is the development
of an analytic model for the 3-phases and 2-phases CCD characteristics.

III. 2 Theory of charge trapping
Radiation damage in CCDs can roughly be divided, as mentioned before, in the Si-SiO
2

interface and in the active channel. In BCCDs, charge is transferred far from the defect
state at the Si-SiO
2
interface and only the interaction of the charge signal with the bulk
traps needs consideration. In the presence of bulk defects at energy E
t
below the
conduction band electrons can be trapped with a capture time constant
c
and
consequently released with an emission time constant of
e
. The process is well
described by the Shockley-Read-Hall statistics.

III. 2. 1 Shockley-Read-Hall statistics
The occupation of traps in the band gap by electrons or holes, respectively, is
determined by the interaction of the defect level with the conduction and the valance
band. According to the work of W. Shockley and W. T. Read [48,] and R. N. Hall [49]

38
this can be described as a statistical process. As it is indicated in figure III.3, there are
four basic reactions which take place at a trap. Consider a trap located at E
t
from the
conduction band with a concentration N
t
. This trap will be considered capable of all the
four reactions.

Figure III.3: A diagram showing the four processes (emission and capture) to/from the
conduction/valance band at an energy level Et

The four reactions are:
1. The rate of electrons emitted into the conduction band is
t n a
n e r = .
2. The rate of electrons captured from the conduction band is
t n b
np c r = .
3. The rate of holes captured from the valance band is
t p c
pn c r = .
4. The rate of holes emitted into the valance band is
t p d
p e r = .
The rate of electrons emitted into the conduction band and the rate of holes emitted into
the valance band are proportional to the fraction of defect states occupied by electrons
( )
t
n or holes ( )
t
p and the densities of empty states in the conduction band or in the
valance band respectively. The density of empty states in both the conduction and the
valance bands (about 10
19
cm
-3
) are much larger than the available free carriers (about
10
17
cm
-3
) to fill them, hence the emission rates are usually considered independent of
E
V

E
t

E
C

r
a
r
b

r
c

r
c

Conduction band
Traps energy level
Valance band

39
the free carrier density [50]. The rate of electrons captured from the conduction band
and the rate of holes captured from the valance band are proportional to the fraction of
defects states occupied by electrons
t
n or occupied by holes
t
p and the concentration of
free electrons in the conduction band n or free holes in the valance band p . The
proportionality factors are the emissions rate
n
e for electrons and
p
e for holes and the
capture coefficients
n
c for electrons and holes
p
c respectively.
Taking into account all of the four processes we obtain the following differential
equation for the fraction of defect states occupied by electrons
t
n :
d c b a
t
r r r r
dt
dn
+ + = (III.1)
t p t p t n t n
t
p e pn c np c n e
dt
dn
+ + = (III.2)
It is assumed that for an electron trap its capture time for electrons
cn
is much greater
than its capture time for holes
cp
and consequently the emission time of holes
ep
is
neglected and the all contrary for the hole trap. Emissions time of electrons
en
and
holes
ep
are estimated by the principle of detailed balance.

III. 2. 2 Principle of detailed balance
For an electron trap located at E
t
from the conduction band with a density N
t
, the
thermal emission rate of electrons from trap to the conduction band is usually computed
from the capture rate using the principle of detailed balance at thermal equilibrium [32,
50, 51]. This principle considers that at the thermal equilibrium the net rate is zero, that
is the emission and capture rates are equal. Replacing for 0 =
dt
dn
t
in (III.2), we obtain
t
t n
n
n
np c
e (III.3)
Knowing that
t t t
n N p = ,
n
en
e
1
= and
n c
n
cn
1
= , we obtain for the time constant for
electron emission as:
.
t
t t
n en
n
n N
n c

= (III.4)
According to the Fermi-Dirac statistics
t
n is given by:

40
) exp( 1
1
T K
E E
g
N n
b
t f
t t
+
= (III.5)
Where g is the trap level degeneracy factor which in most cases considered as unity.
The density of electrons n is given according to the Boltzman statistics by:
|
|
\
|
=
T K
E E
N n
b
f c
c
exp (III.6)
Using equations (III.4) (III.6) we obtain
|
|
\
|
=
T K
E E
N
n
b
t c
c
cn
en
exp
(III.7)
The capture time
cn
is related to the cross section
n
by the very common relation [50]
n v
th n
cn
1
= (III.8)
Where
th
v is the electron's thermal velocity given by [4, 50]:
m
T K
v
b
thn
3
= (III.9)
Finally, we obtain the emission time as
|
|
\
|
=
T K
E E
N v
b
t c
c th n
en
exp
1
. (III.10)
The same analysis can be used for hole traps, thus we can obtain
|
|
\
|
=
T K
E E
N v
b
v t
v thp p
ep
exp
1
. (III.11)
In developing the analytic model, we only consider electron traps since, as mentioned
previously, they are the only type observed in BCCDs. Since we will be considering
electrons traps only we use
e
and
c
instead of
en
and
cn
for simplicity.

III. 3 Previous work
III. 3. 1 Hopkinson Model
H I Hopkinns et all developed an Analytic Model to determine the charge transfer
inefficiency (CTI) [52]. The Model assumes that radiation-induced CTI in buried
channel CCDs is caused by the trapping of charge signal at defect centers within the
buried channel. Since the buried channel is within the depletion layer, the only
important mechanisms are the capture of electrons from the conduction band to the trap

41
level and their subsequent emission back to the conduction band. The time constants for
these processes are: capture time
c
, and emission
e
.
The analytic model gives the charge loses during transfer by means of the number of
traps still filled after the charge signal moves up from the node. The model is given by,

|
|
\
|
|
|
\
|
|
|
\
|
=
e c
t
t t
n n

exp exp 1 . (III.12)
Where t is the time spends by the charge under the node and
n is given by
e
c
t
N
n
+
=
1
, (III.13)
Thus the CTI per one node is then given by;
|
|
\
|
|
|
\
|
|
|
\
|

+
=
e c c e
e
s
t
t t
n
N
CTI

exp exp 1 . (III.14)

III. 3. 2 Hardy Model

Hardy et all [43] proposed an analytic model to predict the charge loses after the charge
signal moves up from the pixel for a 3-phase CCDs. It considers that the charge
contained in the potential well (under the node) beneath a CCD gate is transferred to the
next and following gates by what is usually described as a simple process of phased
clocking. The Model assumes that the charge signal has substantially arrived under the
node. Traps present in the potential well (node) will be filled with time constant
c
and
because this time constant is relatively short (the capture time is too short), all traps are
filled when the charge signal enter the node. When the charge signal has moved on
completely to the next node, traps under the node begin to emit their trapped charge and
continue emission until the next charge signal arrives (the time between two no empty
charge signal is called t
emit
). Of course some of the emitted charge rejoins the charge
signal and is not considered lost from the charge signal (the time in which the charge
can rejoin their parent signal is t
join
). The new arrival charge signal interacts with a new
number of empty traps. The Model gives the charge loses from the charge signal by
means of calculating the net trapped charge which equal to the charge trapped during
the interaction with traps minus the charge emitted when the charge signal is still

42
present at the neighbor node. Thus the charge loses during transfer by a node is given
by,

|
|
\
|

|
|
\
|
=
e
emit
e
join
t loss
t
t
qN Q

exp exp ; (III.15)
The charge trapped is
|
|
\
|
=
e
emit
t trapped
t
qN Q
exp 1 , (III.16)
And the charge joining their parent charge signal is;
|
|
\
|
=
e
join
t join
t
qN Q
exp 1 . (III.17)
So the CTI per one node will be given by,
|
|
\
|
|
|
\
|

|
|
\
|
=
e
emit
e
join
s
t
t
t
n
N
CTI

exp exp . (III.18)

III. 3. 3 James Model

James has developed a simple model called "toy model" which gives the charge loses
(CTI) in 3-phases CCDs by studying the fraction of filled traps n
t
to the total traps Nt
[53]. The work assumed that the charge signal passes over the pixel and the traps
capture electrons, which remain as the signal moves to the next pixel. This trapped
charge is slowly released to the conduction band. A second charge signal passes over
the pixel. Now, because there is already some trapped charge remaining, the signal
signal loses fewer electrons. A measure of charge loses during transfer of a charge
signal may be quantified by the charge transfer inefficiency (CTI). This is the fraction
of charge lost per pixel as it is transported along the device. If a signal has initial charge
0
Q and is transferred over m pixels then the resulting signal size
m
Q is given by:

( ) ( ) mCTI Q CTI Q Q
m
m
= 1 1
0 0
, (III.19)

Since the charge transfer inefficiency (CTI) is

43
s
t
n
n
CTI = . (III.20)
where n
t
is the charge trapped (lost) from the charge signal and n
s
is the preliminary
charge signal (generated by irradiation), the CTI is given by
|
|
\
|
|
|
\
|
|
|
\
|
=
e
s
f
c
s
s
t
r
n
N
CTI
exp 1
0
. (III.21)
where
e c
e c
s

+
= .

In the model r
f0
describes the fraction of traps filled just prior to a new charge signal
over the node. The model considers that in normal operation, charge from signals will
be continuously transferred along the nodes. It assumed that these signals arrive at
regular intervals with an occupancy ratio Occ, the ratio of occupied to empty potential
wells carrying signal signals. Because each pixel consists of three nodes it is assumed
that the charge signal occupies each node for one-third of a period and does not interact
with any other node during that time. The shift time t
sh
, or occupation time of one node
is therefore
f
t
sh
3
1
= , where f is the read out operating frequency. The value of r
f0
is
the fraction of filled traps after t
w
(the time between two arrivals of charge signal at the
same node), and is therefore:
|
|
\
|
|
|
\
|
|
|
\
|
+
|
|
\
|
|
|
\
|

|
|
\
|
=
e
w
s
sh
s
sh
e
w s
f
t t
t
t
r
c

exp 1
exp 1
exp
0
. (III.22)

III. 4 Proposed Analytic Model (PAM)
III. 4. 1 Introduction
We developed an analytical model based on previous models and taking into account
neglected parameters such as the capture time and the joining charge. The charge signal
is transferred from one node to the next within only about nanoseconds by the fringing
field, thus we can assume that the charge signal does not interact with defects during
transfer. Thus the charge signal interaction with defects during storage time only, when
the charge signal is present into the potential well, needs consideration. The Shockley-

44
Read-Hall theory is applied to the potential well in the storage region under the node.
The charge lost, captured by traps, during storage time is studied by calculating the
fraction of filled traps
f
r which is expressed by the ratio
t
f
N
n
, where
f
n is the density of
traps filled by electrons and
t
N the trap concentration. The Proposed Analytic Model
considers the effect of a single trapping level, which means each trap is considered
separately. This leads to the differential equation:
s
f
c
f
e c
f f
r r r
dt
dr

=
=
1
1
(III.23)
Where
e c
e c
s

+
=
Then the solution of this equation in case where n
s
>>N
t
:
c
s
s c
s
f f
t
r t r
+
|
|
\
|
|
|
\
|
= exp ) (
0
(III.24)

III. 4. 2 Proposed Analytic Model for 3-phases CCD
The consecutive transfer of charge from one node to the next for a 3-phases CCD is
shown in figure III.4. We assume that the charge signal moves instantaneously from one
node to the next and do not consider edge effects in the charge signal transfer.
Before the charge signal arrives under the first node of the pixel, an initial state is
present, there are some traps filled and others are empty, this depends on conditions of
operating of the CCD. We consider that the initial state is
t
t
f
N
n
r
0
0
= , where
0 t
n is the
initial filled traps.
At stage A, during the shift time t
sh1
, the time where the charge signal still under the first
node, the fraction of filled traps is given by
( )
c
s
s
sh
c
s
f A f
t
r t r
+
|
|
\
|
|
|
\
|
=
1
01 1 1
exp , (III.25)
When the charge signal moves to the next node, stage B, the filled traps under the first
node begin to emit their trapped electrons. At this stage there is no charge signal under
the node, so only the emission process is present, the electrons emitted during the time
2 sh
t , where the charge signal is present under the second node, rejoin their parent charge

45
signal and are not considered lost (do not contribute to CTI). Finally the filled fraction
under the first node is,
( ) ( )
|
|
\
|
=
e
sh
A f B f
t
t r t r
2
1 1 2 1
exp . (III.26)

Figure III.4: A schematic diagram showing the consecutive transfer of charge from one
pixel to another for 3-phases CCD.

At the same stage B, the charge signal is under the second node of the pixel and
interacts with the traps within (initial filled fraction traps is
0 f
r ), during the time
2 sh
t the
filled fraction of traps is given by,
c
s
s
sh
c
s
f b f
t
r t r
+
|
|
\
|
|
|
\
|
=
2
02 2 2
exp ) ( . (III.27)
Now the charge signal moves to the third node of the pixel, stage C, the filled traps
under the second node begin to emit their electrons, electrons emitted during
3 sh
t when
the signal is present under the third node can rejoin their parent charge signal and are
not considered lost. Finally the filled fraction under the second node is
Transfer direction
P
3

t
1

A
B
C
D
P
2

0
P
1

t
sh1

t
hs2

t
sh3

t
2

t
3

t
4

Node 1 Node 2 Node 3
t
sh1


46
( ) ( )
|
|
\
|
=
e
sh
B f C f
t
t r t r
3
2 2 3 2
exp . (III.28)
At the same stage C the charge signal interacts with the traps under the node during t
sh3

that leads to a filled fraction traps given by
c
s
s
sh
c
s
f c f
t
r t r
+
|
|
\
|
|
|
\
|
=
3
03 3 3
exp ) ( . (III.29)
Finally the signal moves out from the pixel to the first node of the neighboring pixel.
The filled traps under the third node began emit their trapped electrons, electrons
emitted during the time t
sh3
where the charge signal is still under the first node of the
neighboring pixel rejoin their parent charge signal and not considered as lost charge. At
this time the filled traps remain under the third nod is
( ) ( )
|
|
\
|
=
e
sh
C f D f
t
t r t r
1
3 3 4 3
exp . (III.30)
The total captured charge, charge loses from signal, under one pixel is the sum of filled
traps under each node. Thus,
( ) ( ) ( ) [ ]
03 3 02 2 01 1 f D f f C f f B f
s
t
r r r r r r
n
N
CTI + + = . (III.31)
In case when
sh sh sh sh
t t t t = = =
3 2 1
and
0 03 02 01 f f f f
r r r r = = = the CTI for one pixel can be
given by

|
|
\
|
|
|
\
|
+
|
|
\
|
|
|
\
|
=
0 0
exp exp 3
f
e
sh
c
s
s
sh
c
s
f
s
t
r
t t
r
n
N
CTI

. (III.32)

III. 4. 3 Proposed Analytic Model for 2-phases CCD
Figure III.5 shows the diagram of consecutive transfer of charge from one pixel to
another in tow phases CCD.
Before the charge signal arrives, the initial fractions of filled traps under nodes 1 and 2
are respectively r
f01
and r
f02
which will be calculated at the end of the section.
With an initial condition r
f01
at the end of stage A, at the time t
1
, the fraction of filled
traps r
f1A
under node 1 is given by:
c
s
s
sh
c
s
f A f
t
r t r
+
|
|
\
|
|
|
\
|
=
1
01 1 1
exp ) ( , (III.33)

47
where
1 sh
t is width of pulse under node 1. The charge signal moves to node 2 at stage B,
the traps start to emit their trapped charge so the ratio of the filled traps under node 1 at
the moment t
2
becomes:
|
|
\
|
=
e
sh
A f b f
t
t r t r
2
1 1 2 1
exp ) ( ) ( (III.34)
where
2 sh
t is width of pulse under node2. Now the initial condition is r
f02
at the end of
stage B, at the time t
2
, the fraction of filled traps r
f2B
under node 2 is given by:
c
s
s
sh
c
s
f b f
t
r t r
+
|
|
\
|
|
|
\
|
=
2
02 2 2
exp ) ( (III.35)

Figure III.5: A schematic diagram of the consecutive transfer stages in two phases CCD

The charge signal moves to node 1 of the next pixel at stage C, the traps start to emit
their trapped charge and so the ratio of the filled traps under node 2 at the moment t
3

becomes:
P
2
P
1
P
2
P
1
A
B
C
Node 1 Node 2

Pixel
Time
0
t
1
t
2
t
3
t
sh1
t
sh2
t
sh1

48
|
|
\
|
=
e
sh
B f c
t
t r t r
1
2 2 3 2
exp ) ( ) ( (III.36)
So the CTI for one pixel is the sum of the CTI under each node, thus
( ) ( ) ( )
02 3 2 01 2 1
) ( ) (
f c f f B f
s
t
r t r r t r
n
N
CTI + = (III.37)
In case when
1 sh
t equals
2 sh
t , equation (III.37) can be written as

|
|
\
|
|
|
|
|
|
|
\
|
|
|
\
|
|
|
\
|
|
|
\
|
+
|
|
\
|
|
|
\
|

|
|
\
|
|
|
\
|
+ =
0
exp
1 1
exp 1
exp 1
2 1
exp 1 2
f
e
e s
s
c
s
e c s
t
r
t
t
t
x t
n
N
CTI

(III.38)

In the assumption that the same reactions are held in all nodes, it is clearly seen that the
CTI is given by the same formula for both 3 and 2-phases CCDs except the factor 3 or 2
which mentions the number of nodes.

III. 4. 4 Determination of the background state
The background state (the initial state r
f0
) is the fraction of filled traps existing under the
node just before the charge signal arrived. This fraction can vary from about zero
(nearly all traps are empty) to about one (nearly all traps are filled).
In practice, the portion of filled traps depends on the CCD operation mode (operating
read out frequency, the percentage of pixel hit and temperature). The filled traps after
the signal moves to the next node emit their trapped electrons until the next charge
signal arrives at this node. The time between two arriving signals at the same node is
called the waiting time t
w
. By means of the waiting time the effect of the background
can be studied. The best way, to determine the fraction of filled traps is by considering
the CCD tends to a steady state. To determine the fraction of the initial traps r
f01
(r
f02
), it
is assumed that the charge signal has arrived at once under the node. Thus the
expression giving the initial fraction of filled traps in steady state without taking
account any assumption can be obtained starting from unknown state r
f1
(r
f02
).Traps in
the volume occupied by the charge signal will be partially filled. The fraction r
f01
at
time t
1
corresponding to the node 1 is given from equation (III.23) by

49
( )
c
s
s
sh
c
s
f f
t
r t r
+
|
|
\
|
|
|
\
|
=
1
0 1 01
exp (III.39)
Note the same analysis holds for (r
f02
)
The traps under node 1 will emit the trapped electrons until the next arriving signal
during the time (
sh w
t t ). The process will be repeated until the steady state is
established. So r
f01
, at the first arriving charge signals ie after t
w
, becomes:

|
|
\
|
)
`
+
|
|
\
|
|
|
\
|
=
e
sh w
c
s
s
sh
c
s
f w f
t t t
r t r

exp exp ) 0 ( ` ) (
0 0
(III.40)
At the next arriving charge signals ie after 2t
w
:
|
|
\
|
)
`
+
|
|
\
|
|
|
\
|
=
e
sh w
c
s
s
sh
c
s
w f w
t t t
t r t r

exp exp ) ( ) 2 (
0 0
(III.41)
So when the signal arrives for the (k+1)
ith
time the fraction of initial filled trap at the
instant (k+1)t
w
is:
|
|
\
|
)
`
+
|
|
\
|
|
|
\
|
= +
e
sh w
c
s
s
sh
c
s
w f w f
t t t
kt r t k r

exp exp ) ( ) ) 1 ((
0 0
(III.42)
The steady state is established when k . Using the sum of geometric series, the
following expression of the initial state can be obtained, thus:
|
|
\
|
|
|
\
|

|
|
\
|

=
e
sh w
e
w
c
sh
s
sh
c
s
f
t t
t t
t
r
exp
exp 1
exp 1
0
(III.43)

Chapter IV Results and Discussion

50

Chapter IV
Results and discussion

IV. 1 Introduction
The Charge Transfer Inefficiency (CTI) is the crucial parameter that can be a serious
limiting factor to the CCD operation in a radiation environment. CTI characterizes the
charge losses during the transfer defined as the ratio of lost charge to the charge signal
induced at the input of the device (: II. 2). In a buried channel CCD the charge is
transported far from the defect states at the Si-SiO
2
interface, hence only the interaction
of the charge signal with the bulk traps needs consideration. In the presence of bulk
defects electrons can be trapped and have to be considered as lost from the charge signal
[13, 24, 43, 52].
The considerations on the charge transfer in 2 and 3-phases CCDs, presented in Chapter
III have given us the framework for understanding the mechanism of charge signal
transfer and how some of the charge is deferred and lost. The CTI depends mainly on
the following parameters:
Temperature
Read out frequency of the transfer
Background charge
Pixel occupancy
Trap defects
Charge signal
Induced waveform clock voltage

In this chapter the CTI results from the charge transfer model developed in this work
(Proposed Analytic Model) and the TCAD simulations are compared to validate the first
in an initial step. We study the effect of the above parameters on CTI using full TCAD
simulation and the Proposed Analytic Model for two types of CCD: Classical 3-phase
CCD (CCD58) and Column Parallel 2-phase CCD (CP-CCD).
The expected background rate at the future ILC (Interaction Linear Collider) near the
interaction point leads to radiation damage in the CCD detector. We have simulated the
charge transfer in the CCD58 and the CP-CCD using the trap concentrations listed in

51
table IV. 1. Traditionally, for these CCD studies, only the two traps with the largest trap
densities are considered [13, 53, 54]. They correspond to about 3 years of operation of
the CCD at about 1 cm from the collision point of the beam at the ILC for the 0.17 eV
traps and several more years for the 0.44 eV traps. In contrast to the silicon micro strip
detectors, such as those used in the LHC (Large Hadron Collider), where all kind of
traps in the bulk are important, in CCDs only electron traps are important.

E
t
(eV) N
t
(cm
3
)
n
(cm
2
)
0.17
12
10 1
14
10 1

0.44
12
10 1
15
10 3

Table IV.1: Energy levels Et (from the conduction band), trap concentrations Nt, and
electron-capture cross-section
n
used in the study [33].

IV. 2 Validation of the Proposed Analytic Model
The more important operating parameters on CCDs are the frequency and temperature,
which heavily affect the CTI. In order to show the limitations of Hardy and James
models mentioned in chapter III, a comparative study of the Proposed Analytic Model
with these models as well as the full TCAD simulation are vital. In this section the study
will be only carried out on the 2-phases CP-CCD.
Results of CTI versus temperature for different frequencies, using a comparison studies
between analytic Hardy model, James' model and the Proposed Analytic Model (PAM)
to the results obtained by the TCAD full simulations for the 0.17 eV traps at 10, 20 and
50 MHz are presented in figure IV.1, figure IV.2 and figure IV.3 respectively. At 10
MHz we can clearly see, that the Proposed Analytic Model and Hardy model agree well
in all the range of temperature with the full TCAD simulations results, whereas James'
model agree with them only at low temperatures (before the peak position). Figure IV.2
shows the variation of the CTI versus temperature for the three analytic models and the
full TCAD simulations at 20 MHz. We observe that the Proposed Analytic Model still
in agreement with the full TCAD simulations. However, Hardy's model begins to
deviate from the full TCAD simulation especially in the peak region. In contrast James'
model presents an agreement with full TCAD simulation at low temperatures but at high
temperatures the model still in disagreement. At 50 MHz, the results obtained by Jame's
model, still in agreement with full TCAD simulation and the Proposed Model only at
low temperatures as shown in figure IV.3. In this figure we observe that Hardy model

52
deviate considerably once more from the full TCAD simulation at this operating read
out frequency (50 MHz).

100 120 140 160 180 200 220 240
0,00
0,05
0,10
0,15
0,20
0,25
0,30
0,35
0,40
0,45
0,50
Temperature (K)
C
T
I

(
%
)

HAM
JAM
PAM
TCAD Sim
0.17 eV traps
f = 10 MHz
N
t
= 10
12
cm
-3
n
s
= 4,5.10
14
cm
-3
Occ = 1%
2phs CCD

Figure IV.1: Comparison between Hardy's Analytic Model (HAM), Jame's Analytic
Model (JAM) and the Proposed Analytic Model (PAM) with TCAD for 0.17 eV
traps at 10 MHz.
100 120 140 160 180 200 220 240
0,00
0,05
0,10
0,15
0,20
0,25
0,30
0,35
0,40
0,45
Temperature (K)
C
T
I

(
%
)

JAM
HAM
PAM
TCAD Sim
2phs CCD
0.17 eV traps
f = 25 MHz
N
t
= 10
12
cm
-3
n
s
= 4,5.10
14
cm
-3
Occ = 1%

traps at 25 MHz.

53
100 120 140 160 180 200 220 240
0,00
0,05
0,10
0,15
0,20
0,25
0,30
0,35
0,40
0,45
Temperature (K)
C
T
I

(
%
)

JAM
HAM
PAM
TCAD Sim
2phs CCD
0.17 eV traps
f = 50 MHz
N
t
= 10
12
cm
-3
n
s
= 4,5.10
14
cm
-3
Occ = 1%

traps at 50 MHz.

In conclusion we see that the PAM is in a much better agreement with full TCAD
simulation than the two other models, Hardy's model and James's model, in all range of
temperature and at all operating read out frequency considered. Hardy's model shows a
limitation at high read out frequencies, which is due to its hypotheses. It assumed that
the charge signal has substantially arrived under the node, and traps in the volume
occupied by the charge signal will be filled with a time constant
c
and because this
time constant is relatively short, all the states are filled by the arriving of the charge
signal. Thus this assumption is only valid at low frequencies. The assumption by James
in his model is that all charges trapped during the interaction of the charge signal with
traps in the potential well are all lost from the charge signal, thus neglecting the joining
charge (trapped charges that can join their parent charge signal). Whereas at high
temperatures the emission time is too short than the shift time, so some of the trapped
charge can rejoin their parent charge signal. This may explain the disagreement of this
model at high temperatures with the full TCAD simulation and the Proposed Analytic
Model. At low temperatures, the emission time is long compared to the shift time, so in
this range of temperature the joining charge can be neglected, hence the agreement of
Jame's model with both the proposed model and full TCAD simulation. Finally we

54
summarise that Hardy's model is only valid at low frequencies and Jame's model is only
valid at low temperatures. Therefore, the Proposed Analytic Model for the CTI
determination in CCDs is more suitable and leads to a better understanding of the
relevant parameters in order to reduce the CTI in future CP-CCD prototypes.

VI. 3 Temperature and read out frequency effect
As mentioned before, the charge signal is transferred from one pixel to another by a
phased clocking. Read out frequency is the frequency that the charge signal is moved on
from one pixel to the next. Read out frequency can be externally handled, according to
the domain which the CCD is used in, contrary to the many parameters like background
charge and the occupancy. We will study the effect of the readout frequency on CTI
values using full TCAD simulation and the Proposed Analytic Model for the two types
of CCD (3-phases CCD58 and 2-phases CP-CCD).
Figures IV.4 and IV.5 show the CTI values versus temperature using the Proposed
Analytic Model for 0.17 eV and 0.44 eV traps respectively for 3-phases CCD58 at 10,
25 and 50 MHz readout frequencies. For a given frequency, at low temperatures, the
emission time constant
e
, which characterizes the emptying of electrons from traps,
can be very large and of the order of seconds. The charge shift time for one gate is
f
t
sh
3
1
= for the 3-phases CCD58 and
f
t
sh
2
1
= for the 2-phases CP-CCD, where f is the
readout frequency. The charge shift time is therefore of the order of nanoseconds. A
larger
e
means that a trap remains filled for much longer than the charge shift time (fig
IV.6 and fig IV.7). Further trapping of signal electrons is not possible and,
consequently, CTI is small at low temperatures. A peak occurs between low and high
temperatures because the CTI is also small at high temperatures. This manifests itself
because, at high temperatures, the emission time constant decreases to become
comparable to the charge shift time (fig IV.6 and fig IV.7), so trapped electrons rejoin
their signal packet as illustrated in these figures.


55
100 120 140 160 180 200 220 240
0,0
0,1
0,2
0,3
0,4
0,5
0,6
Temperature (K)
C
T
I
(
%
)

f = 10 MHz
f = 25 MHz
f = 50 MHz
0.17 eV traps
N
t
= 10
12
cm
-3
n
s
= 4,5. 10
14
cm
-3
Occ = 1%
3phs CCD

Figure IV.4: CTI versus temperature for the 0.17 eV traps for 1% occupancy and the
read out frequency as a parameter for 3-phases CCD.

250 300 350 400 450 500 550
0,00
0,05
0,10
0,15
0,20
0,25
0,30
0,35
0,40
0,45
Temperature (K)
C
T
I

(
%
)

f = 10 MHz
f = 25 MHz
f = 50 MHz
0.44 eV traps
N
t
= 10
12
cm
-3
n
s
= 4,5.10
14
cm
-3
Occ = 1%
3phs CCD

Figure IV.5: CTI versus temperature for the 0.44 eV traps for 1% occupancy and the
read out frequency as a parameter for 3-phases CCD.

56
100 120 140 160 180 200 220 240
10
-9
10
-8
10
-7
10
-6
10
-5
10
-4
10
-3
Temperature (K)
T
i
m
e

(
s
)

Emission time
Capture time
Shift time at 10 MHz
Shift time at 50 MHz
Waiting time at 10 MHz
0.17 eV traps, Occ = 1%
N
t
= 10
12
cm
-3
n
s
= 4,5.10
14
cm
-3
3phs CCD

Figure IV.6: Time constants versus temperature for the 0.17 eV traps for 1%
occupancy and for two read out frequencies 10 and 50 MHz in 3-phases CCD.
250 300 350 400 450 500 550
10
-9
10
-8
10
-7
10
-6
10
-5
10
-4
10
-3
Temperature (K)
T
i
m
e

(
s
)

Emission time
Capture time
Shifte time at 10 MHz
Shifte time at 50 MHz
3phs CCD
0.44 eV traps, Occ = 1%
N
t
= 10
12
cm
-3
n
s
= 4,5.10
14
cm
-3

Figure IV.7: Time constants versus temperature for 0.44 eV traps for 1% occupancy
and for two read out frequencies 10 and 50 MHz in 2-phases CCD.

Regarding the dependence of the CTI values on readout frequency; by increasing the
readout frequency the shift time decreases and became short than the capture time (fig
IV.6 and fig IV.7), consequently the charge signal interact with traps in less time, thus
only few electrons are captured from the charge signal and hence the CTI decreases (fig

57
IV.4 and fig IV.5). We note that the peak positions shift to lower temperatures as the
frequency decreases. Before the peak (at low temperatures) the CTI is high for the low
read out frequencies, because there is much time to the filled traps to emit their
electrons, the waiting time t
w
is large than
c
(fig IV.6 and fig IV.7), and thus more
electrons are captured from the charge signal. In contrast after the peak (at high
temperatures), the CTI is small for low read out frequencies. This is due to the fact that
the joining time (t
join
: which is considered equal to the shift time) decreases with
increasing frequency and became in the same order of capture time
c
(fig IV.6 and fig
IV.7). Thus, there is a tendency that the trapped charge can rejoin their parent charge
signal and gives a decrease of the CTI. Figures IV.8 shows the full TCAD simulation
results for both traps 0.17 eV and 0.44 eV in the range of temperatures between 130K
and 440 K for 10, 25 and 50 MHz readout frequencies. Results obtained by the
Proposed Analytic Model for both traps in the same range of temperature are shown in
figure IV.9. We can clearly see the agreement between results obtained by full TCAD
simulations and results obtained by the Proposed Analytic Model. The two figures
identify an optimum operating temperature for the CCD58 of about 250 K.
100 150 200 250 300 350 400 450 500
0,0
0,1
0,2
0,3
0,4
0,5
0,6
0,7
0,8
0,9
1,0
Temperature (K)
C
T
I

(
%
)

f = 7 MHz
f = 25 MHz
f = 50 MHz
3phs CCD
0.17 eV and 0.44 eV traps
N
t
= 10
12
cm
-3
n
s
= 4,5.10
14
cm
-3

Figure IV.8: CTI values from TCAD simulation for both 0.17 eV and 0.44 eV traps
for three different operating frequencies 7, 25 and 50 MHz for 3-phases CCD.

58
100 150 200 250 300 350 400 450 500
0,0
0,1
0,2
0,3
0,4
0,5
0,6
0,7
Temperature (K)
C
T
I

(
%
)

f = 7 MHz
f = 25 MHz
f = 50 MHz
3phs CCD
0.17 eV and O.44 eV traps
N
t
= 10
12
cm
-3
n
s
= 4,5.10
14
cm
-3

Figure IV.9: CTI values from the Proposed Analytic Model (PAM) for both 0.17 eV
and 0.44 eV traps for 3-different operating frequencies 7, 25 and 50 MHz for 3-
phases CCD.

Results of the effect of the readout frequency on the CTI determination using the
Proposed Analytic Model for both traps 0.17 eV and 0.44 eV for the 2-phase phases CP-
CCD at (10, 25 and 50 MHz) are shown in figure IV.10 and figure IV.11 respectively.
Same remarks and the same explanation for the CP-CCD except the order of CTI values
where are relatively low in CP-CCD than in CCD58. In CCD58 the charge signal
interacts with traps three times before leaving the pixel, whereas in CP-CCD the charge
signal interacts with traps two times before leaving the pixel. In figure IV.12 we present
the full TCAD simulations in the range of temperature from 130 to 440 K for the 2-
phases CP-CCD for both traps 0.17 eV and 0.44 eV. Results obtained by the Proposed
Analytic Model in the same range of temperature for both traps are shown in figure
IV.13. From these two figures we can identify the same optimum temperature at about
250 K. Because of the same behavior of CTI shown in 3-phases CCD58 as in 2-phases
CP-CCD except the relative difference in order of values, we will present only 2-phases
CP-CCD results in the following sections.


59

80 100 120 140 160 180 200 220 240
0,00
0,05
0,10
0,15
0,20
0,25
0,30
0,35
0,40
0,45
Temperature (K)
C
T
I

(
%
)

f = 10 MHz
f = 25 MHz
f = 50 MHz
2phs CCD
0.17 eV traps
N
t
= 10
12
cm
-3
n
s
= 4,5.10
14
cm
-3
Occ= 1%

Figure IV.10: CTI values from the Proposed Analytic Model (PAM) versus
temperature for 0.17 eV traps for 10, 25 and 50 MHz read out frequencies.

250 300 350 400 450 500 550
0,00
0,05
0,10
0,15
0,20
0,25
0,30
0,35
Temperature (K)
C
T
I

(
%
)

f = 10 MHz
f = 25 MHz
f = 50 MHz
0.44 eV traps
N
t
= 10
12
cm
-3
n
s
= 4,5.10
14
cm
-3
Occ = 1%
2phs CCD

Figure IV.11: CTI values from the Proposed Analytic Model (PAM) versus
temperature for 0.44 eV traps for 10, 25 and 50 MHz read out frequencies.


60

150 200 250 300 350 400 450
0,00
0,05
0,10
0,15
0,20
0,25
0,30
0,35
0,40
0,45
0,50
Temperature (K)
C
T
I

(
%
)

f = 10 MHz
f = 25 MHz
f = 50 MHz
2phs CCD
N
t
= 10
12
cm
-3
n
s
= 4,5.10
14
cm
-3

Figure IV.12: CTI values from TCAD simulation for both 0.17 eV and 0.44 eV traps
for three different operating frequencies 10, 25 and 50 MHz.

100 150 200 250 300 350 400 450 500 550
0,00
0,05
0,10
0,15
0,20
0,25
0,30
0,35
0,40
0,45
Temperature (K)
C
T
I

(
%
)

f = 10 MHz
f = 25 MHz
f = 50 MHz
2phs CCD
N
t
= 10
12
cm
-3

n
s
= 4,5.10
14
cm
-3
Occ = 1%

Figure IV.13: CTI values from the Proposed Analytic Model (PAM) for both 0.17
eV and 0.44 eV traps for three different operating frequencies 7, 25 and 50 MHz.


61
VI. 4 Background effect
The background charge is the pixel state before the arrival of the charge signal at the
node. In order to evaluate the effect of the background charge on CTI, it is necessary to
explain the basic mechanism of charge trapping and emission in the depletion layer. It is
well known that when the charge signal is present in the potential well, two processes
are present, capture from the charge signal and emission from the trap to the conduction
band. Therefore, if the charge signal moves out from the potential well, the only
dominant process is the emission of charge from filled traps. The trapping time constant
c
is inversely proportional to the charge signal. Thus, the trapping constant time is very
large and then the process of charge trapping is neglected.
The background charge can be seen by two ways. The first is that the background is due
to some of the captured charge from the previous charge signal and filled traps, so when
the next charge signal passes interacts only with the rest of empty traps. The second is
that some charges may be artificially injected at the input of the device so that charge
packets are passed along the device in the absence of charge signal in order to fill traps
in buried channel and hence minimize the empty traps. The background charge injected
at the interface in SCCD (Surface Charge Coupled Device) is expected to neutralize the
effect of the interface states.
The CTI dependence on the background charge is studied by an experimental work by
[52]. This study showed that the CTI decreases when there is an increase in the number
of electrons injected before the charge packet arrived. Other experimental results [55,
56] showed that the CTI decreases by increasing charge injected before passing the
charge signal. However these only studied this effect at a fixed frequency. In this work
we will study the effect of the background charge regarding frequency in a wide range
of temperatures for the two traps 0.17 eV and 0.44 eV for 2-phases CP-CCD.
Figure IV.14 and figure IV.15 show the variation of the CTI versus temperature for the
0.17 eV traps at 10 and 50 MHz read out frequencies respectively with the background
charge state (r
f0
) as a parameter. It can be seen that the CTI is affected by the initial state
(background) only before the peak region. This is due to the fact that at low
temperatures the capture time
c
is too short compared to emission time
e
. Large
e

(compared to capture time
c
and shift time t
sh
) means that the trap remains filled for
much longer than the charge shift time. In other words, in this region of operation the
capture time is dominant. This means a large number of filled traps before the charge

62
signal passes remain filled during and after charge transfer. Thus, the charge signal
interacts only with the empty traps that exist before its arrival. Further, by increasing the
background charge the empty traps decrease and consequently a small amount of charge
is captured from the signal, and hence the CTI decreases.

This effect is similar to reduce the density of traps as we will see later. Therefore the
CTI is not affected after the peak region (at high temperatures). This is because at high
temperatures, the emission time is too short compared to the capture and shift times.
Thus almost all filled traps emit their electrons and can join the passing charge signal,
and consequently the CTI is not affected by the background charge at high
temperatures.

100 120 140 160 180 200
0
0,05
0,10
0,15
0,20
0,25
0,30
0,35
0,40
0,45
Temperature (K)
C
T
I

(
%
)

r
f0
= 0 %
r
f0
= 50 %
r
f0
= 100 %
2phs CCD
0.17 eV traps
f = 10 MHz
N
t
= 10
12
cm
-3
n
s
= 4,5.10
14
cm
-3
Occ= 1%

Figure IV.14: CTI versus temperature with the background as a parameter for 2-
phases CCD for 0.17 eV traps at 10 MHz for 10
12
and 4,5.10
14
cm
-3
trap and signal
densities respectively at 1% occupancy.

63
100 120 140 160 180 200 220 240
0,00
0,05
0,10
0,15
0,20
0,25
0,00
0,05
0,10
0,15
0,20
Temperature (K)
C
T
I

(
%
)

r
f0
= 0 %
r
f0
= 50 %
r
f0
= 100 %
2phs CCD
0.17 eV traps
f = 50 MHz
N
t
= 10
14
cm
-3
n
s
= 4,5.10
14
cm
-4
Occ = 1%

phases CCD for 0.17 eV trap at 50 MHz for 10
12
and 4,5.10
14
cm
-3
trap and signal

Figure IV.16 and figure IV.17 show the results of CTI versus temperature for 0.44 eV
traps at 10 and 50 MHz respectively, for the 2-phases CP-CCD with the background
charge state (r
f0
) is a parameter.
250 300 350 400 450 500
0,00
0,05
0,10
0,15
0,20
0,25
0,30
0,35
Temperature (K)
C
T
I

(
%
)

r
f0
= 0 %
r
f0
= 50 %
r
f0
= 100 %
2phs CCD
0.44 eV traps
f= 10 MHz
N
t
= 10
12
cm
-3
n
s
= 4,5.10
14
cm
-3
Occ= 1%

phases CCD for 0.44 eV trap at 50 MHz for trap 10
12
and 4,5.10
14
trap and signal

64

250 300 350 400 450 500 550
0,00
0,02
0,04
0,06
0,08
0,10
0,12
Temperature (K)
C
T
I

(
%
)

r
f0
= 0 %
r
f0
= 50 %
r
f0
= 100 %
2phs CCD
0.44 eV traps
f = 50 MHz
N
t
=10
12
cm
-3
n
s
= 4,5.10
14
cm
-3
Occ = 1%

phases CCD for 0.44 eV traps at 10 MHz for 10
12
and 4,5.10
14
trap and signal

Figure IV.18 shows a comparison between results obtained by full TCAD simulation
and results obtained the Proposed Analytic Model for 0.17 eV for 2-phases CP-CCD at
50 MHz for two different background states. It can be clearly seen that the Analytic
results agree well with full TCAD simulations in case where the traps are assumed to be
partially filled. It has to be mentioned that full TCAD simulation also assumes partially
filled traps.

65
100 120 140 160 180 200 220 240
0,00
0,05
0,10
0,15
0,20
0,25
Temperature (K)
C
T
I

(
%
)

TCAD sim
PAM with r
f0
= 100 %
PAM with r
f0
= Analy
2phs CCD
0.17 eV traps
f = 50 MHz
N
t
= 10
12
cm
-3
N
t
= 4,5.10
14
cm
-3
Occ = 1%

Figure IV.18: Comparison study between results obtained by the Proposed Analytic
Model and full TCAD simulation of CTI versus temperature for two values of
background (r
f0
) for 2-phases CCD for 0.17 trap eV.

VI. 5 Occupancy effect
In normal operation of CCD, charge signal will be continuously transferred along the
device from one pixel to the next until the charge signal reaches the output register. This
is what is usually described as a simple process of phased clocking. By the time the
charge signal reaches the output register another one arrives and so on. It is assumed
that square pulses are applied to the transfer electrodes and the charge signal is
transferred instantaneously from one node to the next. It is well known that not all
pixels are hit, which means some pixels contain charge and others are empty. So during
the transfer the charge signal interacts with several no previously occupied nodes and
then passes by the node which initially contains a charge signal. This mechanism of
transfer in the CCD is illustrated in figure IV.19. The ratio of empty pixels to the filled
ones is called occupancy (Occ). Let us call the time between two successive arrivals of
charge signal the waiting time (t
w
). The waiting time is related to the readout frequency
and occupancy by the relation
Occ f
t
w
.
1
= . The occupancy is a very important
parameter in CCDs.


66

Figure IV.19: Schematic view off collection and transfer of charge signal in CCD
showing the hit (filled) pixels and not nit (empty) ones.

In figure IV.20 and figure IV.21 we present the variation of the Charge Transfer
Inefficiency versus temperature at 10 and 50 MHz readout frequencies with the
occupancy as a parameter for the 0.17 eV and 0.44 eV traps respectively for 2-phases
CP-CCD. The Proposed Analytic Model results show that the occupancy has a large
effect on the CTI only at low temperatures (before the peak position). As we discussed
before, at low temperatures the emission time
e
is too large than capture time
c
.
80 100 120 140 160 180 200 220
0,00
0,05
0,10
0,15
0,20
0,25
0,30
0,35
0,40
0,45
Temperature (K)
C
T
I

(
%
)

Occ = 1 %
Occ = 0.1 %
Occ = 0.01 %
2phs CCD
0.17 eV traps
f = 10 MHz
N
t
= 10
12
cm
-3
n
s
= 4,5.10
14
cm
-3

Figure IV.20. CTI versus temperature with the occupancy as a parameter for 2-
12
and 4,5.10
14
cm
-3
trap and signal
densities respectively.
Hit Pixel
Not Hit Pixel
Readout
p
+
Channel Stop

67
100 120 140 160 180 200 220 240
0,00
0,05
0,10
0,15
0,20
0,25
Temperature (K)
C
T
I

(
%
)

Occ = 1 %
Occ = 0.1 %
Occ = 0.01 %
2phs CCD
0.17 eV traps
f = 50 MHz
N
t
= 10
12
cm
-3
n
s
= 4,5.10
12
cm
-3

12
and 4,5.10
14
cm
-3
trap and signal

When the charge signal moves out from the node, the filled traps begin to emit their
trapped electrons. If the occupancy is high (ie the majority of pixels are hit), traps emit
their trapped electrons only in a short time and the other charge signal arrives, which
means that the waiting time is short than the emission time (fig IV.22). Thus, the arrival
charge signal will interact with less empty traps, therefore, a few electrons are lost from
the signal, this leads to a small CTI. In case where the occupancy is low, there is more
time for the filled traps to emit their trapped electrons, hence the waiting time is much
longer than the capture time. When the charge signal moves on, the arrival charge signal
interacts with more empty traps and therefore a considerable amount of electrons are
lost from the signal and this increases the CTI. At high temperatures, the emission time
e
is too short, compared to both capture and waiting times. So, when the charge signal
moves on from the node the majority of filled traps emit their electrons in a very short
time. This time is too short compared to the waiting time even for a low occupancy.
Consequently, the arrival charge signal interacts with the same number of empty traps
in both cases (low and high Occ). In other words, nearly all traps emit their trapped
electrons when the signal is still in the neighboring node.


68
100 120 140 160 180 200 220 240
10
-10
10
-9
10
-8
10
-7
10
-6
10
-5
10
-4
Temperature (K)
C
o
n
s
t
a
n
t
s

t
i
m
e

(
s
)

Emission time
Capture time
Shifting time
Waiting time, Occ= 1%
Waiting time, Occ= 0.1%
Waiting time, Occ= 0.01%
0.17 eV traps
f = 50 MHz

Figure IV.22: Variation of constant times with temperature for the 0.17 eV traps at
50 MHz, the waiting time is at different values of occupancy.

The temperature dependence of the CTI obtained by the Proposed Analytic Model for 2-
phases CP-CCD for 0.44 eV trap at 10 and 50 MHz with the occupancy as a parameter
are shown in figure IV.23 and figure IV.24 respectively.
200 250 300 350 400 450 500
0,00
0,05
0,10
0,15
0,20
0,25
0,30
0,35
Temperature (K)
C
T
I

(
%
)

Occ = 1 %
Occ = 0.1 %
Occ = 0.01 %
2phs CCD
0.44 eV traps
f = 10 MHz
N
t
= 10
12
cm
-3
N
t
= 4,5.10
14
cm
-3

Figure IV.23. CTI versus temperature and the occupancy as a parameter for 2-phases
CCD for 0.44 eV trap at 50 MHz for 10
12
and 4,5.10
14
cm
-3
tarp and signal densities.

69
200 250 300 350 400 450 500 550
0,00
0,02
0,04
0,06
0,08
0,10
0,12
Temperature (K)
C
T
I

(
%
)

Occ = 1 %
Occ = 0.1 %
Occ = 0.01 %
2phs CCD
0.44 eV traps
f = 50 MHz
N
t
= 10
12
cm
-3
n
s
= 4,5.10
14
cm
-3

12
and 4,5.10
14
cm
-3
trap and signal

Analytic results (obtained by Proposed Analytic Model) compared to the full TCAD
simulations results for the 0.17 eV traps at 50 and 25 MHz with the occupancy as a
parameter are shown in figure IV.25 and figure IV.26 respectively.
80 100 120 140 160 180 200 220 240
0,00
0,05
0,10
0,15
0,20
0,25
0,30
0,35
0,40
Temperature (K)
C
T
I

(
%
)

TCAD Occ = 1 %
PAM Occ = 1 %
TCAD Occ = 0.1 %
PAM Occ = 0.1 %
2phs CCD
0.17 eV traps
f = 25 MHz
N
t
= 10
12
cm
-3
n
s
= 4,5.10
14
cm
-3

Figure IV.25. A comparison between PAM and TCAD results of the CTI versus
temperature with the occupancy as a parameter for 2-phases CCD for 0.17 eV traps
at 50 MHz read out frequency.

70
80 100 120 140 160 180 200 220 240
0,00
0,05
0,10
0,15
0,20
0,25
Temperature (K)
C
T
I

(
%
)

TCAD Occ = 1 %
PAM Occ = 1 %
TCAD Occ = 0.1 %
PAM Occ = 0.1 %
0.17 eV traps
f = 50 MHz
N
t
= 10
12
cm
-3
n
s
= 4,5.10
14
cm
-3
2phs CCD

Figure IV.26: A comparison between PAM and TCAD results of the CTI versus
temperature with the occupancy as a parameter for 2-phases CCD for 0.17 eV trap at
50 MHz.

The good agreement between the PAM and TCAD simulation results especially at high
temperatures can be clearly seen. At low temperatures the absence of simulation results
is due to a convergence problem.

IV. 6 Charge signal density effect
As it was defined in the chapter 3, Charge Transfer Inefficiency (CTI) per pixel is the
portion of the charge deferred from the charge signal to the injected charge signal (or
collected) in the pixel. It is well known that the capture time
c
is inversely proportional
to the charge signal density (Eq. III.7). So, an increase in the charge signal density leads
to a decrease in the capture time (fig. IV.27). At high charge signal density, nearly all
traps are filled in a very short time. In the case when the densities of traps and charge
signal are very different, the ratio of the charge lost from the signal (the number of
traps filled when the signal arrives) to the charge signal decreases by increasing the
charge signal density.

71
100 120 140 160 180 200 220 240
10
-10
10
-9
10
-8
10
-7
10
-6
10
-5
10
-4
10
-3
Temperature (K)
T
i
m
e

(
s
)

Emission time
Shifting time
Waiting time
Capture time at n
s
= 4,5.10
13
cm
-3
Capture time at n
s
= 4,5.10
14
cm
-3
Capture time at n
s
= 4,5.10
15
cm
-3
0.17 eV traps
f = 50 MHz
2phs CCD

Figure IV.27: Variation of constant times with temperature and the capture time at
different values of charge signal density.

Figure IV.28 shows that the peak of CTI goes down by increasing the charge signal
density.
100 120 140 160 180 200 220 240
0,00
0,05
0,10
0,15
0,20
0,25
0,30
Temperature (K)
C
T
I

(
%
)

n
s
= 4,5.10
13
cm
-3
n
s
= 4,5.10
14
cm
-3
n
s
= 4,5.10
15
cm
-3
2 Phs CCD
0.17 eV traps
f= 50 MHz
N
t
=10
12
cm
-3
Occ = 1 %

Figure IV.28: CTI versus temperature for two phases CCD for 0.17 eV traps at 50
MHz, the occupancy is 1% and the charge signal density as parameter.


72
The linear dependence of the CTI versus charge signal density is shown in figure IV.29.
This result is predicted by equation III.36. The experimental work of Hopkins et al [52]
confirmed that the CTI decreases by increasing the number of electrons injected in the
pixel.
0 5 1 0 1 5 2 0 2 5 3 0 3 5 4 0 4 5
10
-5
10
-4
10
-3
10
-2
Signal Charge Density (10
13
cm
-3
)
C
T
I

T= 300 K
T = 400 K
T = 500 K
0.17 eV traps
f = 50 MHz
N
t
= 10
12
cm
-3
2phs CCD

Figure IV.29: Analytic results for the CTI versus charge signal density (n
s
) for
0.44 eV traps at 50 MHz read out frequency at three values of temperature.

IV. 7 Traps density effect
Figures IV.30 and IV.31 show the CTI results versus temperature for both 0.17 eV and
0.44 eV traps at 50 MHz read out frequency with the traps density as a parameter for 2-
phases CP-CCD. It can be clearly seen that the CTI increases by increasing the traps
density. This manifests itself because the charge signal interacts only with empty traps.
An increase in the number of traps (evidently this means increasing empty traps), thus
the charge lost from the signal increases and consequently the CTI increases. The linear
dependence of the CTI on the traps density is observed in figure IV.32. These results are
confirmed by the full TCAD simulation given in figure IV.33.

73
100 120 140 160 180 200 220 240
0,00
0,02
0,04
0,06
0,08
0,10
0,12
0,14
0,16
0,18
0,20
Temperature (K)
C
T
I

(
%
)

N
t
= 10
11
cm
-3
N
t
= 5.10
11
cm
-3
N
t
= 10
12
cm
-3
2phs CCD
0.17 eV traps
f = 50 MHz
n
s
= 4,5.10
12
cm
-3
Occ = 1 %

Figure IV.30: CTI values versus temperature from the Proposed Analytic Model
(PAM) for two phases CCD for the 0.17 eV traps at 50 MHz at different densities
of charge signal.
10
11
10
12
10
13
10
-10
10
-9
10
-8
10
-7
10
-6
10
-5
10
-4
10
-3
10
-2
Trap concentration (cm
-3
)
C
T
I

f = 10 MHz
f = 25 MHz
f = 50 MHz
2phs CCD
0.17 eV traps
T = 200 K
n
s
= 4,5.10
14
cm
-3
Occ = 1 %

Figure IV.31: CTI values for a large range of trap concentrations from the
Proposed Analytic Model (PAM) for different values of read out frequencies.


74

Figure IV.32: CTI values for a large range of trap concentrations from the TCAD
simulation for different values of read out frequencies.

IV. 8 Signal shape effect
In the previous study, we considered that the charge signal is distributed uniformly in
the potential well; this means that the charge signal density is uniform in all the volume
of storage under the gate. In reality the charge signal has no uniform distribution and
does not have well defined boundaries. In fact the charge concentration decreases
gradually from the center of the signal packet. Therefore, the signal packet will interact
with a varying fraction of traps within the pixel and this affects the CTI determination.
The charge signal profile varies in the signal cloud as illustrated in the upper part of
Figure IV.33. The expected scenario of the CTI for two different signal shapes can also
be seen in the lower part of this figure.

Figure IV.34 shows the shape of the profile of the charge signal under the node from a
full TCAD simulation. The charge signal used in the simulation is chosen to be similar
to the charge generated by a Minimum Ionizing Particle (MIP). The maximum value
taken for the charge signal is 4.510
14
cm
3
.


75

Figure IV.33: Diagram of the charge signal in a potential well and effect of the signal
shape on the expected CTI. Upper part: the density of a signal packet in a potential
well decreases gradually from the center of the packet. Lower part: expected scenario
of the CTI dependence on the shape of the signal packet (small CTI for a narrow
shape as shown on the left-hand side and large CTI for a wider shape as shown on
the right-hand side).

Figure IV.34: Charge signal density in transit from a TCAD simulation of a CP-
CCD. The plot shows the charge packet located under a node at a depth of about 0.5
microns. One pixel is located between x = 10 and 30 microns. The arrow indicates
the direction of the transfer.

76
Two-dimensional and one-dimensional charge signal density profiles are extracted as
shown in figures IV.35 and figure IV.36 respectively.

Figure IV.35: Two-dimensional charge signal density extracted from the charge
packet under one node using a full TCAD simulation.

Figure IV.36: One-dimensional charge signal density extracted from the charge
signal under one node using a full TCAD simulation at a depth of 0.5 microns.


77
The effect of the charge signal profile is studied by means of the capture time
c
. Figure
IV.37 and figure IV.38 show a comparison between PAM and full TCAD results for
0.17 eV and 0.44 eV traps respectively. As it can be seen there is a better agreement
between the full TCAD simulation and analytic results in case when the signal shape
used in the proposed analytic model is extracted from the simulation.
These figures also show the CTI values for different signal shapes in comparison with
the full TCAD simulation. The CTI is reduced as the width of the potential well
becomes smaller. This behavior is expected, as illustrated in the lower part of figure
IV.33.

80 100 120 140 160 180 200 220 240
0,00
0,05
0,10
0,15
0,20
0,25
0,30
Temperature (K)
C
T
I

(
%
)

PAM (TCAD shape)
PAM (Square shape)
PAM (Peak shape)
TCAD sim
0.17 eV traps
f = 50 MHz
N
t
= 10
12
cm
-3
Occ = 1 %
2phs CCD

Figure IV.37: CTI from the Proposed Analytic Model (PAM) including the shape
of the charge signal as a function of temperature for 0.17 eV traps in comparison
with full TCAD simulation results.

78
200 250 300 350 400 450 500 550
0,00
0,02
0,04
0,06
0,08
0,10
0,12
0,14
Temperature (K)
C
T
I

(
%
)

PAM (TCAD shape)
PAM (square shape)
PAM ( peak shape)
TCAD sim
2phs CCD
0.44 eV traps
f = 50 MHz
N
t
= 10
12
cm
-3
Occ = 1 %

Figure IV.38: CTI from the Proposed Analytic Model (PAM) including the shape of
the signal packet as a function of temperature for 0.44 eV traps in comparison with
full TCAD simulation results.

The CTI values calculated with the Proposed Analytic Model including the charge
signal profile agree better with the full TCAD simulation results for the 0.17 eV traps
(Fig IV.37). The relatively shallow traps (0.17 eV) are more affected by the charge
signal shape than the deeper ones (0.44 eV). For the latter, the minor effect of the
charge signal profile is due to its small capture cross-section. The inclusion of the
approximate signal shape in the Proposed Analytic Model reduces the CTI value in the
peak region by about 10 to 20% compared to assuming a square-shape signal.
Figure IV.39 shows the ratio of the CTI from Proposed Analytic Model to CTI from full
TCAD simulation for the 0.17 eV traps at 50 MHz readout frequency for different
signal shapes. It can be seen that the results of the Proposed Analytic Model with the
TCAD signal shape agree better with the full TCAD simulation than the square and
peak shapes. Similar results are obtained for 0.44 eV traps below 350 K.


79

Figure IV.39: Ratio of CTI from the Proposed Analytic Model (PAM) with
different signal shapes to CTI from full TCAD simulation for 0.17 eV traps at 50
MHz readout frequency.

VI. 9 Clock voltage waveform effect
Another design aspect of the CCD development is the operating voltage. A low
operating voltage is an advantage as the CCD will then have a smaller power
consumption. An optimization is needed in order to keep the CTI at an acceptable level.
In the previous section the CTI was studied using a square clock voltage. A sine voltage
applied to consecutive nodes is shown in Figure IV.40. The effect of different clock
voltage amplitudes on CTI is investigated. The following variables are defined:
V
1
: voltage applied to a first node of a pixel,
V
2
: voltage applied to a second node of a pixel,
V
B
: potential barrier created between two successive gates by the doping profile,
T
1,3
: time interval where |V
1
V
2
| < V
B
,
T
2
: time interval where |V
1
V
2
| > V
B
.

P
P
P
P

P


80

Figure IV.40: Diagram of clock voltages in a two phases CCD. V
1
and V
2
(dashed
lines). The solid line shows the difference between the two applied voltages. V
B
is
the barrier potential (horizontal dashed line). T
1
and T
3
are time periods with no
charge transfer and T
2
is the time period with charge transfer.

The signal is not transferred until the difference between the two clock voltages V
1
and
V
2
reaches the potential barrier created between two consecutive nodes. This affects the
CTI determination and it is now included in the Proposed Analytic Model. The time
intervals T
1
and T
3
are defined by the intersection point between the |V
1
V
2
| curve and
the barrier potential V
B
(horizontal dashed line). Thus,
|
|
\
|
= =
M
B
V
V
f
T T
2
arcsin
2
1
3 1
(IV. 2)
where V
M
is the amplitude of the clock voltage.

The CTI determined with the Proposed Analytic Model for different clock voltage
amplitudes is shown in Figures IV.41 and IV.42 for 0.17 eV and 0.44 eV traps,
respectively. Two different clock voltage amplitudes are used to illustrate the effect of
the clock voltage and to compare with full TCAD simulations with an applied voltage
of 3 V.

81
80 100 120 140 160 180 200 220 240
0,00
0,05
0,10
0,15
0,20
0,25
Temperature (K)
C
T
I

(
%
)

PAM (V
m
= 1 V)
PAM (V
m
= 3 V)
TCAD
0.17 eV traps
f = 50 MHz
N
t
= 10
12
cm
-3
n
s
= 4,5.10
14
cm
-3
2phs CCD

Figure IV.41: CTI from the Proposed Analytic Model (PAM) including clock
voltage effects as a function of temperature for 0.17 eV traps and 1% hit (pixel)
occupancy in comparison with full TCAD simulation results. Two different clock
voltages (V
M
) are shown.
250 300 350 400 450 500 550
0,00
0,02
0,04
0,06
0,08
0,10
0,12
Temperature (K)
C
T
I

(
%
)

PAM (V
m
= 1V)
PAM (V
m
= 3V)
TCAD sim
2phs CCD
0.44 eV traps
f = 50 MHz
N
t
= 10
12
cm
-3
n
s
= 4,5.10
14
cm
-3

Figure IV.42: CTI from the Proposed Analytic Model (PAM) including the clock
voltage effects as a function of temperature for 0.44 eV traps and 1% hit (pixel)
occupancy in comparison with full TCAD simulation results. Two different clock
voltages (V
M
) are shown.

82
It is noted that the CTI decrease occurs only for temperatures above the CTI peak
position. At high temperatures, the emission time constant decreases to become
comparable to the joining time. Now trapped electrons rejoin their signal packet and the
CTI decreases. When the clock voltage increases the joining time increases and there is
more time for electrons to rejoin their signal packet. Now trapped electrons rejoin their
signal packet and CTI decreases. In addition, the effect of the clock voltage amplitude
on the CTI is studied for a large variation of amplitudes. The CTI decreases as the
amplitude increases until it saturates and no further decrease is observed. This result is
shown in Figure IV.43 for two examples, 0.17 eV traps at a temperature of 200 K and
0.44 eV traps at a temperature of 460 K.

Figure IV.43: CTI from the (PAM) as a function of clock voltage amplitude for both
traps 0.17 eV and 0.44 eV with a concentration of 10
12
cm
3
at T = 200 and 460 K,
respectively, with 1% hit (pixel) occupancy and 50 MHz readout frequency.

The results of CTI obtained by the TCAD simulation regarding the effect of the applied
voltage are shown in figure IV.44. The CTI sharply increases below a certain clock
voltage depending on the temperature and the readout frequency. Very small CTI values
are found for clock voltages above 1.6 and 1.7 V for readout frequencies of 1 and 20
MHz, respectively. A higher temperature results in lower CTI, and a higher frequency
results in a larger CTI. The clock voltage where the sharp increase occurs depends

83
strongly on the precise doping profiles of the CCD in the manufacturing process and
therefore the given values are only an indication.

Figure IV.34: CTI from TCAD simulation results as a function of the applying
voltage for two read out frequencies (1 and 20 MHz) at two different operating
temperatures (170 and 219 K).

f = 1 MHz, T= 170 K
f = 1 MHz, T= 219 K
f = 20 MHz, T= 219 K
f = 20 MHz, T= 170 K
K
C
T
I

(
%
)

Voltage (V)

84
Conclusion and Outlook

The Charge Transfer Inefficiency (CTI) of a 3-phases CCD and 2-phases CCD has been
studied by a new Proposed Analytic Model (PAM) and compared to a full simulation
(ISE-TCAD DESSIS). This PAM uses a new developed formula to calculate the CTI.
This new model includes the possible slow capture rate which is universally neglected
in existing models. The CTI is usually affected by defects created in irradiated CCDs.
Several types of defects are created during the operation of a CCD as a particle detector.
However the most important, as far as effectiveness is concerned, are the 0.17 eV and
0.44 eV trap levels. Hence only these two levels have been considered. Variations of the
CTI with respect to temperature and frequency have been analysed. At low temperatures
(< 230K) the 0.17 eV traps dominate the CTI, whereas the 0.44 eV traps dominate at
higher temperatures. This is explained by the fact that the 0.17 eV traps are closer to the
conduction band, requiring less energy to be ionised, hence their efficiency at lower
temperatures. The background and the Occupancy effect on CTI have been also studied.
Their effects were observed only at low temperatures. This is due to fact that at low
temperatures the emission time of captured electrons is too long so that they remain
fully occupied. In addition, the effect of the signal charge density and the traps density
has been reported. The CTI decreases by increasing the signal charge density because
the CTI is inversely proportional to signal charge. However, the CTI increases with
increasing the traps density because the CTI is proportional to the trap density. Non-
uniform signal shape and realistic clock voltage amplitudes effect on CTI also have
been studied. The signal shape affects the CTI mostly in the peak region. A smaller
width of the potential well decreases the CTI. The inclusion of the clock voltage effects
leads to smaller CTI values only above the CTI peak position (for high temperatures).
Good agreement between simulations and analytic results has been found. This gives an
indication that the underlying physics of the radiation damage is well understood. The
optimum operating temperature for the both 3-phases CCD and 2-phases CCD in a high
radiation environment is found to be about 230 K for readout frequencies in the range
10 to 50MHz.
In summary, the Analytic Model has been extended to give a more realistic description
of the CTI for a CCD and the results agree better with full TCAD simulations. Overall,
the Analytic Model predicts well the CTI peak position in comparison with a full TCAD

85
simulation. It can produce CTI values almost instantly while the full TCAD simulation
is very CPU intensive. Generally, agreement between the Analytic Model and full
TCAD simulation results is good for the 0.17 eV traps while for the 0.44 eV traps the
results of the Proposed Analytic Model do not agree with the full TCAD simulation in a
range above 375 K which is above normal operating temperature. The Analytic Model
is suited to contribute to future CPCCD developments.
In the PAM model it was supposed that the traps are fully ionized. This may be true if
the applied voltage is large enough to fully deplete the region where the traps are
located. This is the case in our work. However it is suitable to consider the case where
the applied voltage does not fully ionize the traps. Other work that can be carried is
experimental measurements to validate the PAM.

86

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Puplications related to this work

[1] Andr Sopczak, Salim Aoulmit et al. "Radiation hardness studies in a CCD with
high-speed column parallel readout" J. Instr. JINST 3 (2008) P05007 PP 1-9.

[2] Andr Sopczak, Salim Aoulmit et al. "Modeling of Charge Transfer Inefficiency in a
CCD with High-Speed Column Parallel Readout". IEEE, Trans. Nucl. Sci,.VOL. 56,
NO. 3, JUNE (2009)

---=-- ''- -'-' -=-' ) CCDs ( '=-- '=- .---'-' .---' -- '= -''' '=' '-- .
- .---''' '+- '+---'-=' = -- '-=' -- '--=' --' -- - '+-- '-' ---' . -
--' =-=- LCFI ) Linear Collider Flavour Identification ( ) '--' ==' ' ' -' ---=- = (
- -` -'= ' -- ) -=--' '--' ( -=-' .-- '-' .-- ''=-- ) CTI ( ---''- ''- -'-' -=-'
--'-- '---'- .-= = ``` ) ISE-TCAD .( --'--' '---'- ''=-' TCAD -
-'- . -'-'= ''=-' -'- '=' --' ='-' . .-' - . -- -= '-'= .-- ''=-'
-=-' .-- '-' ) CTI .( -'-- '-'=-' --' -'-- .-- -- '- '- - TCAD . --'
- --- ---- CTI -=-' ' . '-` =' ' -' .`- ---' .- -
-=-' -' . . -= '='` ''- -'-= '= ' -=-' ) CCDs ( .' -' .-
.-----' --= '- .-'='-' .---' 0.17 eV 0.44 eV '-' -'-= .= . =' ' --=
--=--' ) .- . 230 ( --'' 0.17 eV '= .--+- CTI . -''' =' ' --= .' --'' 0.44
eV .--+-' . '= `- '` ----` ''=' CTI =- --=--' =' ' --= . - .'--
CTI '-' - --- .- '` -= '` '-' - -' '` . --'' -` '
' . - ' - --' CTI '= '` -= .-' -` -`'-' '- CTI --' =- - .
'--- ' -=-' -' '- CTI =- -''' =' ' --= . =' ' -`=
' .---' '`-' - -'- '' -=-' .-= = ``` K 230 -' -' ---''-
'=-' 10 - 50 MHz .

Rsum

Dans les deux dernires dcennies, les Dispositifs Transfert de Charge (DTC) sont utilises en
succs dans le domaine de physique de haute nergie. A cause de leurs sensibilits et rsolutions
spatiales, ils ont trouv des applications comme dtecteurs de particules de courte dure de vie. Le
groupe LCFI (Linear Collider Flavour Identification) Lancaster (UK) a obtenu des rsultats
numriques dtailles de l'inefficacit de transfert de charge (ITC) pour les CCDs 3-phases par le
simulateur ISE-TCAD (Integrated Systems Engineering Technology Computer Aided Design). Les
simulations par TCAD sont trs consommatrices de ressources, d'o la ncessit d'une modlisation
analytique. Dans ce travail, un modle analytique a t dvelopp pour la dtermination de
l'inefficacit de transfert de charge (ITC). Les valeurs dtermines avec ce modle sont en grand
accord avec ceux obtenus avec le simulateur TCAD. Le modle permet une tude efficace de la
variation de lITC avec des paramtres comme la frquence de lecture, la temprature de
fonctionnement, l'occupation, la forme du signal de charge et de la tension d'horloge applique.
Plusieurs types de dfauts sont crs dans le DTC irradis, mais seulement les deux niveaux de
piges 0.17 eV et 0.44 eV sont considrs, car ils sont les plus efficaces. A basse tempratures
(<230K) les piges 0.17 eV dominent le ITC, tandis que les piges 0.44 eV dominent des
tempratures leves. Les effets de l'arrire-plan (back-ground) et de l'occupation sur lITC ont t
observs uniquement basses tempratures. LITC diminue en augmentant la densit de charge du
signal tandis qu'elle augmente avec l'augmentation de la densit des piges. La forme du signal
affecte l'ITC principalement dans la rgion de pic. Une plus petite largeur du potentiel diminue ainsi
lITC. L'inclusion de la tension applique conduit des plus petites valeurs de l'ITC seulement des
tempratures leves. En rsum, il a t constat que la temprature de fonctionnement optimale
pour les CCDs 3- et 2-phases dans le domaine de haute irradiation se trouve environ 230 K pour
des frquences de lecture dans la gamme 10-50MHz.

Salim AOULMIT: Simulation de L'effet Des Pièges Sur L'efficacité de Transfert de Charge Dans Les Circuits À Transfert de Charge (CCDS)

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