O ICOM SERVICE MANUAL COMMUNICATIONS RECEIVER iC-—R9SO0O0O0/L Icom Inc.INTRODUCTION This service manual describes the latest service information at the time of printing for the IC-R9000 COMMUNICATIONS RECEIVER and covers the follow: ing versions: VERSION VERSION NUMBER USA #02 Europe #03 Australia #04 Germany #05 France #06 DANGER Use ONLY the specified AC voltage described on the AC power socket. Other voltages may cause receiver damage or personal injury. DO NOT touch the REG UNIT after the receiver is connected to an AC outlet. An insulated tool must be used at all times. DO NOT expose the receiver to rain, snow or any liquids. DO NOT apply an RF signal of more than 100 mW. (20.d8m) to the antenna connector. This could damage the receiver's frontend. ORDERING PARTS REPAIR NOTE Be sure to include the following four points when ordering replacement parts 10-digit order numbers Component part number and name Equipment model name and unit name Quantity required 1130001000 IC yPD4066EC IC RGODD MAIN UNIT pieces 8810004690 Screw BIHMEx5ZKBS IC-RGO00 Front cover 10>ieces Addresses are provided on the inside back cover for your convenience. 1. Make sure a problem is internal before dis- assembling the receiver. 2. DO NOT open the receiver until the receiver is disconnected from a power source. 3. USE an external AC power supply to a receiver power source during testing. 4, DO NOT force any of the variable components. Turn them slowly and smoothly, 5. DO NOT short any circuits or electronic parts. An insulated tuning tool MUST be used for all adjustments, 6. DO NOT keep power ON for a long time when the receiver is defective. 7. READ the instructions of test equipment thor- oughly before connecting equipment to the receiver.SECTION SECTION SECTION SECTION SECTION ‘SECTION SECTION SECTION SECTION SECTION 1 2 3 3 3 3 3 3 3 4 4 4 4 4 4 4 4 4 5 5 5 5 5 5 5 5 6 6 6 6 6 6 6 6 6 6 6 1 2 3 -4 5 6 1 2 3 4 “5 6 2 8 1 2 3 -4 5 6 7 TABLE OF CONTENTS SPECIFICATIONS op cece 1-4 INSIDE VIEWS CIRCUIT DESCRIPTION RECEIVER CIRCUITS PLL CIRCUITS LoGic CIRCUITS. SCOPE UNIT : : TV UNIT (France version does not include this unit) 3-16 REG UNIT bio Bode 3-17 MECHANICAL PARTS AND DISASSEMBLY FRAME DISASSEMBLY (1) FRAME DISASSEMBLY (2) .... FRONT PANEL DISASSEMBLY (1) FRONT PANEL DISASSEMBLY (2) FRONT UNIT CONNECTOR ASSEMBLY TOP VIEW CONNECTOR ASSEMBLY (1). ‘TOP VIEW CONNECTOR ASSEMBLY (2). BOTTOM VIEW CONNECTOR ASSEMBLY MAINTENANCE AND ADJUSTMENT REQUIRED TEST EQUIPMENT ‘TEST EQUIPMENT CONNECTION . PLL ADJUSTMENT HF BAND RECEIVER ADJUSTMENT. VHF/UHF BAND RECEIVER ADJUSTMENT : 5-8 SCOPE ADJUSTMENT , 5-12 TV UNIT ADJUSTMENT (Except France version) . . ee reves B16 BOARD LAYOUTS 4. FRONT UNIT (1) 2 FRONT UNIT (2)... 3. FRONT UNIT (3) 4 4 FRONT UNIT (4) 5 =5 LOGIC A UNIT. : 6 6 LOGIC B AND SCOPE UNITS 6-7 7 PLLAUNIT(1).... 6-8 8 PLLAUNIT (2) oe - 6-10 =9 PLLBUNIT(1) 6-11 = 10 PLLBUNIT (2) 6-12 6— 11 MAIN UNIT. 6-14 6-12 IFUNIT wees vee 6-16 6-13 RF AUNIT 6-17 6-14 RF BUNIT (1) 6-18 6-15 RF BUNIT (2) : cee 6-20 6-16 TV AND REG UNITS : 6-21 6-17 HPF UNIT. . 6-22 6-18 EF (CONNECT A, B) UNIT 6-24 PARTS LIST 7-1~36 BLOCK DIAGRAM 8-1 VOLTAGE DIAGRAMS cece cee 9-1~9 =1 CONNECTION - =2 FRONT UNIT - BS cvcovccvoe o ~ LOGIC A AND B UNITS. PLL A AND SCOPE UNITS. PLLB UNIT MAIN UNIT IF UNIT RFA AND BUNITS... HPF, TV, REG AND EF (CONNECT A, B) UNITS UX-R9000 (LCD UNIT)f=) 109 10) SPECIFICATIONS ‘* Frequency coverage = Mode ‘Receive system ‘Intermediate frequencies * Sensitivity + Selectivity * Audio output power * Audio impedance * Power supply requirement * Antenna impedance ‘* Power consumption ‘* Usable temperature range ‘* Frequency stability * Dimensions © Weight, VERSION FREQUENCY COVERAGE USA, Europe, Australia (0.10000 ~ 1999.80000 | 38.95000~ 14.5000 _26.00000~ 29.7000 Germany +44.00000~ 146.0000 430,00000~ 40.0000, 1280,00000~1300,00000 | [France l 0.10000~ 867.49988 _108.00000~1999.80000 Tuair wray USB, LSB, CW, FSK, AM, FM, Wide FM Superheterodyne system FREQUENCY | _0.10000~ 29.9998 | 30.00000~499.99999 | 500.00000~999.99999 1st iF 48.79376~ 48,8000 | 778.60001~778 70000 | 278.60001~278.70000, [nae 10.7000 70.70000 t 10.7000 3rd IF 0.45500 | 0.45500 “oasso0 | ain 1070000 ‘| 10.70000 10.7000, Frequencies above 1000 MHz use a crystal conversion system. Cin) MODE 898, OW, FSK aM FM Wide FM (0.10000~ 0.49909 Os WW 320 = 0.50000~ 1.79999 TOW 63uv = = | “‘so000~2a.99009 | O16uv 10 WW = =a '30.00000~ 999 99909 082 WY aw | sw 1aw 1000 00000~1299 99909 ssw [sow | ow 40uv "1240,00000~1299.99009 032 wv 20uv O5 nv 20 nv "1300.00000~1599.99999 063 WY sow | ton 40nv -1600.00000~1999.80000 10uv 56 nV, tay | 56 uv 10 dB SIN for SSB, CW, FSK and AM 12 dB SINAD for FM and Wide FM Maximum sensitivity values are indicated in the chart above. SSB, CW, FSK More than 2.4 kHz/—6 dB AM. More than 6 kHz/—6 dB FM More than 18 kHz/—6 dB Wide FM More than 150 kHz/—6 dB More than 2.5 W at 10 % distortion with an 6 © load 4-80 100~120 VAC (U.S.A. version) 220~240 VAC (Australia, Europe and France versions) 220. AC. (Germany version) 50 © (unbalanced) Less than 110 VA = 10 "C~ +50 °C (+14 "F~ +122 °F) 0.1~30MHz £25 Hz 30~1999.8 MHz £0.25 ppm (0°C~+50 °C; +92 F~+122 °F) 424(W) x 150(H) x 365(D) mm 16.7(W)x5.9{H) x 14.4(D) in. (projections not included) 20.0 kg (44.1 Ib) All stated specifications are subject to change without notice or obligation.SECTION 2 INSIDE VIEWS * TOP VIEW HF band BPF HF band scope 1st IF circuit, HF band 1st IF clrcult TUNIT RF AUNIT. HF band 1st mixer \VIUHF band BPF -VOICE SYNTHESIZER UNIT Tar ua =“ Lithium battery (8T1 CR2032) \W/UHF band 2nd mixer VIUHF band 1st IF titer: \VWUHF band 1st mixer © TOP VIEW (RF A AND TV UNITS ARE REMOVED) HPF UNIT. REG UNIT (PLLB UNIT is located under this unit ) 1 GH2 converter ——— * Transtormer (11: TP-50) (C3: M54) “Sih (Germany version P51) (CRTC UNIT RF B UNIT (PLLA UNIT is located Under this unit) Memory backup battery (BT! BR2032-172) LoGic A UNIT (LOGIC 8 UNIT locates under this unit)* BOTTOM VIEW wai UNIT venir = ar : Notch circuit HF band scope 2nd mixer Shift board Bro ieere jaa AGC clreuit — HF band 2nd mixer Noise blanker clrcult AF power amp citcult (1025: uPc1241H) Tone adjustment circuit (W024: TAT6SOP) rd mixer WFM demodulator circuit 1a IF circuit PLL A AND B UNITS ps UNIT 41 GHz converter LO circuit (HPL UNIT) DDS loop veo — —— 268 MHz band VCO {VCO 8 UNIT) DDS loop premix circuit. 768 MHz band VCO (W018: ENF-VCO0EBO1) Reterence crystal eeu —VIUHF 2nd LO loop premix circuit (x1: OR-228 12.5 MHz) (@nd Mix UNIT) —Voo 2 UNIT (614.95~639.35 MHz) VIUHF LO doubler eirout PLL IC (IG: MB87006A) yoo 1 UNIT (289.3~514.3 MHz}SECTION 3 CIRCUIT DESCRIPTION 3-1 RECEIVER CIRCUITS MEANT? weanrs V RFA UNIT [CONNECT A UNIT IF UNTT a eta come MAIN UNIT He 2nd mir 0-000 Mis 20 Mie~1000 MHz AF 8 UNIT HPF UNIT (ts converter 2nd 0: e110) $0 or 100 {er.90001~r000 mre Fig. 3-1-1 ANTENNA SWITCHING CIRCUIT (CONNECT A AND HPF UNITS) The IC-R9000 has 4 antenna connectors for a super wideband receiving range of 100kHz to 1999.8 MHz. Received signals enter one of the 4 antenna connectors depending on the receive frequency range, [ANTENNA] switch and [HF ANT SW]. (2) 30 MHz~1000 MHz (HPF UNIT) RF signals from the 30MHz~1000 MHz antenna connector (J2) pass through the 1GHz converter witching relay (RL1, RL2) and either bypass or are attenuated at the 10 dB attenuator, and are applied to the RF B UNIT via J3. RL1 and AL2 are RAF relay and are used for 1 GHz con: verter switching to ensure isolation. The attenuator (1) 100 kitz~20 Miz (CONNECT A UNTT) control voltage (AT1) is obtained from the RF A UNIT. RF signals enter either the [HF ANT 1] connector or [HF ANT 2] jack depending on the [ANTENNA] switch (s) 1000 MHz~1999.8 MHz (HPF UNIT) and [HF ANT SW]. (See below) RF signals from the 1000 MHz~2000 MHz antenna ‘SWITCH POSITION SELECTED connector (J1) pass through a high-pass filter and are THE ANT Sw) [ANTENNA] | _ CONNECTOR applied to the wide range SHF amplifier (IC1). The vam oe RRA splits provides 29-81 gain over a wideband fe ON FANT ee ANT? orF EONS High-pass fiter cutoff frequency is switched to either ON HF ANT 900 MHz or 1000 MHz using varactor diodes (D1~D3) pe and Q1. The high-pass filter suppresses image signals below 1000 MHz and the LO signal from a 1 GHz con: AF signals from the [HF ANT 1] connector pass through varter cfrcuit (IC) C109, the HF antenna switching relay (RL102) and a lowpass filter. They are then applied to the RF A UNIT via 4102, AF signals from the (HF ANT 2] jack pass through the ‘matching circuit (L106), the HF antenna switching relay (FL102) and a low-pass filter, and are then applied 10 the RF A UNIT via J102, ‘Amplified signals from IC1 are applied to the high-pass filter and mixed with the 1GLO signal from the PLL B UNIT to be converted to 100~999.8 MHz signals. 1. GHz CONVERTER OUTPUT FREQUENCY emeauency | LOFREQUENCY | przqueNcy 10001150 300 100~260 175019008 7000 150~9908 (Unit: 2) Table 2Converted signals are applied to the 3 dB attenuator {R19~R21) and then to the low-pass filter circuit where out-of-band signals above 1000 MHz are suppressed. The signals are applied to the 1048 attenuator via RL2, Strip lines, used in the high-pass and low-pass filters, provide GHz frequency stability. 3-1-2 HF RF BANDPASS FILTER (RF A UNIT) The HF signals applied to the RF A UNIT either bypass or are selectively attenuated at 10 dB or 20 dB attenuators (30 dB when passing through both attenuators). The signals are then applied to RF filters. ‘The RF A UNIT has 8 RF bandpass filters for signals above 2.0 MHz and 3 low-pass filters for signals below 2.0 MHz. The signals pass through one of the bandpass or low-pass filters depending on the receive frequency range. (1) 0.1~0.5 MHz Signals are applied to a low-pass filter via D2, Diodes (022, 024) are tuned ON when the “B1” line is “HIGH.” Filtered signals are applied to the 1st mixer circuit (Q1, Q2) via 024. (2) 0.5~1.6 MHz Signals are applied to a low-pass filter via D23. Diodes (023, 025) are tuned ON when the “B2" line is “HIGH.” Filtered signals are applied to the 1st mixer circuit (Q1, @2) via D25. (8) 1.6~30 MHz Signals are applied via D3 to a high-pass filter consisting of L5, L6,C5~C9. This filter suppresses strong signals. below 1.6 MHz such as a broadcasting station. FREQUENCY AND SELECTED PORT OF IC3 Filtered signals below 2,0 MHz are applied to a low-pass filter via D4, Diodes (04, D5) are turned ON when the 'B3" line Is “HIGH.” Filtered signals above 2.0 MHz are applied to one of 8 bandpass filters depending on the frequency of the signals. After passing through a bandpass or low-pass filter, the signals are applied to the Ltype attenuator by using 27 and D28. The attenuator functions as an RF AGC circuit. These diodes are pin diodes and are controlled by AGC bias voltage via Q4 and Q5. When strong signals are received, the AGC circuit increases the attenuation level, preventing front-end overloading, The signals from the attenuator are amplified by the preamplifier circuit (Q8, Q9). The preamplifier provides stable gain over all HF band frequency range. ‘Amplified signals are applied to the 1st mixer circuit (Q1, 2) via D29. (4) FILTER SWITCHING CIRCUIT To obtain BPF or LPF switching voltage (81~811), a 4bit band signal (01~D4) from the LOGIC A UNIT is decoded at the expander (IC3) as shown below and the resulting signals are current-amplified at IC1_ and tc2. A diode switching current from the BPF or LPF is applied to contacts of the relay (RL1, RL2) to prevent bad contacts. Band switching voltage (B1~B4, BH) is also applied to the RF B UNIT. INPUT DATA SELECTED PORT RECEIVE FREQUENCY PIN 22: D4 | PIN 21: 03 PINS: 02 | PIN2:D1 (HIGH) 0.03~ 0.49808 t L L L Pin 11 80) 0.5~ 1.59098 L L L H Pind St 1.6~ 1.99898 L L HW c Pin 10:2 20~ 2.99098 L t H H Pin 8 =§3 30~ 9.99998 L H C v Pin7 $4 40~ 8.99909 L H v H Pin 6 $5, 60— 7.99908 v H H v Fin 5: $6 B0~ 10.9909, L H H # Pin 4: 87 T1.0~ 15.49969 H v t U Pin 18: $8 155=_21.90089 H L L 4 Pin 17: $9 22.0~ 29.99008 H C H L Pin 20: S10 30.0~ 89.99009 H L H i Pin 19: S11 90.0~ 249.99909 Pe omaieeecer 4 H L L Pin 14: 812 250.0~ 499,99969 Se enaeea H K L 4 Pin 13: 813 '300.0~ 749,99900 1500.0~1749,99989 K a 2 ce Pin 16: S14 750.0~ 999,99989 Rear 4 H 4 H Pin 18: S15 Table 3 3-23-1-3 HF 1ST MIXER CIRCUIT (RF A UNIT) The signals from the HF AF bandpass filter are applied to a low-pass filter (L57~L59, C96~C100) cut off at 30 MHz. The signals enter the 1st mixer circuit (Q1, Q2) to be converted to a 48,70376~48.8 MHz 1st IF signal, The 1st mixer circuit employs a balanced mixer using low. noise junction FETs (2SK125 x2) to expand the dynamic range. HF 1ST MIXER gem ce ww Yee [ot] ee eae ae OLS pes 4 4 1 [@ tent 1 By ay ™ OT Fig. 2 The 1st LO signal (H1LO: 48.89375~78.8 MHz) enters the RF A UNIT from the PLL A UNIT via P7. The signal Is filtered by a high-pass filter, amplified at Q6, filtered by a lowpass filter, and then applied to the 1st mixer circuit (a1, 22). The ‘1st IF signal passes through an excellent reverse Isolation butfer amplifier (Q3) adopting 2 grounded-gate buffer amplifier. The 1st IF signal is applied to the pair of MCF (Monolithic Crystal Filter; F11(a)) to suppress out- of-band signals. The signal is amplified at the IF amplifier (Q7), and is filtered at the MCF (FI1(b)). The signal then enters the IF UNIT via J4 (IF UNIT: J1) The 1st IF signal from the 1st mixer circuit is also applied to the scope amplifier Q10 via R31 and then to the IF UNIT via JB. 3-1-4 VIUHF RF CIRCUIT (RF B UNIT) ‘The V/UHF signals from the HPF UNIT are applied to a bandpass filter and either bypass or are attenuated at 20 dB attenuator (R2~RB8, C8). C8 compensates an AF frequency attenuation level IC-R9000 has 4 tuned bandpass filters for VUHF band signals (above 30 MHz). The signals pass through one of the bandpass filters depending on the receive frequency range. Each tuned bandpass filter has a tuned RF amplifier which provides 10 dB gain. Table 4 shows a relation among receive frequencies, tuned filters and RF amplifiers. REGEIVE FREQUENCY TUNED FILTER (wi) (RF AMPLIFIER) 30~ 90 BPFI (Q1) 10001089, Bera cay 12501500 PF9 (a2) eo BPF4 (04) Table 4 Diode switches (D5, D11, D12, 018, 019, 025) and RF relays (AL1, RL2) are used for filter selection. BPF switching vollage (BPF1~BPF4) is obtained via IC5 by decoding band signals (81~B4) from the RF A UNIT, (0) BPFA Signals passed through RL1 and D5 are applied to a parallel resonance circuit (D6, L11, C15) to suppress Interference signals whose frequencies are half of receive frequencies, The signals are applied to the RF amplifier (Q1), The RF amplifier input tuning circuit consists of D7, D8 and L12~L14. The RF amplifier output tuning circuit consists of D9, D10 and L16~L18. These tuning circuits are controlled by the tuned voltage from IC. Zener diode DS0 prevents over maximum rated charging to the varactor diodes. (2) BPF2 Signals, passed through RL1 and 012, are applied to a parallel resonance circuit (013, L22, C25) to suppress interference signals whose frequencies are half of fecelve frequencies. In addition, serial resonance circuit (014, L70, C61) suppresses strong signals above 80 MHz and below 110 MHz such as an FM or TV broadcasting station. The signals are applied to the RF amplifier (C2). ‘The RF amplifier input tuning circuit consists of D17, L23~L25 and C119. The RF amplifier output tuning circuit consists of D17, L27~L29 and C120. These tuning circuits are controlled by the tuned voltage from erp, Diode D51 prevents applying minus voltage to the varactor diodes,(3) BPF3 Signals, passed through RL1 and 019, are applied to the 240 MHz cut-off high-pass filter to suppress inter- ference signals. The signals are applied to the AF amplifier (03). The RF amplifier input tuning circuit consists of D21, 22, L33 and L34, The RF amplifier output tuning circuit consists of D23, 024, L96 and L37. These tuning circuits are controlled by the tuned voltage from Ic2a (4) BPFS Signals passed through RL1 are applied to a parallel resonance circuit (026, L39, L45) to suppress inter- ference signals whose frequencies are halt of those of receive frequencies. The signals are applied to the AF amplifier (24) The RF amplifier input and output tuning circuits use strip lines to provide GHz frequency stability. The tuned voltage from IG2b is applied to varactor diodes (027~D20) in the tuning circuits. (6) 2ND RF AMPLIFIER The signals passed through the bandpass filter are applied to the 2nd RF amplifier (Q7) and then to the tuned notch circuit, The RF amplifier provides 10 dB gain over a wideband frequency range. 3-1-5 TUNED NOTCH CIRCUIT (RF B UNIT) The signals from Q7 pass through the tuned notch circuit and are then applied to the V/UHF 1st mixer circuit (IC8). This notch circult prevents the 1st LO signal (78.7~ 1278.7 MHz) leakage to the antenna connector and con- sists of strip lines and D31~D34. The notch frequency is controlled by the tuned voltage from IC3a and is tuned to the tst LO frequency. The low-pass filter (C78, C82, ©85, C89, C137 and strip lines) suppresses high harmonic components of the 1st LO signal 3-1-6 TUNED CONTROL CIRCUIT (RF B UNIT) ‘This circuit converts the lock voltage from the PLL A UNIT to the tuned voltages for the tuned notch circuit and BPF1~BPF4, Fig, 3 shows a relation between the lock voltage and tuned voltages. Et. po ga) i } i 23 0 i : a 8 76008 Frequency [Mz 3 ft ape 357 ‘ber, i SE wo 5 oa m0 600789 T08d 5 Frequency [Mz act zea | it 3a0 a Fd | sso0ci i 7 | r= "090 250 500 ‘750 1000 Frequency MH Fig. 3 The PLL lock voltage (CV) from the PLL A UNIT is impedance-converted at the DC-amplifier (IC3b) and is applied to the operational amplifiers (IC1, 1C2, IC3a), Attuned voltage for BPF4 is supplied from IC2b. The gain and offset voltage of IC2b are switched by Q9 and Q10 respectively to convert the variations of 2 PLL lock voltages to a continuous tuned voltage. 9 and Q10 are controlled by the band signal (BH). A tuned voltage for the tuned notch circuit is supplied from IC3a. The offset voltages of IC3a are switched by Q11 to convert the variations of 4 PLL lock voltages to 2 continuous tuned voltages. 3-1-7 VIUHF 1ST MIXER (RF B UNIT) The signals passed through the tuned notch circuit are applied to the 1st mixer (IC6) and mixed with the 1st LO signal to be converted to the 1st IF signal as shown in the table below. C6 is @ DBM (Double Balanced Mixer). \VIUHF 1ST IF, 1ST LO AND 2ND LO FREQUENCIES RECEIVE FREQUENCY 1StiF TSTLOFREQUENGY | 2NDLO FREQUENCY (MHz) (MHz) [MHz] [MHz] 30~ 90 7786~778.7 08.7~ 868.7 767.9~768.0 90~ 250 soebw teen 7786~778.7 968.7~1028.7 767.9~768.0 250~ 500 aay 7786~778.7 1028.7~12787 767.9~768.0 500~1000 ey 2786~2787 7787~1278.7 267.9~268.0The 1st LO signal (V1LO: 778.7~1278.7 MHz) from the PLL A UNIT is applied to the bandpass filter (strip line, L78, C53~C55, C59, C77, C134) to suppress out-of-band signals that cause spurious components. Filtered signals are amplified to 10 dBm at the ist LO amplifier (Q5, 06) and applied to the 1st mixer. 3-1-8 HF IF CIRCUIT (IF UNIT) ‘The HF 1st IF signal from the RF A UNIT is converted to a 10.7 MHz 2nd IF signal at the 2nd mixer (IC1). ICt is a DBM. ‘The HF 2nd LO signal (H2LO: 38.09375~38,1 MHz) from the PLL B UNIT via J2 is amplified at Q4 and applied to the 2nd mixer. The converted 2nd IF signal via D1 ‘or VIUHF 2nd IF signal from the RF B UNIT via D2 is applied to the 2nd IF circuit ‘The HF scope signal (S1IF) entered from J4 is applied to the pin diode attenuator (041, 042) which Is controlled by a scope AGC circuit. The signal is mixed with the H2LO signal to be converted to a 10.7 MHz 2nd IF signal. ‘The resulting signal enters the SCOPE UNIT via J12. 3-1-9 V/UHF IF CIRCUIT (RF B UNIT) ‘The 1st IF signal (278.7 MHz or 778.7 MHz band) from the 1st mixer (IC8) is applied to the IF amplifier (Q8) and then to the corresponding IF filter. Q8 provides 10 dB gain over a wideband frequency range. VIUHF 1ST IF FILTER CHARACTERISTICS Attenu: fo 218 MHz Frequency Fig. 4 (1) 30~500 MHz and 1000~1500 MHz The 778.7 MHz band 1st IF signal is applied to the dielectric bandpass filter (FI1) and dielectric notch fiter (Fl2). The notch filter suppresses 757.3 MHz image signals. The filtered signal is applied to the low-pass filter (strip line, C139~C141) to suppress high harmonic ‘components and then to the 2nd mixer (IC7). (2) 500~1000 MHz and 1500~1999.8 MHz 278.7 MHz band 1st IF signals are applied to the helical bandpass filter (L46) and notch filter (L67, C88). The notch filter suppresses 257.3 MHz image signals. To ensure out-of-band suppression, serial resonance cir cults (L73, C86, L74, C90) are provided at the input and output tuning circuits The filtered signal is applied to the low-pass filter (strip lines, C162~C166) to suppress high harmonic ‘components and then to the 2nd mixer (IC7). 3-1-10 V/UHF 2ND MIXER (RF B UNIT) ‘The signal from a 1st IF filter passes through the 1000 MHz cutoff low-pass filter and is converted toa 10.7 MHz 2nd IF signal at the 2nd mixer (IC7). The signal is applied to the 300 MHz cut-off low-pass filter to suppress high harmonic components, amplified at the IF ampiifier (Q18), and then applied to J3 on the IF UNIT. The nd IF signal is then applied to a 2nd IF filter, Flt, FI3 or Fl4 where commonly used with an HF band, A portion of the 2nd IF signal is buffer-amplitied at Q19, filtered by the 20 MHz cut-off low-pass filter and is then applied to JS on the IF UNIT. The signal is used in the SCOPE UNIT and applied to the [IF OUT] jack. The 2nd LO signal (V2LO: 267.90001~268.0 MHz or 767.90001~768.0 MHz) from the PLL B UNIT is applied to the 1000 MHz cutoff low-pass filter and is amp! to. 0 dBm at the 2nd LO amplifier (Q16, Q17). The LO signal passes through an attenuator and is applied to the Ast mixer (IC7). 3-1-11 2ND IF CIRCUIT (IF UNIT) The 2nd IF circuit and later circuits are commonly used with the HF and V/UHF signal line. The common line is then separated by 3 depending on the operating mode: WM, FM or another mode. In WEM mode, the 2nd IF signal is applied to the wide IF filter (FI1) and is then amplified at the 2nd IF amplifier (Qt), FI1 has @ 230 kHz passband width. The ampl signal passes through the IF filter (Fi2), is amplified at Q2 and Q3, and then enters the MAIN UNIT via J20 (BIF” line) In FM mode, the 2nd IF signal is applied to a 2nd IF filter (FI3 for FM-w or Fld for FM-m/n) and is then amplified at the 2nd IF amplifier (Q5 or Q8). The ampiified signal bypasses the 10.7 MHz filter and is converted to the 455 kHz 3rd IF signal at IC5. The 3rd IF signal passes through a 3rd IF filter (one of FI8~FI10) and buffer amplifier (213), then enters the MAIN UNIT via J15 (“AIF" line). In another mode, the signal passes through the 2nd IF filter (Fla) and the noise blanker gate (D9~D12) and is then amplified at the 2nd IF amplifier (Q8). The amplified signal bypasses (in AM mode) the 10.7 MHz filter (FI7) or passes through it (in another mode).‘The signal is buffer-ampiified at Q9 and is then mixed with the 8rd LO signal (IFS) from the MAIN UNIT to be con- verted to a 455 kHz 3rd IF signal at IC5. The 3rd IF signal is amplified at the 3rd IF amplifier (Q10) and passes through one of the six 455 kHz filters (FI8~FI13). The signal trom a 455 kHz filter is applied to the butfer amplifier (Q14) and is then mixed with the 4th LO signal (IFS) to be converted to a 10.7 MHz 4th IF signal at IC4. The converted signal either enters or bypasses the notch circult and is applied to the IF filter (FI14) to suppress out-of-band signals. The filtered signal enters the MAIN UNIT via 120 ("“BIF" tine), Dual-gate FETs are used on the 2nd and 3rd IF amplifiers (Q1, 03, Q5, 28, Q10). The 2nd gates of the IF amplifiers are controlled by AGC bias voltage from the MAIN UNIT. ‘The 10.7 MHz and 455 kHz filters are selected with control signals from the IF filter switching circuit. Refer to Section 344-21 IF FILTER SWITCHING CIRCUIT for information regarding filters and filter switch/operating mode com- binations, 3-1-12 NOISE BLANKER CIRCUIT (IF UNIT) The IC-R9000 uses a noise trigger noise blanker circuit. A portion of the 2nd IF signal from Flé is amplified at the noise amplifier (Q17~Q19), which employs dual-gate FETS for a wide AGC dynamic range. The signal is detected at the noise detector (090, D91). A detected voltage is applied to the noise AGC circult (Q26) and ted back to the noise amplifier as the AGC voltage. IF CIRCUIT The time constant of the noise AGC circuit is determined by R191 and C161. This AGC circuit does not operate {or pulse-type noise. By applying pulse-type noise to the noise gate control circuit, normal signal strength reduces the gain of the noise amplifier. The detected voltage trom the noise detector (D90, D91) is applied to the two pulse amplifiers (Q25 and Q27). Q27 amplifies narrow-width pulses with the differentiating circuit (C168, 203). Q25 amplifies high level noise by using 094. 94 adds the threshold voltage to 25. The threshold level of each pulse amplifier is controlled by the [NB-LEVEL] control, When the detected voltage exceeds the threshold level, Q24 outputs a blanking signal to activate the noise blanker gate (D9~D12) ‘The NB-wide circuits consist of a pulse width stretch (21 Q22), gate drive (223) and biank pulse delay circuits. The blanking signal from Q24 enters the pulse width stretch circuit and turns Q23 ON and OFF. The stretch length of the pulse width stretch circuit is switched by the [NAR/WIDE] switch. The blank pulse delay circuit (51, 92) deactivates Q21 when receiving a narrow-width pulse noise. 20 cancels the noise blanker operation after 2 msec. (when [NAR/WIDE] is OFF) or 15 msec. (when [NAR/WIDE] is ON). to berotuatr uf Bo > m ei a E> (ie Moin, FAD3-1-13 NOTCH FILTER CIRCUIT (IF UNIT) The converted 4th IF signal from ICé4 is applied to the notch filter circuit (X1, D85, D86, L55). To adjust the notch frequency, a bias voltage controlled by the [NOTCH] control is applied to the varactor diode (085). When the [NOTCH] switch is turned OFF, Q50 is turned ON and the 4th IF signal bypasses the notch filter through 81 and D83, ‘The signal from the notch fer is applied to the MCF (F114) to filter leaked signal components from the 4th LO signal used at IC4. The signal is then applied to the MAIN UNIT. 3-1-14 IF SHIFT OSCILLATOR (MAIN UNIT) This oscillator circuit consists of a VCO (Q403), a dual modulus prescaler (10402) and a PLL IC (IC403). A 12.5 MHz reference frequency oscillated at the PLL B UNIT is butfer-amplified at Q28 in the MAIN UNIT, and is applied to this oscillator circuit The output is applied to the 3rd and 4th mixers in the IF UNIT. The output frequency is adjusted by the [IF SHIFT] control to electronically change the center frequency of the 455 kHz IF filter ‘A 90.2 MHz band signal (90.08~90.32) is oscillated at the VCO circuit (0403) and is divided by 40 at IC401 to obtain 2.255 MHz. VCO output, butfer-amplified at 0401, passes through the low-pass filter where high harmonic components are reduced. The resulting signal is mixed with the 12.6 MHz reference signal to produce a 10.245 MHz signal. ‘The signal passes through the MCF (Fit), is amplified at (028, and is then applied to the IF UNIT as the 1FS (IF Shitt) signal 3-14-15 BFO CIRCUIT (MAIN UNIT) This circuit is similar to the IF shift oscillator, and consists of a VCO (Q503), a dual modulus prescaler (IC502) and a PLLIC (C503). The 12.5 MHz reference frequency butfer- amplified at 028 is applied to this oscillator circuit. The BBFO signal is used in a product detector. A 72 MHz band signal (71.932~72.088) is oscillated at ‘VCO circuit (Q503) and is divided by 40 at 1C501 to obtain 1.8 MHz. VCO output, buffer-amplified at Q501, passes through the low-pass filter and is mixed with the 12.5 MHz reference signal to produce a 10.7 MHz signal. ‘The signal passes through the crystal filter (FI2), is amplified at Q27, and is then applied to the product detector. The frequency is controlled by N-data from the CPU to adjust the mode shift frequencies. 3-116 DEMODULATOR CIRCUIT (MAIN UNIT) The IC-RGO00 has § demodulator circuits for correspond- ing to SSB/CW/FSK, AM, WFM, FM-n/FM-m and FM-w modes. Any demodulated signals are applied to the ‘common AF circuit via an AF input mode selector switch, 1023. In SSB/CWIFSK mode, the 4th IF signal entered via J19 is amplified at Q19 and Q20 and is then mixed with the BFO signal at the product detector (IC19) for demodulation into an AF signal. The detected signal passes through the AF input mode selector switch (IC23 pins 1 and 2). In AM mode, the 4th IF signal entered via J19 is amplified at Q19 and 20 and is impedance-converted at G21. The signal is then detected at 024, amplified at Q22, and passes through the AF input mode selector switch (IC23, pins 3 and 4). In WEM mode, the 2nd IF signal entered via J19 is amplified ‘at Q19 and Q20 and is impedance-converted at Q21. The signal is then applied to a WFM IF IC chip (IC20, pin 1). 1C20 contains the limiter amplifier and an FM detector circuit, The WFM signal is amplified at the limiter amplifier ‘section, passes through the filter section and is applied to the FM detector section to be demodulated into an AF signal. The signal is applied to the AF input mode selector switch (1023, pins 10 and 11) and the center meter circuit acid). WFM DEMODULATOR CIRCUIT from oe ire af Fig. 6 In FM mode, the 3rd IF signal entored via J18 is amplified at the limiter amplifier 1621, Q1, 1C22) and is then applied toa detector circuit, X1 or X2. In FM-n or FM-m mode, the signal from 1C22 passed through Q2 is applied to the ceramic discriminator (x1) to demodulate the 3rd IF signal into an AF signal. The detected signal is applied to an active filter (3, Q4) to suppress unwanted signals. The signal is applied to the AF input mode selector switch (IC23, pins 8 and 9).In FMaw mode, the signal from IC22 passes through Q6 and Is applied to the ceramic discriminator (X2) to dermodulate the 3rd IF signal into an AF signal. The detected signal is applied to an active filter (Q7) and then to the AF input mode selector switch (IC23, pins 8 and 9). R279 and R280 compensate for the center frequency of discriminators, X1 and X2 respectively. 3-1-17 AF AMP CIRCUIT (MAIN UNIT) ‘The AF signal from the AF input mode selector switch is applied to the AF preamplifier (IC5, pin 3) and passes through the squelch gate (212). In FM-n mode, Q8 is tuned ON, stepping up the AF preamplifier gain. When the synthesized voice is applied to the speaker, the SPCO line becomes “HIGH,” Q10 is turned ON and then Q9 is turned OFF, reducing the AF preamplifier gain to clear the synthesized voice. The signal from Q12 Is combined with output from the optional VOICE SYNTHESIZER UNIT and beep tone circult (Q11), The resulting signal is applied to the gain and tone control cifcult (1024 pin 15) and LINE-OUT amplifier (Q16). The output from 1024 is power-amplified at C25 and then applied to the speaker. ‘The output signal from the LINE-OUT amplifier is applied to the [ACC] socket and REC] and [LINE OUT] jacks provided for external equipment. 3-1-18 AGC AND S-METER CIRCUIT (MAIN UNIT) The receiver gain is determined by the voltage on the “AGC” line (Q42, emitter). When strong signals are received, the AGC circult decreases the voltage on this line. A portion of the IF signal from the impedance converter (Q21) passes through C144, is detected at 030 and 031, then applied to the base of Q29. Q29 applies a negative voltage to the “AGC2" line. The “AGC1" and “AGC2” lines form the AGC time constant line that determines the AGC release time. The “AGC2" line Is connected to an impedance converter (Q41, @42) which applies AGC bias voltage to the IF amplifiers in the RF A, RF 8, IF and MAIN UNITS, to the Ltype attenuator in the RF A UNIT, and to the tuned amplifies in the RF B UNIT, Q44 supplies an AGC reference voltage to the AGC bias voltage line. The AGC bias voltage is controlled by Q43 using the [RF GAIN] control. When the [AGC FAST] switch is turned ON, Q30 and Q37 are turned ON. R185 is then connected in parallel with the AGC time constant line to obtain a rapid AGC release time. When the [AGC OFF] switch is tumed ON, 034, 035 and Q40 are tumed ON, determining the time constant to deactivate the AGC circuit In FM mode, the "FMS" fine becomes “HIGH,” turning (ON @32 and Q38, R190 is then connected in parallel with the AGC time constant line to obtain a rapid AGC release time. AGC CIRCUIT sa a : ee arse fe 5 ae es |e jes [oe ‘10 IF amp, CONVERTER esti awe [RF GAIN controtIn AM mode, the “AMS” line becomes “HIGH,” turning ON 039/033, 036/031 and 038/32. R180 is then shortened ‘and R190 and C145 are connected in parallel with the ‘AGC time constant line to obtain an appropriate time constant for AM. In WFM mode, the broad IF bandwidth increases the detected voltage. Q55 then turns ON to reduce the out- put from Q21, matching the AGC characteristics in every mode. The AGC bias voltage is applied to the differential amplifier ((C15, pin 6) where the difference between the bias and feference voltages is detected. The resulting Smeter signal passes through the [METER] switch and is then applied to the multifunction meter, ‘The S-meter signal is applied to the impedance converter (ICS pin 5) and then to the [ACC] socket pin 8 and to IC3 on the LOGIC B UNIT. IC3 converts the S-meter signal into CLV data, 3-1-19 SQUELCH CIRCUIT (MAIN UNIT) The IC-R9000 has 2 squelch systems, S-meter squelch and noise squelch. ‘The S-meter squelch functions in any mode. The S-meter signal from IC15 pin 7 is applied to the comparator (IC15 pin 2) for comparison to a reference voltage controlled by the [SQL] control. This reference voltage is added to the S-meter voltage to indicate the squelch threshold level on the S-meter. ‘The noise squelch functions only in FM and WFM modes. ‘The detected signal from the discriminator (X1, X2) or IC20 is applied to the noise amplifier (IC11) via the AF input mode selector switch (IC18). The amplified signal is then detected at 028 and D29. 23 and 24 control the gain of the noise amplifier to correspond to the input level in each FM mode, The detected voltage Is applied to the DC amplifier (IC10, pin 2) and then to the comparator (IC10, pin 6) for ‘comparison to the reference voltage controlted by the [SQL] control The Smeter and noise squelch reference voltages are relatively supplied trom IC4 pin 7 and 1 respectively. When the S-meter or noise squelch signal is lower than the threshold level, the comparator turns “HIGH” to activate the squelch gate (Q12). This signal is applied to Q52, turning OFF the [RECEIVE] indicator, and is also applied to the [ACC] socket pin 6. ‘While scanning, Q56 and Q57 are turned ON, reset voltage is applied to the AGC line and DC amplifier (IC10, pin 2), and then the receive signal is picked up faster for high- speed scanning, 3-1-20 CENTER METER CIRCUIT (MAIN UNIT) ‘The signal from FM or the WEM detector is applied to the Inversion adder (IC14, pin 6) for conversion into a center meter signal. The resulting signal is inversion-amplified at 1C14, pin 2, and then applied to the multi-function meter, The center meter signal is also applied to the window comparator (IC12, 1C13) and used for the center stop and ‘AFC (Auto Frequency Control) detections. 3-1-21 IF FILTER SWITCHING CIRCUIT (IF UNIT) The IC-R9000 has one 10.7 MHZ IF filter (plus one bypass circuit) and six 455 kHz IF filters. It also has exclusive 10.7 MHz IF filters for WEM and FMGw. IF filter com- binations are selected with sub-CPU output (“FIL1 ‘~"FILT") depending on the operating mode. IC3 is a voltage buffer that turns ON the filter switching diodes. IF FILTER PASSBAND WIDTH IN EACH MODE curee [TO TNRE wooe | Wort ruven | S54 sumenes |] 2 woe [100i tone ew [bbc Rouse — ate 1s ie NARROW om weu | ay | an0.e | ane | — Woe Tee 1a [bore —] 15 te [rhRouGH| — one NARROW 26 ie we [woe ae ie Gu; Pwo —] tsine | euste [zane Fsk NARROW 500 Hz Tabi 6 3-1-22 MODE VOLTAGE SWITCHING CIRCUIT (IF UNIT) 042~Q45 supply 9 V regulated voltage and switch the voltage for WFM (WMS) or other modes (NAR). FM voltage (FMQ) is supplied from Q46 and Q47. FM mode voltages (FMw9, FMm9, FMn9) from the FM9 line are switched by Q31~036. ‘SSB, CW and FSK mode voltage (SSB9) are supplied from Q52 and Q53. AM mode voltage (AM9) is supplied from (254 and 055.3-1-23 MUTE CIRCUIT (IF UNIT) The mute circuit prevents clicking when PLL data or the operating mode is changed. When PLL data are changed, the “UNL” signal (or “LMUT” when the operating mode is changed) is applied to the mute detector circuit (248, Q49), The mute detector circuit outputs the mute signal to the IF amplifier Q10 to cut off the receiver IF signal. The ‘mute signal is also applied to the squelch gate (MAIN UNIT, Q12) to cut off the AF circuit. 3-1-24 VSC CIRCUIT (MAIN UNIT) This circuit detects the audio signal during scanning and skips inconvenient signals such as signals with no ‘modulation, beat signals and noise component signals. ‘A portion of the AF signal from the squelch gate (Q12) is, limite-ampliied at IC7 and triggers the one-shot muttivibrator (IC8). C6 functions as an F-V converter and outputs a voltage corresponding to pulse numbers. The output from C6 is applied to the 3.5 Hz cut-off low-pass. filter (IC8, pin 2) to detect audio signals. The resulting signal is applied to the comparator (IC9), turning Q51 ON. Q51 outputs "HIGH" signals to the CPU when an audio signal is detected. Q50 and Q53 reset the VSC circuit. CLV CONTROL CIRCUIT Ic1, 162 sv TAF GAIN} ‘contro! AFR Se TRF GAIN) contro! RFR Sa TSQUELCH] ‘contro! SQL $a from 102 (Losic a) sv from 1C1 (Loaic A) sv from 102 (LOGIC A) REMC 3-1-25 CI-V CONTROL CIRCUIT (MAIN UNIT) The IC-R9000 can remotely control functions such as the [AF GAIN], [SQUELCH] and [RF GAIN] controls in addition to the conventional CI-V control system. Control voltages from the front panel controls are applied to the analog switch (IC1). 5-bit parallel signals, output from the 1/0 expanders (IC1, IC2) on the LOGIC A UNIT, are converted into analog voltages at R29~R31 on the LOGIC A UNIT and are then applied to the analog switch (1C2) The control voltages are selected by the “REMC” signal from the output expander (FRONT UNIT, IC102). The selected voltages are DC-amplitied at IC3 and ICé to obtain appropriate voltage characteristics. The voltages are then applied to the appropriate control circuit. vou. to 1024 pin 8 BFL to 243 (AGC olreult) 10 IC10 (noise squelch circuit) S8QL__ to IC15 (S-meter squelch ciroult) 3—103-2 PLL CIRCUITS 3-2-1 GENERAL DESCRIPTION The PLL circuits are composed of the PLL A and B UNITS. The PLL B UNIT generates an HF 2nd LO signal (88.09376~38.1 MHz) used in the IF UNIT, a V/UHF 2nd The PLL A UNIT generates an HF 1st LO signal (H1LO: LO signal (V2LO: 267.90001~268.0 MHz or 767.90001~ 48,89375~78.8 MHz) used in the RF A UNIT and a V/UHF 768.0 MHz) used in the RF B UNIT, and a 1GLO signal ‘st LO signal (V1LO: 778.6~1278.7 MHz) used in the RFB_ (900 MHz or 1000 MHz) used in the HPF UNIT. UNIT. The marker signal is also generated in this unit. PLL CIRCUITS: FREQUENCY CONSTRUCTION Mito ve ™* 48.80375~78.8 MHz TOOE FRGER 2.5 MHz See. VILo Af *2 — 7787~1278.7 MHe nei=eowne en pea fo eee oo rie 2s Miz HaLo x2 38.09376~38.1 MHz ice 4, 045 eq he BUFF na ‘ae fy 60 = 63.09376~63.1 MHz voor |_[~voo fo |_| FILTER Qt, a2 oni ict — Burr BUFF BUFF ‘ate TLaxee a5 TE T0000 sha,76~7OO KH x aa 52.5 MH: t ° * 204.8 MHz a mie toe cat FE 1s Sauer vcr voox2 vato 1615, 035, 367 S0001~268.0 MHz 2s ube or 7er.90001~768.0 MHz yoo 110 116 200 Miz oF | 000 MHz PRE SCALER 1c12,3-2-2 REFERENCE OSCILLATOR CIRCUIT (PLL B UNIT) The reference oscillator signal is used for all PLL circuits in the PLLA, PLL B and MAIN UNITS, Thus, the reference oscillator stability determines the receiver's frequency stability. Therefore, a constant temperature oven crystal unit with calibration control (CR-228) is used to maintain frequency stability within 0.25 ppm (—30 *F~+60 * =22"F~ +140 F). 3-2-3 1ST LO PLL CIRCUIT (PLL A UNIT) HF 1st LO and V/UHF 1st LO are generated at one PLL circuit and are obtained to be divided or multiplied respectively. The PLL circuit uses a pulse swallow counter system that generates 389.30~639.35 MHz signals in 50kHz steps. Thus the minimum stops of the 1st LO are 6.25 kHz for HF and 100 kHz for V/UHF. Below the minimum steps are obtained in the 2nd LO (PLL B circuit). The oscillated signal at one of the 2 VCOs (1, Q4; see Section 3-2-4 for details) is buffer-amplified at Q3 or QS. ‘The VCO output is amplified at the broadband amplifier (C6) and is then applied to the prescaler (IC5), The signal, divided by 64 or 65, is applied to the PLL IC (IC4). IC4 contains a phase detector, a programmable divider and a modulus controller for the dividing ratio in the IC chip. The phase of the divided signal at IC5, detected at IC4 using a reference frequency (fper) of 50 kHz, is then output from pins 15 and 16. The 50 kHz frequency is ‘obtained from the reference oscillator (X1). 12.6 MHz oscillated at X1, is divided by 5 at IC7 and divided by 50 at the programmable divider section of IC4. The phase detected signal is then converted to the lock voltage at the loop filter (IC3a; see Section 3-2-5 for details), ‘and applied to a VCO. Thus, the VCO output (PLL output) is locked to produce stable oscillation. ‘The PLL oscillation frequency is obtained with the following calculation W=NPX tree fy: 1st LO PLL loop output Nr: Dividing ratio from the LOGIC A UNIT ‘gee? Reference frequency (50 kHz) 3-2-4 VCO CIRCUIT ‘The receiver's CIN ratio is determined by the VCO and the loop filter. 2 VCO circuits keep the low noise and reduce spurious emissions. Q17~Q20 are VCO switches which select the operating VCO with "VCO1" and “VCO2" lines. The VCO1 oscillates 389.3~514.3 MHz and the VCO2 oscillates §14.35~699.35 MHz, Each VCO circuit employs a Colpitts oscillator that uses strip lines in the tank circuits to obtain superior CIN ratios. 3-25 LOOP FILTER The loop filter (IC3a) converts a pulse-type signal to a DC signal with no ripple. It ripple is present, VCO noise or spurious signals increase. However, when ripple is reduced, PLL lock-up time increases. To reduce ripple and create rapid lockup times, the active filter is used as a loop filter, A 16 V power source provides wide range lock voltages. When the frequency is greatly changed, D11 and D13 speed up lockup times. 3-2-6 HF LO DIVIDER CIRCUIT The 1st LO PLL output is divided by 8 at IC2, passes through the low-pass filter and is amplified at the LO ampiifier (Q6). The resulting signal is applied to the low-pass filter to suppress high harmonic components, and then to the RF A UNIT. ‘The 48,89375~78.8 MHz signal is controlled in 6.25 kHz steps; steps less than 6.25 kHz are controlled by the 2nd LO signal, 3-2-7 V/UHF LO DOUBLER CIRCUIT The 1st LO PLL output is amplified at IC10, passes through the low-pass filter and is amplified at the LO amplifier (Q2). The signal is doubled at D1, D2 and LS, and the resulting signal is applied to the bandpass filter and then to the RF B UNIT. The 778,7~1278.7 MHz signal is controlled in 100 kHz steps; steps less than 100 kHz are controlled by the 2nd LO signal 3-2-8 MARKER CIRCUIT (PLL A UNIT) ‘2.5 MHz signal, output from IC7 pin 11, is divided by 5 at IC8 to obtain a 500 kHz signal. The 500 kHz signal is amplified at Q10 and applied to the RF A UNIT via J6 (RF AUNIT: J2) 3-2-9 HF 2ND LO CIRCUIT (PLL B UNIT) The HF 2nd LO is obtained from the HF PLL (VCO: Q1) ‘output plus a multiplied X1 oscillation signal. DDS (Direct Digital Synthesizer) is used as a reference oscillator in the HF PLL circuit. This circuit outputs an HF 2nd LO signal used in the IF UNIT, The 63.09376~63.1 MHz output from the HF PLL (see Section 3-2-10 for details) passes through the grounded- gate buffer amplifier (Q9) and is then applied to the mixer (IC2) to be mixed with a 25 MHz signal. The generated signal at X1 (12.5 MH2) is multiplied by 2 at Q14 and the resulting 25 MHz signal is applied to IC2. The 1C2 output (38.09376~38.1 MHz) passes through the bandpass filter, butter amplifier (Q12) and LO amplifier (Q13), and is then applied to the IF UNIT.3-2:10 HF PLL CIRCUIT (PLL B UNIT) This PLL generates 63.09376~63.2 MHz signals in 10 Hz steps using the DDS circuit. ‘The oscillated signal at the VCO (01) is butfer-amplified at 5, passes through the low-pass fiter and is then applied to the mixer (IG1). The mixer converts VCO output to a frequency of §93.76~700 kHz using a 62.5 MHz signal. The generated signal at X1 (12.5 MHz) is multiplied by 5 at (Q6 and the resulting 62.5 MHz signal is applied to1C1.. The ICt output is applied to the buffer amplifier (Q3, Q4) and then to the DDS UNIT to phase detection ‘The output pulse-type signal from the DDS UNIT passes through the lag-lead loop filter (R4, C8) where it is converted {nto a DC signal (lock voltage). The lock voltage is applied to the VCO to lock the oscillating frequency. When the DDS is unlocked, FET switches (Q44, Q45) are tuned ON, changing the loop filter time constant. 3-241 V/UHF 2ND LO PLL CIRCUIT (PLL B UNIT) This PLL loop, using a premix system with dual modulus prescaler as a main loop and the HF PLL as a sub loop. Therefore the PLL directly generates 267.90001~268.0 Mitz of 767.90001~768.0 MHz signals in 10 He steps. The oscillated signal at one of the 2 VCOs (IC15, 033) is amplified at Q16 and Q17, and is mixed with the HF PLL output at IC7 to obtain a 204.8 MHz or 704.8 MHz IF signal. The IF signal, passed through D10 or D12, is applied to an appropriate bandpass filter and amplifier (IC3 or IC4). The signal is divided by 64 or 65 at the prescaler (IC5) and is detected in the out-of-step phase by the PLL IC (108) using a reference frequency of 100 kHz. The 100 kHz reference frequency is obtained from the reference oscillator (X1). The 12.5 MHz signal is divided by 5 at IC10 and divided by 26 at the programmable divider section of C8. The phase detected signal is converted to the lock voltage at the loop filter (IC14) and applied to a VCO to lock the oscillating frequency. The oscillating frequency is not controlled by the N-data, but by the DDS output. Hence, the 2 Ndata are fixed corresponding to the 268 MHz and 768 MHz bands. The VCO (Q33) employs a Colpitts oscillator that uses strip lines in the tank circuits and a 268 MHz band signal is output via the butfer amplifier (Q34), 1015 is a 768 MHz band VCO that uses a dielectric tank circuit. Each VCO output is applied to the RF B UNIT via the bandpass filter L73 (268 MHz band) or L69 (768 MHz band), 3-242 1 GHz CONVERTER LO CIRCUIT (PLL B UNIT) ‘This circuit generates a 1GLO signal (900 MHz or 1000 MHz) used in the HPF UNIT. ‘The PLL loop has similar circuitry to the 1st LO PLL loop and consists of the PLL IC (IC11), loop filter (IC13), prescaler (IC12) and VCO (IC16). The oscillating frequency is 900 MHz or 1000 MHz as shown in the table at p. 3-1 ‘The 500 kHz reference frequency is obtained from the reference oscillator (X1). The 12.5 MHz signal is divided by 5 at IC10 and divided by § at the programmable divider section of IC12, 3-3 LOGIC CIRCUITS ‘The LOGIC UNIT mainly consists of 2 CPUS, 2 output expanders, 5 input expanders and 3 1/0 expanders. 2 CPUs, an &bit main CPU and a 4-bit sub CPU, control most functions including the CRT display. The input ‘and output ports are described in the block diagram on the next page. 3-3-1 MODE INPUT DATA Input expander IC104 pins 15~17 receive following data: PIN NO. (PORT NO.) MODE 15 (P60) 16 (P61) 17 (062), S88 Low HIGH HIGH AM Low Low HIGH ow HIGH HIGH Low FSK tow HIGH tow FM HIGH Low Low WeM Low Low. tow Table 7 9-3-2 SCAN SPEED AND DELAY IC10 pins 6 and 8 on the LOGIC A UNIT are scan speed land delay input ports which receive scan clock signals. A scan speed clock signal is generated at IC2 (pins 1~3 and 11~18) and a scan delay clock signal is generated at [C2 (pins 4~6, 8~10) on the LOGIC 8 UNIT. Clock speed is determined by the [SCAN SPEED] control via the “SPD1 and SPD2" lines and the [DELAY TIME] control Via the “DLY1 and DLY2" lines. 3-13LOGIC CIRCUITS: BLOCK DIAGRAM Pro TENKEY oe oO~a O49 410 _ INPUT foe soi) EXPANDER C2 oF END oe [Mch) oO OF SHIFT BINARY sw FILTER (WIDE) FILTER (MIDDLE) FILTER (NARROW) en 2) WRITE) 10 EXPANDER 3) ° AFC! Fa 10 pur AFC? jase 11 EXPANDER (Fe) 12 4/5 Byte Ts (FAST) 3 Baud Ts (SLOW) “4 rate ‘ct MODE (See Section 331) (SPEECH) clock), (CLEAR) cwAITE) van gi, LF (PROG) oof 8 (SEL oH 9 scan] weno) $—OT0 | 10 eur (Move) ¢—o | exPanver caro $—o-O—| 12 a0 $9200 vse) $—oro | 4 worn goto tis SHE, om oie PRON " x Sonat (cB) Oo 17 tw oof 18 ois «nec sPeecin in oda crmers a Prien 2 BAN prea So Toco s core 7 oc : ano fio neur — ven un FSS fis EXPANDER a oO} ‘cRTCUI 0 O- oO} creworo $2 e-| we CATT 1048), oF sele larrsoent—oe| one foo] pec parent 3 * os e (RED BANK (UP) « bane Sou To~13 38 29—ad MUTE LOGICA UNIT See Section 332 (SCAN SPEED) (DELAY TIME) Main dial click selector signal Fig.SONVERTER Ice SCOPE DATA OPE UNIT Dvo~Ov7 cRTe ct ( => sTC UNIT _ RF bandpass filter selector signal » Recorder remote signal , RF GAIN contro! (REMOTE) Fig. 10 Strobe for IF SHIFT Strobe for 1 GHz converter s1f—e rit 50[ —= Fit 48 FILS | iter selector signal rs Elta f to lF UNIT Ic9 s FILS 3 ed susceu 83] alr «0 LsB 2 USB | Mode selector o 8 AM |. signal to IF UNIT tociceunit #4 SK 4% FM 2 WMS spectrum scope width selector S ‘£83 } signal to SCOPE UNIT Io12 = SH” Scope horizontal contr! to 19-26 SCOPE UNIT ICI 4 Strobe for BFO PLL 3,4, 9, 18,45 08/0 x Nedata a DATA, CK] ; BUSS TINE DB0~ O57] A0~ATS W/O EXPANDER © 9 Strobe for 1st LO ‘Strobe for 2nd LO 2 ler a9. Reset for LOGIC B UNIT IC¢ Nedata LOGIGAUNIT ‘Strobe for voice synthesizer 13 Strobe for DDS. cso oan 14~16, 18, 19| [AF GAIN control (REMOTE) MAIN CPU 7 20 Strobe icLock| a ck too 2 DATA 106 Logic oa LOGICA UNIT 26 SCAN ("H" during sean) 38 BEEP eae 39~43 SQUELCH control (REMOTE) ascio TERM ascl1 EE ov an yah ov check 13,96 15] Sensor pulse selector signal A AGCR (AGC reset) I/O EXPANDER 22| LMUT (Mode mute) RAM ROM 38 CONV (1 GHz converter switch) sare ae 9] FILS (1000~1150 MHz shift) Locic.a Logica c iz shift) Locicaunit 40} BV (HEIVU selector signal) Los. ou (PLL'B VCO selector signal) 42/-——* VCO2 ) bi. a yoo selector 3 43} + voo 1 J signal Nedata for * BFO PLL 2 + PLLA tstLo Nedata for * PLUB 2nd LO AID Dos CONVERTER 1GLO 19,20 RE ca *1F SHIFT PLL Logic 8 * Voice synthesizer 3-143-3-3 CRTC UNIT ‘The CRTC (CRT Controller) UNIT converts the logic circuit data (DBO~DB7, AO~A3) into the composite picture signal. IC1 generates R, G, B, Lid signals with data from the logic circuits. These signals are converted to the composite picture signal at IC2 and buffer-amplified at Qt. The amplified signal passes through the low-pass filter and is, then applied to the DISPLAY UNIT via the video selector ((C101) on the CONNECT-A UNIT. The composite picture signal, amplified at Q106 on the CONNECT-A UNIT, is applied to the [DATA IN] socket as video output for a TV set. 3-3-4 RESET CIRCUIT (LOGIC A UNIT) ‘The reset circuit uses a voltage detection IC (IC7) that resets the CPU until the 5 V line becomes approx.4V. The time constant (R39, C13) provides sufficient reset time, 3-3-5 REAL TIME CLOCK (LOGIC A UNIT) IC-R9000 has a clock IC (IC9) with timer function. A 32.768 kHz is oscillated at X2 for clock reference. When the power switch is turned OFF, a voltage is applied to ICO ‘trom the lithium backup battery to provide backup for the ‘clock operation. CRTC UNIT care unit Xx 14.91818 MHz oO trom Locic A UNIT 3-4 SCOPE UNIT 3-4-1 SCOPE RECEIVER CIRCUIT ‘The spectrum scope screen has a dynamic range of 60 dB and a sensitivity of 1.0 pV. The spectrum scope not only has a high dynamic range and excellent sensitivity, but also is a precise instrument for signal analysis. Using a 10.7 MHz 2nd IF signal from the IF UNIT, the SCOPE UNIT creates an 8-it scope signal The IF signal passes through the pin diode attenuator (IF UNIT, D41~D44) which is controlled by a scope AGC circuit and enters the SCOPE UNIT, The signal is applied to the ceramic filter (FI), amplified at G1 and converted to a 4.5105 MHz band signal at IC1 with a 15.2 MHz sweep signal The sweep signal is generated at Q12. The generated frequency is controlled by IC12, D13 and D14 with the “SH signal (a digital sawtooth waveform). The sweep width of £25 kHz, +50 kHz and +100 kH7 is selected at IC12 using the "CO1" and "C02" lines. The sweep signal is amplified at Q13 and applied to the mixer (IC11). 16.49 MHz signal generated at Q9 is mixed with the sweep signal at IC11 ‘The mixed signal Is amplified at Q7 and applied to IC1 as the sweep signal The converted signal from IC1, filtered at the ceramic filter (Fi2), is amplified at Q2. The signal is mixed with the ‘4.1225 MHz LO signal at IC2 to be converted into @ 388 KHz sweeped signal. The LO signal is obtained trom Q9 ‘output. 16.49 MHz, amplified at Q10, is divided by 4 at IC8, amplified at Q11 and is then applied to 1C2, CRT DISPLAY to [DATA IN] socket ‘2106 (CONNECT A) Fig. 11 3-15‘The 388 kHz sweeped signal is filtered at a low-pass filter and the bandpass filter using ceramic resonators (Xt, X2). These filters have characteristics of 600 Hz~1 kHz! 3 dB. The filtered signal is amplified at Q3 and Q4, and applied to the logarithmic detector (IC4). IC4 detects the ‘sweeped signal and converts it into DC voltage. A DC voltage Is differentially amplified at IC5 to obtain an output of ~3 VDC. This output is converted to an 8-bit digital signal at IC6. The 8-it digital signal is applied to the sub CPU (IC1) on the LOGIC B UNIT to display the detected signal on the spectrum scope screen. 3-4-2 AGC CIRCUIT A portion of the 388 kHz sweeped signal is amplified at QS and detected at D3 and D4. The detected signal Is inversion-amplified at IC3b and is then applied to the source of Q1, Q2 and Q4 as the bias voltage. The amplified signal at IC3b is also applied to the pin diode attenuator on the IF UNIT after inversion-amplification at Ic3a 3-4-3 AFC CIRCUIT ‘This circuit controls the center frequency of the sweep signal VCO (Q12) to compensate for temperature dit. The output from Q12 is applied to the mixer (IC10) and mixed with an 824.5 kHz signal to be converted into a 485 kHz signal. To obtain the 824.5 kHz signal, the 16.49 MHz output {rom Q9 Is divided by 2 at [C8 and then divided by 10 at IC9, The 455 kHz signal is applied to the bandpass filter (Fi3), limiter-amplified at IC17, and is then detected at the ceramic discriminator (x4). The FM detected signal is applied to the analog switch (IC14). ‘SCOPE UNIT: BLOCK DIAGRAM 1C14 outputs the center error signal using a “CENT” signal which becomes “HIGH” at the center of the “SH” signal. ‘The error signal is converted into a DC voltage at IC15b, is, applied to the varactor diode (D13, 014) and controls the oscillating frequency. 3.5 TV UNIT (France version does not include this unit.) The 2nd IF signal from the IF UNIT passes through the bandpass filter (L2~L4, C2~C8) to suppress out-ofband signals, (The passband width is 10~17 MHz) The signal is amplitied at Q1~03 and then applied to the notch circuit, (L7, G12, R34) where the 10.7 MHz audio IF signal is suppressed by approx. 25 4B. IC1 contains the video IF ampiier, detector and AGC circuits. The signal, input to IC1 pin 6 and 7, is amplified inside IC and is applied to the AM detector section (L12, 633 and detector section of IC1) to demodulate the IF signal into a video signal. The video signal output from pin 16 of [C1 is applied to FI2 to ‘suppress a 4.5 MHz beat signal (5.5 MHz for some versions) and is then applied to the DISPLAY UNIT via the butfer amplifier (Q4) and [VIDEO] jacks. ‘An AGC level is adjusted with R15 connected to IC1 pin 9. The AGC voltage from IC1 pin 10 is applied to the 2nd gate of 2, a tt fib Bron a Lon Sion a 8 {8 0r-> freee as WU asaas we PV Le ve [ezi0s wie hes ae ae Eh ae 4 7 La He p= tn = nile = LE (Saco =SErY PEE oe Tat wn ff a WET sexe Poe a to SUB CPU from SUB GPU Fig. 123-6 REG UNIT ‘The power supply circuit mainly consists of a transformer, a 13.8 V DC regulator, a 12 V DC regulator and a 24, —7, =12 V converter. ‘An AC voltage from the AC power socket passes through the [POWER] switch and either 100 or 200 V AC input is selected by plugs, P6 and P7. The selected AC input is applied to a transformer (T1) and the resulting 16.5 V AC is rectified and filtered by D1, C5 and Cé._ In the Germany version, the AC voltage from the [POWER] switch is directly applied to the transformer (T') The filtered voltage is regulated to 13.8 V DC by Q1~03. Q3 controls the output voltage using the feedback voltage distributed at RS~R7. 188 V DC passes through the DC-DC power socket, [POWER] ewitch (except Germany version) and timer relay (RL), and are applied to respective circuits, When the timer function turns OFF the power, the “BU” signal line becomes “HIGH," turning RL1 ON. The 13.8 V DC voltage is only applied to the “KV” line. The HV voltage activates Q4. DC-DC CONVERTER CIRCUIT 3-6-1 REGULATOR CIRCUITS Either 24, 12, 7 or —12 V DC are supplied from their corresponding regulator circuits. 12 V DC are regulated from 13.8V DC. 24, -7 and - 12 V DCare regulated from rectifying the DC-DC converter output. The DC-DC converter generates an AC voltage (approx. 20 kHz) with a multivibrator (Q8, Q12, R17, R18, C20, C21). The AC voltage is applied to the transformer (T2) and is then rectified and regulated at the following circuits. (1) 12 V REGULATOR 12 V DC are regulated by the three-terminal voltage regulator (IC1) for the DISPLAY UNIT. The DISPLAY UNIT requires very stable 12 V DC. 13 protects IC1, and L2 and L3 suppress noise components from the CRT display. (2) 24 V REGULATOR The AC voltage from T2 Is rectified at D11 and applied to a 24 V regulator circuit (210, D9). (8) -7 V REGULATOR ‘The AC voltage from 72 is rectified at D7 and applied to.a ~7 V regulator circuit (Q9, D8). (4) -12 V REGULATOR The AC voltage from 72 is rectified at D12 and applied toa —12V three-terminal voltage regulator (IC2). a vay i ev ReG ay "7 a1 gy" Fig. 13 3-17SECTION 4 MECHANICAL PARTS AND DISASSEMBLY 4-1 FRAME DISASSEMBLY (1) a “2 eo RS S a HPF UNIT (@ 17990) Ny ® REGUNIT 5 A (@ 18880) RE B UNIT (B 21030) f swou : ¥_Ar@ 19000) ® voice P3000) O SORTHESIZER F unr ure) OPTION a) PLLA UNIT . (B 18850) manny (e 1a810); Loaic A uNrr Pee 4 TAB 1883 Z4-2 FRAME DISASSEMBLY (2) Gd DESCRIPTION cay, || jAmel| ORDER DESCRIPTION ary. @©_[asioo0iss0 [PH 81 maxs % || @ |[esr000a150 | set screw) Max5 4 ® [510003600 | AF case ©) cover (A) 5 || @ | esro00se20 [418 LOGIC top casing 1 @ [510003630 | AF shied plate access cover + | @ [est000s630 [416 Locic bottom easing 1 @_[esr0008660 [418 PLL bottom casing ce @ @© | esro00s07 [are PLL case 1 || @ [ssro00ss60 | Set screw (6) M3x6 18 © _|e510008670 | 418 PLL top casing + | @ [ssro00si60 | set screw (a) msx6 70 @_[eor0008s50 [PLL anate 1 || @ |estoooss10 [418 LOGIC case 1 @©_|eor0008560 [PLL ancie ©) + | @ [asr0008750 [100m screw c9 4 @© [eoro00sa10 [416 tet chassis + | @ [esr0006080 [PLL upper cover (A) 1 @ |[es10003590 | AF case (0) 3 || @ [esa00r25s0 | 548 Sponge 1 @ [ssi000se70 | PHMax6 SUS zx 3 || @ [030006070 | Hatt ead spacer 8 a @ |[eor0008401 | 418 Center chassis1 1 || @ [esr000sss0 [PLL under cover 1 ®@ [010008420 [418 cAT angle 1 || @ [erro001%60 | Picover 1 @ | es1000%960 [CAT access cover 1 | @ [esrooos70 [PH maxe sus ZK 1 @_ | sst0008710 | COM screw BS 6 | @ | eor000ss60 | riaht chassis 1 @® [2610003760 —_[10om serew cio 4 || @ [erro0cse6 [cover ia) 1 @ | ses0000100 [Nut ws 1 | @ [essooo0r40 | Fat washer Ma NiBS 4 @_|[ser0003160 | Set screw (A) Max6 1 || @ [esroocse60 [Set screw ia) Mae a @ [6810003770 [ICOM screw O12 || @ [esi0003920 [tom screw 08 8S 4 @ | ser0005620 [PH Maxas © || @ |[esso006080 | Hai thread spacer ¢ 4 @_[ 2880000830 [Spring washer Ma ni © || @ |[essoor2c21 | Fiter shieta pate 1 @ | es20006000 | Hall thread spacer 0 4 | @ [eoro00e«0 [18 AF chassis 1 @ | ese0008080 | Hal tread spacer ¢ «| @ [ess0006070 | Wait read spacer 8 5 @ | esc00r1660 | Access cover latch 2 | @ |[eer000s760 | icoM screw c10 5 ® [err0001990 | Access cover 1 | @ [estoooeea0 [FF shietd pte 1 @ | ssr000s120 [OH M4xs zk BS 4 | @ [eroo0600 [eH wexs zk BS 4 @® [2110003540 | Top cover (speaker included) + || @ [eero003260 | Set screw (ay maxe 3 @ | est000%6s0 [BIH waxs 2K BS 18 || [aer000s100 | Set screw (a) MSx12 1 @ | sss0000110 | Nut ma © | @ [eor00ese0 [418 back pane! 1 @_[ 8650000450 | Spring washer Ma Ni «|| @ [eero00s730 [100m screw 88 4 ‘@_[seso000140 | Flat washer Ma Ni BS + | @ [eero00is00 [418 Heatsin« 1 Screw type Screw: Max5, M3x12, M25%6, ete ICOM standard serew Set screw (A) Pan head screw with spring washer Sot screw (C): Pan head screw wih spring washer and flat washer Screw head style PH: Panhead OH: Oval countersunk head BH. Binding head FH: Flat head 1COM scrow (A: Button head screw (siver color) 1COM screw (8): Buon head screw (lack color ICOM serew (©): Button head screw with half thread (sive color) * CONTACT SPRING 18930001180 8930001160 8930001170 4-2« FRAME DISASSEMBLY (2)4-3 FRONT PANEL DISASSEMBLY (1) AHABEL, ORDER DESCRIPTION ow. ® 8610002800 Knob N13 [AF, SQL, TONE, etc.) 8 @® ‘8610003630 Knob N102 (A) [BRIGHT] 2 ® ‘9610004190 | Knob N124 [MAIN] 1 ® 8610005300 Knob N122 (A) [NOTCH, If SHIFT] 2 ® 3610008180 xno WT28 MEMORY) 1 © 262000820, FR MDB*6 4 © 3680011670 CAT rbber sea 1 © 365000880 vant 7 © 265000090 Vat) 7 @ 365000050 va) i ® zar001240 PH BI Maxs 2 @ 8610005290 Button K125 [MHz UP/DOWN) 1 ® 351008600, BH wax5 74 65 § @ 8810001230 PH BI M2x4 2 ® 351002840 Baton K79 POWER 1 @ 8810003150 ‘Set screw (A) M35. 2 ® eorooeaai 70 6b chaoae 1 @ 8810001040 PH BO M2.6x6 2 @ 35000860 tarton 102 AINE, NARL VOC, a oO 8930006940 Push SW button (CAL, REC, DIMMER] 3 @ 360011520 Threedscer 00 ni ® 36500720, Thread specor 7 @ 8810000220 PH M3x5. 15 Ey 8810002170 FH M3x6 4 @ es100340 tuton K05 WAIT. LEAR] 2 ® 61005280 turton K27 MEMORY BAN 2 ® 361002540 Burton KOS LOK 7 @ 351000980 Ge screw ANEHS “ @ 8610003840 Button K97 [AGC] 3 @ 0014840 ED pee 7 @ 8610003840 Button K97 [METER] 1 ® 261008270, itor X28 TER] 7 @ 8210004580 418 Front panel 1 @ 0014890 CAT panel 7 ® 8930011780, CRT filter 1 @ 269000500 HB ut 1 ® 251000080 PH BONEXA ¢ Screw type Screw head style FFH: Flat flister head ‘Screw: M4x5, M3%2, M2.%6, ete PH: Pan head BIH: Binding head FH: Flat head* FRONT PANEL DISASSEMBLY (1)SWA fi vRB Se (B 1985C) swe (B 19898) IERSWITCH vay (B 1984A) @ ‘ VRC qq «(8 1986¢) TEN-KEY (8 18496) ‘SENSOR UNIT (B 22108) / ary NS4-4 FRONT PANEL DISASSEMBLY (2) * KEY BOARD UNIT abe onpen DEscaIpTION on. o 3610005050, uton R32 OHM 7 @ 8610005060 Button K92 (Z) [W FM) 1 @ 3610005070, Buon Ke (RATAN) 1 ® 8610005080 Button K92 (AB) [SSB] 1 ® 8610005090 Button K92 (AC) [CW] 1 @© 8610005100 Button K92 (AD) [FSK] 1 © 2610005110 Biton KO (ABT 7 @® 8610005140 Button K92 (AH) [4]. 1 ® (8610005170 Button k92 (AK) (7] 1 @ 2610008270 Buston X92 (AO)L=1 7 ® 3610005260 Baton R704 (0) (MC) 7 @ 3610008260 Baton Ki04 [SLOW] 1 @ 2610008120 Baton KE AFC] 7 o (8610005150 Button K92 (Al) [5] 1 ® 610005180 Buon R92 (AL 7 @ 3610005200 Buton K2 (A (0) 1 o@ 8610005130 Button K92 (AG) [3] 1 @ "8610005160 Button K92 (AL) (6) 1 ® 3610005160 Buiton K (A 9) 7 @ 36100085220 Biuton Ki (APC) 1 ® 3510005200 Button 104 TENT 7 @ 3510005250, Baton 708 [FAST] 7 @ 210002860 10 Key pal 7 @ 510000860 PH Bo Moxa 3 ® 3810001280, Pa Bt Moxa 6 ‘Screw head style PH: Pan head* MODE SW UNIT wea omer DESCRIPTION ® 2510003860 Button X90 (F] ® 6610008870 Bution Kee IF 2) ® 2670000880 Bution Ko9 GIFS @ 19510003800 Bution Koo TFA) ® "9610003000 Bution Ko OFS] © 19510003010 Button Koo IFS] @ ‘510004940 Button K100 (6)[PRIO} @ ‘10004960 Button K100 [PROG] ® ‘9510004960 Button K100 (1) fat @ ‘9610004070 Button K100 (9 MODE] ® ‘9510004080 Button K100 (K) [MEMO] ®@ 18510004090 Button K100 (9 (SEL) ® "9510005000 Button K700 (W) [AUTO] ® ‘8610004000 Button K101 (A [ATT 10.08) ® ‘510004010 Button K101 (6) [ATT 20 08] ® 18510005010 Button K701 ()IREMOTE] ® ‘9610008020 Button Ki01 (9 [DISPLAY] ® 570008090 Baton K701 (0) [ANTENNA] ® 19610005040 Button K701 () (AFC) ® 13610002540 Buton K66 (A) [SPEECH] ® 1980037620 LED holder @ 1810008180 Set sorew (A) MONE ICOM standard screw Set screw (A): Pan head screw with spring washer Serew type Screw: M4X5, Max 12, M2566, etc Serew heed style PH: Pan head BIH: Binding hoad4.5 FRONT UNIT CONNECTOR ASSEMBLY IF UNIT, Pi6(ui9) ! steered Foil sw-B] Fea sw-A MAIN UNIT osu EFI(CONNECT B Psrti204) RF A UNIT Prion pe LOGIC A UNIT Pests) poteececed a FRONT SW Liofecsoat (B 22098) © PI ©. © Locic A UNIT Peat) 4B) © sw-c ao |ONt I. (B 19838) Sw-B * — (B 19828) J MAIN UNIT Fl Panny VR-A MAIN UNIT wT = 18 9840) 7 rain) NECT BIUNIT t _ INIT oF of WA. AUUNIT (B 19818) MAIN UNIT Matter Farias IF UNIT ve-8 [Loum kamam [2 (ie) (8 1985¢) q zs “T Csiivrc (27 sl][[f ea (8 19860)/ Tes TE — S ee Ag ([e=7| UNIT Res = be ] [vec ‘or MAIN MaiN UNIT conte UNIT UNIT Pee oe UH Fuulss) Stas P3etuz024-6 TOP VIEW CONNECTOR ASSEMBLY (1) LF UNIT ere) oom iP) wer owt fomeer EE. a oO, PF UNIT (CONNECT A P re ff EON Game “0 TE UNIT LOGIC A P2s(4) UNIT . Pe52) MAIN 3 RF A UNIT reuis) (B 18834) FRONT UNIT Pesive) FF rar DEEN (CONNECT B) esoccncoeee ts! (555) i. MAIN U ye Posie) z SW-D UNIT RF B UNIT (8 19808) (B 21034) MAIN: ry UNIT od ( Paral) ; ve [eeeea] Cle DISPLAY LEF (CONNECT A) UNIT (102) EF. (CONNECT A) UNIT (u108) j TV UNIT (B 2287) voice UNI HESIZER iz ees SE Pow sey Fit on a EDI pete) |e, BD Ti 3 ; rast Core’ A - wie UNIT 1980B) Pst] 4 LOGIC A eee Locic B Prats) SCOPE UNIT (8 18870) LAY UNIT REG UNIT Psztus) fy 34-7 TOP VIEW CONNECTOR ASSEMBLY (2) (BOTTOM) PS NT XO) tr Co oN fi DDS a8 A UNIT HPL (B 2203) lug BOARD (B 1804C) 9 — o a2 [3 PLL B UNIT i, (B 18g6c) |B 18590 2" wore BoRaN ESS B 20858) 7 € e vco2 a7 4 POUBLER)| ie 1858C) a by A Lelunit FB 18 vco! " ie lp2s (B 1857C) 5) Pe ry] ove o o REA ree UNIT UNIT vR-c (2) °6 HPF UNIT (B 1799C) eh RF AUNTIE os P59) ys [eea) r T RF B UNIT (B 2103A) IRF A. WNIT. pew) IF UNIT PIGS) Pais) e O P3_| [LO TRAP BOARD (B 2286A) P20 ys o FIL2 BOARD (B_1990A) FIL! BOARD (B_1989A) (assoz 4) [Guvoe XIW-CNC}EF (CONE JPsei203) PLL P30) Pe vole oR "REG UNIT (B 1888C) (ECT B)’ pag_o4 JS v2 P42 =o UNIT Poa) P50, P2916) Loic B 7 8 ye Up] |] eases ele ir ad este FRONT UNIT; resto SCOPE UNIT SW-D UNIT Star BKB, [VOICE SYNTHESIZER] UNIT OPION(UT-36) SW-D UNIT EF(CONNECT B) (B 1980C) 3714204) (9622 @) O1-LSI| © Ie auvo8 Wr DISPLAY @| cate ovo LOGIC A UNIT (B 1855C) FRONT. UNIT Peatsioe), T UNI: Set vir IF UNIT. 10 es ay ii ©} [Main UNiT SW z FRONT UNIT ParJinn)4-8 BOTTOM VIEW CONNECTOR ASSEMBLY ©] To yp-cEFICONNECT B) wr J P67LW5) ten A (B ere 79 zoel!) | WS) ee ceilonl ie ‘odeb ia 204, ios FRO eed unit 9 REG “UNIT REG, UNIT Yawn’ FRONT... mt fest Vv leaal 49 Lee UN VOICE [P23] IF_SHIFT (3) Pie ge FRONTS aT BOARD Ff a Ont teste "a UNIT g]| (B IS84A) | (connect a) ory 5 re UNIT wn) 8] va-arcrusn : ' Vicerire Pe a8 2 RFA REG UNIT |S bel UNIT Beet pawey BFO BOARD te (B 884A) | |, MAIN UNIT (B I88IC) vac SW-Breaw2) reo SW-Cr6aw2) VR-A is Be oa Pesisso2) Peseon vs ‘sw-D UNIT. 8Pon LOGE A 2g a? Pa WNT lM pe, unr Tes J Spr 8 tnt Blow) LOGIC B UNIT 13 siz Bose P70" (ssay SCOPEL>Lfooelus [gpro UNIT P2701) PLL A UNIT fs Sei Lees RF B UNIT & Pig(Ja) ay ya fei? fea fk Beles bn E Logic 8 UNIT Pi wea Patuzon IF UNIT (B 1882C) —n an Ie ) (CONNECT A)UNIT Fee ae A un Ses (8 os er GbRTAy ies ee! eS ,SECTION 5 MAINTENANCE AND ADJUSTMENT 5-1 REQUIRED TEST EQUIPMENT Measuring range: 0.01~10V EQUIPMENT GRADE AND RANGE EQUIPMENT GRADE AND RANGE AC power supply | Output voltage 1g.8V 0c External speaker | Impedance 3a Gurrent capacity: 10. or more ‘Ohm meter Measuring range: 0.1~100 K Frequency counter | Frequency range: 0.1 MHz~1 GHz Frequency accuracy: +1 ppm or better | Audio generator | Frequency range: S0~2000 Hz Sensitivity 100 mv or better Output evel 0~s00 mv F voltmeter Frequency range: 0.1~500 MHz Distortion meter | Frequency range > 1 kHz: 10 Hz Measuring range: 1~10 % Oseilecope | Frequency range = DO~SoMHz | Standard signal__| Frequenoy ange: 0.1 MH2~2 GH Measuring range: 001~10V senaator 880) | Outpt vel, “y2t~ 17 eB (1 wae my DG votmeter | Iputimpedance + SO KA/OG or beter ‘AC mitivotmeer | Measurng ange: 10 mV~10¥ 5-2 TEST EQUIPMENT CONNECTION a AC power SN ac supply QO | milli-vottmeter 13.BVINOA rom on ema + CONNECTOR INFORMATION xcept (@-138V Germany ker Germany [9 version |O}~GNO a version [Sk ayo ev (0c0¢) (0000) Distortion meter Standard sina! generator et antenna 5006 NOTE: connector (pene) The 19000 nas 4 antenna connectors Conoct tho proper comactor corresponding tothe operating bards. ""The [HF ANT 2} ack Is nt woe fr acustment tc-R90005-3 PLL ADJUSTMENT MEASUREMENT AOWUSTMENT aowsrwent | _ ADJUSTMENT CONDITIONS vawue unit | Locarion unit | apaust 508 G100K] + | =otwayesreqsre son 6000 wiz] 008 Joomectine [24200 wie bos | er ‘ewe A freaeney counter to ican ortes mn 208100" | + | oepayea ease sonaas6e iz] 008 [oorrectine [Maximum waveform | Puce | LE L18 Mece au ceotescope to Priore 2 8 |oomeame [rev cre sootscane 1 Rt (Ges) 3 006 | cennee gan we | Manu wave frm wou Sestoscope et |More tans Yo0) Pion t ae gand | 1 |-omied ean ta 10s00mee | PuLe [oomectie nr —aoxmmier | Le | taimuss Prato Mowe a vameortoors /(oas~o1 teem) 2 Cemrecthe AF | Maxum wel caus SStmeortecr2 aoseot'y ferme) 3 Connect the AF | Moma over wih enue watimtorto8 sev! nes us wpa scjstrg 0.05~01) 1 [Ato ahusiwot vopug PS WarTunF [1 | owpaye reqsney:so0.0s000 wiz] PLL® [omest he RF Maximum ever | PLLB | L36..57 Bend ara | | | caus ow Steere and ot or ar) toLoor Groupe 2 | edioyed reaerces Consectthe AF | Move han 22 mv very Stn ts 8 000 ie voteter fo OT Wren opel vs ss han 22 wae Ae" Ler Lore imum el wih the dipayed eavency 50000000 Mir ‘jst io afr he mesinum lee wit he doped ean #080000 MH 2 | -Dpayed veqwney so0.00m0 wiz] PLLB [oomect me |More ian 18 vp very cectoscope 118 one aude | 1 | Dives reqeoy 600.0000 mr] PLLB [Comectine | Owes venty Bandana | | owe Fu cectesope 0108. ote han Veo ooce ms vounce 2 | sompayeaweqperey 00000 wz] vOOS [omectito __[e~sv Very ceotocape tL 3 | -oayed eave 4900000 wz ev verty ‘cron | + [ompayesemoncy 40908000 MHz] PLL [omest nomr — |waximumiew fue | use band ane_| * |SMoue te Binatone of [0390.05 tooureur y 2 | -Dsayed eave 6008000 we Vesinum wet ws owePLL ADJUSTMENT (CONTINUED) MEASUREMENT ADIUSTMENT a * DDS, PLL B AND VCO 3 UNITS = { —— Js- —C72 (102 side)—}—HF 2nd ieee —1C11 pin 13} LO loop output CP terminal a DDS loop adjustment cp21 Pl terminal port pins C14- 1C16 pin 13. C6 ping VHFIUHF 2nd LO loop _ adjustment 136, L37- VHF/UHF 2nd LO loop—[_ 197 Out" acjusment CP ort VHFIUHF 2nd LO adjustment a adjustment an5-4 HF BAND RECEIVER ADJUSTMENT MEASUREMENT AOWUSTHENT aowusrwent | ADJUSTMENT CONDITIONS vawue unr] LocaTion unt | awsr Sauer | * [ue is coctoscape ae ea Fi comets [asomowne | rom |Toaue tock Shane Hy lech Naan hccaeemel cee oa bare a re oa neces Bu oN sectstape wo J20 cena coy omnes Boreur | * |eweas ES soatosape nae + [vowed vue: vasonco wna | [oomect me [Pesetioconer | wan | Reon chee is Seshostape Lo. IAGO] switch: FAST an a ‘Fawr ans] 1 | ome reqarey:saroo00 war | WAN [coweaine _ |aav waar nia women isa Seslossepe 1 019 seshozape © 10 a Corea he a Seep 1 08 © | ome ego: 900000 Me Ss me ua ad coneesape 1 05 STPLTER wioTH onto: MDE] area | owade a cornet he a “tite wor enter fMODLE] ceeesipe 01 sae 7 =a = coches 1.08HF BAND RECEIVER ADJUSTMENT (CONTINUED) MEASUREMENT ADJUSTMENT apsustMENT | ADJUSTMENT CONDITIONS vawuE unt | Location unit | abvust Pu 7 [Displayed reqenoy. 1410000 mz | AFA [omectine _[Prosettocener. | AFA | R26, Rao zrewaron |." | tNeoe se coclloscope to 04 STAT amitcnos OFF rater e ‘* [AGC] switch OFF ea id SIR GaN}contl Max. cw 3 | «Dileyes veqvency 2.00000 Nr | Rear [connec the AO | Minimum roc level 8 pane | rutvotmeter tthe {EXT SP} jack with on 0 ood © RF A UNIT Res. Pin attenuator adjustment CP 4quoussnipe of ee) Taare 5 = ais ' Cas © MAIN AND IF UNITS.HF BAND RECEIVER ADJUSTMENT (CONTINUED) MEASUREMENT ADUSTNENT ansusruent | — anvusrwenr conorions waive uw | tocaTion unit | aowusr eww | 1 | -Dasned renee 14000 Kz | fear |Conoaite AZ | Mosman ado out] RFA Paastn a eer sericea tase hegamen Pace tngarwes tir tee tReromen ort inietts “Netoace ore Sint won ewten(woDLe 2 | REA wore tan to Femiocne | | w teste con Car *(BASS] contro! Center 3 | *[SQUELCH] control: Max. CCW Front | Smeter Maximum value 17, U5 Mouton :0eF 5 | -saie a Taw Joowecine [iesimon ware oer | WAN | in t2 [Eee doa geet: costorope 08 tae sow soon Mositon ORE ToTAL GAN] 1 | Dosined emer t40200 wiz | Fear Joomecite AS [Presctiomoc cow | iF | oa ee tte pert [eae oe vee sou me oee 3 oe Fon [area rae Wo toe advent cmt oan ~28 8, at RIS one MAN UN BEEP TONE | 1 | » Displayed frequency: 14.10000 MHz | Top | Output level from the | Desired beep tone MAIN RES: '*(AF GAIN) control. : Desired position = Push a digit key FILTER * Mode usB panel ‘Smeter at [NOTCH] “1Eitenarom omen: ON Sonn Wand Cow '* [NOTCH] control: Mr CW oma. COW (Ber src eal 3 | «Displayed frequency: 13.9972 MHz Saletan Same value as step 1 Verity TNOTencomel se acceen 4 | = Displayed frequency: 13.9998 MHz ‘Same value of step 1 Verity TROT cone)” oosrecuceHF BAND RECEIVER ADJUSTMENT (CONTINUED) MEASUREMENT ‘ADJUSTMENT apwustwent | ADJUSTMENT CONDITIONS vaLUE unt | Locarion unit | abwust wose | 1 | oiqpayedteqency 1410000 mnt | we oomectthe —[ainimumvtage | iF | ae~uae suawcen | * | Saou Use coonoacoge to ‘IAlionaronyswich: OFF mrs SINoTeH ewer OFF ‘iheolewicn OFF SIne|swten on SIMB LEVEL cnt Max COW «Sethe signal generator ‘ove sou Noduaton OFF 2 [Add ite fotowing pus sgatimto | fear | Oomect ihe Woe is lanes Veity Sina generator utt panel | cscitoecope tothe | when the NB teh 1001 [EXT SP] jack with an | is ON. Loman 8 Q load. . * RF AUNIT‘MAIN AND IF UNITS MAIN UNIT:5-5 VHF/UHF BAND RECEIVER ADJUSTMENT ‘ADJUSTMENT ADJUSTMENT CONDITIONS (MEASUREMENT ‘ADJUSTMENT POINT uNiT | LOCATION VALUE unit ADsusT RECEIVER GAIN * Displayed frequency: 145.0000 MHz * Mode FM [FILTER WIDTH] switch: [WIDE] ‘Set the signal generator Level 50 HV Modulation 1 kHz Deviation #35 kHe + Mode ‘WFM Front | Smeter panel Maximum value F 119, L20 umn, Liz ua BANDPASS FILTER ‘Displayed frequencies: ‘999,000 MHz and 750.0000 MHz Mode FM ‘(FILTER WIDTH) switch: [MIDDLE] «Set the signal ganerator; Level os uv Modulation: 1 kHz Deviation £35 kee * Displayed frequencies: "749.0000 MHz and '500.00000 MHz * Displayed frequencies: '499,00000 MHz and :250,00000 MHz ' Displayed frequency: 960.00000 MHz '* Displayed frequencies: '249,00000 MHz and 90.0000 MHz ‘ Displayed frequency: 150.0000 MHz * Displayed frequency: 200.0000 MHz * Displayed frequencies: '89,00000 MHz and 30,0000 MHz * Displayed frequency: 55.0000 MHz 10 * Displayed frequencies: {80.0000 MHz, 70.0000 MHz ‘and 40,0000 MHz Rear | Connect the panel | distortion meter to the [EXT SP] jack with an 8 © load. Minimum distortion level (Alternately adjust a couple of times at both frequencies.) AFB 0 Reo R79 R77 R73 art Verity Res Res verity [SeNSTVITY ‘Displayed frequency: 751.0000 MHz * Mode FM * [FILTER WIDTH) switch: (MIDDLE] + Set the signal generator; Lovel 50 uv Modulation: OFF Front | Smeter panel AFB Ls7, Usa 1st Lo NOTCH * Displayed frequency: 250.0000 MHz = Mode FM + [FILTER WIDTH] switch: [MIDDLE] * Displayed frequency: 499.0000 MHz * Displayed frequency: 249.0000 MHz * Displayed frequency: 80.0000 MHz RF B | Connect the OC voltmeter to IC3 pin 1 ev RFB R105 19~15V Verity ov R104 anv verity© IF UNITVHF/UHF BAND RECEIVER ADJUSTMENT (CONTINUED) MEASUREMENT ADJUSTMENT aowstent | aDiustweNT conomons unt | Locarion unit | aDsust var “Doped roqnny ev an00 wiz | Fron | Smee we | wore pana Sipcten wionsy smn: pHOOLE] “Sette gal great ~Dopaedeqncy 38 0000 Mie mz “Sele oul goa TOTAL GAIN * Displayed frequency: 751.00000 MHz| Rear | Connect the AC Front | (AF GAIN] pana | mettre pana “Sete sal gow (Ber sya at ineaed =e the srl greater: | mr eweren | 1 | -Ovoedecvrey: 75100000 we Fron | Sete wan | peo He pana ‘* (FILTER WIDTH] switch: [MIDDLE] Site sl geno ~ Sat the sral greater, wee Sane sna generar ra08 Teal slop 2 and 8. coupe of tines eae sal gonoaor Fron [e-meter very He Spa | Ova Strtten wor swe: (WODLE] rc] “ove {Satine spa! gonoraio: ON wan | Roe cenren | + [pened remy 7510000 wiz | wan oom ne 6 wan | raze were vonmeter ta wis {Satine sgn! goneatoy TIMETER ach cemecithe0o [ss veimen43¥ m7 “Sette st goneaor Conmeterta ne | canoe ataiea Seino es, [Seen tomanmm naan the AN UNIT Conte Font | Cote mae wa28 panel Tie Snape e | ue Sethe sgnal green wan [cones te Do Fon | MAW wotmets to Rese poral | DIL tere Cones te D0 wan | pa20 votmete oF 5—10VHF/UHF BAND RECEIVER ADJUSTMENT (CONTINUED) MEASUREMENT ADJUSTMENT aovustwent | — ADJUSTMENT conDmTiONS vawue unt | tocaTion unit | aowsr cenren [7 |-tarojewicn a Shalt OW an cow we TTP TER wioTa oe: 00%] 9 | rrcrer wo wien wD 7280 10 | + Mote ew and WE vesty {IPicten wions ten wef bot} nbe ena ARROW Conerneer | omer venty 12 | +See sal gent vesty ‘srt OF wersaet [1 |-omleedveasner c000000 wiz] Wer [comesthe oo [2s wr | ounae’ | | | hee Ey vote 0 CP (Gree on) 2 | Daye eavney 1200000 MHz ‘eon 660 veal © RF B AND HPF UNITS HPF UNIT: HPF shift voltage adjustment CP—CP HPF shitt votage ad|ustment pg 11 F notch adjustment —}© MAIN AND IF UNITS wounsnipe sejaws — INA NIV5-6 SCOPE ADJUSTMENT ‘After scope adjustment, switches St and S2 must be set to the original positions as follows: ORIGINAL POSITIONS 1: Front side (NORMAL) ‘82: Rear side (AFC ON) NOTE: When changing the S2 position, wait 20sec. before starting adjustment, because the switch has a time constant. ‘ADJUSTMENT ADJUSTMENT CONDITIONS VALUE MEASUREMENT ADJUSTMENT unit | LOCATION UNIT apsusT SWEEP 1 OSCILLATOR layed requency 1410000 WHE = Mode i [IF SHIFT] control : Center ‘Select the spectrum scope screen, '*S1: Front side (0 SPAN) 182: Rear side (AFC OFF) SOOPE | Connect the 1.280 MHz SCOPE frequency counter to | (Adjust L45 20 sec. Lao. after the $2 switch is set, because the AFC switch has time constant) Las Local 1 OSCILLATOR 1 Dita roqueney: 14,0000 MHE = Mode iatTswtches OFF ‘Select the spectrum scope screen. ‘©1: Front side (0 SPAN) ‘82: Rear side (AFC OFF) ‘SCOPE | Connect the 16.490 MHz, ‘SCOPE frequency counter to Rr. L38 1st Lo 1 LEVEL ‘ Displayed frequency: 14.1000 MHz + Mode FM S{ATT]} switches: OFF ‘IF SHIFT] control : Center ‘Select the spectrum scope screen, 181: Front side (0 SPAN) 1/82: Rear side (AFC OFF) scOPE | Connect the Maximum wave level | SCOPE oscilloscope to L10. | and minimum AM components Li2~L15. 2nd Lo 1 LeveL 1 ispiye rene: 14.0000 Me + Mode SIAtTowtches OFF {IF SHIFT] control : Center + Select the spectrum scope screen, +#'S1: Front side (0 SPAN) + 82: Rear side (AFC OFF) scoPE | Connect tne Maximum wave level | SCOPE oscilloscope to L30. ist AFC 1 ADJUSTMENT * Displayed frequency: 14.1000 MHz * Mode -M s[ATT} switches: OFF [IF SHIFT] control : Center ‘*Select the spectrum scope screen. ‘#1: Rear side (NORMAL) 182: Rear side (AFC OFF) SCOPE | Connect the 38 Vpp SCOPE ‘oscilloscope to RSA Ls rraan [1 1 slaved roquency: 1410000 WHE = Mode TIESHHET contra “Contr SIATT] switches: OFF ‘Select the spectrum scope screen. ‘Set the signal generator; Level 32 uv Modulation: OFF ‘#81: Front side (0 SPAN) 182: Rear side (AFC OFF) Front [Spectrum scope _| Preset to center SCOPE panel_ | screen (Adjust at horizontal seale section later.) Maximum level Front panel R76 R109 its MAIN DIAL Maximum level REA a6, L89 L90 116, Ls9 SCOPE 18 6,17 La, Lar U9, Lis u7* SCOPE AND RF A UNITS ‘82 Spectrum scope AFC switchIF UNIT LINN a awounsnipe ues 44 [951 ‘ail as a+ cme mec ae eaeSCOPE ADJUSTMENT (CONTINUED) MEASUREMENT ADJUSTMENT pouustwent | ADJUSTMENT CONDITIONS vawue unit | LocaTion wir | abuust TFFILTER | 1 | Olopayeavewnoy-r4 10000 wre | Fron [Specium scope | Preset io cone. | Score |pea~noe Siewe nw penal |aveon that cote ha TAT owittes “OFF frecuerey en vorial 1a he epectum sope screen seat soctona) {Sompe tana” 225 2 re ee ") ‘Set the displayed wave | Front MAIN: evel mi to the center jane! | DIAL Modulation OFF p 11: Rea sto (NORWAL 3 | ai fast 7s oon score fixe wz ‘82: Rear side (AFC OFF) rasa) a enter | 1 | Dispmyeavoamrey 120000 wie | Front | Spncvum scope | Maximum velar | soore | Las rreavencr | * | eae iw pana | secon ronan ne THESE, cont Cortor '* [CALIBRATOR] switch: ON 2 otc he apm spe scren {Sowpetenowa 225 1Sitne dna! generat tore ore +51: ent sid 0 SPA) '©S2: Rear side (AFC OFF) 2 [ese fear age ‘Apso ofthe deployed vey (NonMAt) weve othe same rm «Soap band poston ato esis, 250 We and ‘ea Foote 3 | -Geope bendwa 25 mre ‘Apsokof he elev a 1 | +Seepe banda poster, very nts aa 10 ie vorzowta| + | = imiyes rear: 807600 iz | Fron [Specramscepe [Amanorsignaleon score | Ree soa sieve a panel | sreon thea comer. STAT wicnos Ore SI SHIET cont contr seine poe STeatonatom)owich: On 1 Sotct tne apoctum sopoocren, 1 Seopo banat 3251 $Si ear ce (NORMAL) 122! From se are OFF 2 | sdk veqnoy 1998000 MH ‘mate Salis o9 wes {Setpe tancna 80 nee eng come. 3 | «Dyed wequnay 18.9000 wz ‘mate alison 8 Sebpe banamatn S100 te thea comer 7 | soya vequnay 1400000 wre ‘peak of sal noes very Sieve ay Binet note 1 Spe bandwith 228 te 3 [wade 1s ‘peak of signal moves Veity 1 Baten ratSCOPE ADJUSTMENT (CONTINUED) MEASUREMENT ADJUSTMENT aosustment | aDsusTMeNT CONDITIONS vawue uw | Location J uw | apiusr afc] + | -dipayea rear: 400000 mre | Front [Specium ope [Apeakot ire aapayea| Score | 138 Geren | ' | ete iw perel | sreen waves be comer '*(ATT] switches ‘OFF position. ‘*(IF SHIFT] control: Center “Toationator onten: ON Eee the peat ope aceen {Sms bana 208 ee 15° oer ace (NORMAL) 152: From sae aro ON) 2 | eSeope bandwith: 2500 od ‘Ape othe teed veity stows teeth become poston eRncAL | 1 | oped venney-14.16000 wre | Fron [epecium scope | 2nd cae wom me | s00Pe | _RI0® SAE Sieve A penal [oon iowet ne '* [ATT] switches OFF Tiaeclawton OFF THESHIET cont !eemer postman et TleaLiBRATORT owtch: ON {Sota he apecur Spe screen ‘soope benona 228 ee {Serine anal gear fh Sow Mouton FF «91 Ber age (NORMAL 152: Rea te (AFC On) 2 | eSet he sna eroator Sh aale rom te a tn Se mv foveal ne cue oe 3 | +See ogra generator ‘aca fate 0 tow ou toest ne noo eo 7 Wie tor appear mice el 5 | +See agra generator The wave peak veaty fi Seay Bocheo te Hohe s1acc}onton ON ine cna | + |soeet 100 i benawa, From |poctum scope | nace on owes ne he sane enecx panel | sereon Iva trade oO eve aga 2 | -6et te warn ronan Wo avo on te daleyed wae ve conv© SCOPE UNIT 440 o4v No oav El 3s 5-155:7 TV UNIT ADJUSTMENT (Except France version) MEASUREMENT ‘ADJUSTMENT POINT ADJUSTMENT | ADJUSTMENT CONDITIONS VALUE unit | LOCATION unit | AbsusT WF + | + Deptayed trequency: 181.75000 MHz |TV | Connect the Minimum signal level NOTCH ‘Connect 2 signal generators via the ‘oscilloscope to A. hybrid combiner. «Set the signal generator 1; Frequency: 181.750 MHz Level 22mv Modulation: OFF + Set the signal generator 2: OFF (RIS in the TV unit : Max. CW wv uw 2 | + Set the signal generator 1: OFF Minimum signal level ‘Set the signal generator 2; Frequency: 175.750 MHz (USA. version) 174.750 MHz (other versions) Level 22mVv Modulation: OFF is Vv 1+ | « Dieplayed trequency: 181.7600 MHz] TV | Connect the Maximum signal level DETECTOR ‘Set the signal generator 1; oscilloscope to R21. | (more than 220 mVp-p) Frequency: 181.750 MHz Level 1.1 mv Modulation: OFF += Set the signal generator 2; Frequency: 177.250 MHz (USA. version) 176.250 MHz (other versions) Level 22 mv Modulation: OFF w ] ue AGC 1+ | «Displayed trequency: 181.75000 MHz] TV. | Connect the 3v + Set the signal generator 1; oscilloscope to W12. Frequency: 181.750 Miz Level: 1.1 mV+insertion loss of the hybrid combiner. Modulation: OFF ‘Sot the signal generator 2 Frequency: 177.250 MHz (USA. version) 176.250 MHz (other versions) Level: 2.2 mV+insertion loss of the hybrid combiner. Modulation: OFF w | ats R21—TV detector adjustment CP L12—TV detector adjustment W12—AGC adjustment CP R1S—AGC adjustment TV IF notch adjustment u 1V IF notch aaustment tal 9 —TV IF notch adjustment CPSECTION 6 BOARD LAYOU 6-1 FRONT UNIT (1) +SWA Co (mae 7] NOTE: Add “200" to the indicated number on the unit for actual part number respectively, + SW-B +sw.c rer (rer) EEE (ter 0 -Gare) «108 oun une dn ont NOTE: Add “400” to the indicated number on the sta etary Unit for actual part number respectively. NOTE: Add "300" to the indicated number on the Unit for actual part number respectively. *LED (ame) eee) ear) NOTE: Add "800" to the indicated number on the unit for actual part number respectively.* SENSOR UNIT COMPONENT SIDE 15-486 Qi, 2, 3 Hck FOIL SIDE eVR-A re to MAIN UNIT MAEN UNIT ps2 (iad Pesta | 2 [RFGF[SeGF [BASU TREY) NOTE: Add “500” to the indicated number an the unit for actual part number respectively. 6-16-2 FRONT UNIT (2) * FRONT UNIT COMPONENT SIDE veupays ce(FOIL SIDE | COMPONENT SIDE NOTE: Add “100” to the indicated number on the unit for actual part number respectively,FOIL SIDE (04 flies Tine Yo fae TERT] ie meetin ses Lo Lah Lae Niner] Hens oe 219 CE TRS NEY oa TST Waa |S)188184 ‘DIO a symbol : 83 ‘2SA1359-¥ Qu? 2802712-GR Q101, Q113, Q115 28c3422-Y 102, Q114, A116 FMG4 104, Q105, Q106, Q107, Q108, Q109, ano ose jcowsecron wore we couurcron Symbol G4 RNG404 0103, 0111, O112 Symbol : XO (5 FOIL SIDE |) COMPONENT SIDE6-3 FRONT UNIT (3) oVRB NOTE: Add "600" to the indicated number on the unit for actual part number respectively. wo Qo and© TEN-KEY NOTE: Add "900" to the Indicated number on the umit for actual part number respectively. ° FRONT SW tune NOTE: Add “1200” to the indicated number on the unit for actual part aumber respectively6-4 FRONT UNIT (4) © 1F SHIFT FRONT canis) 10 FRONT nay NOTE: Add "1000" to the indicated number on the ‘unit for actual part number respectively. NOTE: Add 1100" to the indicated number on the Lunt for actual part number respectively. *swD RN1204 a1, a2* CRTC UNIT6-5 LOGIC A UNIT a Comectan oar ton188190 ise Di, D4, 05 L+ 5 r Symbol : ES ‘Symbol | F 28A1162 ¥ au, a76-6 LOGIC B AND SCOPE UNITS * LOGIC B UNIT 25A1048-Y RN1204 RN2204 Q3 Q1, G4 a2 amen© SCOPE UNIT 2802458-GR Q10, 213, 05 «46 RN1204 14, 015, 220 Qe 2sc7es ¢ 11, a7 (288562 an Qi7 % zspasec 25K2416R 20 1, 012, 02 au er ALO6-7 PLL A UNIT (1) COMPONENT SIDE PRESCAL A BOARD Guvos VW TWwoSsdd <2) HPAMP2 ac onl 10 a a ° MP1S.14,15 lo VC 60 MP16.17,18 U Vi B» fohele Tee] MPH 2 DOUBLER BOARD FOIL SIDE COMPONENT SIDEFOIL SIDE Be.) Gomf ae. \ f a | : 1} @ ga 98,88 = Se La Nery { VEO! BOARD aye gu VCO2 BOARD DOUBLER BOARD ean De 188184 1ss187 1ssi90 1ssi93 HSMBBAS-T 2501362-GR B18, 020 pat D5 p19 O14, O13 O41, O12, 013 014, a17, 019 7 qt ck moot} a “en 7 ao &o fF &@ #& A nue t t + t sie Symbol: 83 Symbol | D3 ‘Symbol | £3 Symbol : F3 ‘Symbol C1 Symbol * AEG.