CS 308: Large Applications Practicum

Week 1

Varun Dutt
School of Computing and Electrical Engineering
School of Humanities and Social Sciences
Indian Institute of Technology Mandi, India

Scaling the Heights

1
 Course Logistics

- Please don’t copy or plagiarize!

- Being an AI researcher, I know how to catch it

- If found, consequences will be catastrophic!

- If you did copy, then please cite the sources as

(author, date). E.g., (Dutt, 2012)

- Let’s visit the syllabus

2
Overview of ‘make’

• Makefiles are a simple way to organize

code compilation.
• The make program aids you in developing
your large programs by keeping track of
which portions of the entire program have
been changed, compiling only those parts
of the program which have changed since
the last compile.

3
Why do we need ‘make’?

• Assume you have following source files.

– main.cpp
– functions.h
– eat.cpp
– code.cpp
– sleep.cpp
• “eat.cpp”, “code.cpp” and “sleep.cpp”
contains the definitions of the corresponding
functions.
4
Why do we need ‘make’?

• Contents of “main.cpp” and “functions.h”

#include <iostream>
#include "functions.h" void eat(int rupees);

int main() void code(int lines);

{
std::cout<<“My routine: “; void sleep(int hours);

eat(100);
code(1000);
sleep(10); functions.h

return 0;
}

main.cpp
5
Why do we need ‘make’

• Normally, the compilation goes as:

g++ -o routine main.cpp functions.cpp eat.cpp code.cpp sleep.cpp

• Already a long line…

• What if there are other files too…?
• Once we write the makefile, compilation
goes as:
make

• Simple, isn’t it?

6
How do we write makefiles?

• You need a file called a makefile to tell

make what to do.
• Most often, the makefile tells make how to
compile and link a program.
• A simple makefile consists of “rules” with the
following shape:
target ... : prerequisites ...
recipe
...
...
7
How do we write makefiles?

• A target is usually the name of a file that is

generated by a program; examples of
targets are executable or object files.
(in our example, the target was “routine”)
• A prerequisite is a file that is used as input
to create the target. A target often depends
on several files.
(in our example, the prerequisite were all
other files like main.cpp, code.cpp etc. )
8
How do we write makefiles?

• A recipe is an action that make carries out.

A recipe may have more than one
command, either on the same line or each
on its own line.
(in our example, the recipe was the entire
compilation command)

Note: You need to put a tab character at the

beginning of every recipe line!
9
A simple makefile

• A very simple makefile for our example

could be:

routine : eat.cpp code.cpp sleep.cpp

g++ -o routine main.cpp eat.cpp code.cpp sleep.cpp

• This is just a way to write makefile, although

it is not the recommended way to do so…
(why?)
• We will soon write a more useful makefile. 10
How make Processes a Makefile

• By default, make starts with the first target

(not targets whose names start with ‘.’). This
is called the default goal.
(in our example, “routine” is the default goal)
• Thus, when you give the command:
make

make reads the makefile in the current

directory and begins by processing the first
rule.
11
How make Processes a Makefile

• Before make can fully process the rule for the

target “routine”, it must process the rules for the
prerequisites that “routine” depends on.
• In our example, the dependencies are individual
source files which are independent. Hence, make
simply checks whether they are up to date or not.
• Even if a single file is modified, the recipe for
“routine” is executed which in turns compiles
everything.
(that’s why this makefile is not recommended!)
12
A more useful makefile

• If we look closely at the dependencies, we

can write the makefile this way:
routine : main.o eat.o code.o sleep.o
g++ -o routine main.o eat.o code.o sleep.o

main.o : main.cpp functions.h

g++ -c main.cpp

eat.o : eat.cpp functions.h

g++ -c eat.cpp

code.o : code.cpp functions.h

g++ -c code.cpp

sleep.o : sleep.cpp functions.h

g++ -c sleep.cpp
13
Some comments on the useful makefile

• The executable is dependent on the object

files and not the source files…
• First, make checks whether the default goal
“routine” is up to date… which is checked by
checking whether each of the prerequisite is
up to date.
• Now, make recursively checks each of the
prerequisite of “routine” and first make them
if they are changed/modified.
14
Some comments on the later makefile

• Finally, make compiles only those files

which are modified and rest of the files are
not compiled again.
• Thus, when done properly, it saves
processor time…

15
More to makefiles : variables

• In our example, we had to list all the object

files twice in the rule for “routine” (repeated
here):
routine : main.o eat.o code.o sleep.o
g++ -o routine main.o eat.o code.o sleep.o

• Such repetition is not only time consuming,

but also error prone.
• We can instead use variables as described
in the next slide.
16
More to makefiles : variables

objects = main.o eat.o code.o sleep.o

routine : $(objects)
g++ -o routine $(objects)

• Looks simpler, isn’t it?

• Another useful trick is to let make deduce
the recipe itself which is described next.

17
More to makefiles:
automatic recipe deduction

• It is not necessary to spell out the recipes

for compiling the individual C source files,
because make can figure them out: it has
an implicit rule for updating a ‘.o’ file from a
correspondingly named ‘.c’ file using a ‘cc -c’
command.
• Same is also true for a ‘.cpp’ file.
• Lets see how our makefile looks after
including this property of make.
18
More to makefiles:
automatic recipe deduction

• Using automatic recipe deduction of make,

our makefile looks much simpler:
routine : main.o eat.o code.o sleep.o
g++ -o routine main.o eat.o code.o sleep.o

main.o : main.cpp functions.h

eat.o : eat.cpp functions.h

code.o : code.cpp functions.h

sleep.o : sleep.cpp functions.h

• It will use the recipe ‘g++ -c file.cpp -o file.o’

to compile ‘file.cpp’ into ‘file.o’ 19
What next?

• We have not even scratched the surface of what is

possible using make. There is a lot to learn
further…
• First thing to note is that make is not just for
C/C++ source files! For e.g.: Similar dependencies
can be defined for Java files and even for scripting
languages…(Anything that can be compiled on $
prompt could use make)
(think yourself how you can use make with
scripting languages which may not require
conventional compiling and link steps)
20
Generating Makefiles is Popular

• In industry, it is fairly common for large

Linux/Unix programs to include elaborate
custom shellscripts that would probe their
environment and use the information they
gathered to construct custom makefiles.
• The use of make makes compiling and
linking fast/efficient.
• It also helps to make compiling and linking
portable across different implementations.
21
References

• There is plenty of information on make and

makefiles on the web. Main references used
for this lecture:
• http://www.gnu.org/software/make/manual/
make.html
• http://www.cs.colby.edu/maxwell/courses/t
utorials/maketutor/
• Acknowledgements: Ajay Kumar for slides

22
Question or Comments?

23