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ees PAAAnAAPPpPPpPRPeePRAAAnas 2 aap © Boo GCES eo ) “1. Pulse code Modulatio: 7. Quadrature g 9. Data coding and Decoding techni LIST OF EXPERIMENTS n and Demodulation fbeL-.03! [i St Meulation and Demodulation | “¢ Sigma Modulation and Demodulation’ » ASK,PSK,FSK Modulation Techniques’ L- : Time Division Multi Pulse Amplitude Modi Data coding and Dec: Format (URZ) and N a Bw iplexing and Demultiplexing with ulation and Demodulation <=> ‘oding Techniques for Return to Zero Multilevel Binary format(AMI) Phase Shift Keying Modulation and = Demodulation 8. Performance analysis of various M-ary Modulation Techniques. ques for Phase Encoded Format (BIO-L,BIO-M,BIO-S) a ys De o 10.Synchronization Techniques A > EXPERIMENT NO:1 | /PULSE CODE MODULATION AND DEMODULATION wud ae O°L-03: PULSE CODE MODULATION TRANSMITTER KIT & DCL.Ot: PULSE CODE DEMODULATION RECEIVER KIT fete! ye /SAMPLING AND MULTIPLEXING TECHNIQUES AND RECONSTRUCTION. opsective: (iM! To study 2-channel Time Division Multiplexing and Sampling of analog signal, and its Pulse code modulation in None parity mode in the transmitter section and to study the demultiplexing and the reconstruction of the analog signal in the receiver section. THEORY: The sine waves (analog signal) of frequency 500Hz and 1KHz and DC Signal DC1 and DC2 whose amplitude can be varied accordingly are generated onboard on DCL- 03. These signals are fed to the input of the Sampling logic CHO & CH1 and their samples are multiplexed by interleaving them properly in their assigned time slots The crystal oscillator generates a clock of 6.4MHz from which all the transmitter data and timing signals are derived. For fast mode operation the transmitter clock is 240KHz, and Sampling clock is 16KHz. For slow mode operation depending on jumper position the transmitter clock is 1.23Hz or 0.6Hz and sampling clock is 0.088Hz or 0.044Hz ie. the sampling rate per channel is 11 or 22 seconds and serial data transmission rate is 813 milliseconds or 1.6 seconds. The multiplexed data is Pulse Code Modulated before transmission. At the receiver after the Pulse Code Demodulation, the recovered multiplexed data is sent to Demuttiplexing logic. The two demultiplexed samples are fed to reconstruction urit. which consist of 4” order Low Pass Butterworth Filter, where frequency components are filtered out to recover the original base band signal at the receiver output CHO and CH1. EQUIPMENTS: Experimentor kits DCL-03 & DCL-04. Connecting chords. Power supply. 20 MHz Dual Trace Oscilloscope. NOTE: KEEP THE SWITCH FAULTS IN OFF POSITION. PROCEDURE: 1, __ Referto the Block Diagram (Fig. 1.1) & Carry out the following connections. 2. Connect power supply in proper polarity to the kits DCL-03 and DCL-04 and switch it on. FALCON —_ a DIGITAL COMMUNICATION LAP Noo {2} FUNCTION GENERATOR JNOLWOINNKWIOD TWwAIDIG swt e1ock GENERATOR PULSE CODE DEMODULATION TADATA RXDATA Logic FIG1 BLOCK DIAGRAM FOR EXP.1 7 3 0cL.09: pus PULSE CODE MODULATION TRANSMITTER KIT & OCL.O6: PULSE CODE DEMOOULATION RECEIVER KIT 3. Connect sine wave of frequency 500Hz and 1KHz to the input CHO and CH1 [ of the sample and hold logic. 5 Connect OUT 0 to CHO IN &OUT 4 to CH1 IN. = Set the speed selection switch SW1 to FAST mode. Select Parity selection switch to NONE mode on both the kit DCL-03 and DCL- 7, 242s shown in switch setting diagram (Fig. A). Connect TXDATA, TXCLK and TXSYNC of the transmitter section DCL-03 to Der omesPending RXDATA, RXGLK, and RXSYNC of the receiver section . Connect posts DAC OUT to IN post of demultiplexer section on DCL-04. - Ensure that FAULT SWITCH SF1 as shown in switch setting diagram (Fig. A) introduces no fault. 19: _ Take the observations as mentioned below. 1. Repeat the above experiment with DC Signal at the inputs of the Channel CH 0 and CH 1. 12. Connect ground points of both the kits with the help of Connecting chord provided during all the experiments. OBSERVATION: Observe the following signal on oscilloscope and plot it on the paper. ON Paens KIT DCL.03 (Fig. 1.2) & (Fig. 1.3) Input Sample and Hold output OUT 0 and OUT1 Multiplexer clock CLK 4 and CLK 2 Multiplexed data MUX OUT. PCM Data TX DATA, TXCLK, TXSYNG ignal CH 0 and CH 1. ON KIT DCL-04 (Fig. 1.4) & (Fig. 1.5) 1. RXCLK, RXSYNC, RXDATA 2. DAC OUT 3. Demultiplexer clock CLK 1 and CLK 2 4. Demultiplexed Data CH 0 and CH 1 5. Received signal OUT 0 and OUT 4 ‘SWITCH FAULTS: Note: Keep the connections as per the procedure. Now switch corresponding fault switch button in ON condition & observe the different effect on the output. The faults are normally used one at a time. 1 FALCON Put switch 2 of SF2 (DCL-03) in Switch Fault section to ON position. This will remove PRBS sequence from Transmitted Data. Synchronization will be only possible in case of direct connection of TXSYNC to RXSYNC. In any other case no synchronization is possible. Put switch 3 of SF2 (DCL-03) in Switch Fault section to ON position. This will increase the duty cycle (on period) of CHO. Due'to which, some portion of CHO 4 JODULATION RECEIVER KIT, DEL-G3. PULSE CODE MODULATION TRANSMITTER KIT & DCL4: PULSE CODE DEM signal present in CH1 signals time slot Hence demultiplexed output for CH1 is disturbed. . a — 3. Put switch 4 of SF2 (DCL-03) in Switch Fault section to ON Position. This wil disable Data from going to TX Data, orly PRBS will be present. i 4. Put switch 4 of SF (DCL-04) in Switch Fault section to ON position. Le will disable Synch signal in Bit Synchronization. Filter output will be dtu ed. 5. Put switch 2 of SF1 (DCL-04) in Switch Fault|section to ON posit ee This will disable clock signal for Demultiplexer. One channel output is absent and other channel output is disturbed. - : — 6. Put switch 4 of SF1 (DCL-04) in Switch Fault section to ON position. This will remove CHO filter capacitor connection from ground. Filter output will be distorted. Conetuston: Dewlé ! We conclude that at the transmitter side sampling for 500Hz and 1KHz signals is done by using 16KHz sampling clock, hereby satisfying the Nyquist criterion. Similarly the multiplexed output observed in the ocilloscope shows the proper alignment of ‘samples in their respective time slots. Al the receiver side the 4 order low pass butterworth filter is used as reconstruction unit, which reproduce the signals (sine wave and DC signal levels) same as that of the transmitter side. It is observed in this case, that the reconstructed sine wave has good linearity, FALCON IGITAL COMMUNICATION LAB MUX CLK CHO FIG.1.3 WAVEFORI mux CLK2 CHI MS FOR TX TIMING. PYSEret cceee fi ‘50 us ‘50us ‘0s. 50.us. ‘sous Li DEMUX SIGNAL CLK1 FOR CHO | oD DEMUX SIGNAL CLK2 FOR CHI FIG.1.4 WAVEFORMS FOR RX TIMING io titted [| LJ RxsyNc 4 > 6 - a ECE ULATION ‘coo DEMO! 61-08: FUSE CODE MODULATION TRANSMITIER KIT DCL-OE:PULSE COPETTT __—— FALCON 7 7 7 ‘ i wo as mA ; =e canst oe BB aaa por eee | oS a fd Nf VANE fe \: J fy NW 4 # gee ry ey a Ny \/ WW OWA HEUTE NECUT ETE LUCA nu UNUULUSE fb ‘a! al DCL.03 FoR vo 8B @ ew ee Ye wie 1 PeL03: PULse cove wooU a {LATION TRANSMITTER KIT & OGL-04: PULSE CODE DEMODULATION RECEIVER KIT. el a La pie AN Le ' ce NS fi IN A o ML AMLAULILLUL ( Lape Ut LULL une outs FIG.1.5 WAVEFORMS FOR DCL.04 FOR EXP..No.1 : nar DIGITAL COMMUNICATION A ont No EXPERIMENT NO:2 DELTA MODULATION AND DEMODULATION | youn aDaPTive DELIA OUUTAT pot-o7 DELTA cu) wPut ese j DATA OUTPUT [| le Lf INTEGRATOR IG.1.1 DELTA MODULATOR ae | po [an | CK ‘nTEGRATORS LOW PASS FALTER FIG.12 DELTA DEMODULATOR FALCON DIGITAL COMMUNICATION LAB BSCST DELTA, SIGMA, ADAPTIVE DELTA MODULATION AND DEMODULATION KIT. ~ NAME: DELTA MODULATION AND DEMODULATION. OBJECTIVE: ‘Study of Delta Modulation and Demodulation. THEORY: DELTA MODULATION: Delta mogulation is the differential pulse code modulation scheme in which the difference’Signal is encoded into just a single bit. In digital modulation system, the analog signal is sampled and digitally coded. This code represents the sampled amplitude of the analog signal. The digital signal is sent to the receiver through any channel in serial form. At the receiver the digital signal is decoded and filtered to get reconstructed analog signal. Sufficient number of samples are required to allow the analog signal to be reconstructed accurately. Delta modulation. is_a Process of converting analog signal into one bit code, means only one bit is sent per Sample. This bit indicates whether the signal is larger or smaller than the previous Samples. The advantage of DM is that the modulator and demodulator Circuits are much simpler than those used in traditional PCM. Delta modulation is an encoding process where the logic levels of the transmitted pulses indicate whether the decoded output should rise or fall at each pulse. This is a true digital encoding process as compare to PAM, PWM and PPM. If signal amplitude has increased in DM then modulated output is a logic level 1. If the signal amplitude has decreased the modulator output is logic level 0. Thus the output from the modulator is a series of zeroes and ones to indicate rise and fall of the waveform from the previous value. The block diagram (Fig. 1.1) of Delta Modulation illustrates the components at the transmitter end. It consists of Digital Sampler and an Integrator at the feedback path of Digital sampler. Let assume that the base band signal a(t) and its quantized approximation i(!) are applied as inputs to the comparator. A comparator as its name suggests simply makes a comparison between inputs The comparator has one fixed output c(t) when a(t) > i(t) and the different output when a(t) < i(t) the comparator output is then latched in to a D-flip/flop which is clocked by the selected transmitter clock, Thus the output of the D-flip/fop is latched 1 or 0 synchronous with the clock edge. This binary data stream is transmitted to the receiver and is also fed to the input of integrator. The integrator output is then connected to the negative terminal of voltage comparator, hus completing the modulator circuit. The waveform of the Delta Modulator is as shown in the figure 1.5. DIGITAL cc (ATION LA DIGITAL COMAUR | | NOLVINGOWAN ONY NOLWINGOW YiIdO Hos WYHOWiG IOS E19 | | us _us (iid | | snuinoo yz samo Says amanes 10 | ms), [ADAPTIVE DELTA MODULATION AND DEMODULATON KIT. 07 DELTA, SIGMA, 13 PCLOT: DELTA, SIGMA, ADAPIIVE DELTA MODULATION AND OE MODULATION KIT DELTA DEMODULATOR: a The Delta Demodulator (Fig. 1.2) consists of a D-fipliop, followed by an integrator and a 2™ and 4" order low pass butterworth filter. The Delta Demodulator receives the data stream from D-flipiflop of Delta Moduator. It latches this data at every rising edge of receiver clock. This data stream is then fed to integrator, its Sutput tries to follow the analog signal in ramp fashion and hence is a good approximation of the signal itsell, Thé integrator. outgul contains sharp edges, which is smoothened out by the 2nd order, and 4" order low pass butterworth filter whose cut-off frequency is just above the audio band. ‘The practical use of Delta Modulation is limited due to following drawbacks: |LNOISE: A noise is defined, as any unwanted random waveform accompanying the information signal, When the signal is received at the receiver irrespective of any channel itis always accompanied by noise ) DISTORTION: Distortion means that the receiver output is not the true copy of the analog input signal at the transmitter. In Delta modulation, when the analog signal is greater than the integrator output the integrator ramps up,to meet the analog signal. The ramping rate of integrator is constant. Therefore if the rate of change of analog input is faster than the ramping rate, the modulator is unable to fee \@ input signal. This causes a larg? disparity between the with the information signal and it's quantised approximation. This error phenomenon is kfiown as Slope over loading and causes the loss of rapidly changing information. The slope overloading waveform is as shown in the figure. The problem of slope overload can be solved by increasing the ramping rate of the integrator. But as it can be seen from the figure the effect of the large step size is to add large sharp edges at the integrator output and hence it adds to noise. iii) Another problem of Delta Modulation is that it is unable to pass DC information. This is not a serious limitation of the speech communication. EQUIPMENTS: DCL -07 kit. Connecting chords. Power supply. 20MHz Dual Trace Oscilloscope. NOTE: KEEP ALL THE SWITCH FAULTS (SWITCH SF1 & SF2) IN OFF POSITION. PROCEDURE: 1. Refer to the block diagram (Fig. 1.3) and carry out the following conrections. 2. Conriect the power supply with the proper polarity to the Kit DCL-07 and switch it ON. oe ee ep a Piri ly aKtz BN : so aL Be ht BKHz, 160mV pu ie 32KHz AD wy av il i voy uh is ‘a a8 a: ‘ o/- fl Y FALCON “ps0Hz, 2 Ver OL N DIGITAL SAMPLER OUTPUT GKHz CLK) mn : Nw4 FILTER OUTPUT @KHz CLIO A DIGITAL SAMPLER OUTPUT @2KHz:CLK) pe wed So 4 Meant | INTEGRATORS OUTPUT G2KHz CLIO FILTER OUTPUT G2KHz CLI) FIG.1;5 DELTA MODULATION AND DEMODULATION DIGITAL COMMUNICATION LAB a ee ERED EPSP PP PETTY t IRREGULAR SHAPE INPUT Le Eg | DIGITAL SAMPLER OUTPUT (BKHz CLK) i Ma in| INTEGRATORS OUTPUT (KHz CLK) q FILTER OUTPUT @KHz CLK) hh 4 v. ‘sous ) 2 ¥ -500US 3 ) 1 ¥ 500uS FIG.1.5 DELTA MODULATION FOR IRREGULAR SIGNAL M1508 testy, FALCON oo. DIGITAL COMmUNicATION LAB 10. "1 12. 13. 14, 15. 16. 17. 18. 19. 20. FALCON es SIGMA, ADAPTIVE DELTA MODULATION AND DEMODULATION KIT a Select sine wave input 250Hz of OV through pot P1 and connect post 250Hz to post IN of input buffer. Connect output of buffer post OUT to Digital Sampler input post INT Then select clock rate of 8 KHz by pressing switch $1 selected clock is indicated by LED glow. Keep Switch S2 in A (Delta) position. Connect output of Digital Sampler post OUT to input post IN of Integrator 1 Connect output of Integrator 1 post OUT to input post IN2 of Digital ‘Sampler. Then observe the Delta modulated output at output of Digital Sampler post OUT and compare it with the clock rate selected. It is half the frequency of clock rate selected. Observe the integrator output test point. It can be observe that as the clock rate is increased amplitude of triangular waveform decreases. This is called minimum step size. These waveforms are as shown in figure 1.4. Then increase the amplitude of 250Hz sine wave upto 0.5V. Signal approximating 250Hz is available at the integrator output. This signal is obtained by integrating the digital output resulting from Delta moduiation. Then go on increasing the amplitude of selected signal through the respective pot from 0 to 2V. It can be observed that the digital high makes the integrator output to go upward and digital low makes the integrator output to go downwards. Observe that the integrator output follow the input signal. The waveforms are as shown in the figure 1.5. Observe the waveforms at various test-points in the Delta modulator section. Increase the amplitude of 250Hz sine wave through pot P11 further high and observe that the integrator output cannot follow the input signal: State the reason Repeat the above mention procedures with different signal sources and selecting the different clock rates and observe the response of Delta Modulator. Connect Delta modulated output post OUT of Digital Sampler to the input of Delta Demodulator section post IN of Demodulator. Connect output of Demodulator past OUT to the input of Integrator 3 post Connect output of Integrator 3 post OUT tothe input of output buffer post Connect output of output buffer post OUT to the input of 2° order filter post IN Connect output of 2 order filter post OUT to the input of 4 order filter post IN Keep Switch S4 in HIGH position. Then observed various tests points in Delta Demodulator section and observe the reconstructed signal through 2" order filter and 4" order filter Observe the waveforms as shown in figure 1.5 . oN CLO? DELTA, SIGMA, ADAPTIVE DELTA MODULATION AND DEMODULATION KIT SWITCH FAULTS: 19 fault rrespondin h corres ae Note: Keep the connections as per the procedure. Now swite ton the output switch button in ON condition & observe the different effect faults are normally used one at a time. a Put switch 3 of SF1 in Switch Fault section to ON position This will short the resistor R79 (10K) with R78 (100KQ), which will reduce Integrator 3 Gain Which will affect the output of Delta / Adaptive Delta Demodulation 2, Put switch 4 of SF1 in Switch Fault section to ON position. This will short the generated sine wave signals 250Hz & 500Hz, which will generate noisy sine wave 3, Put switch of SF2 in Switch Fault section to ON position. Th will open the bypass capacitor of the 4" order low pass ‘butterworth filter, which results in the induction of ripples at the filter output 4. Bat gute 7 of SF2 in Sulich Fault section to ON position, This wit ORT the reset signal of Flip-Flop in Digital Sampler. Results in distorted output at Dslta Modulator, Duration of fault gets reduced with higher clock frequency 5. Pat ewiteh 8 of SF2 in Switch Fault section to ON position. This will open Resistors R14 & R15 (22KO), in ladder network of 250Hz sine wave signal generator. Results in distorted 250Hz sine wave signal. OBSERVATION: Observe the following signal on oscilloscope and plat iton the paper. (Fig. 1.4 & Fig.1.5) ‘Sampling clock. Input Signal. Integrator 1 output at feedback loop for Delta modulator. Digital sampler Output. Demodulator Output. integrator 3 output Filter Outputs. eH AHRODAAMOAD DHA DAARAMA MAO OMOTA CE DIGITAL COMMUNICATION LAB. 25 EXPERIMENT NO:4 ASK,PSK,FSK MODULATION TECHNIQUES Le OW ONIARM AMIHS FONTAN Y YOd wywavigygotd POH SINOINHIIL NOLLWING! 90-190 woLvingow inaino | wauya wouingon uD wOLWURHD yy | a si alu wouvuH9 ‘Anant Q ? viva | WoLYUIHID aro. | “viva wvo cant ya01 W1x9079 ontaoa | ATION Uae DIGITAL COMMUN (20.05 DATA CONDITIONING ANO CARRE 1 25 DATA AND CARVER MODULATION TRANSMATTER KT. (62.05 BATA RECONDITIONING AND CARRIER DEMODUCATION RECENER KT 24 'DCL-05: DATA CONDITIONING AND CARRIER MODULATION TRANSMITTER KIT, ‘DCL05. DATA RECONDITIONING AND CARRIER DEMODULATION RECEIVER KiT. NAME: AMPLITUDE SHIFT KEYING MODULATION TECHNIQUES. OBJECTIVE: ‘Study of Carrier Modulation Techniques by Amplitude Shift Keying method. THEORY: Carrier modulation is a technique by which digital data is made to modulate a continuous wave (sinewave) carrier. For all types of carrier modulation, the carrier frequency should be atleast 2 times that of modulating frequency. In Amplitude shift keying, the carrier is transmitted when the modulating data is ‘one’ and the cartier is rejected from transmission when the data is ‘zero’. In DCL-05 the ASK Modulators employs an Analog Multiplexer as a modulating switch, which can switch between carrier and ground, for every ‘one’ to zero’ transitions. The carrier frequency chosen for ASK modulation is 1 MHz. ASK DEMODULATOR biock on DCL-06 employs an envelope detector to recover the data from the modulated carrier. The ASK modulated input is fed to the half wave rectifier. The rectified input is fed to the filter, where the original data is recovered. The threshold detector is used to recover the original amplitude levels of the data. So whenever the sinewave is transmitted, the detector identifies it as. a ‘one’ and whenever the carrier is absent, the detector identifies it as a “zero’. EQUIPMENTS: Experimentor Kits DCL-05 & DCL-06. Patch Chords. Power supply. 20MHz Dual Trace Oscilloscope. NOTE: KEEP THE SWITCH FAULTS IN OFF POSITION. PROCEDURE: 1. Refer to the block diagram and carry out the following connections and switch settings. 2. Connect power supply in proper polarity to the kits DCL-05 and DCL-06 and switch it on. 3. Connect CLOCK and DATA generated on DCL-05 to CODING CLOCK IN and DATA INPUT respectively by means of the patch-chords provided. 4. Connect the NRZ-L data input to the CONTROL INPUT of the Carrier Modulator logic. 5. Connect carrier component SIN2 to INPUT1 and GR the Carrier Modulator Logic. eo ea 6. Connect ASK modulated signal MODULATOR OUTPUT - ASK IN of the ASK DEMODULATOR on DCL-06. a 7. Observe various waveforms as mentioned below. FALCON ° ~~ DIGITAL COMMUNICATION LAB 2€ 05 DATA CONDITIONING AND CARRIER MODULATION TRANSMITTER KIT 98. DATA RECONDITIONING AND CARRIER DEMODULATION REGE WER Ri SERVATION: @1ve the following waveforms on oscilloscope and plot it on the paper. KIT DCL.05 1. Input NRZ-L Data at CONTROL INPUT. 2. Carrier frequency SIN 2. 3. ASK modulated signal at MODULATOR OUTPUT. om ee 33 DEkOS: DATA CONDTONING AND CARRIER MODULATION TRANSMITTER KIT, C108: DATA RECONDITIONING AND CARRIER DEMODULATION RECEIVER Kir. a >| FSK DEMODUI CONTROL INPUT NRZL! FSK.MODULATOR.OUT . . . 4 iSE DETECTOR FIG 5.2 WAVEFORMS FOR EXP HO.5 ILATOR FALCON DIGITAL COMMUNICATION LAB. 34 DCL-05: DATA CONDITIONING AND CARRIER MODULATION TRANSMITTER KIT. DGL-06: DATA RECONDITIONING AND CARRIER DEMODULATION RECEIVER KT 2 IMUNICATION DIGITAL Cova CLS: OATA CONDITIONING AND cy ARRIER MODULATION TRANSMTTER Kr, SCE DATA RECONDTIONNG AND GARR Seno TER wir NAME: PHASE SHIFT KEYING MODULATION TECHNIQUES OBJECTIVE: | Study of Carrier Modulation Techniques by Phase Shift Keying method THEORY: ‘witches between in-phase and out-of phase component of the carrier frequency CARRIER GENERATOR block on DCL-05 generates the carrier waves 1MHz (0 Degree) and 1 MHz (180 Degree), which are available at SIN 2 and SIN 3 post. The PSK modulator is also built around the 2 to 1 Analog Multiplexer which Switches between the 1MHz (0. Degree) and 1 MHz (180 Degree) signals for all ‘one’ to “zero” transitions occuring in the transmitted data streen The phase detector works in the principle of squaring loops. First step in PSK detection is the sine to square wave conversion using a schmitt trigger. This Gnables the PSK detector to be built around digital Ie’s. The Biphase splitter carrier. So a Divide by 2 counter is used to divide the frequency of the PLL output by 2, thus recovering the reference carrier. The delay flip-flop is used to compare the phase of the incoming data and the reference carrior thereby recovering the data. EQUIPMENTS: Experimentor Kits DCL-05 & DCL-06. Patch Chords. Power supply. 20MHz Dual Trace Oscilloscope. NOTE: KEEP THE SWITCH FAULTS IN OFF POSITION, PROCEDURE: 1. Refer to the Llock diagram and carry out the following connections and switch settings, 2, Connect power supply in proper polarity to the kits DCL-05 and DCL-06 and switch it on. 3. Connect CLOCK and DATA generated on DCL-05 to CODING CLOCK IN and DATA INPUT respectively by means of the Patch-chords provided FALCON ~ oad RAMUNICATION LA 36 BCLS: DATA CONDITIONING AND CARRIER MODULATION TRANSMITTER KIT. [DGL-06: DATA RECONDITIONING AND CARRIER DEMODULATION RECEIVE! f the Cartier 4. Connect the NRZ-L data input to the CONTROL INPUT © Modulator logic. UT? of the 5. Connect carrier component SIN 2 to INPUT1 and SIN 3 to INPI Carrier Modulator Logic. i 6. Connect PSK modulated signal MODULATOR OUTPUT on De PSK IN of the PSK DEMODULATOR on DCL-06. 7. Observe various waveforms as mentioned below. 05 to the OBSERVATION: Observe the following waveforms on oscilloscope and plot it on the paper. ON KIT DCL-05 1. Input NRZ-L Data at CONTROL INPUT. 2. Carrier frequency SIN 2 and SIN 3. 3. PSK modulated signal at MODULATOR OUTPUT. ON KIT DCL-06 1. PSK Modulated signal at PSK IN. 2. PSK Demodulated signal at PSK OUT. 3. Observe output of SINE TO SQUEARE CONVERTOR, SQUARING LOOP, DIVIDE BY 2 on test points provided. SWITCH FAULTS: Note: Keep the connections as per the procedure. Now switch corresponding fault switch button in ON condition & observe the different effect on the output. The faults are normally used one at a time. 1. Put switch 4 of SF1 (DCL-06) in Switch Fault section to ON position. This will open capacitor for filtering of SIN 1 signal. Sine wave SIN 1 will be distorted and its amplitude gets reduced, 2. Put switch 2 of SF1 (DCL-06) in Switch Fault sect will disable channel selection signal going ‘output contains only single channel (INPUT 1) data, 3. Put switch 1 of SF1 (DCL-06) in Switch Fault section iti i will remove connection for signal generator fc PLL aca Postion. This for PLL input. PLL input si frequency reduces to half. Output of PSK demodulator. gets distone tion to ON position. This to Modulator IC. Modulator DIGITAL COMMUNICATION LAR o 2), eer eer ey « 3+ BCL-O5: DATA CONDITIONING AND CARRIER MODULATION TRANSMITTER KIT 261-06: DATA RECONDITIONING AND CARRIER DEMODULATION RECEIVER Ri CONCLUSION: Its observed that the successful operation of the PSK detector is fully dependent on {he phase components of the transmitted modulated carrier. If the phase reversal of the modulated carrier alongwith the rising and falling edges of the data are not Proper, then the efficient detection of data from PSK modulated carrier becomes impossibh FALCON i DIGITAL COMMUNICATION LAB. 39 DCL.05: DATA COND} TIONING AND CARRIER MODULATION TRANSMITTER KIT, DCL-06: DATA REC “ONDITIONING AND CARRIER DEMOULATION RECEIVER Kir Torro LOCK 250KHz CONTROL INPUT HRZ.L PSK MODULATOR GUTP' ATU SINE TO SOUARE CONVERTER ‘SQUARING LOOP : > DIVIDE BY 2 BV Ld LI : La SY. PSK DEMODULATOR OUTPUT BV. FV -5us. phd We Sus: FIG 6.2 WAVEFORMS FOR EXP NOG bh 5 v2 Sus fi 10° v Suis q br 5 vi Sus. FALCON DIGITAL COMMUNICATION LAB. « Aydoe ee ee ee Oe a a EXPERIMENT NO:5 TIMEDIVISION MULTIPLEXING AND DEMULTIPLEXING WITH PULSE AMPLITUDE MODULATION AND. DEMODULATION 42 DC1-02: TDM PULSE AMPLITUDE MODULATION / CEMODULATION KIT we aw SUDE CEU Ae dIUEEEHEE HSS HED OS ‘NOLUMS NOUSTHS S1inea HOLIMS DIGITAL COMMUNICATION LAB. povauninwa waauaiAW woums 907m aA wong wougNnd wOUMs 90TH LMS $3 DCL.02; TOM PULSE AMPLITUDE MODULATION / DEMODULATION KIT, NAME: TO STUDY THE USE OF A THRESHOLD LEVEL COMPARATOR AND PHASE LOCKED LOOP CIRCUITRY TO GENERATE THE RECEIVER CLOCK AND CHANNEL IDENTIFICATION INFORMATION. OBJECTIVE: To study Time Division Multiplexing and Demultiplexing, using Pulse Amplitude Modulation and Demodulation and to reconstruct the signals at the Receiver, using Filters. The Receiver derives the Clock and Channel Identification Information from the incoming stream of Time Division Multiplexed Pulses. The first channel of Transmitter is used to send the synchronization pulse. Using the Threshold Level Comparator and Phase-locked Loop Circuitry, the Receiver Clock and Channel Identification Information is obtained. THEORY: The RX CLK and RXSYNC can be recovered from the transmitted data itself, if we transmit a DC level as information in the first channel. The DC level should have an amplitude which is greater than the amplitude of the information signals, that are transmitted in other channels. At the receiver a threshold detector is used to detect the DC level alone. The advantage of this scheme is that it utilizes a single wire communication with a common ground, the disadvantage is that one separate channel had to be allocated for the DC level in this scheme. EQUIPMENTS: Experimentor kit DCL-02. Connecting Chords. Power supply. 20 MHz Dual Trace Oscilloscope. NOTE: KEEP ALL THE SWITCH FAULTS IN OFF POSITION. PROCEDURE: 1. Refer to the Block Diagram (Fig. 3) & Carry out the following connections and switch settings. Connect power supply in proper polarity to the kit DCL-02 & switch it on. Connect DC signal to the first channel of the multiplexer CHO. Connect the 500Hz, 1KHz, and 2KHz sine wave signal to the multiplexer input channel CH1, CH2, CH3. Keep the amplitude of DC signal at maximum using P4 completely clockwise. Keep the amplitude of other signals around 2 Volts not more than that. Connect the multiplexer output TXD of the transmitter section to the demultiplexer input RXD of the receiver section, FALCON _ BON Non DIGITAL COMMUNICATION LAB. AA . DCL02: TDM PULSE AMPLITUDE MODULATION / DEMODULATION KIT. el Seseaaaiceeeannee __ i — e input of the 5. Connect the out put of the Receiver CHO, CH1, CH2, CH3 to the input o| “I a filter section IN 0, IN 1, IN 2, IN 3. z= 1 Set the PLL Input Switch SW1 to L3 position. SYNC 7 10. Connect the SYNC and CLOCK generated by the PLL circuitry to RXS 1% and RXCLK of the receiver respectively. , =) 11. Set the amplitude of the input sine wave lower than the amplitude of the SYNC el) LEVEL. | as 12. Vary the Threshold Level Comparator potentiometer P7, so that ee pe ievel Gy transmitted, is recovered without distortion in the first channel of the receiver. cy 13. Take observations as mentioned below. ¢| 5 OBSERVATIONS: ol 7 si Observe the following waveforms on oscilloscope and plot it on the paper. © 1 7 a. Input Channel CHO, CH1, CH2, CH3. A’ b. Transmitter Clock TX CLK. € Ip ¢. Channel Identification Signal TX SYNC. < d. Multiplexer Output TXD. el e. Demultiplexer Input RXD. > f. SYNC and CLOCK generated by PLL. ci 9. Demultiplexer output CHO, CH1, CH2, CH3. Cp h. Reconstructed signal OUT 0,OUT 1,0UT 2,0UT 3. ell ‘SWITCH FAULTS: el Note: Keep the connections as per the procedure. Now switch corresponding fault ef ‘ switch button in ON condition & observe the different effect on the output. The faults ci are normally used one at a time. « M 1. Put switch 1 of SF4 in Switch Fault section to ON position. This will short © I circuit 250Hz & 500Hz sine waves. We will get mixing of both the signals. 6! 2. Put switch 2 of SF1 in Switch Fault section to ON position. This will change iP duty cycle for PLL recovery through Monoshot. This will mismatch the receiver cil demux pulses. Demultiplexed signals will not show synchronization. ©: 3. Put switch 3 of SF1 in Switch Fault section to ON position. This will change Vu reference voltage level of comparator. Hence output gets distorted. The ey required and proper output can be achieved by setting threshold level. ols 4, Put switch 4 of SF1 in Switch Fault section to ON position. This will short MSB cl. of ladder network used for 500Hz sine wave generation. Shape of this sine il’ wave changes. : - ci! 5. Put switch 5 of SF2 in Switch Fault section to ON position. This will remove ec! TXCHO signal. This will remove all receiver-decoding pulses. Receiver outputs « 4 are disturbed | : — fj 6. Put switch 6 of SF2 in Switch Fault section to ON position. This will remove © "control signal of first channel in demultiplexer section. Output for Channel Zero «il is mixing of all signals. eal or eo) 7 ee | - DIGITAL COMMUNICATION LAB, « FALCON «! | eal c- J Po} 92: TOM PULSE AMPLITUDE MODULATION / OEMODULATION Kt, PI Mu [UL A my. 4 mp a oo Pk Lue = epee ony 4 ful omen FIG.3.2 WAVEFORMS THRESHOLD. 4 DETECTION IN TOM FALCON TAL CoMMURICATION LAD 2990229 H OAV F HH Hnrw~Ernnae TOM HR ANAM annnnn Ak ‘061-02: TOM PULSE AMPLITUDE MODULATION / DEMODULATION KIT. " i ve 7. Pat switch 7 of SF2 in Switch Fault section to ON position. This wil remove reset pulse for counter used to synchronize channel sequence. get mixed. : oo 8. Putswich 8 of br2 in Switch Fault section to ON position eee bypass capacitor from fiter of third channel. Distorted output at chant ; CONCLUSION: The PLL will lock into the frequency of generation of the sync pulses and the PLL along with the associated circuitry will generate the sync and clock signals, which are same in phase and frequency as that of the transmitter TXSYNC, and TXCLOCK signal, hence synchronizing the transmitter to:the receiver. me ge hue FALCON DIGITAL COMMUNICATION LA expt Now Date, SIMULATION OF NON-RETURN TO ZERO CODING TECHNIQUES Aim: To generate NRZ- line codes using MATLAB, Apparatus Required: PC with MATLAB - Theory: Non-Return to Zero: ‘Non-Return to Zero signal are the earliest formats that can be generated. The signals do not return to zer0 with the elock. The frequency component associated with these signals are half that of Clock frequency, non-retur to zero format is commonly used in slow speed communication interface for both synchronous and asynchronous transmission.Using NRZ, logic 1 bit is sent as high value and logic 6 bit is sent as iow value. Non-Return to Zero-Level (NRZ-L): “This is the most extensively used on waveforms in digital logics. The data format is very simple where all ‘Ones’ are represented by “High” and all ‘Zeros’ by ‘Low’. The data format is directly available atthe output of all digital data generation logics and hence very easy to generate Here all the transitions are takes place at the rising ‘edge of the clock. Non-Return to Zero-Mark ( NRZ-M): “These waveforms are extensively used in magnetic tape recording, In this data format, all Sones? are marked by change in level and all ‘Zeros’ by no transitions and the transitions takes place at the rising edge of the clock. Non-Return to Zero-Space ( NRZ-S): “This type of waveform is marked by change in levels for “Zeros’ and no transitions for ‘Ones and the transitions takes place atthe rising edge of the clock. This format is used in magnetic recording. Algorithm: i, Start. 2. Generate the binary sequence 3. Generate fora loop that increments based on the function value up to the length ofthe binary Sequence from and assigns values to the output sequence by comparing the output xIC; ebe iit; GPx: end end figure(1); subplot(S13); plot(,y:LineWidth3), axi([0 length(xl) 2 2)); title NRZ-LEVEL wave form), xlabel(t ); vylabel( Amplitude’); % NRZ_MARK “Binary Input sequence n=[1.01011001 0) M(10; for M(kt D=xorM(W).a(8)); end % Binary to polar conversion for m= I:length(M) if M¢m)—=0 saniem)i; else nn(m)=1; tart end % NRZ pulse shaping, 1=0:.01:length(M); figure( 1); Ds Helo ND ZAMS DE swan nen label(time’ siabel( Amplitude, % NRZ_SPACE “Binary Input sequence n=[10101 1001 OF Mayo: for k= 1length(n) Mik 1m 8); en % Binary to polar conversion for m= |I:length(M) if M(m)==0 an(m)=-1; else san(im)=1;, end end NRZ, pulse shaping £=0:01:length(M); for -lshength() itG< y@=nntid; end figure(!); subplow(519); plot(t,y,'Line Width',3); axis({IJength(M) 2 2), title("NRZ-SPACE waveform’); xlabel(‘time’ ylabel( Amplitude’); ‘Ouiput: ATTA TAT sc 1 7 rot = 3 1 a \ es me m 4 9 wen a _ iG es a a " Thus we obtained output for line coding teclniques successfully 42 | > EXPERIMENT NO:7 QUADRATURE PHASE SHIFT KEYING MODULATION AND DEMODULATION PPeveesveuewruvuv VIVE dEd UCC Cceeey AN@INHDAL NOLVINGOW ONIAIY LIIHS 3SWHd aunlvaavne: § + YOd WWEOVIG NDOT LP ‘Old 5 wacooaa NIGOW z tno viva viva Nita uae | MOMnTOWAG 8 Nuer "Te, g | | i. | Ano aow e ' NIViva 1-2aN Nivive vivas aay, Eg ° [NOISYIANOD) womaNIS &2 } sisia vive | es 7 ND01TO | \ 32 a Noo SOINs 38 8 es : 85. qa conan ween 8 7 YOlWeaINID | 23 j WARD SOS ‘SLIM HOLIMS gal a stata] 8 3 v a0 2 4 ADCL-02: aPSKiDQPSK MODULATION KIT AND NAME: | QUADRATURE PHASE SHIFT KEYING MODULATION TECHNIQUES. | OBJECTIVE: | | Study of Carrier Modulation Techniques by Quadrature Phase Shift Keying | method. ' THEORY: In this modulation, called Quadrature PSK (QPSK) or 4 PSK the sine carrier takes , 4 phase values, separated of 90 deg, and determined by the combinations of bit Pair (Dibit) of the binary data signal. The data are coded into Dibit by a circuit , generating: A data signal | (in phase) consisting in voltage levels corresponding to the , value of the first bit of the considered pair, for dirration equal to 2 bit intervals. A data signal Q (in quadrature) consisting in voltage levels corresponding to the value of the second bit of the pair, for duration equal to 2 bit intervals. The block diagram of the modulator used on the module is shown in the fig.4.1 four S00KHz sine carriers, shifted between them of 90 deg, are applied to 7 modulator. The data (signal | & Q) reach the modulator from the Dibit generator. : ‘The instantaneous value of | and Q data bit generates a symbol. Since | and Q can take either 0 or 1 value, maximum 4 possible symbols can be generated (00, ) 01, 10, and 11). According to the symbol generated one of the four-sine carrier will be selected. The relation between the symbol generated and sine carrier is shown , in table. ASR Qa. DIBSL PHASE : Oe SHIFT, 90.+ vA \ [ | Eee O eens | , \y [10 : (14 | 0 deg , A receiver for the QPSK signal is shown in fig. synchronous detection is required and hence it is necessary to locally regenerate the carriers. The scheme for cartier > regeneration is similar to that employed in BPSK. In that earlier case we squared the incoming the signal, extracted the waveform at twice the carrier frequency by filtering, and recovered the carrier by frequency dividing by two. In the present : case, it is required that the incoming signal be raised to the fourth power after which filtering recovers a waveforms at four times the carrier, : The incoming signal also applied to the sarnpler followed by an adder and envelope detectors. Two adders add the sampled QPSK signal, sampled by the . FALCON "ADVANCE DIGITAL COMMUNICATION LAB, ‘ADCL-03: QPSK/DPSK DEMODULATION KIT

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