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BK2022 1edc
BK2022 1edc
BK2022 1edc
Le Trong Nhan
Contents
The PSpice for TI design and simulation environment allows you to simulate complex
mixed-signal designs with its built-in library. Create complete end equipment designs
and prototype your solutions before you commit to layout and fabrication, reducing time
to market and development cost.
Within the PSpice for TI design and simulation tool, you can search for TI devices, explore
the portfolio, open test benches and simulate your design to further analyze the selected
device. You can also run co-simulation of multiple TI devices to better represent your sys-
tem.
In addition to a full library of preloaded models, you can easily access the latest technical
collateral for TI devices within the PSPICE-FOR-TI tool. After you have verified that you
have the correct device for your application, you can access the TI store to purchase the
product. Using PSpice for TI, you have access to tools to address your simulation needs
as you progress through the design cycle, from circuit exploration to design development
and verification. Available at no cost, it is easy to get started.
A primary purpose of this lab is for you to become familiar with the use of PSpice and to
learn to use it to assist you in the analysis of circuits (e.g. double check the results with
your exercise). The software is required to install in your computer. Moreover, it is your
responsibility to learn its use in a more detailed way since you will be using it along the
course of this semester and in the future. The targets in the first manual are summarized
as follows:
Basically, you need to login before requesting a setup file. Please follow the manuals from
the website to accomplish this process. An email with an access key will be sent to your
account to activate the PSpice software.
In the second dialog, please select Create a blank project. An empty project is created
and the next UI is displayed as follow.
4 Design a circuit
Step 1: Double click on the Resistor in the device list and then move the mouse to the
schematic design page. This device is in the Favourite library in default. While moving,
press R to rotate the device before placing it (by left-mouse click), as follow:
Step 2: Double click on the value of the resistor, which is 1k in default, in order to change
its resistance.
If the resistance is Ohm, no unit is required in the Value field. Repeat the first 2 steps to
finalize all resistors in the circuit.
Step 3: In order to place a voltage supple, find the component named VDC (DC Voltage
Source) in the favourite list, or filter it on the search area. Double click on the voltage
supply and change to a desired value. The result after this step is expected as figure bellow.
Step 4: Wire all components by selecting the Wire command on the right panel (hot key
is W).
By clicking a start point and an end point, a wire is placed. In order to delete, select the
wire and press Delete. The picture of the circuit after this step is depicted as follow.
Step 5: Place a Ground symbol. This step is very important to analyze the voltage in a
circuit as a reference voltage (0V) is required. The ground symbol is available on the right
panel of the software.
Wiring the ground to a point in the circuit, the final result should be like the figure bellow.
When the simulation setting dialog is appeared, please select the Bias Point for analysis
type.
In PSpice, the bias point analysis calculates the node voltages and currents through the
devices in the circuit. Bias point analysis also takes into account any voltage sources ap-
plied to the circuit and any initial conditions set on devices or nodes in the circuit.
Finally, click on menu PSpice to select Run, or press F11 to start the simulation. The
simulation results are displayed directly on the circuit as follow:
6.1 Exercise 1
Given the following circuit. Calculate the value of the voltage v 0 and the current i . Then,
simulate the circuit to check it out.
Figure 1.17: Find the voltage and the current in the given circuit using KVL
6.1.1 Calculation
Notes:
Explanations, formulas, and equations are expected rather than only results.
According to the: . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
According to the: . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
v0 = . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
i = ...........................................................................................
Tips:
To get the Voltage Controlled Voltage Source (VCVS) from the PSpice, under the Place
menu, find PSpice Component > Source > Controlled Sources > VCVS.
A circuit used for the simulation in this exercise maybe like this:
Figure 1.19: Find the equivalent resistance value between terminals A and F
Insert the rearranged circuit here. Don’t forget the resistance values and the nodes’ names.
Convention:
The equivalent resistance between the two terminals A and B of a circuit segment contain-
ing only R1, R2, R3, and R4 may be named R AB _1234 .
Notes:
Explanations, formulas, and equations are expected rather than only results.
RC D_3456 = . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
RB E = . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
R AF = . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
I AB = . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
6.2.3 Simulation
Figure 1.20: Find the whole-circuit equivalent resistance and the voltages at A, B, C, D,
and E
Insert the rearranged circuit here. Don’t forget the resistance values and the nodes’ names.
Notes:
Explanations, formulas, and equations are expected rather than only results.
R AF = . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
VA = . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
VB = . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
VC = . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
VD = . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
VE = . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
6.3.3 Simulation
6.4.1 Calculation
Notes:
Explanations, formulas, and equations are expected rather than only results.
I2 = . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
I3 = . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Va =. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Vb =. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
6.4.2 Simulation
Figure 1.22: Select resistor R from the standard resistors list and do the following require-
ment
Notes:
Explanations, formulas, and equations are expected rather than only results.
R = ....................................................................................
b. Use Table 2.1 in the lecture slide to select a standard 10% tolerance resistor for R. R
in the circuit may be a single resistor or a combination of many resistors as long as
these resistors are meet the standard values and are available in the market.
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c. Using the resistor selected in (b), determine the voltage across the 3.9k resistor.
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d. Calculate the percent error in the voltage V1, if the standard resistor selected in (b)
is used.
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PR = . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
6.5.1 Simulation
Figure 1.23: Transform the circuit, then find the equivalent resistance R ab and the current
i through the circuit.
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6.6.2 Calculation
Notes:
Explanations, formulas, and equations are expected rather than only results.
R ab = . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
i = ...........................................................................................
6.6.3 Simulation
Figure 1.24: Transform the circuit, then find the equivalent resistance and the current I S
through the circuit.
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6.7.2 Calculation
Notes:
Explanations, formulas, and equations are expected rather than only results.
R equi v al ent = . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
IS = . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
6.7.3 Simulation
Figure 1.25: Determine the unknown elements and calculate the absorbing power of each
In Figure 1.25:
p 2 = . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −→ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . element
p 3 = . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −→ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . element
p 4 = . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −→ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . element
Figure 1.26: Find the unknown elements and variables, then check them out by simulation
6.9.1 Calculation
Notes:
Explanations, formulas, and equations are expected rather than only results.
According to the: . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
We have:
v =...........................................................................................
ix = . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
So, we have:
p 1 = . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −→ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . element.
I AB = . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
I BC = . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
p 2 = . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −→ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . element.
UC D =. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Tips:
To get the Current Controlled Voltage Source (CCVS) from the PSpice, under the Place
menu, find PSpice Component > Source > Controlled Sources > CCVS.
A circuit used for the simulation in this exercise maybe like this:
Answer:
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• DC Sweep analysis calculates the steady-state voltages and currents when sweeping
a source, model parameter, global parameter, or temperature over a range of values.
You can view the results of a DC sweep analysis in either a text output file or in the
graphical display of the Probe window.
• Create Project and design as provided schematic to analyse V-I characteristic with
DC Sweep configuration.
Step 1: Students are proposed to create a new project in PSPICE. Please select on the
option Create a blank project.
Step 2: From the list of Favorites devices, search the component named Dbreak, which
is a popular diode in circuit. Other components such as VDC, Resistor and the Ground,
which are already used in Lab 1, are also added to the project as well. Finally, set the volt-
age supple of V1 to 5Vdc.
Step 3: Create a simulation project by clicking on the menu PSpice, New Simulation
Profile. After the name of the simulation profile is given, following dialog is shown:
• Sweep variable: name of input source to analyze, which is (V1) in this case.
Step 5: Run simulation (F11 or from menu PSpice, select Run). The simulation result for
DC Sweep mode is launched as follows:
However, the screen is empty without any tracking information. In this case, we need to
monitor the current in the circuit having a diode. To do this, from menu Trace, select Add
Trace to open following dialog:
Choose I(D1) which is the current passing through the diode (and also the main current
in the circuit having 2 components in a series). Finally, simulation results are depicted as
follows:
Step 6: In order to make tracking information more readable, right click on the tracking
line and choose Trace Property as follows:
The following dialog is opened, allow you to change the color and also the width of the
tracking line
The whole data for every point of the input voltage can be extract to text file by right click
on the curve and select the option Copy to Clipboard. Finally, the data can be pasted to
text editor, for instance, Notepad IDE.
It is obviously that when the power supply is less than 0.7V, the current is close to zero (in
order of 10−9 at 0.3V). However, when the input voltage is 1V, the current in the circuit is
around 0.37mA. This result can be estimated as (1V-0.7V)/1k, when the practical diode
model is applied. Students are proposed to check the simulation results at other points,
such as V1 = 2V or V1 = 4V.
Step 7: A very important analysis with a diode is the relation between the voltage and the
current across the diode, which is popular known as the V-I characteristic of the diode. To
do this, on the simulation result windows, double click on the X-Axis to open the dialog
as following:
Firstly, clicking on the Add Variables button and select V(D1:1), which is the voltage
across the diode. Secondly, on the data range, select from 0V to 1V in the User Defined
option. Finally, add a trace from menu Trace, and select I(D1) as previous simulation. The
figure bellow is achieved:
This figure confirms that in the forward bias mode, the drop-down voltage of a diode is
around 0.7V, which is the default value in the practical diode model.
Step 8: The bias simulation is also applied in this lab. By clicking on menu PSpice, New
Simulation Profile. Similar to the first lab, after providing the name for the simulation
profile(e.g. bias_point), only the analysis type is changed to Bias Point. Finally, click OK
button to create the second simulation profile.
Currently, there are two simulation profiles in the project, which can be browsed as fol-
lowing. In order to set a profile to active, right click on this profile and select Make Active.
From the simulation results, it is confirmed that the drop-down voltage of a diode is
around 0.7V, which is very closed to the practical diode model.
Finally, the simulation on PSpice is run to double check with theory calculation. Brief ex-
planations concerning the difference between theory and simulations can be provided in
the report.
Notes:
Explanations, formulas, and equations are expected rather than only results.
According to the: . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
We have VD : . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Formula to calculate VR : . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Formula to calculate I : . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Set the simulation profile to bias-point. Moreover, enable both Enable Voltage Bias Dis-
play and Enable Current Bias Display to show the simulation results.
Students are supposed to capture the screen in PSPice and present in this report.
Simulation results (images):
Your image goes here
In this section, the theory calculations and PSpice simulations are summarized in the
table bellow to compare the difference. Students are supposed to fill all information in
the table.
Theory PSpice
VR VD I VR V I
R = 220 Ohm
R= 1.5K Ohm
According to the above Exercise Results, give some comments about observation (be-
tween calculation results and simulation results): . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
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Figure 2.15: Find the voltage and the current in the given circuit
Notes:
Explanations, formulas, and equations are expected rather than only results.
According to the: . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
We have VD1 = . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
VD2 = . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
VD3 = . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Formula to calculate I : . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
I = ...........................................................................................
Set the simulation profile to bias-point. Moreover, enable both Enable Voltage Bias Dis-
play and Enable Current Bias Display to show the simulation results.
Students are supposed to capture the screen in PSPice and present in this report.
Simulation results (images): Your image goes here
3.2.3 Comparison
The circuit in this exercise is a simple solution to design a power supply by leveraging a
voltage drop of a diode. For example, a SIM module used to send SMS messages has a
good voltage supply at 4.3V. In this case, a diode is connected from a 5V supply (which is
a very popular voltage) and then, connected to the module SIM. Not only used to protect
the module to avoid reverse current, a diode is a low-cost solution to generate 4.3V power
supply for the SIM module.
It is assumed that the voltage at anode and cathode of the diode V1 and V2 . It is assumed
that the diode is in forward bias mode.
Students are proposed to construct the equations to determine the current across all the
resistors.
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The bias point profile is used to run the simulation in this exercise. Students are proposed
to capture the screen on PSpice showing the current and the voltage in the circuit.
Students are supposed to summarized the results from both theory calculations and PSpice
simulations and fill in the table bellow.
In this part, it is assumed that the practical diode model is used. Present your equations
to calculate three different currents, including I R1 , I R2 , I D2 and the voltage VR2 .
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The bias point simulation is run in PSpice. Capture your screen with voltage and current
are enabled in the results.
Your image(s) goes here
3.4.3 Comparison
Students are supposed to summarized the results from both theory calculations and PSpice
simulations and fill in the table bellow.
The simplest solution to this problem is simply to add a diode on each voltage source,
as shown in the figure above. In this circuit, a 5V power supply can be used as a backup
battery. Meanwhile, 9V is the main power supply for the system, which is demonstrated
by a load resistor.
However, the main issue with this naive approach is that the voltage drop (forward volt-
age) across the diode might be too high for the system. Thanks to Schottky diode, this
can be mitigated by using extremely low forward voltage one, which can be found on the
market (e.g. Schottky diode having drop-down voltage around 250mV at 1A).
In this part, it is assumed that the practical diode model is used. Present your equations
to calculate the current I D3 , I D4 , I RL and the volatage VRL in three different cases: only 5V,
only 9V and both 5V and 9V for the power supply.
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The bias point simulation is run in PSpice with both power sources are enabled. Capture
your screen with voltage and current are enabled in the results.
Students are supposed to summarized the results from both theory calculations and PSpice
simulations and fill in the table bellow. Both power sources are connected to the circuit.
The last feature of the diodes in this circuit is to protect the reverse current in case both
the power sources are switch on together. This use case is very popular when a micro-
controller platform is programmed and powered by an USB port and also equipped with
an adapter for external power supply.
• AC: The source type (having value 0 or 1), to switch between VAC and VSIN. In VSIN
source, the frequency can be modified.
After setting these parameters are set to the values shown in the figure above, add a voltage
probe to track the output by clicking on the Voltage/Level Marker on the PSpice Toolbar,
as follows:
Step 2: Create a new simulation profile. In order to generate the output signal of the
voltage probe, the analysis type is set to Time Domain (Transient). Moreover, due to the
frequency of the power source is 50Hz, the simulation time is set to 100ms, to depict 10
cycles of the output signal. Finally, the resolution is set to 0.1ms in the Maximum Step
size. The configuration windows for this simulation profile is presented as follows:
Step 3: Run the simulation and observe the results Finally, run the simulation and the
output on the simulation windows should be presented in the figure bellow:
Notes:
Explanations, formulas, and equations are expected rather than only results.
Export your simulation results to Notepad for instance, and find the minimum and the
maximum point of the output voltage, then fill your answer to the section bellow:
The tracking point can also be used directly on the simulation output windows, by the
Toggle Cursor option on the toolbar. A Probe Cursor window is opened to update a track-
ing point.
The following circuit is known as a full-wave bridge diode rectifier. Given that the trans-
former has the ratio N 1/N 2 = 10. Write the voltage difference equation V AB and VC D .
After that, perform a time-domain (transient) analysis to check the equation you’ve writ-
ten.
• Step 2: Browse for the Transformer component under the System Modules category
as shown in the following Figure.
Notes:
Explanations, formulas, and equations are expected rather than only results.
V AB = . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
VC D = . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Now, create a simulation profile as guided in the Exercise 3.6 and perform your simu-
lation to check it out!
Simulation result: Show both V AB and VC D in a single plot window to illustrate the rela-
tionship between them. Don’t forget to use the cursors to prove that the equation you’ve
written is correct.
In this exercise, a Zener diode is used to design a voltage regular circuit. The schematic in
this exercise is given following:
The Zener component in the circuit can be found in the Favourites list by search the key-
word Zener. The full name of the component used in the circuit above is Zenner_P -
Zener Diode (parameterized). The default Zener voltage of this component is V Z = 5V .
However, this value can be changed in the properties of the component (right click and
select Edit Properties) for other simulations.
• IS = . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
• IZ = . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
• P RS = . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
• PZ = . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Then, perform the calculation for the Zener diode voltage regulator with two different in-
put voltage, including 8V and 12V power supply. Finally, run the simulations in PSpice (in
Bias Point simulation profile) to confirm with the theory calculation.
Figure 2.29: The rectified voltage without any filtering or being regulated
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• Step 3: Replace the 10µF capacitor with a 680µF one and re-run the simulation,
recognize the change in the result and explain.
Simulation result(s): Your image goes here
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• Step 4: Add a zener diode as in Figure 2.31 with the zener vol t ag e properties set to
22 volt then simulate the circuit and comment or explain the result.
Figure 2.31: Rectified voltage regulated with a capacitor and a zener diode
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• Step 5: Change the zener vol t ag e properties of the zener diode to 20 voltage and
then re-run the simulation. Comment and explain any changes in the result.
Simulation result(s): Your image goes here
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Figure 2.32 describes an incomplete Texas Instrument LM2596 - 5.0 Switching Power Sup-
ply circuit. It lacks a Zener diode voltage regulator and an inductor reducing the voltage
variation. At first, let perform a time-domain (transient) simulation with this incomplete
circuit and figure out the problem with the output voltage (the voltage marker at R1).
Tips:
To place the switching power supply IC LM2596 - 5.0, go to Place > PSpice Component...
> Search... then search for LM2596_5P0_TRANS.
But before you can perform a transient simulation and analysis with this circuit, we will
need to pay attention to some minor settings on the simulation profile.
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Next, add an inductor 33µH to the circuit as shown in Figure 2.35 then re-run the sim-
ulation and explain any improvements.
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Continue, add a 5V Zener diode to the circuit as shown in Figure 2.36, change the capaci-
tor to 220µF , add a current marker to the Zener diode, re-run the simulation and explain
the role of the Zener diode in the circuit.
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If two individual signal diodes are joined together back-to-back, this will form a two PN-
junctions connected together in series which would share a common Positive, (P) or Neg-
ative, (N) terminal. The fusion of these two diodes produces a three layer, two junction,
three terminal device forming the basis of a Bipolar Junction Transistor (BJT), which is
shown in the figure above.
Considering the symbol of the transistor in the schematic, the direction of the arrow al-
ways points from the positive P-type region to the negative N-type region for both tran-
sistor types, exactly the same as for the standard diode symbol.
The transistor is ability to change between these two states enables it to have two ba-
sic functions: “switching” (digital electronics) or “amplification” (analogue electronics).
Then bipolar transistors have the ability to operate within three different regions:
For a bias point simulation profile, the following results are expected:
It is assumed that VB E = 0.7V , the simulation results in PSPice are explained as follows:
• Finally, in order to confirm the assumption above, VC E = VCC − IC ∗R2 = 10V - 43mA
* 100Ohm = 5.7V
Since VC E > VC E (Sat ) , the transistor is working in the linear mode, to confirm our assump-
tion. Moreover, the theory calculation is very close to the PSpice simulations.
Since VC E < 0, our assumption is not correct. The transistor stays in saturation mode.
Therefore, IC is determined as follows:
Run the simulation and trace for the current IC according to the value of V1. Capture your
screen and plot it in the report. Please increase the width of the curve.
Your image goes here:
Present your solution to determine R1 and R2. Perform the simulation in PSpice to con-
firm the results. Capture the screen in PSpice and present in the report.
This exercise has a 5V logic output (the Vt er in Figure 3.6) that can source up to 10m A
of current without a severe voltage drop and stand a maximum current of 20m A. If the
logic terminal sources a current larger than 20m A, it would be damaged. Or, if it sources
a current larger than 10m A, the Vt er voltage will drop to less than 4V . We should avoid
this drop in many cases. However, this logic terminal has to be used to drive an electrical
component with an equivalent internal resistance of 5 ohms (the LOAD in Figure 3.6)
and requires a current of at least 300m A and not exceeding 500m A to function normally.
Given that we have an NPN transistor with the current gain β equals 100, the maximum
IC current is 400m A, and the barrier potential at the BE junction is VB E = 0.7V , select a
resistor available in the market to replace the resistor R B revealed in Figure 3.6. to make
the circuit function well. After that, perform a simulation to double-check your selection.
Notes:
Explanations, formulas, and equations are expected rather than only results.
R B (max) = . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
R B (mi n) = . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
So:
R B selected: . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.4.3 Compare
Theory PSpice
RB VB E I B I C VB E I B I C
R B (mi n)
R B (max)
R B (sel ec t ed )
The circuit given in Figure 3.7 is known as a simple kind of NPN bias configuration. First,
students simulate the circuit with two values of RC, respectively 10 Ohms and 1k Ohms.
Then, give your statement on the change of the current I E and explain the phenomena.
3.5.1 Simulation
Conduct some theoretical calculation to explain for the phenomena you have observed
from the simulation.
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Notes:
Explanations, formulas, and equations are expected rather than only results.
VE B = . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
IB = . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
IC = . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
IE = . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.6.3 Comparison
Give the circuit in Figure 3.9. Calculate the Voltage at all nodes and the current in all
branches. Assume the current gain of both transistors is the same at β = 100. Then per-
form a simulation and compare the result with the theoretical calculation.
Notes:
Explanations, formulas, and equations are expected rather than only results.
IC = . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
I EG = . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
VE = . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
VB = . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.7.2 Simulation
Notes:
Explanations, formulas, and equations are expected rather than only results.
⇐⇒ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . (1)
IC = . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
IE = . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
VE = . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
VC = . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.8.2 Simulation
Notes:
Explanations, formulas, and equations are expected rather than only results.
IB E = . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
I AC = . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
I AL = . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
I AL
IB E
= .........................................................................................
Notes:
Explanations, formulas, and equations are expected rather than only results.
IE = . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
IB = . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
V CE = . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.10.2 Simulation
Notes:
Explanations, formulas, and equations are expected rather than only results.
IC T RL = . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
IC 1 = . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
I B1 = I B2 = . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
IL = . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.11.2 Simulation
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Now, replace the resistor R 1 with a 100-Ohms one. Next, calculate all the values again.
Then, finally, simulate the new circuit and explain the phenomena you’ve observed.
IC T RL = . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
IC 1 = . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
I B1 = I B2 = . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
IL = . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
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Explain:
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Tips:
To get the Voltage Pulse Source component in the PSpice for TI, go to Place -> Pspice
Compoment... -> Source -> Voltage Sources -> Pulse.
But, wait! How large is the maximum current this NOT gate can source? Of course, it
cannot exceed 5V/10kOhm. How tiny it is! So, what if we want to use it to drive an LED?
Just put an additional 220 Ohm resistor in parallel with the existing 10k one. And in this
case, the 10k resistor is quite useless. Therefore, in many cases, people let the collector
pin of the transistor open. This design is called open-collector output, as shown in Figure
3.15.
But, with this design, the input of another IC can’t read the voltage of this output. Because
without a pull-up resistor, the voltage VC is floating. To read this voltage, the users have to
pull it up using a resistor. There advantage here is to let the users choose the value of the
pull-up resistor as their desire.
By the side, the open-collector design manner gives an exciting way of the use of these
outputs, as shown in Figure 3.17. The open-collector wired output is at the LOW level if
one of the elements is LOW and is HIGH only when all the elements output HIGH.
3.13 Opto
The element OK 1 in Figure 3.18 is an optocoupler, which includes a light-emitting diode
(LED) and a photodiode. The photodiode’s conductivity depends on the intensity of the
light emitted by the LED, and of course, depends on the current intensity through the
LED. When the voltage across the LED is lower than its barrier potential, the Opto is cut-
off. When there is current through the LED, the Opto is in the transfer mode. Like the
current gain β of a BJT, the Opto also has the current transfer ratio (CTR). Assume the LED
has its own barrier potential VF = 1.7V, and the Opto has the CTR = 2. Calculate the voltage
VOU T when the switch is closed. Finally, give your idea about what we may use an Opto
for, and how to use it?
I F = I R1 = . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
I R2 = . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
VOU T = . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
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In this lab, two different voltage regular circuits are designed in Altium, based on IC 7805
and LM2596. The manuals are provided by videos.
The 7805 voltage regulator is a three-terminal voltage regulator IC. In various applica-
tions, a 7805 voltage regulator with a fixed output voltage is used. The availability of this
is through various packages like SOT-223, TO-263, TO-220, and TO-3. Among this, TO-220
is the most used one. The pin diagram of 7805 voltage regulator IC and its description are
explained bellow:
• Pin1 - Input: This is an input pin and the voltage range should be between 7V to
35V. an unregulated voltage is applied to this input pin for regulation. The pin will
receive its maximum efficiency at 7.2V input.
• Pin 2 - Ground: Pin2 is the ground pin, it means the ground is connected to this
pin. Input and output are common to it.
• Pin 3 - Output: Pin3 is the output pin, where the regulated output is taken by this
pin. It is about 5V(4.8V to 5.2V)
The basic circuit of 7805 is very simple. It just needs two capacitors if the input is unregu-
lated DC voltage, even the two capacitors used are also not mandatory. This 7805 circuit is
capable of upholding fixed output voltage even if some changes take place in input volt-
age.
https://www.youtube.com/watch?v=mSEBrma5MNM
Some hot keys are normally used in the schematic is the space bar, X( horizontal mirror),
Y (vertial mirror) and Ctrl + W (place a wire).
LM2596 comes with a remarkable load and line regulation. It is available in both versions:
fixed output voltage version with 3.3V, 5V, 12V, and customized output version where you
can choose the output as per your requirement. This regulator is incorporated with a
fixed-frequency oscillator and an internal frequency compensation method.
The typical connection for LM2596 is proposed by Texas Instrument (TI), as following:
This circuit is simulated in PSpice in previous lab, and is implemented in Altium Design
in this lab. The introduction of this circuit is presented in the video bellow:
https://www.youtube.com/watch?v=57Ra92p3C0k
Some hot keys are normally used in the schematic is the space bar, X( horizontal mirror),
Y (vertial mirror) and Ctrl + W (place a wire).
https://www.youtube.com/watch?v=DGiHsGWPyYw
https://www.youtube.com/watch?v=WXszMiTSGPo
One key to the usefulness of these little circuits is in the engineering principle of feedback,
particularly negative feedback, which constitutes the foundation of almost all automatic
control processes. The principles presented in this section, extend well beyond the im-
mediate scope of electronics. It is well worth the electronics student’s time to learn these
principles and learn them well.
The new component, named also OPAMP (Operational Amplifier) is easily found in the
favorite list of the PSPICE.
In order to explain the 4V at the ouput, it is obviously that V (+) = V (−) = 2V in a closed
loop configuration. Therefore, from a resistor bridge at the output, VOU T = 4V .
As the output voltage is negative, which is inverted to the input, the name of this circuit
is the invert connection. Students are proposed to perform calculations to confirm the
output, which is −2V .
A voltage follower has low output impedance and extremely high input impedance, and
this makes it a simple and effective solution to problematic impedance relationships. If
a high-output-impedance sub-circuit must transfer a signal to a low-input-impedance
sub-circuit, a voltage follower placed between these two sub-circuits will ensure that the
full voltage is delivered to the load.
Your calculations are presented here to prove VOU T = V (+) with any value of R15.
The voltage at the positive pin of the Opamp is copied to VOU T . In this schematic, R16 is
used to simulate a load device, which can be a motor or an high power LED. However, in
this case, there is a high current can pass the load.
Students are proposed to run the simulation with bias configuration, capture the results
and place them in the report.
The simulation results in PSPICE (bias configuration) are presented here. Moreover, a
short explanations are required in this report to explain the gain of the output follower
voltage.
Students are proposed to design the schematic and place the results in this report.
Similar to the closed loop configuration, there also 2 types of low pass filter, including the
inverting and non-inverting low pass filter. The figure bellow is an inverting low pass filter.
The cut-off frequency is determined by this equation:
1
fH =
2πR 2C
By applying the value of R2 = 10K Ohm and C = 1nF , the cut-off frequency is around
16K H z. In order to see the results, students are proposed to run the AC Sweep simula-
tion profile (Linear Type, Start and Stop frequency are 1Hz and 50kHz, 200 points), as
follows:
The second type of a low pass filter, the non-inverting configuration, is presented as fol-
lows:
Students are proposed to calculate the value of R and C to have the amplifier factor
equal to 10 and the cut-off frequency is the same as the previous example. The simula-
tion result with AC Sweep mode is required to plot in this report as well.
https://www.allaboutcircuits.com/video-tutorials/op-amps-low-pass-and-high-pass-active-filters/
Students are proposed to implement a high pass filter in PSPICE and explain the behaviors
of your high pass filter.
The circuit is named inverting since the output voltage always has an opposite sign to the
input voltage when it is out of the hysteresis cycle (when the input voltage is above the
high threshold or below the low threshold). However, if the input voltage is within the
hysteresis cycle (between the high and low thresholds), the circuit can be inverting as well
as non-inverting. The output voltage is undefined and it depends on the last state so the
circuit behaves like an elementary latch.
The OPAMP device is modified in the Properties windows (right click on the component
and chose Edit Properties or double click on the component), in order to set the VPOS
and VNEG to +5V and -5V, as follows:
The simulation profile in this exercise is the Time Domain, and is configured as follows:
Finally, the simulation results can be archived as follows:
Students are proposed to explain the signal at the output of the opamp. Why the signal
is toggled at +4V and -4V.
https://www.youtube.com/watch?v=ftiX8peTsiw
Students are proposed to design the schematic and place the results in this report.
https://www.youtube.com/watch?v=btpAoh3nmBU
https://www.youtube.com/watch?v=VcO_F97ydFM
Students are proposed to design the schematic and place the results in this report.
https://www.youtube.com/watch?v=Dbqcb0zQ0E8
The Field Effect Transistor, or simply FET however, uses the voltage that is applied to their
input terminal, called the Gate to control the current flowing through them resulting in
the output current being proportional to the input voltage. As their operation relies on an
electric field (hence the name field effect) generated by the input Gate voltage, this then
makes the Field Effect Transistor a VOLTAGE operated device.
The Field Effect Transistor has one major advantage over its standard bipolar transistor
cousins, in that their input impedance, (Rin) is very high, (thousands of Ohms), while the
BJT is comparatively low. This very high input impedance makes them very sensitive to
input voltage signals, but the price of this high sensitivity also means that they can be
easily damaged by static electricity.
Before analysing the circuit using JFET, students are proposed to characterize the I-V
curve of a JFET in PSPICE (named JbreakN in the Favourite list), to determine IDSS and
VP, which are two parameters for a JFET. The circuit bellow is required to implement in
PSPICE:
The simulation results confirm that IDSS = 400mA and VP = -2V for a typical JFET device
in PSPICE.
Firstly, for the primary DC sweep source, which is set to V2, is configured as follows:
Secondly, the secondary DC sweep source, which is set to V3, is configured as follows:
The simulation results are shown as the figure bellow:
This figure also confirm that IDSS = 400mA and VP = -2V (the lowest curve is -1.9V). In
this simulation, the ohmic region and saturation region are indicated better.
2.3 Exercises
2.3.1 Self bias configuration
This is the first configuration for a JFET, when the Gate pin is connected to the Ground. A
typical circuit is presented as follows:
Students are proposed to implement this circuit in PSPICE with the JFET is JbreakN. The
simulation results in PSPICE (bias configuration) are presented here. Moreover, a short
explanations are required in this report to explain the value of ID and VGS.
The most common type of insulated gate FET which is used in many different types of
electronic circuits is called the Metal Oxide Semiconductor Field Effect Transistor or MOS-
FET for short.
The IGFET or MOSFET is a voltage controlled field effect transistor that differs from a JFET
in that it has a “Metal Oxide” Gate electrode which is electrically insulated from the main
semiconductor n-channel or p-channel by a very thin layer of insulating material usually
silicon dioxide, commonly known as glass.
The device for a common DFET is MbreakND. After a dc sweep simulation when V3 varies
from -5V to 0V, the results are shown bellow:
From this simulation results, it is confirmed that IDSS = 160mA and VP = -4V for DFET.
Only the bias configuration is required to executed. Please capture the simulation results
with current and voltage information on the circuit. Finally, explain these values by theory
calculations.
The reverse is true for the p-channel enhancement MOS transistor. When VGS = 0 the de-
vice is “OFF” and the channel is open. The application of a negative (-ve) gate voltage to
the p-type eMOSFET enhances the channels conductivity turning it “ON”. Then for an p-
channel enhancement mode MOSFET: +VGS turns the transistor “OFF”, while -VGS turns
the transistor “ON”.
The validation of an EFET in PSPICE is presented bellow. The typical EFET in PSPICE is
MbreakN device.
A dc sweep simulation with V3 can be performed. The simulation results with V3 varies
from -1V to 5V are presented as following:
The gate input voltage VGS is taken to an appropriate positive voltage level to turn the
device and therefore the lamp load either “ON”, ( VGS = +ve ) or at a zero voltage level that
turns the device “OFF”, ( VGS = 0V ).
If the resistive load of the lamp was to be replaced by an inductive load such as a coil,
solenoid or relay a “flywheel diode” would be required in parallel with the load to protect
the MOSFET from any self generated back-emf.
Students are proposed to simulation this circuit with RIN = 4.7k and RGS = 47k and
VIN is the TTL level (0V and 5V). The power supply for VDD can be set to 12V or 24V.
Shortly explain the current passing through the load (a resistance 100Ohm replaced
for the Lamp in the circuit).
For added security an additional silicon or zener diode D1 can also be placed across
the channel of a MOSFET switch when using inductive loads, such as motors, relays,
solenoids, etc, for suppressing over voltage switching transients and noise giving extra
protection to the MOSFET switch if required. Resistor RGS is used as a pull-down resistor
to help pull the TTL output voltage down to 0V when the MOSFET is switched “OFF”.
This exercise is optional in this lab.
When the input is HIGH, the P-channel device switches-OFF and the N-channel device
switches-ON as its gate-source junction is positively biased. The motor now rotates in
the opposite direction because the motors terminal voltage has been reversed as it is now
supplied by the negative -VDD supply rail.
5 Altium Designer
Students are proposed to implement the circuit in Altium Designer. The manual can
be found in the same playlist with other manual videos. Please capture the screen to
present the schematic as well as the layout of your PCB.
The schematic of this circuit is proposed as follows, which is based on a voltage follower
circuit:
Students are proposed to implement the circuit in Altium Designer. The manual can
be found in the same playlist with other manual videos. Please capture the screen to
present the schematic as well as the layout of your PCB.
2 Equivalent Resistance 2
Simulate this circuit in PSPICE, with the voltage supply between A and B is 24V and all
resistances in the circuit are 1k (R=1K).
3 Current calculation
Simulate this circuit in PSPICE, and find all the currents in the circuit. Hint: Delta-wye
transform can be used to simplify the circuit.
5 Diode exercise 2
Simulate this circuit in PSPICE to determine the current passing through the diode.
6 Zener Diode
In the circuit shown bellow,the voltage across the load is to be maintained at 12 V. Simulate
this circuit with two different values of R L , including 1k and 10k
From the simulation, it can be estimated that when V1 =??, the transistor is in satura-
tion mode.
Final Project
1 Objectives
In this project, you are required to use the Altium Designer to design and layout a circuit
that synthesize many knowledge that you have learnt in this course. There is something
new, but no worries, we support you.
The project will include
• how to use an opamp as a buffer and a low-pass filter before reading an ADC signal,
and
2 Specifications
In this project, you aim to design a circuit that is able
3 Solution
To fulfill the requirements above, one of the solutions that we can think of is that
• We will use a current sensor [1] to measure the current of the AC signal. The sensor
should support to measure up to 5A or up to 10A. There are many current sensors
that are available in the market, we recommend you to use TA12 [2] for 5A maximum
and TA17 for 10A maxumun. They are cheap and easy to use.
• We will use an IC that can convert from UART signals to RS485 signals [3] for trans-
ferring data via RS485.
Now we list all the part that is required for our circuit. Based on the solution above, the
circuit should include
• a RS485 circuit,
4 Guidance
In this section, we give you some guidance to draw a circuit with the solution above.
Figure 8.1 shows a power supply part for this circuit. It generates a 3.3V output for our
circuit from input from 5V-36V to 3.3V. On the left, P2 is a input header which 5-36V input
is coming. The input power supply goes through a LC circuits (L1, L3 and C2) to filtering
the high frequency noises. Then it goes though a diode D3 which is used to prevent the
error from input at P2. Finally, we use IC TPS5430 [5] to generate a voltage 3.3V output.
Figure 8.2 shows the pinout of the board ESP32-WROOM-32. It has on board 18 Analog
to digital conversions (ADCs). Each ADC is 12 bit SAR technology based. 2 digital to ana-
log conversion (DACs). It integrates 9 touch sensors. For communication, it has 2 UART
communications channels, 2 I2C communications interfaces, two I2S channels and one
CAN communication interface. It has 16 pulse width modulation channels. It also has
a cryptographic hardware acceleration module for various cryptographic algorithms like
RSA, AES.
To fulfill the solution above, we will use 2 pins for ADC inputs, 2 pins for LEDs, 4 pins for
switches and 3 pins for RS485 as shown in Figure 8.3.
We use a SW DIP-4 for 4 switches which each switch has two terminals. One terminal
connects with ground and the other connects with a resistor to 3.3V power supply and
connects to the MCU pins. For resistors you can use 4 single resistors or you can use a
RAID including 4 resistors inside.
For RS-485 part, we use an IC MAX485 to convert UART signal to 485 signal and vice versa.
We also use a RJ45x2 to connect RS-485 signals. Last thing we need to consider for this part
is that RJ45x2 is also supply 5V input, so we use D1 to prevent the current go through the
RS485_5V pins.