==? CYPRESS PERFORM Features + Wide voltage range: 2.70V-3.30V + Access time: 55 ns, 60 ns and 70 ns + Ultra-low active power — Typical active current: 1mA @t=1 MHz — Typical active current: 8 mA @ f= fmax (70-ns speed) + Ultra low standby power + Automatic power-down when deselected + CMOS for optimum speedipower + Offered in a 48-ball BGA package Functional Description") ‘The CYK256K 16MCCE is a high-performance CMOS Pseudo static RAM organized as 256K words by 16 bits that supports ‘an asynchronaus memory interface. This device features advanced circuit design to provide ultra-low active current. This is ideal for providing More Battery Life™ (MoBL®) in portable applications such as callular telephones. The device CYK256K16MCCB MoBL3™ 4-Mbit (256K x 16) Pseudo Static RAM can be put into standby mode when desolacted (GE HIGH or both BHE and BLE are HIGH). The inpuvoutput pins (WO, through iO ys) are placed in a high.impadance stata when: selected (CE HIGH), outputs are cisablod (OE HIGH), both ‘Bulg High Enable and Byte Low Enable are disabled (BHE, BLE HIGH), or ding @ wre operation (CE LOW and WE ). iting to the device is accomplished by taking Chip Enable (CE LOW) and Write Enable (WE) input LOW. if Byte Low Enable (BLE) is LOW, then data from VO pins (Op through 1107) is written into the location specified on the address pins {Ac through A). I Byte High Enabie (BHE is LOW, then data from UO pins (VOs through VO;e) is written into the location specified on the address pins (Ay through rz) Reading_ftom the device is accomplished by taking Chip Enable (CE LOW) and Output Enable (OF) LOW while faring the Write Enable (WE) HIGH. If Bylo Low Enablo (LE) is LOW, then data from the memory location specified by the adores pins will appear on 0p % VO. If Byte High Enable (BHE) is LOWY, than data from momory will appear on 1103 to Ojg. Referto the truth tabie fora complete description ofread and write modes. Logic Block Diagram [DATA N DRIVERS-*+—s} roof o aoe a : L Ace & lg ase 8 iE ase] 2saxx1e | |e Ree] G | wy RAM Aray me WOO WOT i Is Bll een ross Aaa Aol Cal ab 7 car aE I We es HRS Power-Di ae earl = _ moa ae Note + "Fer est race ecommencions, lease ee foe GY aepieaton nee System Design Gusines ont a cyrESS com cypress Semiconductor Corporation + Document # 38-0555 Rev. °F 198Champion Court + San Jose, CA 95134-1709 + 408-943-2600 Revised October 18, 2008 [+1 FeedbackCYK256K16MCCB SSP Crpness MoBL3™ Pin Configuration® ° *! VFBGA ‘Top View 23 4 8 @@Q@2OO® |} QOO® | OOO® | SQOO® CQOVOQ SCOOQS® | QOOOS@QO F Wes) | Product Portfolio Power Dissipation Operating Ieeima) Voc Range (V) speeg |_1= 1H T fray | Standby Igga(wA) Product Min.) Typ) | Max) tne)” | Typ) | Max [typ] Max. | Typ.) | Max. crkasexiemces | 270 | 30 | 330 | 85 | 1 | 5 | 4 | 2 | w | 40 2 70 6 | PEt, C2 and ba 8 forthe VFBGA package can te used to upgrade oan Mb, 1-Mt ard 32 deny respec 3 Ne in connect not comet teal othe de 4 DRU Do Net Use) pn have ote le eating or ed To Vs to ensue pope apgtoaton 5 Typical vals are nce for reference ony andar nt guarantees or ted Typical vakes are measured at Voc = Voc Ta 25°C Document #: 38-05585 Rev. *F Page 2 of 10 [+1 Feedback& CYPRESS Maximum Ratings (Above which the useful fa may be impaired, For user guide- lines, not tested.) Storage Temperature ‘Ambient Temperature with Power Applied ‘Supply Voltage to Ground Potential 85°C to + 150°C 55°C to + 125°C -04V 1046 CYK256K16MCCB MoBL3™ AV t03.7V -20mA > 2001V DC Input Vottaget®.7. 81 (Output Current into Outputs (LOW) Slatic Discharge Voltage . (per MiL-STD-883, Method 3078) Latch-up Current. Operating Range Sere 1 Gran Range | Ambient Temperature Vee tage Applied o Outputs raed CE = De wotane Aci coavicary [leds] -25C i a5 | 270Vi0 3307 Electrical Characteristics Over the Operating Range CYK25GKTGNCCB -55, 60,70 Parameter| Description Test Conditions Min, Wel Max. Unit Voc [Supply Votage 27 30 33 Vv Vou [Output HIGH VoTaga| Voc=270V | Veo=04 Vv Vo. [Output Low Voc= 2.707 oa Vv Voltage [Vex_|input HIGH Valiage 08" Vee Voos0N | V Ve input LOW Voliage 04 08 Vv ac input Leakage [GND ViveVoe +f ry Cinent jez Output Leakage [GND < Vayr Vee, Output Disabled ca vA Current Nc Operating ix tine (Veo Ta ior65 | Bior-85 | mA Supply Current Voce 14 for-60 | 22 or-80, loge mA, 8for-70_| 18 for-70 MH [CMOS levels forall speeds|S forall speods|_mA igs; (Avtomatic CE OES Voc-02V Nog = 30 150 250 | WA * PowerDown — |VjyaVor-0.2V. Vins | Curer—CMOS —_[0.2V)f yay (Address Inputs land Data Only, f= 0 (OE, WE, BHE and BLE), Veo = 3.30V gg [Automatic CE |GE > Voc -0.2V Voc 330 7 oy wa PowerDown [Vy Voe ~0.2V or Cunrer—cMios Vy 203, Inputs Voc = 3:30V Thermal Resistance” Parameter Description Test Conaitions BGA | Unit em Thermal Resiatanes (Junction fo Ambient) | Test conditions folow standard teat methods | 65 | “CM crmal Resistance (unaion te Cesay a procedures for measuring thermal z ex Thewal (unstionte Case) limpodence, per EW/JESD51 7 [sow Capacitance!” Parameter Description Test Conditions Max Unit en input Capactance 8 PF Cou [Output Capacitance @ F note Sam 2-050 fr pie uanenslessan 208 Vina = Vee "05x psecrators ne han 20 2 Otetho a neootspeonestors ar erxacerzed andre nt 10% estes 5 Testes nay ana ateray Sean orpccecs anges tat may ater ene parameters Document: 38-05585 Rev. *F Page 3 of 10 [+1 FeedbackCYK256K16MCCB SSP Crpness MoBL3™ AC Test Loads and Waveforms RI y ALL INPUT PULSES eno. 30 eT F2 Rico time =t Vint Fal Time =1 Vins Nee ONS Equivalentto: = THEVENINEQUIVALENT ‘SCOPE Rey OUTPUT o_o Wry, Parameters 30VVee Unit Ri 72000 a RZ 72000 2 Ra 7000 a Vi 150 v ‘Switching Characteristics Over the Operating Rangel!) 55 ns ‘60 ns 70 ns Parameter Description iin, [Max | Min. | Max. | an. | Wax. | Unit Read Cycle tho Read Cycle Time % w 76 1 ta [Address to Data Valid 5 ® 7 ns on Data Hold rom Address Change 5 3 70 ns Tce IDE LOW to Data Vai Ey @ 7a [ns loos [OE LOW to Data Vala 2 2 35 | ns. lize [SE Lowotowzi™ = 5 3 5 18 os [OE HIGH to High 20-7 B % [ne hzce ]CE LOW to Low 201 13) 2 2 5 ns — IGE HIGH to High 20771 25 a 2 ns Tose BLEIBHE LOW to Data Vala 3 Ea 7a | ns lazer IBLEIBHE LOW to Low ZT 5 3 3 7s luzee BLEIBHE HIGH to HIGH Z™* 70 70 Boe tse [Addross Stow 0 3 a0 [ns ‘Wirite cycle two lwite Cycle Tie % % 70 1 Tce IDE LOW to Wie End % % Ea 18 few [Addross Sot Up to Wie End % w % 18 a [Address Hold trom Write End ° 0 0 a8 tsa [Addrass Set-Up to Wo Start o 0 0 15 trae WE Pulse With # 0 # 18 Note “Ea err pmo etm pmo pae agen owe ey alana re “ES aa mere ae ane oe nan oy fen ese net eee neal eh eee ghee {EH Si ef et ti orcas BETSEEEES, sagas macercmerane gute etey bese sana can trinsic awit by gona TIVE. The data input set-up and hold bing shouldbe referenced to the edge ofthe signal hat terminates 13 HihZ and Low parameters are chxacteraed and arena 100% ese 1 Toprive Sone pertammnce he ten acess ated be CE orl In his case las the ica parameter ond i safer when the aareses are adie porto chp enabe garg senve Pore Tons el, the adresses Must te MAG wun 10 sar esa of We oad yee Document #: 38-05585 Rev. *F Page 4 of 10 [+1 FeedbackFo CYK256K16MCCB S7errness MoBL3™ ‘Switching Characteristics Ovor the Operating Range!" (continued) 55 ns 60ns 7Ons Parameter Description Min, [ Max. | Min, [ Max. | Min, | Max. | Unit aw BLEIBHE LOW to Write End 50 50 55 ns so Data Set-Up to Write End 25 25 5 ns ho Data Hold from Wiite End 0 0 0 78 tone WWE LOW to Highzl™ Pa Ey 2 | ns awe WWE HIGH to Low-21" 7) 5 5 5 ns ‘Switching Waveforms Read Cycle 1 (Address Transition Controlled)!" 15.1 teo——__—+| ADDRESS, g Le ‘om 4 DATAOUT __PREVIOUSDATAVALID__ SK CX DATA VALID Read Cycle 2 (GE Controlled) "5 ADDRESS ——— | hoe Fm ‘b8e ——"| L$ 25¢ ——my mE toe} one IMPEDANCE DATA OUT. HICH IMPEDANCE « DATA VALID ae lee surely 0% won CURRENT——7 \se Esch Read pce Document: 38-05585 Rev. *F Page 5 of 10 [+1 FeedbackFo CYK256K16MCCB S7errness MoBL3™ ‘Switching Waveforms (continued) Write Cycle 1 (WWE Controlled)? 19.17.18 191 sooress = ‘sce = We BRE/BLE WE ‘aw OE ho para Write Cycle 2 (CE Controtied)!"?. "2.17. 8 19) aooness e We tw208 POO 17 Data 0 is ighimpedancet OE > Vag 1 frp Enable gone NATIVE wih IE = Vig, te pt remains na igh inp 19 During rs period inthe DATA VO waveform the Ie could be nthe out Ste and input gnats should not be aed Document #: 38-05585 Rev. *F Page 6 of 10 [+] FeedbackFo CYK256K16MCCB S7errness MoBL3™ ‘Switching Waveforms (continued) Write Cycle 3 (WWE Controlled, OE Lowy"® ADDRESS, Soa fewe | fo | i VALID DATA ‘ Ea Fine al DATA/O ~ DONT CA "awe Write Cycle 4 (GHEIBLE Controlled, GE Low)!" ADDRESS We Ne ‘so. to DATAUO ONY GARE < VALID DATA Document #: 38-05585 Rev. *F Page 7 of 10 [+] FeedbackCYK256K16MCCB SSP Crpness MoBL3™ Truth Table cE | WE | OE | BRE | BLE | Inputsiourputs Mode Power H x x x X__[HighZ Deselect/Power-Down ‘Standby (Isa) xp x |X | HR |piehz Deselect Power-Down | Standby (sa) LH | t | t | t [Data out 700— 1075) Read ative (lec] tL] HE | # |t [Data out (ro0— vor, Road ‘ative (oc) [High Z (VOB - W015) cH | tt | # |Highz 00-007), Read ‘aive Voc) [Data Out (1/08 — VO15) t_[ Hf A | t| # |Highz Output Disabled ‘ave (oc) v 4H a H L_|HighZ ‘Output Disabled Aative (loc) t [Hp H | tt [righ Output Disabled ‘ative (oc) u u x u L__ [Data In (vOO-VO15) Write Aative (loc) v v x n TL [Data in (vO VOT), Wnts “Rative (loc) [High Z (VOB - VO18) Tx] Fgh 2 w00 = 1087; Wire Raine (oc) [Data In (vO8 - VO15) Ordering Information ‘Speed Package Operating ins) Ordering Code Diagram Package Type ange 55 | CYK25GK1GMCCBU-S5BVI_| §1-85160 | 4&-ball Fine Pitch BGA (6 mm x émm > 7.0 mm) industial CYK256K16MCBU-SSBVXI -48-ball Fine Pitch BGA (6 mm * 8mm x 1.0 mm) (Pb-Free) 30 [CYK256KT6MCCEU-GOBVI | ST-85750 | 4e-all Fine Pitch BGA (6 mm» Gm 1.0 mm) Tndustal 70 [ CYK256KT6NCCBU-TOBVI_| 51-85150 | 4&-all Fine Piich BGA (6 mm = 6mm 1.0 mm) Tndustal ‘CYK256K16MCBU-TOBVRI -48:ball Fine Pitch BGA (6 mm » émm 1.0 mm) (Pb-Free) Note: DB = Loge HIGH, = Loge LOW X= Dent Cae Document #: 38-05585 Rev. *F Page 8 of 10 [+1 FeedbackCYK256K16MCCB CYPRESS MoBL3™ Package Diagram 48-ball VEBGA (6 x 8 x 1 mm) (51-85150) ce [lesen tT i 2.00) Loo) o00} ooo oO e009, ooo 00) fo @+— ue — om (Gs MoBlL isa registered trademark, and More Battery Life and MoBL3 are trademarks, of Cypress Semiconductor Corporation. All product and company names mentioned in this document may be the trademarks of their respective holders. Document # $8-05585 Rev. F Page 9 of 10 {Gots Sener Comoran 205 Themen cies ron et cagy betes Cyt Sensi Coaaon eno ey Saprcim ohh ray mses ges pn tran em S mp a iar er ao aera Ce Pag oe raweera renee Sidelendel Went Wests ace ce Sa eg eid pt ance ae opeeton ah Css che CIpee Gt MST oss it Spr yuan ppteson pls tbe meus sume ak uo ss ba dompon fetes Ces gens atchages E seats pen a [+1 Feedback=~ CYK256K16MCCB S37 cypress MoBL3™ Document History Page Document Title: CYK256K16MCCB MoBL3™4-Mbit (256K x 16) Pseudo Static RAM Reeament Tame oe Org of nev. | EWNo. [esue bate] Chenge Deception of Change =| 205482 | Sex ECN | REF |New daa shot "A gataTa | See EON ~SYT [hanged bal E¥ en pakago rel Fem NETS DNU “5 [ao See EEN | PCT [onan am retin ra S| BaREET | See EON BO aad ans Spo | SaOFS_| Soe ECN | RF [Red PD Fro pars ot Orang iooraon =] BaTaE= | Soe ECN | ~S¥T | Grargedaderom of Cyprase SericondeaorCoxparaion ox Page Fam "280% Nort Fist Svoet to "198 Champion Court Pao Crono yo rn ate rom CURDS IOMCCB o earn eae eee ane fo asess Updated the revision of package diagram of Spec 51-85150 from *B to “D = REE ee ET] HR Grange Nacapec om VSO VinDC Emel Charscrancr Document #: 38-05585 Rev. *F Page 10 of 10 [+1 Feedback