Wistron LA710 - 17513 PDF

5 4 3 2 1
PCB Number: 17513

PAGE TITLE
Design note:
PAGE TITLE
01 COVER PAGE 76 GPU_function (1/5)_(R)
02 BLOCK DIAGRAM 77 GPU_function (2/5)_(R) 10KR3 10K R 3
03 CPU_(PCIE/DMI) 78 GPU_function (3/5)_(R) value=10K resistor Size=0603
D 04 CPU_(THERMAL/CLOCK/PM/CFG) 79 GPU_function (4/5)_(R) D
05 CPU_(DDR4 CHANNEL A) 80 GPU_function (5/5)_(R)

06 CPU_(DDR4 CHANNEL B) 81 GPU VRAM_1,2 (1/4)_(R) SCD1U10V2 S C D1U 10V 2
07 CPU_(DDI/EDP) 82 GPU VRAM_3,4 (2/4)_(R) type=SMD capacitor value=0.1U Withstang voltage=10V Size=0402
08 CPU_(CPU Power) 83 GPU VRAM_5,6 (3/4)_(R)
09 CPU_(VSS) 84 GPU VRAM_7,8 (4/4)_(R)
10 CPU Power CAP 85 GPU CORE_(R)
11 DDR DIMM_1 86 GPU discrete power_(R) BOM Configuration
12 DDR DIMM_2 87 GPU Switch_(1/2)_(R)
13 DDR DIMM_3 88 GPU Switch_(2/2)_(R) (R_):Unmount (X_):For debug
14 DDR DIMM_4 89 GPU_EE Switch_SEQ_OPTIMUS_(R) (IRMT_):For IRMT control (XDP_):For XDP debug
15 PCH_(SPI/UART/I2C) 90 NFC_(R)
16 PCH_(DMI/PCI-E/USB) 91 TPM/TCM (Nuvoton_):Mount for Nuvoton TPM
17 PCH_(PCI-E/SATA) 92 PS2/Parallel (Infineon_):Mount for Infineon TPM
18 PCH_(CLKOUT/CLKREQ) 93 Express Card_(R)
19 PCH_(USB/ESPI) 94 Smart Card_(R) (ST_):Mount for st TPM
20 PCH_(GPIO/CPU/SMBUS/HDA/JTAG) 95 Translater PS8625
21 PCH_(POWER) 96 MCU_(R)
22 PCH_(Strap) 97 Intel LAN_(R)
23 PCH Power CAP 98 LAN Switch_(R)
24 ESIO_6685D 99 XDP&ITP#
25 SPI&RTC 100 Label_RTC BATT
26 Fan_ 101 GPIO table
27 Audio Codec_(ALC233VB) 102 Power sequence
28 Audio DSP&AMP_(R) 103 Power delivery chart (A710_):For USB Charger / PS2 / (V330_):For Non-USB Charger / Non-PS2 /
C 29 Audio Jack_(function) (1/2) 104 SMBUS table On Board Function Key / Daughter Board Function Key / C
30 Audio Jack_(R) (2/2) 105 Clock MAP

31 LAN_(RTL8111H) 106 RESET Flow Chart Smart Power On / Board ID Non-Smart Power On / Board ID
32 RJ45_ 107 Change History
33 Card Reader_(USB2 Module)
34 USB30 Charger_REAR PORT6
35 USB30_Front Port4
36 USB30_REAR PORT1235
37 USB20_(BIOS RECOVERY)_(R) 0805封裝尺寸/0402封裝尺寸/ Build Net==>
38 USB30_SMART ON_DEBUG 0603封裝尺寸/1206封裝尺寸 (Part Value):'{Value}'!'{Part Number}'
39 IRMT
Power Plane EN Sequence (PCB Footprint) :'{PCB Footprint}'!'{PCB Footprint}'
40 封裝尺寸与功率關系：封裝尺寸与封裝的對應關系
41 Switch power_3D3V_S5 '{Value}'!'{Part Number}' '{PCB Footprint}'!'{PCB Footprint}'
42 Switch power_3D3V_S0/5V_S0 0201 1/20W 0402=1.0mmx0.5mm
43 ATX(Adapter) 0402 1/16W 0603=1.6mmx0.8mm
44 Power meter 0603 1/10W 0805=2.0mmx1.2mm Build BOM==>
45 DSW/5V_S5(RT6576D)/3D3V_S5
0805 1/8W 1206=3.2mmx1.6mm #Reference\tPart_Number\tSymbol\tGeometry\tF7\tFIN\tFIN1
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46 VCORE & V_GT IC(NCP81220)
47 VCORE OUTPUT (NCP302045) 1206 1/4W 1210=3.2mmx2.5mm {Reference}\t{Part Number}\t{Value}\t{PCB Footprint}\t{F7}\t{FIN}\t{FIN1}
48 CPU Core_(R) 1812=4.5mmx3.2mm
49 V_GT OUTPUT(NCP81151) #Reference\tPart_Number\tSymbol\tGeometry\tF7\tFIN\tFIN1{Reference}\t{Part Number}\t{Value}\t{PCB Footprint}\t{F7}\t{FIN}\t{FIN1}
50 VCCSA/VCCIO(NCP5230/RT8237) 2225=5.6mmx6.5mm
51 MEM/MEMVTT (RT8207M) Build VRT==>
52 1D05V_PCH_S5(RT8237C)
53 1D8V_S5(RT8068A)/1D5V(LDO) Item Number\tReference\t<Core Design>\tBOM1\tValue\tDescription
B 54 PWR_12V(NCP1589A) {Item}\t{Reference}\t{Part Number}\t{F7}\t{Value}\t{Description} B
55 LVDS/Converter Connector Size Current Build VRT==>

56 HDMI Out Item Number\tReference\t<Core Design>\tBOM1\tValue\tDescription {Item}\t{Reference}\t{Part Number}\t{F7}\t{Value}\t{Description}
57 DP_out_(R) Short-PAD: Build OLB File==>
58 DP_REDRIVER_(R) 0402=ZZ.00PAD.M11=0.65A 1. 先開啟廠商的DSN檔案，並且將要用的元件複製起來(如果是晶片組
59 Display switch_(R)
60 HDD&ODD_SATA PWR 0603=ZZ.00PAD.M21=0.875A 的話，只要其中一個即可 )。
61 Mini card-WLAN 0805=ZZ.00PAD.M31=1.375A 2. File->New->Design->將元件貼到Schematic的Page1，貼上之後會在
62 M.2 card-SSD
63 Mini card-NGFF_(R) Design Cache裡面出現一個*.OLB或者*.DSN檔案。
64 Converter board 3. New->Library->將Design
65 COM/CAM/Button/MIC
66 HDMI Redriver_(R)
Cache裡面的*.OLB或者*檔案拖移到Library
67 THERMAL SENSOR HEAD_(R) 4. 可以將Library裡面的*.OLB打開看其他的子元件(View->Package)
68 Debug_LPC
TEST CONDITION FOR JUMPER (0W) 5. 將之儲存(Save)即可
69 4K Panel_(R)
70 G Sensor_(R) Item WR12 WR08 WR06 WR04
6. 將*.OLB傳給Symbol team即可建此元件。
71 Thunderbolt_(1/5)_(R) Power Rating At 70°C 1/4W 1/8W 1/10W 1/16W
72 Thunderbolt_(2/5)_(R) Resistance MAX.50mW BD Information:
73 Thunderbolt_(3/5)_(R) Rated Current 2A 1.5A 1A 1A T=1.6 +/-0.1MM 6layers
74
75
Thunderbolt_(4/5)_(R)
Thunderbolt_(5/5)_(R)
Peak Current
Operating Temperature
5A 3.5A
-55~155°C
3A 1.5A L*W=228mmX 194mm
How to option FUSE
FUSE calculate Current:AI(A)
A
FUSE actual Current:A(A) A
EXP calculate:
AI=X+0.8
1) A=AI+(+/-0.1)
2) AI+0.1<=A<=AI+0.4
Find==>Part Reference=(C|R)[2-9] Wistron Incorporated
12F, 88, Hsin Tai W u Rd
Hsichih, Taipei
Title
001_COVER PAGE
Size Document Number Rev
D LA710 1
Date: Monday, April 02, 2018 Sheet 1 of 107
5 4 3 2 1
5 4 3 2 1
PCB STACKUP 6Layer NCP81220

175 * 268 mm ( 4 Phase 65W+2Phase) P:3~10
1.6mm P:46~49 Intel
Channel A
TOP Coffeelake LGA1151 PCB MOUNTING HOLES-PTH
DDR4 SO-DIMM 64 bit
GND/PWR
2667 MHz S-LINE 4+2 65W PCB BOARD SIZE DC-IN 19V
L3-signal
DIMM1
1333/1600/2133/2667MHZ Quad code 175mm X 268mm
P:11
D L4-signal 6 Layer D
H201
2
GND/PWR Channel B
Bottom
DDR4 SO-DIMM 64 bit
4
1
2667 MHz Internal Slot/Header P:43 5 8
9
PCB Color:==> P:13 DIMM2 1333/1600/2133/2667MHZ Front/rear/side IO
For 130W adapter
7
ET phase:Red Chipset/IC
Current meter design
SDV phase:Blue HDMI OUT(DDI1) HOLE315R158-8-C-GP
SIT/SVT phase:Green HDMI CONN H202
2
4
P:56 1
5 8
9
19.5" panel
LVDS
7
P:55
Translator PS8625 2 Lanes EDP HOLE315R158-8-C-GP
DISPA
DMI
P:95 H203
2
4
1
PECI 5 8
9
P:15 SPI Flash ROM
7
C P:16 P:15~23 C
SPI BUS
2D WEBCAM \ BT USB2.0 *2 480Mb/S 16MB HOLE315R158-8-C-GP
P:65 P:25 H204
2
WLAN1 4
1
Card
reader PCIE Gen1 Interface M.2(E KEY) 5 8
480Mb/S P:61 9
(USB2.0) P:33
7
LAN
RJ45 HOLE315R158-8-C-GP
PCIE Gen1 Interface RTL8111G
https://vinafix.com
6KV H205
2
P:32
P:31 4
Intel PCH H 1
5 8
USB3.1 GEN1 x1 Front IO with charger 9
TI TPS2546(Port 6 for BC1.2 1.5A)
and USB3.1 GEN2 x1 Front IO B360 25M
7
P:34 SSD1
HOLE315R158-8-C-GP
H206
2
P:19 PCIE Gen3 Interface M.2(M KEY) 4
1
USB3.1 GEN2 x3 rear IO USB 3.1 GEN2*4 4.8Gb/S P:62 5 8
and USB3.1 GEN1 x1 USB 3.1 GEN1*2 9
(Port 5 for smart power on) P:36
A710 SW(On board)
7
B B
HOLE315R158-8-C-GP
P:17 SW4 Panel_on_off H207

SATA *1
2
SATA3.0 BUS SW3 Brightness_plus
4
ODD P:60
1
5 8
SW2 Brightness_minus 9
P:17 SW1 PWRBTN
7
SATA *1 SATA3.0 BUS P:65
3.5" HDD P:60 HOLE315R158-8-C-GP
MIC-IN side and H208

HP-OUT side(Front IO)
2
Realtek V330 SW(Power key) 4
P:29 High Definition Audio 1
ALC233VB2
P:27 PWR1 PWRBTN
5 8
9
PWR_LED P:65
7
GPIO
SPI
HOLE315R158-8-C-GP
PECI
Speaker
A 2WX2 P:29 TPM / TCM LPC BUS A
P:91
Parallel port
P:92
SIO
Com port P:65 Wistron Incorporated
NCT6685D P:24 SYS 1X4 FAN 12F, 88, Hsin Tai Wu Rd
P:26 Hsichih, Taipei
SPI Flash ROM Title
PS2 SPI BUS

002_BLOCK DIAGRAM
1MB P:24
P:92 C LA710 1
5 4 3 2 1
5 4 3 2 1
170828 Leon:Change CPU1 to 062.10015.0081 for SB

D D
CPU1C 3 OF 12
Lake-S
B8 A5
B7 PEG_RXP_0 PEG_TXP_0 A6
PEG_RXN_0 PEG_TXN_0
C7 B4
C6 PEG_RXP_1 PEG_TXP_1 B5
PEG_RXN_1 PEG_TXN_1
D6 C3
D5 PEG_RXP_2 PEG_TXP_2 C4
PEG_RXN_2 PEG_TXN_2
E5 D2
E4 PEG_RXP_3 PEG_TXP_3 D3
PEG_RXN_3 PEG_TXN_3
F6 E1
F5 PEG_RXP_4 PEG_TXP_4 E2
PEG_RXN_4 PEG_TXN_4
G5 F2
G4 PEG_RXP_5 PEG_TXP_5 F3
PEG_RXN_5 PEG_TXN_5
H6 G1
H5 PEG_RXP_6 PEG_TXP_6 G2
PEG_RXN_6 PEG_TXN_6
J5 H2
J4 PEG_RXP_7 PEG_TXP_7 H3
PEG_RXN_7 PEG_TXN_7
K6 J1
K5 PEG_RXP_8 PEG_TXP_8 J2
PEG_RXN_8 PEG_TXN_8
DMI L5
PEG_RXP_9 PEG_TXP_9
K2
L4 K3
PEG_RXN_9 PEG_TXN_9
[16] DMI_TX_CPU_P0 M6 L1
[16] DMI_TX_CPU_N0 PEG_RXP_10 PEG_TXP_10
C M5 L2 C
[16] DMI_RX_CPU_P0 PEG_RXN_10 PEG_TXN_10
[16] DMI_RX_CPU_N0
N5 M2
N4 PEG_RXP_11 PEG_TXP_11 M3
[16] DMI_TX_CPU_P1 PEG_RXN_11 PEG_TXN_11
[16] DMI_TX_CPU_N1
P6 N1
[16] DMI_RX_CPU_P1 P5 PEG_RXP_12 PEG_TXP_12 N2
[16] DMI_RX_CPU_N1 PEG_RXN_12 PEG_TXN_12
R5 P2
[16] DMI_TX_CPU_P2 R4 PEG_RXP_13 PEG_TXP_13 P3
[16] DMI_TX_CPU_N2 PEG_RXN_13 PEG_TXN_13
[16] DMI_RX_CPU_P2 T6 R2
[16] DMI_RX_CPU_N2 PEG_RXP_14 PEG_TXP_14
T5 R1
PEG_RXN_14 PEG_TXN_14
[16] DMI_TX_CPU_P3 U5 T2
[16] DMI_TX_CPU_N3 +0D95V_VCCIO_S0 PEG_RXP_15 PEG_TXP_15
U4 T3
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[16] DMI_RX_CPU_P3 PEG_RXN_15 PEG_TXN_15
[16] DMI_RX_CPU_N3
PWR_SEQ = 22=Normal Power1 R300 2 PEG_COMP L7
24D9R2F-L-GP PEG_RCOMP
Function = CRB:+VCCIO;Max=5.4A
DMI_RX_CPU_P0 Y3 AC2 DMI_TX_CPU_P0

DMI_RX_CPU_N0 Y4 DMI_RXP_0 DMI_TXP_0 AC1 DMI_TX_CPU_N0
DMI_RXN_0 DMI_TXN_0
DMI_RX_CPU_P1 AA4 AD3 DMI_TX_CPU_P1
DMI_RX_CPU_N1 AA5 DMI_RXP_1 DMI_TXP_1 AD2 DMI_TX_CPU_N1
DMI_RXN_1 DMI_TXN_1
DMI_RX_CPU_P2 AB4 AE2 DMI_TX_CPU_P2
DMI_RX_CPU_N2 AB3 DMI_RXP_2 DMI_TXP_2 AE1 DMI_TX_CPU_N2
DMI_RXN_2 DMI_TXN_2
DMI_RX_CPU_P3 AC4 AF2 DMI_TX_CPU_P3
DMI_RX_CPU_N3 AC5 DMI_RXP_3
DMI_RXN_3
DMI_TXP_3
DMI_TXN_3
AF3 DMI_TX_CPU_N3 CPU MOUNTING HOLE-PTH
HOLE276R158
SKYLAKE-1,SKL-S,LAKE-S H304 H301
B B
(062.10015.0081) HOLE276R158-GP HOLE276R158-GP
1
H302 H303
HOLE276R158-GP HOLE276R158-GP
==>ZZ.00PAD.U61
1
A A
Wistron Incorporated
12F, 88, Hsin Tai Wu Rd
Hsichih, Taipei
Title
Title
003_CPU_(PCIE/DMI)
Size
Size DocumentNumber
Document Number Rev
Rev
C LA710 1
Date:
Date: Monday, April 02, 2018 Sheet
Sheet 3 of 107
5 4 3 2 1
5 4 3 2 1
[18] CPU_MSSC_CLK24M_PCH_P
[18] CPU_MSSC_CLK24M_PCH_N
[18] CPU_BCLK100M_PCH_P +3D3V_S5

[18] CPU_BCLK100M_PCH_N
H_SKTOCC_N R408 1 2 10KR2F-2-GP
[18] CPU_PCIBCLK100M_PCH_P
[18] CPU_PCIBCLK100M_PCH_N 170828 Leon:Change CPU1 to 062.10015.0081 for SB
TP413 +1V_VCCST_S3
[21,99] H_PREQ_N 5 OF 12
CPU1E
H_PROCHOT_CPU_N R421 1 (R_) 2 51R2J-2-GP
[99] TPEV_SKL_PCUSTB_0_DP
1
D CPU_BCLK100M_PCH_P TPEV_SKL_PCUDEBUG_0 D
W5 Lake-S H15 R416 1 (R_) 2 1KR2J-1-GP
[99] TPEV_SKL_PCUSTB_0_DN CPU_BCLK100M_PCH_N W4 BCLKP CFG_0 F15 TPEV_SKL_PCUDEBUG_1 1 2
R418 (R_) 1KR2J-1-GP
BCLKN CFG_1 F16 TPEV_SKL_PCUDEBUG_2 R419 1 (R_) 2 1KR2J-1-GP PCH_THERMTRIP_N R412 1 2 1KR2J-1-GP
[99] TPEV_SKL_PCUSTB_1_DP CPU_PCIBCLK100M_PCH_P W1 CFG_2 H16 TPEV_SKL_PCUDEBUG_3 1 2
R420 (R_) 1KR2J-1-GP
[99] TPEV_SKL_PCUSTB_1_DN CPU_PCIBCLK100M_PCH_N PCI_BCLKP CFG_3 TPEV_SKL_PCUDEBUG_4
W2 F19 R431 1 2 1KR2J-1-GP
PCI_BCLKN CFG_4 H18 TPEV_SKL_PCUDEBUG_5 R429 1 2 1KR2J-1-GP H_TDO R402 2 1 100R2F-L1-GP-U
[21,99] H_PRDY_N CPU_MSSC_CLK24M_PCH_P K9 CFG_5 G21 TPEV_SKL_PCUDEBUG_6 1 2
R430 (R_) 1KR2J-1-GP
CPU_MSSC_CLK24M_PCH_N J9 CLK24P CFG_6 H20 TPEV_SKL_PCUDEBUG_7 R417 1 (R_) 2 1KR2J-1-GP
[99] TPEV_SKL_PCUDEBUG_0 CLK24N CFG_7 G16 TPEV_SKL_PCUDEBUG_8 1 2
R438 (R_) 1KR2J-1-GP
[99] TPEV_SKL_PCUDEBUG_1 H_VIDALERT_N CFG_8 TPEV_SKL_PCUDEBUG_9
E16 R432 1 (R_) 2 1KR2J-1-GP
[99] TPEV_SKL_PCUDEBUG_2 H_VIDSCK CFG_9 TPEV_SKL_PCUDEBUG_10
to VCCCORE&vccgt PWM F17 R435 1 (R_) 2 1KR2J-1-GP
[99] TPEV_SKL_PCUDEBUG_3 H_VIDSOUT CFG_10 H17 TPEV_SKL_PCUDEBUG_11 1 2 +0D95V_VCCIO_S0
R440 (R_) 1KR2J-1-GP
[99] TPEV_SKL_PCUDEBUG_4 CFG_11 TPEV_SKL_PCUDEBUG_12
+1V_VCCST_S3 G20 R437 1 (R_) 2 1KR2J-1-GP
[99] TPEV_SKL_PCUDEBUG_5 CFG_12 F20 TPEV_SKL_PCUDEBUG_13 1 2
R436 (R_) 1KR2J-1-GP =Normal Power
[99] TPEV_SKL_PCUDEBUG_6 CFG_13 TPEV_SKL_PCUDEBUG_14
R459 F21 R439 1 (R_) 2 1KR2J-1-GP Function = CRB:+VCCIO;Max=5.4A
[99] TPEV_SKL_PCUDEBUG_7 CFG_14
R460 1 256R2F-1-GP 1 2220R2J-L2-GP PM_VIDALERT# E39 H19 TPEV_SKL_PCUDEBUG_15 R441 1 (R_) 2 1KR2J-1-GP
[99] TPEV_SKL_PCUDEBUG_8 E38 VIDALERT# CFG_15 TPEV_SKL_PCUDEBUG_9 R414 1 2 1KR2J-1-GP
[99] TPEV_SKL_PCUDEBUG_9 VIDSCK TPEV_SKL_PCUSTB_0_DP
R461 1 2100R2J-2-GP E40 F14
[99] TPEV_SKL_PCUDEBUG_10 H_PROCHOT_N H_PROCHOT_CPU_N C39 VIDSOUT CFG_17 TPEV_SKL_PCUSTB_0_DN (R_)
R451 1 2 E14
[99] TPEV_SKL_PCUDEBUG_11 PROCHOT# CFG_16 TPEV_SKL_PCUSTB_1_DP
499R2F-2-GP F18
[99] TPEV_SKL_PCUDEBUG_12 DDR_VTT_CNTL CFG_19 TPEV_SKL_PCUSTB_1_DN
AC36 G18
[99] TPEV_SKL_PCUDEBUG_13 H_SKTOCC_N AC38 DDR_VTT_CNTL CFG_18 H_VIDSCK_VR 1 2 H_VIDSCK
R401
[99] TPEV_SKL_PCUDEBUG_14 SKTOCC#
1
TP414 D16 TPEV_SKL_MBP_0 0R0402-PAD-2-GP

[99] TPEV_SKL_PCUDEBUG_15 BPM#_0 D17 TPEV_SKL_MBP_1
BPM#_1 G14 TPEV_SKL_MBP_2 1
[99] TPEV_SKL_MBP_0 VCCST_PWRGD VCCST_PWRGD_CPU BPM#_2 TPEV_SKL_MBP_3
R433 1 (R_) 2 6K04R2F-GP U2 H14 1 TP411
[99] TPEV_SKL_MBP_1 VCCST_PWRGD BPM#_3 H_VIDSOUT_VR H_VIDSOUT
R462 1 (R_) 2 2K8R2F-GP TP412 R405 1 2
H_PWRGD F8 0R0402-PAD-2-GP
[20,99] H_TCK PLTRST_CPU_N H_PLTRST_CPU_N PROCPWRGD H_TDO
[20,99] H_TDO R410 1 2 33R2F-3-GP E7 H13
H_PM_SYNC E8 RESET# PROC_TDO G12 H_TDI
[20,99] H_TMS H_PM_DOWN H_PM_DOWN_R PM_SYNC PROC_TDI H_TMS
[20,99] H_TDI R434 1 220R2F-GP D8 F13
H_PECI G7 PM_DOWN PROC_TMS F11 H_TCK H_VIDALERT_N_VR R409 1 2 H_VIDALERT_N
[21,99] H_TRST_N PCH_THERMTRIP_N PCH_THERMTRIP_CPU_N D11 PECI PROC_TCK
[24] EC_PROCHOT_N R452 1 2 0R0402-PAD-2-GP
0R0402-PAD-2-GP THERMTRIP# F12 H_TRST_N
PROC_TRST# B9 H_PREQ_N H_TCK TERMINATION PLACE
TP409 1 SKL_CNL_N AB36 PROC_PREQ# B10 H_PRDY_N 1 NEAR CPU WITHIN 1.1 INCH
PROC_SELECT# PROC_PRDY# TP407 H_TCK R403 1 2 51R2F-2-GP
C TP410 1 H_CATERR_N D13 C
CATERR# M11 CFG_RCOMP
CFG_RCOMP
1
H_TRST_N R407 1 2 51R2F-2-GP
R413 (R_)
SKYLAKE-1,SKL-S,LAKE-S 49D9R2F-GP
(062.10015.0081)
2
[46] H_VIDSCK_VR
[46] H_VIDSOUT_VR
[46] H_VIDALERT_N_VR H_PM_DOWN R406 1 2 1KR2J-1-GP
(R_)
https://vinafix.com
[46] H_PROCHOT_N
[40] VCCST_PWRGD
[20] H_PWRGD
[17] H_PM_SYNC
[17] PLTRST_CPU_N
[17] H_PM_DOWN
[17] PCH_THERMTRIP_N
[16] H_SKTOCC_N
[40] DDR_VTT_CNTL
[17,24] H_PECI
[40] VCCST_PWRGD_CPU
B
PROCHOT CONTROL / EC SOLUTION B
+1V_VCCST_S3 +3D3V_S0
2
R415 R471
1KR2J-1-GP 10KR2J-3-GP
+3D3V_S0
1
H_PROCHOT_N
1
EC_PROCHOT_N_A
R472
Q401
10KR2J-3-GP
3 4
2
R404
EC_PROCHOT_N 1 2 EC_PROCHOT_RG_N 2 5
0R0402-PAD-2-GP 1 6
2N7002KDW-1-GP
A A
Hsichih, Taipei
Title
Title
004_CPU (CFG/CLOCK/PM)
Size
Size DocumentNumber
Document Number Rev
Rev
C LA710 1
Date:
Sheet 4 of 107
5 4 3 2 1
5 4 3 2 1
CHANNEL A DIMM0
CPU1A 1 OF 12
[11] M_A_DQ0 M_A_DQ0 M_A_CLK0

[11] M_A_CLK0 AE38 Lake-S AW18
D [11] M_A_DQ1 M_A_DQ1 DDR0_DQ_0/DDR0_DQ_0 DDR0_CKP_0 M_A_CLK#0 D
AE37 AV18
[11] M_A_DQ2 [11] M_A_CLK#0 M_A_DQ2 DDR0_DQ_1/DDR0_DQ_1 DDR0_CKN_0 M_A_CLK1
AG38 AW17
[11] M_A_DQ3 [11] M_A_CLK1 M_A_DQ3 DDR0_DQ_2/DDR0_DQ_2 DDR0_CKP_1 M_A_CLK#1
[11] M_A_CLK#1 AG37 AY17
[11] M_A_DQ4 M_A_DQ4 AE39 DDR0_DQ_3/DDR0_DQ_3 DDR0_CKN_1 AW16
[11] M_A_DQ5 M_A_DQ5 DDR0_DQ_4/DDR0_DQ_4 DDR0_CKP_2
AE40 AV16
[11] M_A_DQ6 [11] M_A_CKE0 M_A_DQ6 DDR0_DQ_5/DDR0_DQ_5 DDR0_CKN_2
AG39 AT16
[11] M_A_DQ7 [11] M_A_CKE1 M_A_DQ7 AG40 DDR0_DQ_6/DDR0_DQ_6 DDR0_CKP_3 AU16
[11] M_A_DQ8 M_A_DQ8 DDR0_DQ_7/DDR0_DQ_7 DDR0_CKN_3
[11] M_A_CS#0 AJ38
[11] M_A_DQ9 M_A_DQ9 AJ37 DDR0_DQ_8/DDR0_DQ_8 AY24 M_A_CKE0
[11] M_A_DQ10 [11] M_A_CS#1 M_A_DQ10 DDR0_DQ_9/DDR0_DQ_9 DDR0_CKE_0 M_A_CKE1
AL38 AW24
[11] M_A_DQ11 M_A_DQ11 DDR0_DQ_10/DDR0_DQ_10 DDR0_CKE_1
AL37 AV24
[11] M_A_DQ12 [11] M_A_ODT0 M_A_DQ12 AJ40 DDR0_DQ_11/DDR0_DQ_11 DDR0_CKE_2 AV25
[11] M_A_DQ13 [11] M_A_ODT1 M_A_DQ13 DDR0_DQ_12/DDR0_DQ_12 DDR0_CKE_3
AJ39
[11] M_A_DQ14 M_A_DQ14 AL39 DDR0_DQ_13/DDR0_DQ_13 AW12 M_A_CS#0
[11] M_A_DQ15 [11] M_A_BA0 M_A_DQ15 DDR0_DQ_14/DDR0_DQ_14 DDR0_CS#_0 M_A_CS#1
AL40 AU11
[11] M_A_DQ16 [11] M_A_BA1 M_A_DQ16 DDR0_DQ_15/DDR0_DQ_15 DDR0_CS#_1
AN38 AV13
[11] M_A_DQ17 M_A_DQ17 AN40 DDR0_DQ_16/DDR0_DQ_32 DDR0_CS#_2 AV10
[11] M_A_DQ18 [11] M_A_BG0 M_A_DQ18 DDR0_DQ_17/DDR0_DQ_33 DDR0_CS#_3
AR38
[11] M_A_DQ19 [11] M_A_BG1 M_A_DQ19 AR37 DDR0_DQ_18/DDR0_DQ_34 AW11 M_A_ODT0
[11] M_A_DQ20 M_A_DQ20 DDR0_DQ_19/DDR0_DQ_35 DDR0_ODT_0 M_A_ODT1
AN39 AU14
[11] M_A_DQ21 [11] M_A_RAS# M_A_DQ21 DDR0_DQ_20/DDR0_DQ_36 DDR0_ODT_1
AN37 AU12
[11] M_A_DQ22 [11] M_A_WE# M_A_DQ22 AR39 DDR0_DQ_21/DDR0_DQ_37 DDR0_ODT_2 AY10
[11] M_A_DQ23 [11] M_A_CAS# M_A_DQ23 DDR0_DQ_22/DDR0_DQ_38 DDR0_ODT_3
AR40
[11] M_A_DQ24 M_A_DQ24 AW37 DDR0_DQ_23/DDR0_DQ_39 AY13 M_A_BA0
[11] M_A_DQ25 [11] M_A_A0 M_A_DQ25 DDR0_DQ_24/DDR0_DQ_40 DDR0_BA_0 M_A_BA1
AU38 AV15
[11] M_A_DQ26 [11] M_A_A1 M_A_DQ26 DDR0_DQ_25/DDR0_DQ_41 DDR0_BA_1 M_A_BG0
AV35 AW23
[11] M_A_DQ27 [11] M_A_A2 M_A_DQ27 AW35 DDR0_DQ_26/DDR0_DQ_42 DDR0_BG_0
[11] M_A_DQ28 [11] M_A_A3 M_A_DQ28 DDR0_DQ_27/DDR0_DQ_43 M_A_RAS#
AU37 AW13
[11] M_A_DQ29 [11] M_A_A4 M_A_DQ29 AV37 DDR0_DQ_28/DDR0_DQ_44 DDR0_MA_16 AV14 M_A_WE#
[11] M_A_DQ30 [11] M_A_A5 M_A_DQ30 DDR0_DQ_29/DDR0_DQ_45 DDR0_MA_14 M_A_CAS#
AT35 AY11
[11] M_A_DQ31 [11] M_A_A6 M_A_DQ31 DDR0_DQ_30/DDR0_DQ_46 DDR0_MA_15
AU35
[11] M_A_DQ32 [11] M_A_A7 M_A_DQ32 AY8 DDR0_DQ_31/DDR0_DQ_47 AW15 M_A_A0
[11] M_A_DQ33 [11] M_A_A8 M_A_DQ33 DDR0_DQ_32/DDR1_DQ_0 DDR0_MA_0 M_A_A1
AW8 AU18
[11] M_A_DQ34 [11] M_A_A9 M_A_DQ34 AV6 DDR0_DQ_33/DDR1_DQ_1 DDR0_MA_1 AU17 M_A_A2
AU6 AV19
AU8 AT19
[11] M_A_DQ37 [11] M_A_A12 M_A_DQ37 AV8 DDR0_DQ_36/DDR1_DQ_4 DDR0_MA_4 AU20 M_A_A5
C AW6 AV20 C
[11] M_A_DQ39 M_A_DQ39 AY6 DDR0_DQ_38/DDR1_DQ_6 DDR0_MA_6 AU21 M_A_A7
[11] M_A_DQ40 [11] M_A_ACT# M_A_DQ40 DDR0_DQ_39/DDR1_DQ_7 DDR0_MA_7 M_A_A8
[11] M_A_PAR AY4 AT20
[11] M_A_DQ41 M_A_DQ41 DDR0_DQ_40/DDR1_DQ_8 DDR0_MA_8 M_A_A9
AV4 AT22
[11] M_A_DQ42 [11] M_A_ALERT# M_A_DQ42 DDR0_DQ_41/DDR1_DQ_9 DDR0_MA_9 M_A_A10
AT1 AY14
[11] M_A_DQ43 M_A_DQ43 DDR0_DQ_42/DDR1_DQ_10 DDR0_MA_10 M_A_A11
AT2 AU22
[11] M_A_DQ44 [11] M_A_DQS_DN0 M_A_DQ44 AV3 DDR0_DQ_43/DDR1_DQ_11 DDR0_MA_11 AV22 M_A_A12
[11] M_A_DQ45 [11] M_A_DQS_DN1 M_A_DQ45 DDR0_DQ_44/DDR1_DQ_12 DDR0_MA_12 M_A_A13
AW4 AV12
[11] M_A_DQ46 [11] M_A_DQS_DN2 M_A_DQ46 DDR0_DQ_45/DDR1_DQ_13 DDR0_MA_13 M_A_BG1
AT4 AV23
[11] M_A_DQ47 [11] M_A_DQS_DN3 M_A_DQ47 AT3 DDR0_DQ_46/DDR1_DQ_14 DDR0_BG_1 AU24 M_A_ACT#
[11] M_A_DQ48 [11] M_A_DQS_DN4 M_A_DQ48 DDR0_DQ_47/DDR1_DQ_15 DDR0_ACT#
AP2
[11] M_A_DQ49 [11] M_A_DQS_DN5 M_A_DQ49 AM4 DDR0_DQ_48/DDR1_DQ_32 AY15 M_A_PAR
[11] M_A_DQ50 [11] M_A_DQS_DN6 M_A_DQ50 DDR0_DQ_49/DDR1_DQ_33 DDR0_PAR M_A_ALERT#
AP3 AT23
[11] M_A_DQ51 [11] M_A_DQS_DN7 M_A_DQ51 DDR0_DQ_50/DDR1_DQ_34 DDR0_ALERT#
AM3
[11] M_A_DQ52 M_A_DQ52 AP4 DDR0_DQ_51/DDR1_DQ_35
[11] M_A_DQ53 [11] M_A_DQS_DP0 M_A_DQ53 DDR0_DQ_52/DDR1_DQ_36 M_A_DQS_DN0
AM2 AF39
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[11] M_A_DQ54 [11] M_A_DQS_DP1 M_A_DQ54 AP1 DDR0_DQ_53/DDR1_DQ_37 DDR0_DQSN_0/DDR0_DQSN_0 AK39 M_A_DQS_DN1
[11] M_A_DQ55 [11] M_A_DQS_DP2 M_A_DQ55 DDR0_DQ_54/DDR1_DQ_38 DDR0_DQSN_1/DDR0_DQSN_1 M_A_DQS_DN2
AM1 AP39
AK3 AU36
[11] M_A_DQ57 [11] M_A_DQS_DP4 M_A_DQ57 AH1 DDR0_DQ_56/DDR1_DQ_40 DDR0_DQSN_3/DDR0_DQSN_5 AW7 M_A_DQS_DN4
AK4 AU3
[11] M_A_DQ59 [11] M_A_DQS_DP6 M_A_DQ59 AH2 DDR0_DQ_58/DDR1_DQ_42 DDR0_DQSN_5/DDR1_DQSN_1 AN3 M_A_DQS_DN6
AH4 AJ3
[11] M_A_DQ61 M_A_DQ61 DDR0_DQ_60/DDR1_DQ_44 DDR0_DQSN_7/DDR1_DQSN_5
AK2
[11] M_A_DQ62 M_A_DQ62 AH3 DDR0_DQ_61/DDR1_DQ_45 AF38 M_A_DQS_DP0
[11] M_A_DQ63 M_A_DQ63 DDR0_DQ_62/DDR1_DQ_46 DDR0_DQSP_0/DDR0_DQSP_0 M_A_DQS_DP1
AK1 AK38
DDR0_DQ_63/DDR1_DQ_47 DDR0_DQSP_1/DDR0_DQSP_1 AP38 M_A_DQS_DP2
AU33 DDR0_DQSP_2/DDR0_DQSP_4 AV36 M_A_DQS_DP3
AT33 DDR0_ECC_0 DDR0_DQSP_3/DDR0_DQSP_5 AV7 M_A_DQS_DP4
AW33 DDR0_ECC_1 DDR0_DQSP_4/DDR1_DQSP_0 AU2 M_A_DQS_DP5
AV31 DDR0_ECC_2 DDR0_DQSP_5/DDR1_DQSP_1 AN2 M_A_DQS_DP6
AU31 DDR0_ECC_3 DDR0_DQSP_6/DDR1_DQSP_4 AJ2 M_A_DQS_DP7
AV33 DDR0_ECC_4 DDR0_DQSP_7/DDR1_DQSP_5
AW31 DDR0_ECC_5 AV32
AY31 DDR0_ECC_6 DDR0_DQSP_8/DDR0_DQSP_8 AU32
DDR0_ECC_7 DDR0_DQSN_8/DDR0_DQSN_8
B B
DDR CHANNEL A
SKYLAKE-1,SKL-S,LAKE-S
(062.10015.0081)
A A
Hsichih, Taipei
Title
Title
005_CPU_(DDR4 CHANNEL A)
Size
Size DocumentNumber
Document Number Rev
Rev
C LA710 1
Date:
Sheet 5 of 107
5 4 3 2 1
5 4 3 2 1
CHANNEL B DIMM0
CPU1B 2 OF 12
D D
M_B_DQ0 AD34 Lake-S AM20 M_B_CLK0
[13] M_B_DQ0 [13] M_B_CLK0 M_B_DQ1 DDR1_DQ_0/DDR0_DQ_16 DDR1_CKP_0 M_B_CLK#0
[13] M_B_CLK#0 AD35 AM21
[13] M_B_DQ1 M_B_DQ2 AG35 DDR1_DQ_1/DDR0_DQ_17 DDR1_CKN_0 AP22 M_B_CLK1
[13] M_B_DQ2 [13] M_B_CLK1 M_B_DQ3 DDR1_DQ_2/DDR0_DQ_18 DDR1_CKP_1 M_B_CLK#1
[13] M_B_CLK#1 AH35 AP21
[13] M_B_DQ3 M_B_DQ4 DDR1_DQ_3/DDR0_DQ_19 DDR1_CKN_1
AE35 AN20
[13] M_B_DQ4 M_B_DQ5 AE34 DDR1_DQ_4/DDR0_DQ_20 DDR1_CKP_2 AN21
[13] M_B_DQ5 [13] M_B_CKE0 DDR1_DQ_5/DDR0_DQ_21 DDR1_CKN_2
M_B_DQ6 AG34 AP19
[13] M_B_DQ6 [13] M_B_CKE1 DDR1_DQ_6/DDR0_DQ_22 DDR1_CKP_3
M_B_DQ7 AH34 AP20
[13] M_B_DQ7 M_B_DQ8 DDR1_DQ_7/DDR0_DQ_23 DDR1_CKN_3
[13] M_B_CS#0 AK35
[13] M_B_DQ8 M_B_DQ9 DDR1_DQ_8/DDR0_DQ_24 M_B_CKE0
[13] M_B_CS#1 AL35 AY29
[13] M_B_DQ9 M_B_DQ10 AK32 DDR1_DQ_9/DDR0_DQ_25 DDR1_CKE_0 AV29 M_B_CKE1
[13] M_B_DQ10 M_B_DQ11 DDR1_DQ_10/DDR0_DQ_26 DDR1_CKE_1
[13] M_B_ODT0 AL32 AW29
[13] M_B_DQ11 M_B_DQ12 AK34 DDR1_DQ_11/DDR0_DQ_27 DDR1_CKE_2 AU29
[13] M_B_DQ12 [13] M_B_ODT1 DDR1_DQ_12/DDR0_DQ_28 DDR1_CKE_3
M_B_DQ13 AL34
[13] M_B_DQ13 M_B_DQ14 DDR1_DQ_13/DDR0_DQ_29 M_B_CS#0
[13] M_B_RAS# AK31 AP17
[13] M_B_DQ14 M_B_DQ15 AL31 DDR1_DQ_14/DDR0_DQ_30 DDR1_CS#_0 AN15 M_B_CS#1
[13] M_B_DQ15 [13] M_B_CAS# DDR1_DQ_15/DDR0_DQ_31 DDR1_CS#_1
M_B_DQ16 AP35 AN17
[13] M_B_DQ16 [13] M_B_WE# DDR1_DQ_16/DDR0_DQ_48 DDR1_CS#_2
M_B_DQ17 AN35 AM15
[13] M_B_DQ17 M_B_DQ18 DDR1_DQ_17/DDR0_DQ_49 DDR1_CS#_3
AN32
[13] M_B_DQ18 [13] M_B_BA0 M_B_DQ19 DDR1_DQ_18/DDR0_DQ_50 M_B_ODT0
AP32 AM16
[13] M_B_DQ19 [13] M_B_BA1 M_B_DQ20 AN34 DDR1_DQ_19/DDR0_DQ_51 DDR1_ODT_0 AL16 M_B_ODT1
[13] M_B_DQ20 M_B_DQ21 DDR1_DQ_20/DDR0_DQ_52 DDR1_ODT_1
AP34 AP15
[13] M_B_DQ21 [13] M_B_BG0 M_B_DQ22 AN31 DDR1_DQ_21/DDR0_DQ_53 DDR1_ODT_2 AL15
[13] M_B_DQ22 [13] M_B_BG1 M_B_DQ23 DDR1_DQ_22/DDR0_DQ_54 DDR1_ODT_3
AP31
[13] M_B_DQ23 M_B_DQ24 DDR1_DQ_23/DDR0_DQ_55 M_B_RAS#
AL29 AN18
[13] M_B_DQ24 [13] M_B_A0 M_B_DQ25 AM29 DDR1_DQ_24/DDR0_DQ_56 DDR1_MA_16 AL17 M_B_WE#
[13] M_B_DQ25 [13] M_B_A1 M_B_DQ26 DDR1_DQ_25/DDR0_DQ_57 DDR1_MA_14 M_B_CAS#
AP29 AP16
[13] M_B_DQ26 [13] M_B_A2 M_B_DQ27 AR29 DDR1_DQ_26/DDR0_DQ_58 DDR1_MA_15
[13] M_B_DQ27 [13] M_B_A3 M_B_DQ28 DDR1_DQ_27/DDR0_DQ_59 M_B_BA0
AM28 AL18
[13] M_B_DQ28 [13] M_B_A4 M_B_DQ29 DDR1_DQ_28/DDR0_DQ_60 DDR1_BA_0 M_B_BA1
AL28 AM18
[13] M_B_DQ29 [13] M_B_A5 M_B_DQ30 AR28 DDR1_DQ_29/DDR0_DQ_61 DDR1_BA_1 AW28 M_B_BG0
[13] M_B_DQ30 [13] M_B_A6 M_B_DQ31 DDR1_DQ_30/DDR0_DQ_62 DDR1_BG_0
AP28
[13] M_B_DQ31 [13] M_B_A7 M_B_DQ32 AR12 DDR1_DQ_31/DDR0_DQ_63 AL19 M_B_A0
[13] M_B_DQ32 [13] M_B_A8 M_B_DQ33 DDR1_DQ_32/DDR1_DQ_16 DDR1_MA_0 M_B_A1
AP12 AL22
AM13 AM22
[13] M_B_DQ34 [13] M_B_A10 M_B_DQ35 AL13 DDR1_DQ_34/DDR1_DQ_18 DDR1_MA_2 AM23 M_B_A3
C AR13 AP23 C
[13] M_B_DQ36 [13] M_B_A12 M_B_DQ37 AP13 DDR1_DQ_36/DDR1_DQ_20 DDR1_MA_4 AL23 M_B_A5
AM12 AW26
[13] M_B_DQ38 M_B_DQ39 DDR1_DQ_38/DDR1_DQ_22 DDR1_MA_6 M_B_A7
AL12 AY26
[13] M_B_DQ39 [13] M_B_ACT# M_B_DQ40 DDR1_DQ_39/DDR1_DQ_23 DDR1_MA_7 M_B_A8
AP10 AU26
[13] M_B_DQ40 [13] M_B_PAR M_B_DQ41 DDR1_DQ_40/DDR1_DQ_24 DDR1_MA_8 M_B_A9
[13] M_B_ALERT# AR10 AW27
[13] M_B_DQ41 M_B_DQ42 AR7 DDR1_DQ_41/DDR1_DQ_25 DDR1_MA_9 AP18 M_B_A10
[13] M_B_DQ42 M_B_DQ43 DDR1_DQ_42/DDR1_DQ_26 DDR1_MA_10 M_B_A11
AP7 AU27
[13] M_B_DQ43 [13] M_B_DQS_DN0 M_B_DQ44 DDR1_DQ_43/DDR1_DQ_27 DDR1_MA_11 M_B_A12
AR9 AV27
[13] M_B_DQ44 [13] M_B_DQS_DN1 M_B_DQ45 AP9 DDR1_DQ_44/DDR1_DQ_28 DDR1_MA_12 AR15 M_B_A13
[13] M_B_DQ45 [13] M_B_DQS_DN2 M_B_DQ46 DDR1_DQ_45/DDR1_DQ_29 DDR1_MA_13 M_B_BG1
AR6 AY28
[13] M_B_DQ46 [13] M_B_DQS_DN3 M_B_DQ47 AP6 DDR1_DQ_46/DDR1_DQ_30 DDR1_BG_1 AU28 M_B_ACT#
[13] M_B_DQ47 [13] M_B_DQS_DN4 M_B_DQ48 DDR1_DQ_47/DDR1_DQ_31 DDR1_ACT#
AM10
[13] M_B_DQ48 [13] M_B_DQS_DN5 M_B_DQ49 DDR1_DQ_48/DDR1_DQ_48 M_B_PAR
AL10 AL20
[13] M_B_DQ49 [13] M_B_DQS_DN6 M_B_DQ50 AM7 DDR1_DQ_49/DDR1_DQ_49 DDR1_PAR AY25 M_B_ALERT#
[13] M_B_DQ50 [13] M_B_DQS_DN7 M_B_DQ51 DDR1_DQ_50/DDR1_DQ_50 DDR1_ALERT#
AL7
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[13] M_B_DQ51 M_B_DQ52 AM9 DDR1_DQ_51/DDR1_DQ_51
[13] M_B_DQ52 [13] M_B_DQS_DP0 M_B_DQ53 DDR1_DQ_52/DDR1_DQ_52 M_B_DQS_DN0
AL9 AF34
[13] M_B_DQ53 [13] M_B_DQS_DP1 M_B_DQ54 DDR1_DQ_53/DDR1_DQ_53 DDR1_DQSN_0/DDR0_DQSN_2 M_B_DQS_DN1
AM6 AK33
[13] M_B_DQ54 [13] M_B_DQS_DP2 M_B_DQ55 AL6 DDR1_DQ_54/DDR1_DQ_54 DDR1_DQSN_1/DDR0_DQSN_3 AN33 M_B_DQS_DN2
AJ6 AN29
[13] M_B_DQ56 [13] M_B_DQS_DP4 M_B_DQ57 AJ7 DDR1_DQ_56/DDR1_DQ_56 DDR1_DQSN_3/DDR0_DQSN_7 AN13 M_B_DQS_DN4
AE6 AR8
AF7 AM8
[13] M_B_DQ59 [13] M_B_DQS_DP7 M_B_DQ60 AH7 DDR1_DQ_59/DDR1_DQ_59 DDR1_DQSN_6/DDR1_DQSN_6 AG6 M_B_DQS_DN7
[13] M_B_DQ60 M_B_DQ61 DDR1_DQ_60/DDR1_DQ_60 DDR1_DQSN_7/DDR1_DQSN_7
AH6
[13] M_B_DQ61 M_B_DQ62 AE7 DDR1_DQ_61/DDR1_DQ_61 AF35 M_B_DQS_DP0
[13] M_B_DQ62 [11] M_A_VREF_CA M_B_DQ63 DDR1_DQ_62/DDR1_DQ_62 DDR1_DQSP_0/DDR0_DQSP_2 M_B_DQS_DP1
AF6 AL33
[13] M_B_DQ63 DDR1_DQ_63/DDR1_DQ_63 DDR1_DQSP_1/DDR0_DQSP_3 M_B_DQS_DP2
AP33
[13] M_B_VREF_DQ DDR1_DQSP_2/DDR0_DQSP_6 M_B_DQS_DP3
AR25 AN28
AR26 DDR1_ECC_0 DDR1_DQSP_3/DDR0_DQSP_7 AN12 M_B_DQS_DP4
AM26 DDR1_ECC_1 DDR1_DQSP_4/DDR1_DQSP_2 AP8 M_B_DQS_DP5
AM25 DDR1_ECC_2 DDR1_DQSP_5/DDR1_DQSP_3 AL8 M_B_DQS_DP6
AP26 DDR1_ECC_3 DDR1_DQSP_6/DDR1_DQSP_6 AG7 M_B_DQS_DP7
AP25 DDR1_ECC_4 DDR1_DQSP_7/DDR1_DQSP_7
AL25 DDR1_ECC_5 AN25
AL26 DDR1_ECC_6 DDR1_DQSP_8/DDR1_DQSP_8 AN26
DDR1_ECC_7 DDR1_DQSN_8/DDR1_DQSN_8
B B
DDR CHANNEL B
AB40 M_A_VREF_CA
DDR_VREF_CA AC40 M_A_VREF_DQ 1 TP602
DDR0_VREF_DQ AC39 M_B_VREF_DQ
DDR1_VREF_DQ
(062.10015.0081)
A A
Hsichih, Taipei
Title
Title
006_CPU_(DDR4 CHANNEL B)
Size
Size DocumentNumber
Document Number Rev
Rev
C LA710 1
Date:
Sheet 6 of 107
5 4 3 2 1
5 4 3 2 1
HDMI OUT
[56] HDMI_DDI_TX_P2
[56] HDMI_DDI_TX_N2
D [56] HDMI_DDI_TX_P1 D
[56] HDMI_DDI_TX_N1
[56] HDMI_DDI_TX_P0
[56] HDMI_DDI_TX_N0
[56] HDMI_DDI_TX_CLKP 170828 Leon:Change CPU1 to 062.10015.0081 for SB
[56] HDMI_DDI_TX_CLKN
CPU1D 4 OF 12
EDP HDMI_DDI_TX_P2 C21

DDI1_TXP_0
Lake-S
EDP_TXP_0
E10 eDP_TX_CPU_P0
HDMI_DDI_TX_N2 D21 D10 eDP_TX_CPU_N0
[95] eDP_TX_CPU_P0 DDI1_TXN_0 EDP_TXN_0
HDMI_DDI_TX_P1 D22 D9 eDP_TX_CPU_P1
[95] eDP_TX_CPU_N0 DDI1_TXP_1 EDP_TXP_1
HDMI_DDI_TX_N1 E22 C9 eDP_TX_CPU_N1
[95] eDP_TX_CPU_P1 DDI1_TXN_1 EDP_TXN_1
HDMI_DDI_TX_P0 B23 H10
[95] eDP_TX_CPU_N1 DDI1_TXP_2 EDP_TXN_2
HDMI_DDI_TX_N0 A23 G10
[95] eDP_AUX_CPU_P HDMI_DDI_TX_CLKP C23 DDI1_TXN_2 EDP_TXP_2 G9
eDP (Port D) => Scalar
[95] eDP_AUX_CPU_N HDMI_DDI_TX_CLKN DDI1_TXP_3 EDP_TXN_3
D23 F9
DDI1_TXN_3 EDP_TXP_3
B13 D12 eDP_AUX_CPU_P
[20] AUD_AZACPU_SDO C13 DDI1_AUXP EDP_AUXP E12 eDP_AUX_CPU_N
DDI1_AUXN EDP_AUXN
[20] AUD_AZACPU_SDI_R B18
C DDI2_TXP_0 C
A18 ==>connect to L_BRIGHTNESS in CRB,
[20] AUD_AZACPU_SCLK DDI2_TXN_0 EDP_DISP_UTIL
D18 D14 1 TP701TPAD24
E18 DDI2_TXP_1 EDP_DISP_UTIL But it is empty +0D95V_VCCIO_S0
C19 DDI2_TXN_1 Phoran Chen
D19 DDI2_TXP_2 M9 DP_RCOMP R703 1 2 24D9R2F-L-GP
D20 DDI2_TXN_2 DISP_RCOMP
E20 DDI2_TXP_3 PWR_SEQ = 22
DDI2_TXN_3
A12 CAD NOTE:
B12 DDI2_AUXP PLACE RA INSIDE CPU CAVITY
DDI2_AUXN
B14
A14 DDI3_TXP_0
C15 DDI3_TXN_0
B15 DDI3_TXP_1
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B16 DDI3_TXN_1
A16 DDI3_TXP_2
C17 DDI3_TXN_2
B17 DDI3_TXP_3
DDI3_TXN_3 V3 AUD_AZACPU_SCLK
B11 PROC_AUDIO_CLK V2 AUD_AZACPU_SDO
C11 DDI3_AUXP PROC_AUDIO_SDI U1 AUD_AZACPU_SDI R704 1 2 20R2F-GP AUD_AZACPU_SDI_R
DDI3_AUXN PROC_AUDIO_SDO
B B
(062.10015.0081)
A A
Hsichih, Taipei
Title
Title
007_CPU_(DDI/EDP)
Size
Size Document
DocumentNumber
Number Rev
Rev
B LA710 1
Date:
Sheet 7 of 107
5 4 3 2 1
5 4 3 2 1

[46] VCCCORE_SENSE
[46] VSSCORE_SENSE +1V_GFX_CORE
CPU1H 8 OF 12
D [46] VCCGT_SENSE D
[46] VSSGT_SENSE +1V_CPU_CORE +1V_CPU_CORE AA34 Lake-S
CPU1G 7 OF 12 AA35 VCCGT1 +1D05V_VCCSA_S0 +1D2V_S3
[50] VCCSA_SENSE VCCGT2
AA36
[50] VCCIO_SENSE VCCGT3
A25 Lake-S H32 AA37 =Normal Power PWR_SEQ = 19
A26 VCC1 VCC90 J21 AA38 VCCGT4 Function = CRB:+VCCSA;Max=18.4A
[50] VCCSA_VSS_SEN PWR_SEQ = 24 A27 VCC2 VCC93 F32 AB33 VCCGT5
[50] VCCIO_VSS_SEN VCC3 VCC68 VCCGT6
A28 F33 AB34 CPU1I 9 OF 12
A29 VCC4 VCC69 F34 G36 VCCGT7
[20,24,35,36,40] SLP_S4_N A30 VCC5 VCC70 G23 G37 VCCGT8 AA7 Lake-S AT18
B25 VCC6 VCC73 G24 G38 VCCGT9 AB6 VCCSA2 VDDQ1 AT21
B27 VCC24 VCC74 G25 G39 VCCGT10 AB7 VCCSA3 VDDQ2 AU13
B29 VCC25 VCC75 G26 G40 VCCGT11 AB8 VCCSA4 VDDQ3 AU15
B31 VCC26 VCC76 G27 H36 VCCGT12 AC7 VCCSA5 VDDQ4 AU19
B32 VCC27 VCC77 G28 H38 VCCGT13 AC8 VCCSA6 VDDQ5 AU23
B33 VCC28 VCC78 G29 H40 VCCGT14 N7 VCCSA7 VDDQ6 AV11
B34 VCC29 VCC79 J22 J36 VCCGT15 P7 VCCSA8 VDDQ7 AV17
B35 VCC30 VCC94 J23 J37 VCCGT16 R7 VCCSA9 VDDQ8 AV21
B36 VCC31 VCC95 J24 J38 VCCGT17 T7 VCCSA10 VDDQ9 AW10
B37 VCC32 VCC96 J25 J39 VCCGT18 U7 VCCSA11 VDDQ10 AW14
C25 VCC33 VCC97 J26 J40 VCCGT19 Y6 VCCSA12 VDDQ11 AW25
C26 VCC34 VCC98 J27 K36 VCCGT20 Y7 VCCSA15 VDDQ12 AY12
C27 VCC35 VCC99 J28 K38 VCCGT21 Y8 VCCSA16 VDDQ13 AY16 +1D2V_S3
C28 VCC36 VCC100 J29 K40 VCCGT22 W7 VCCSA17 VDDQ14 AY18
C29 VCC37 VCC101 J30 L34 VCCGT23 V7 VCCSA14 VDDQ15 AY23
C30 VCC38 VCC102 J31 L35 VCCGT24 AA6 VCCSA13 VDDQ16 R803
C32 VCC39 VCC103 K16 L36 VCCGT25 +0D95V_VCCIO_S0 VCCSA1 AJ9 VCCPLL_OC 1 2
C34 VCC40 VCC106 K18 L37 VCCGT26 =Normal Power VCCPLL_OC
C36 VCC41 VCC107 K20 L38 VCCGT27 Function = CRB:+VCCIO;Max=5.4A AK11 0R0402-PAD-2-GP
D25 VCC42 VCC108 K21 L39 VCCGT28 AK14 VCCIO2
VCC43 VCC109 VCCGT29 PWR_SEQ = 22 VCCIO3
1
D27 K23 L40 AK24 C808
D29 VCC44 VCC110 K25 M33 VCCGT30 AJ23 VCCIO4 SC1U10V2KX-1-LL-GP
D31 VCC45 VCC111 K27 M34 VCCGT31 M8 VCCIO1
VCC46 VCC112 VCCGT32 VCCIO5
2
D32 K29 M36 +1V_VCCST_S3 P8
D33 VCC47 VCC113 K31 M38 VCCGT33 T8 VCCIO6
D34 VCC48 VCC114 L14 M40 VCCGT34 U8 VCCIO7
D35 VCC49 VCC117 L15 N34 VCCGT35 W8 VCCIO8
D36 VCC50 VCC118 L16 N35 VCCGT36 VCCIO9
C C
E24 VCC51 VCC119 L17 N36 VCCGT37
E25 VCC52 VCC120 L18 N37 VCCGT38
E26 VCC53 VCC121 L19 N38 VCCGT39 V5
E27 VCC54 VCC122 L20 N39 VCCGT40 V6 VCCST1
E28 VCC55 VCC123 L21 N40 VCCGT41 VCCST2 +1D05V_VCCSA_S0 +0D95V_VCCIO_S0
E29 VCC56 VCC124 L22 P33 VCCGT42 V4
E30 VCC57 VCC125 L23 P34 VCCGT43 VCCPLL
E32 VCC58 VCC126 L24 P36 VCCGT44
VCC59 VCC127 VCCGT45
2
E34 L25 P38
E36 VCC60 VCC128 L26 P40 VCCGT46 R813 R809
F23 VCC61 VCC129 L27 R34 VCCGT47 100R2F-L1-GP-U
VCC62 VCC130 VCCGT48 100R2F-L1-GP-U
F24 L28 R35 (R_)
F25 VCC63 VCC131 L29 R36 VCCGT49
1
F27 L30 R37
F29 VCC65 VCC133 M13 R38 VCCGT51 AD5 VCCSA_SENSE
https://vinafix.com
F31 VCC66 VCC136 M14 R39 VCCGT52 VCCSA_SENSE AF4 VCCIO_SENSE
G30 VCC67 VCC137 M16 R40 VCCGT53 VCCIO_SENSE AE4 VSS_SAIO_SENSE
G32 VCC80 VCC138 M18 T33 VCCGT54 VSS_SAIO_SENSE
H22 VCC81 VCC139 M20 T34 VCCGT55
H23 VCC84 VCC140 M22 T36 VCCGT56
1
H25 M24 T38 R801
H27 VCC86 VCC142 M26 T40 VCCGT58 100R2F-L1-GP-U
H29 VCC87 VCC143 M28 U34 VCCGT59
H31 VCC88 VCC144 M30 U35 VCCGT60
AJ11 VCC89 VCC145 AJ12 U36 VCCGT61
VCC7 VCC8 VCCGT62
2
AJ13 AJ14 U37 SKYLAKE-1,SKL-S,LAKE-S
VCC11 VCC12 VCCGT64 (062.10015.0081)
AJ17 AJ18 U39
AJ21 VCC15 VCC16 V33 VCCGT66 +1V_GFX_CORE
VCC17 V34 VCCGT67
M32 AJ29 V36 VCCGT68
L31 VCC146 VCC22 AK21 V38 VCCGT69
2
K32 F35 V40
J33 VCC115 VCC71 F37 W34 VCCGT71
H33 VCC104 VCC72 G35 W35 VCCGT72 R811
G34 VCC91 VCC83 H34 +1V_CPU_CORE W36 VCCGT73 100R2F-L1-GP-U
B
AJ25 VCC82 VCC92 J35 W37 VCCGT74 B
1
AJ26 K34 W38 F39 VCCGT_SENSE
AJ27 VCC19 VCC116 L33 Y33 VCCGT76 VCCGT_SENSE F38 VSSGT_SENSE
VCC20 VCC135 VCCGT77 VSSGT_SENSE
2
AJ28 Y34 VSS_SAIO_SENSE R804 1 2 VCCSA_VSS_SEN

VCC21 VCCGT78
1
Y36 0R0402-PAD-2-GP
R808 Y38 VCCGT79 R810 R805 1 2 VCCIO_VSS_SEN
100R2F-L1-GP-U VCCGT80 100R2F-L1-GP-U 0R0402-PAD-2-GP
1
C38 VCCCORE_SENSE
VCC_SENSE
2
D38 VSSCORE_SENSE SKYLAKE-1,SKL-S,LAKE-S
VSS_SENSE
(062.10015.0081)
1
SKYLAKE-1,SKL-S,LAKE-S R812
(062.10015.0081) 100R2F-L1-GP-U
2
+1V_VCCST_S3
+1D05V_PCH_S5
R807 (R_)
Function = CRB:+V1P0A 1 2 VCCCORE_SENSE R806 1 249D9R2F-GP VSSCORE_SENSE
(R_) 0R2J-2-GP
1
C804
SC1U10V2KX-1-LL-GP
2
+5V_S5
U801
1 8
R802 2 VIN#1 VOUT#8 7
SLP_S4_N 1 2PWR_1V_VCCST_S3_EN 3 VIN#2 VOUT#7 6 PWR_1V_VCCST_S3_SS
0R0402-PAD-2-GP 4 ON CT 5
VBIAS GND
1
C802 C803 C805

9
SC2200P50V2KX-2-LL-GP
A SC1U10V2KX-1-LL-GP SCD1U16V2KX-3-LL-GP A
GND
1
C801
2
SCD1U16V2KX-3-LL-GP
TPS22965DSGR-2-GP
2
Leon: change load switch replace OB part(check spec)
Hsichih, Taipei
Title
Title
008_CPU_(CPU Power)
Size
Size DocumentNumber
Document Number Rev
Rev
C LA710 1
Date:
Sheet 8 of 107
5 4 3 2 1
5 4 3 2 1
CPU1K 11 OF 12 CPU1L 12 OF 12 CPU1J 10 OF 12

CPU1F 6 OF 12
Lake-S
AR24 Lake-S C37 K39 AJ24 J8 Lake-S AC37
A11 Lake-S AK29 AR27 VSS VSS C5 K4 VSS VSS AJ30 J7 RSVD_TP2 RSVD4 AB35
A13 VSS VSS AK30 AR3 VSS VSS C8 K7 VSS VSS AK22 TP901 1 TP_CPU_IST_TRIG L8 RSVD_TP1 RSVD1 AB37
A15 VSS VSS AK36 AR30 VSS VSS C10 L13 VSS VSS AK27 TPAD24 K8 IST_TRIG RSVD2 AB38
A17 VSS VSS AK37 AR31 VSS VSS D24 L3 VSS VSS AR22 RSVD_TP3 RSVD3 AJ22
A24 VSS VSS AK40 AR32 VSS VSS D26 L32 VSS VSS AR23 AV1 RSVD5 D15
A7 VSS VSS AK5 AR33 VSS VSS D28 L6 VSS VSS AT15 AW2 RSVD8 RSVD12 K11
D AA3 VSS VSS AK6 AR34 VSS VSS D30 L9 VSS VSS AU39 RSVD9 RSVD21 D
AA33 VSS VSS AK7 AR35 VSS VSS D37 M1 VSS VSS AU40 H8
AA8 VSS VSS AK8 AR36 VSS VSS D39 M10 VSS VSS AV39 RSVD13
AB39 VSS VSS AK9 AR4 VSS VSS D4 M12 VSS VSS AW38 K10
AB5 VSS VSS AL1 AR5 VSS VSS D7 M15 VSS VSS F36 L10 RSVD20
AC3 VSS VSS AL11 AT10 VSS VSS E11 M17 VSS VSS H11 RSVD24
AC33 VSS VSS AL14 AT11 VSS VSS E13 M19 VSS VSS H12 J17
AC34 VSS VSS AL2 AT12 VSS VSS E15 M21 VSS VSS B39 RSVD18
AC35 VSS VSS AL21 AT13 VSS VSS E17 M23 VSS C40 RSVD10 J15
AC6 VSS VSS AL24 AT14 VSS VSS E19 M25 VSS J19 RSVD11 RSVD17 J14
AD1 VSS VSS AL27 AT17 VSS VSS E21 M27 VSS RSVD19 RSVD16
AD33 VSS VSS AL3 AT24 VSS VSS E23 M29 VSS G8 AU9
AD36 VSS VSS AL30 AT25 VSS VSS E3 M35 VSS AY3 VSS_G8 RSVD7 AU10
AD37 VSS VSS AL36 AT26 VSS VSS E31 M37 VSS VSS_AY3 RSVD6
AD38 VSS VSS AL4 AT27 VSS VSS E33 M39 VSS R901 PCH_2_CPU_TRIGGER D1
AD39 VSS VSS AL5 AT28 VSS VSS E35 M4 VSS CPU_2_PCH_TRIGGER 1 2 CPU_2_PCH_TRIGGER_R B3 PROC_TRIGIN J13
AD4 VSS VSS AM11 AT29 VSS VSS E37 M7 VSS 20R2F-GP PROC_TRIGOUT RSVD15 K13
AD40 VSS VSS AM14 AT30 VSS VSS E6 N3 VSS L12 RSVD23 J11
AD6 VSS VSS AM17 AT31 VSS VSS E9 N33 VSS K12 RSVD25 RSVD14
AD7 VSS VSS AM19 AT32 VSS VSS F1 N6 VSS RSVD22
AD8 VSS VSS AM24 AT34 VSS VSS F10 N8 VSS
AE3 VSS VSS AM27 AT36 VSS VSS F22 P1 VSS
AE36 VSS VSS AM31 AT38 VSS VSS F28 P37 VSS SKYLAKE-1,SKL-S,LAKE-S
C VSS VSS VSS VSS VSS C
AE5 AM32 AT39 F30 P39 (062.10015.0081)
AF1 VSS VSS AM34 AT5 VSS VSS F40 R3 VSS [21] PCH_2_CPU_TRIGGER
AF33 VSS VSS AM35 AT6 VSS VSS F7 R33 VSS
AF36 VSS VSS AM36 AT7 VSS VSS G11 R6 VSS [21] CPU_2_PCH_TRIGGER
AF37 VSS VSS AM37 AT8 VSS VSS G13 R8 VSS
AF40 VSS VSS AM38 AT9 VSS VSS G15 T1 VSS
AF5 VSS VSS AM39 AU1 VSS VSS G17 T35 VSS
AF8 VSS VSS AM40 AU25 VSS VSS G19 T37 VSS
AG1 VSS VSS AM5 AU30 VSS VSS G22 T39 VSS
AG2 VSS VSS AN1 AU34 VSS VSS G3 T4 VSS
AG3 VSS VSS AN10 AU4 VSS VSS G31 U3 VSS
AG4 VSS VSS AN16 AV2 VSS VSS H1 V1 VSS
https://vinafix.com
AH33 VSS VSS AN23 AV30 VSS VSS H26 V39 VSS
AH36 VSS VSS AN24 AV34 VSS VSS H28 V8 VSS
AH37 VSS VSS AN27 AV38 VSS VSS H30 W3 VSS
AH40 VSS VSS AN4 AW3 VSS VSS H39 Y35 VSS
B B
AJ1 VSS VSS AN7 AW34 VSS VSS H9 VSS
AJ31 VSS VSS AN8 AW36 VSS VSS J10 A4
AJ32 VSS VSS AN9 AW5 VSS VSS J12 B38 VSS_NCTF_A4
AJ33 VSS VSS AP11 AW9 VSS VSS L11 C2 VSS_NCTF_B38
AJ34 VSS VSS AP14 AY27 VSS VSS J16 D40 VSS_NCTF_C2
AJ35 VSS VSS AP24 AY30 VSS VSS J18 VSS_NCTF_D40
AJ36 VSS VSS AP27 AY5 VSS VSS J20
AJ4 VSS VSS AP30 AY7 VSS VSS J3 SKYLAKE-1,SKL-S,LAKE-S
AJ5 VSS VSS AP36 AY9 VSS VSS J32
VSS VSS VSS VSS (062.10015.0081)
AJ8 AP37 B24 J34
AK10 VSS VSS AP40 B26 VSS VSS J6
AK12 VSS VSS AP5 B28 VSS VSS K1
AK13 VSS VSS AR1 B30 VSS VSS K14
AK15 VSS VSS AR11 B6 VSS VSS K15
AK16 VSS VSS AR14 C12 VSS VSS K17
VSS VSS VSS VSS
AK17
AK18 VSS
VSS
VSS
VSS
AR16
AR17
C14
C16 VSS
VSS
VSS
VSS
K19
K22 170828 Leon:Change CPU1 to 062.10015.0081 for SB
AK19 AR18 C18 K24
A AK28 VSS VSS C33 VSS VSS K35 A
VSS C35 VSS VSS K37 Wistron Incorporated
VSS VSS
SKYLAKE-1,SKL-S,LAKE-S Hsichih, Taipei
(062.10015.0081)
(062.10015.0081) Title
009_CPU_(VSS)
B LA710 1
5 4 3 2 1
5 4 3 2 1
EE Leon: VCORE / GT cap from power team request
+1V_CPU_CORE CAD NOTE: +1V_CPU_CORE CAD NOTE: +1V_GFX_CORE CAD NOTE:

PLACE CAPS AT TOP SOCKET CAVITY PLACE CAPS AT TOP SOCKET EDGE CAPS PLACED IN TOP SIDE SOCKET CAVITY
PWR_SEQ = 24 PC1001 PC1002 PC1003 PC1004 PC1005 PC1006 PC1007 PC1008 PC1009 PC1010 PC1011 PC1012
SC22U6D3V3MX-1-LL-GP
PC1013 PC1014 PC1015 PC1016 PC1017 PC1018 PC1019 PC1020 PC1037 PC1044
D D
1
2
2
(PCAP_) (PCAP_) (R_) (PCAP_) (PCAP_) (PCAP_) (R_) (R_) (PCAP_) (R_) (R_) (PCAP_)
(PCAP_) (PCAP_) (PCAP_) (PCAP_) (PCAP_) (PCAP_) (PCAP_) (PCAP_) (PCAP_) (PCAP_)
+1V_GFX_CORE CAD NOTE:

CAPS PLACED AT SOCKET EDGE TOP (ILM)
CAD NOTE:
PLACE CAPS AT TOP SOCKET CAVITY PC1021 PC1022 PC1023 PC1024 PC1040 PC1043 PC1042 PC1045 PC1039 PC1038
1
1
PC1025 PC1026 PC1027 PC1028 PC1029 PC1030 PC1031 PC1032 PC1033 PC1034 PC1035 PC1036 PC1041
2
1
1
2
2
(R_) (R_) (R_) (R_) (R_) (R_) (R_) (R_) (R_) (R_)
(PCAP_) (PCAP_) (PCAP_) (PCAP_) (PCAP_) (PCAP_) (PCAP_) (PCAP_) (PCAP_) (PCAP_) (PCAP_) (PCAP_) (PCAP_)
C C
+0D95V_VCCIO_S0
CAD NOTE:
PLACE ALL CAPS INSIDE CPU SOCKET CAVITY TOP
C1037 C1038 C1039 C1040 C1041 C1042
1
1
2
2
https://vinafix.com
+1D2V_S3
+1V_VCCST_S3 CAD NOTE:
CAD NOTE:
PWR_SEQ = 19 PLACE CAPS NEAR CPU SOCKET
PLACE CAPS AT
TOP SOCKET EDGE
1
1
SC1U10V2KX-1-LL-GP
C1043 C1049
C1045 C1046 C1047 C1048 ST330U2VDM-20-GP
1
C1044 (R_)
2
2
2
+1D05V_VCCSA_S0
B B
CAD NOTE:
CAPS PLACED IN TOP SIDE SOCKET CAVITY
1
1
C1060 C1061 C1062 C1063
2
(R_) (R_)
CAD NOTE:
CAPS PLACED IN BOTTOM SIDE SOCKET CAVITY
CAD NOTE:
CAPS PLACED NEAR TOP SOCKET EDGE
C1064 C1065 C1066 C1067 C1068 C1069
SC47U6D3V5MX-1-GP
SC47U6D3V5MX-1-GP
SC47U6D3V5MX-1-GP
SC47U6D3V5MX-1-GP
1
1
1
2
2
2
(R_) (R_) (R_) (R_)
A A
Hsichih, Taipei
Title
010_CPU Power CAP
C LA710 1
5 4 3 2 1
5 4 3 2 1
[5]
[5]
[5]
M_A_DQ0
M_A_DQ1
M_A_DQ2
CHANNEL-A XMM1, A0, H=8mm
[5] M_A_DQ3
[5]
[5]
M_A_DQ4
M_A_DQ5
DIMM1A 1 OF 4 DIMM1D 4 OF 4
SPD Address of DIMM1 SPD SA2 0
[5] M_A_DQ6 +3D3V_S0 +3D3V_S0
[5] M_A_DQ7 M_A_A0 144 8 M_A_DQ0 1 99
[5] M_A_DQ8 M_A_A1 133 A0 DQ0 7 M_A_DQ1 2 VSS VSS 102
SPD SA1 0
[5] M_A_DQ9 A1 DQ1 VSS VSS
2
M_A_A2 132 20 M_A_DQ2 5 103 (R_) (R_)
R1102
0R2J-2-GP
R1103
0R2J-2-GP
SPD SA0 0
[5] M_A_DQ13 M_A_A6 A5 DQ5 M_A_DQ6 VSS VSS
127 16 14 168
1
D M_A_A7 M_A_DQ7 D
122 17 15 171
125 28 18 172 SPD Addr SA2_DIMM1 SPD Addr SA1_DIMM1 SPD Addr SA0_DIMM1
121 29 19 175 DIMM1:SA1=0 DIMM1:SA1=0 DIMM1:SA0=0 Note:
2
M_A_A10 146 41 M_A_DQ10 22 176
[5] M_A_DQ18 M_A_A11 120 A10/AP DQ10 42 M_A_DQ11 23 VSS VSS 180 R1117 R1113 R1106 SA0 DIMM1 = 0, SA1_DIMM1 = 0
[5] M_A_DQ20
M_A_A12 119
A12 DQ12
24 M_A_DQ12 26
VSS VSS
181 0R0402-PAD-2-GP 0R0402-PAD-2-GP 0R0402-PAD-2-GP SO-DIMMA SPD Address is 0xA0
M_A_A13 158 25 M_A_DQ13 27 184
[5] M_A_DQ21 M_A_WE# 151 A13 DQ13 38 M_A_DQ14 30 VSS VSS 185
SO-DIMMA TS Address is 0x30
[5] M_A_DQ22 WE#/A14 DQ14 VSS VSS
1
M_A_CAS# 156 37 M_A_DQ15 31 188
[5] M_A_DQ23 M_A_RAS# CAS#/A15 DQ15 M_A_DQ16 VSS VSS
152 50 35 189
[5] M_A_DQ24 RAS#/A16 DQ16 M_A_DQ17 VSS VSS
49 36 192
[5] M_A_DQ25 M_A_BA0 150 DQ17 62 M_A_DQ18 39 VSS VSS 193 SDV
[5] M_A_DQ26 M_A_BA1 BA0 DQ18 M_A_DQ19 VSS VSS Follow CRB to add for DDR4
145 63 40 196
[5] M_A_DQ27 M_A_BG0 115 BA1 DQ19 46 M_A_DQ20 43 VSS VSS 197 Anna review result
[5] M_A_DQ28 M_A_BG1 BG0 DQ20 M_A_DQ21 VSS VSS Wise: 1216
113 45 44 201
[5] M_A_DQ29 BG1 DQ21 M_A_DQ22 VSS VSS
58 47 202
[5] M_A_DQ30 1 TP_M_A_CB0/NC 92 DQ22 59 M_A_DQ23 48 VSS VSS 205
TP1101 Layout Note:
[5] M_A_DQ31 TP_M_A_CB1/NC CB0/NC DQ23 M_A_DQ24 VSS VSS
TP1102 1 91 70 51 206
[5] M_A_DQ32
TP1103 1 TP_M_A_CB2/NC 101 CB1/NC DQ24 71 M_A_DQ25 52 VSS VSS 209 +1D2V_S3 Place these Caps near
[5] M_A_DQ33 CB2/NC DQ25 VSS VSS
[5] M_A_DQ34
TP1104 1 TP_M_A_CB3/NC 105
CB3/NC DQ26
83 M_A_DQ26 56
VSS VSS
210 SODIMM A DECOUPLING SO-DIMMA.
TP1105 1 TP_M_A_CB4/NC 88 84 M_A_DQ27 57 213
[5] M_A_DQ35 1 TP_M_A_CB5/NC 87 CB4/NC DQ27 66 M_A_DQ28 60 VSS VSS 214
TP1106
[5] M_A_DQ36 CB5/NC DQ28 VSS VSS
1
TP1107 1 TP_M_A_CB6/NC 100 67 M_A_DQ29 61 217 C1169 C1174 C1161 C1164 C1171 C1176 C1191 C1162 C1184 C1157 C1155 C1150 C1165 C1187 C1156 C1154
[5] M_A_DQ37 1 TP_M_A_CB7/NC 104 CB6/NC DQ29 79 M_A_DQ30 64 VSS VSS 218
SC10U6D3V3MX-LL-GP
SC10U6D3V3MX-LL-GP
SC10U6D3V3MX-LL-GP
SC10U6D3V3MX-LL-GP
SC10U6D3V3MX-LL-GP
SC10U6D3V3MX-LL-GP
SC10U6D3V3MX-LL-GP
SC10U6D3V3MX-LL-GP
SC10U6D3V3MX-LL-GP
SC10U6D3V3MX-LL-GP
SC10U6D3V3MX-LL-GP
SC10U6D3V3MX-LL-GP
SC10U6D3V3MX-LL-GP
SC10U6D3V3MX-LL-GP
SC10U6D3V3MX-LL-GP
SC10U6D3V3MX-LL-GP
TP1108
[5] M_A_DQ38 CB7/NC DQ30 M_A_DQ31 VSS VSS
80 65 222
[5] M_A_DQ39 DQ31 VSS VSS
2
M_A_CLK0 137 174 M_A_DQ32 68 223
[5] M_A_DQ40 M_A_CLK#0 139 CK0_T DQ32 173 M_A_DQ33 69 VSS VSS 226
[5] M_A_DQ41 M_A_CLK1 CK0_C DQ33 M_A_DQ34 VSS VSS
138 187 72 227
[5] M_A_DQ42 M_A_CLK#1 140 CK1_T/NF DQ34 186 M_A_DQ35 73 VSS VSS 230
[5] M_A_DQ43 CK1_C/NF DQ35 M_A_DQ36 VSS VSS
170 77 231
[5] M_A_DQ44 M_A_CKE0 DQ36 M_A_DQ37 VSS VSS
109 169 78 234 (R_) (R_) (R_) (R_) (R_) (R_) (R_) (R_)
[5] M_A_DQ45 M_A_CKE1 110 CKE0 DQ37 183 M_A_DQ38 81 VSS VSS 235
[5] M_A_DQ46 CKE1 DQ38 M_A_DQ39 VSS VSS
182 82 238
[5] M_A_DQ47 M_A_CS#0 149 DQ39 195 M_A_DQ40 85 VSS VSS 239
[5] M_A_DQ48 M_A_CS#1 CS0# DQ40 M_A_DQ41 VSS VSS
157 194 86 243
[5] M_A_DQ49 CS1# DQ41 M_A_DQ42 VSS VSS
162 207 89 244
[5] M_A_DQ50 C0/CS2#/NC DQ42 VSS VSS
1
165 208 M_A_DQ43 90 247 C1166 C1178 C1180 C1179 C1177 C1190 C1163 C1159 C1167 C1189 C1173 C1152 C1172 C1170 C1185 C1186
[5] M_A_DQ51 C1/CS3#/NC DQ43 M_A_DQ44 VSS VSS
191 93 248
SC1U10V2KX-1-LL-GP
SC1U10V2KX-1-LL-GP
SC1U10V2KX-1-LL-GP
SC1U10V2KX-1-LL-GP
SC1U10V2KX-1-LL-GP
SC1U10V2KX-1-LL-GP
SC1U10V2KX-1-LL-GP
SC1U10V2KX-1-LL-GP
SC1U10V2KX-1-LL-GP
SC1U10V2KX-1-LL-GP
SC1U10V2KX-1-LL-GP
SC1U10V2KX-1-LL-GP
SC1U10V2KX-1-LL-GP
SC1U10V2KX-1-LL-GP
SC1U10V2KX-1-LL-GP
SC1U10V2KX-1-LL-GP
C C
[5] M_A_DQ52 M_A_ODT0 155 DQ44 190 M_A_DQ45 94 VSS VSS 251
[5] M_A_DQ53 ODT0 DQ45 VSS VSS
2
M_A_ODT1 161 203 M_A_DQ46 98 252
[5] M_A_DQ54 ODT1 DQ46 M_A_DQ47 VSS VSS
204
[5] M_A_DQ55 DQ47
DIMM1:SA0=0 SPD Addr SA0_DIMM1 256 216 M_A_DQ48
[5] M_A_DQ56 SA0 DQ48
DIMM1:SA1=0 SPD Addr SA1_DIMM1 260 215 M_A_DQ49 DDR4-260P-54-GP
[5] M_A_DQ57 SA2_DIMM1 166 SA1 DQ49 228 M_A_DQ50 (R_) (R_) (R_) (R_) (R_) (R_) (R_) (R_)
[5] M_A_DQ58 SA2 DQ50 M_A_DQ51
229
[5] M_A_DQ59 SMB_DATA_MAIN DQ51 M_A_DQ52
254 211
[5] M_A_DQ60 SMB_CLK_MAIN 253 SDA DQ52 212 M_A_DQ53
[5] M_A_DQ61 +1D2V_S3 SCL DQ53 M_A_DQ54
224
[5] M_A_DQ62 DQ54 225 M_A_DQ55
[5] M_A_DQ63 DDR4_DRAMRST_N DQ55 M_A_DQ56
108 237
M_A_ACT# 114 RESET# DQ56 236 M_A_DQ57
[5]
[5]
M_A_DQS_DN0
M_A_DQS_DN1
1 R1118 2
M_A_ALERT#
M_A_EVENT#
116
134
ACT#
ALERT#
DQ57
DQ58
249
250
M_A_DQ58
M_A_DQ59 +1D2V_S3
VREF_CA (Ch. A)
https://vinafix.com
[5] M_A_DQS_DN2 EVENT#/NF DQ59 232 M_A_DQ60
240R2F-1-GP
[5] M_A_DQS_DN3 M_A_PAR DQ60 M_A_DQ61
143 233
[5] M_A_DQS_DN4 PARITY DQ61 M_A_DQ62
245
[5] M_A_DQS_DN5 DQ62
1
M_A_VREF_CA_R 164 246 M_A_DQ63 C1103
[5] M_A_DQS_DN6 VREFCA DQ63 R1109 SCD1U16V2KX-3-LL-GP
[5] M_A_DQS_DN7 1KR2F-3-GP
2
DDR4-260P-54-GP
[5] M_A_DQS_DP0
[5] M_A_DQS_DP1 062.10011.0H21
2
[5] M_A_DQS_DP2
R1110
to DIMM1 and CPU
[5] M_A_DQS_DP3 DIMM_CA_VREF_A_L 1 2
[5] M_A_DQS_DP4 +3D3V_S0 +2D5V_VPP
[5] M_A_DQS_DP5
1
PWR_SEQ = 21 0R0402-PAD-2-GP
[5] M_A_DQS_DP6
1
R1111
[5] M_A_DQS_DP7 1KR2F-3-GP C1105
1
C1125 C1124 C1181 C1188 C1182 C1175 SCD1U16V2KX-3-LL-GP
2
SC10U6D3V3MX-LL-GP
SC10U6D3V3MX-LL-GP
SC1U10V2KX-1-LL-GP
SC1U10V2KX-1-LL-GP
SCD1U16V2KX-3-LL-GP SC2D2U10V3KX-1-LL-GP
[5] M_A_A0
2
[5] M_A_A1
2
[5] M_A_A2
[5] M_A_A3
[5] M_A_A4 +1D2V_S3 M_A_VREF_CA M_A_VREF_CA_R
DIMM1B 2 OF 4 DIMM1C 3 OF 4 R1114 1 2 2R2J-2-GP
B [5] M_A_A5 B
[5] M_A_A6
1
11 M_A_DQS_DN0 111 255 VDDSPD_DIMM1 1 R1116 2
[5] M_A_A7 DQS0_C M_A_DQS_DP0 VDD VDDSPD
13 112 0R0603-PAD-2-GP-U SC4D7U6D3V3KX-LL-GP C1106 C1104
[5] M_A_A8 DQS0_T VDD
1
32 M_A_DQS_DN1 117 C1123 SCD1U16V2KX-3-LL-GP
[5] M_A_A9 DQS1_C VDD
2
34 M_A_DQS_DP1 118 257 VPP_DIMM1 1 R1119 2 SCD022U16V2KX-3-LL-GP
[5] M_A_A10 DQS1_T M_A_DQS_DN2 VDD VPP +0D6V_VREF_S0
53 123 259 0R0603-PAD-2-GP-U
[5] M_A_A11 DQS2_C VDD VPP
2
55 M_A_DQS_DP2 124
[5] M_A_A12 DQS2_T 74 M_A_DQS_DN3 129 VDD 258
PWR_SEQ = 19 or 29 DIMM_CA_CPU_VREF_RC_A
[5] M_A_A13 DQS3_C 76 M_A_DQS_DP3 130 VDD VTT
DQS3_T VDD
1
1
177 M_A_DQS_DN4 135 C1153 C1183 C1168 C1158 C1151 C1160
[5] M_A_WE# DQS4_C 179 M_A_DQS_DP4 136 VDD
SC10U6D3V3MX-LL-GP
SC10U6D3V3MX-LL-GP
SC1U10V2KX-1-LL-GP
SC1U10V2KX-1-LL-GP
SC1U10V2KX-1-LL-GP
SC1U10V2KX-1-LL-GP
R1115
[5] M_A_CAS# DQS4_T 198 M_A_DQS_DN5 141 VDD
[5] M_A_RAS# DQS5_C VDD 24D9R2F-L-GP
2
2
200 M_A_DQS_DP5 142
DQS5_T 219 M_A_DQS_DN6 147 VDD 261
[5] M_A_BA0 DQS6_C VDD 261
2
221 M_A_DQS_DP6 148 262
[5] M_A_BA1 DQS6_T M_A_DQS_DN7 VDD 262
240 153
DQS7_C 242 M_A_DQS_DP7 154 VDD
[5] M_A_BG0 DQS7_T VDD
95 159 NP1
[5] M_A_BG1 DQS8_C 97 160 VDD NP1 NP2
DQS8_T 163 VDD NP2
[5]
[5]
M_A_CLK0
M_A_CLK#0 DM0#/DBI0#
12 VDD SPD Address Table
33
[5]
[5]
M_A_CLK1
M_A_CLK#1
DM1#/DBI#
DM2#/DBI2#
54
75
DDR4-260P-54-GP SMBus 0
[5] M_A_CKE0
DM3#/DBI3#
DM4#/DBI4#
178
199
Device 8-bit Address(hex)
Write Addr:0xA0
[5] M_A_CKE1 DM5#/DBI5#
DM6#/DBI6#
220
241
DIMM A0 Read Addr:0xA1 SA1=0;SA0=0
Write Addr:0xA2
[5]
[5]
M_A_CS#0
M_A_CS#1
DM7#/DBI7#
DM8#/DBI#/NC
96
+1D2V_S3
Write Addr:0xA4
[5] M_A_ODT0 DDR4-260P-54-GP
DIMM B0 Read Addr:0xA5 SA1=1;SA0=0
Write Addr:0xA6
[5] M_A_ODT1 DIMM B1 Read Addr:0xA7 SA1=1;SA0=1
[13,20,99]
[13,20,99]
SMB_DATA_MAIN
SMB_CLK_MAIN
1 0 1 0 0 SA1 SA0 0
[13,20] DDR4_DRAMRST_N
Note:0' 3~7 bit as default
A A
[5] M_A_ACT#
[5] M_A_ALERT#
[5] M_A_PAR
[6] M_A_VREF_CA
Hsichih, Taipei
Title
Title
011_DDR DIMM_1
Size
Size DocumentNumber
Document Number Rev
Rev
C LA710 1
Date:
Sheet 11 of 107
5 4 3 2 1
5 4 3 2 1
D D
C C
https://vinafix.com
B B
A A
Hsichih, Taipei
Title
012_DDR DIMM_2
A LA710 1
5 4 3 2 1
5 4 3 2 1
[6] M_B_DQ0
[6] M_B_DQ1
[6] M_B_DQ2
[6]
[6]
M_B_DQ3
M_B_DQ4 SPD Address of DIMM2
SPD SA2 0
[6]
[6]
[6]
M_B_DQ5
M_B_DQ6
M_B_DQ7
CHANNEL-B DIMM2, A4, H=4mm +3D3V_S0 +3D3V_S0
[6] M_B_DQ8 SPD SA1 1
[6] M_B_DQ9
[6] M_B_DQ10
2
[6] M_B_DQ11
DIMM2A 1 OF 4 DIMM2D 4 OF 4
R1301
(R_)
R1302
SPD SA0 0
[6] M_B_DQ12 M_B_A0 M_B_DQ0
144 8 1 99 0R0402-PAD-2-GP 0R2J-2-GP
[6] M_B_DQ13 M_B_A1 133 A0 DQ0 7 M_B_DQ1 2 VSS VSS 102
[6] M_B_DQ14 M_B_A2 A1 DQ1 M_B_DQ2 VSS VSS
132 20 5 103
[6] M_B_DQ15 A2 DQ2 VSS VSS
1
D M_B_A3 M_B_DQ3 D
131 21 6 106 SPD Addr SA2_DIMM2 SPD Addr SA1_DIMM2 SPD Addr SA0_DIMM2
[6] M_B_DQ16 M_B_A4 128 A3 DQ3 4 M_B_DQ4 9 VSS VSS 107 DIMM1:SA1=0 DIMM2:SA1=1 DIMM2:SA0=0
2
M_B_A5 126 3 M_B_DQ5 10 167 (R_)
[6] M_B_DQ18 M_B_A6 127 A5 DQ5 16 M_B_DQ6 14 VSS VSS 168 R1324 R1305 R1306
Note:
[6] M_B_DQ19 M_B_A7 122 A6 DQ6 17 M_B_DQ7 15 VSS VSS 171 0R0402-PAD-2-GP 0R2J-2-GP 0R0402-PAD-2-GP
SA0 DIMM2 = 0, SA1_DIMM2 = 1
[6] M_B_DQ21
M_B_A8 125
A8 DQ8
28 M_B_DQ8 18
VSS VSS
172 SO-DIMMA SPD Address is 0xA4
M_B_A9 121 29 M_B_DQ9 19 175
[6] M_B_DQ22 A9 DQ9 VSS VSS SO-DIMMA TS Address is 0x34
1
M_B_A10 146 41 M_B_DQ10 22 176
[6] M_B_DQ23 M_B_A11 120 A10/AP DQ10 42 M_B_DQ11 23 VSS VSS 180
[6] M_B_DQ24 M_B_A12 A11 DQ11 M_B_DQ12 VSS VSS
119 24 26 181 SDV
[6] M_B_DQ25 M_B_A13 A12 DQ12 M_B_DQ13 VSS VSS Follow CRB to add for DDR4
158 25 27 184
[6] M_B_DQ26 M_B_WE# 151 A13 DQ13 38 M_B_DQ14 30 VSS VSS 185 Anna review result
[6] M_B_DQ27 M_B_CAS# WE#/A14 DQ14 M_B_DQ15 VSS VSS Wise: 1216
156 37 31 188
[6] M_B_DQ28 M_B_RAS# 152 CAS#/A15 DQ15 50 M_B_DQ16 35 VSS VSS 189
[6] M_B_DQ29 RAS#/A16 DQ16 M_B_DQ17 VSS VSS
49 36 192
[6] M_B_DQ30 M_B_BA0 DQ17 M_B_DQ18 VSS VSS
150 62 39 193 Layout Note:
[6] M_B_DQ31 M_B_BA1 145 BA0 DQ18 63 M_B_DQ19 40 VSS VSS 196
[6] M_B_DQ32 M_B_BG0 115 BA1 DQ19 46 M_B_DQ20 43 VSS VSS 197 Place these Caps near
[6] M_B_DQ33 BG0 DQ20 VSS VSS
[6] M_B_DQ34
M_B_BG1 113
BG1 DQ21
45 M_B_DQ21 44
VSS VSS
201 SODIMM B DECOUPLING SO-DIMMB.
58 M_B_DQ22 47 202
[6] M_B_DQ35
1 TP_M_B_CB0/NC 92 DQ22 59 M_B_DQ23 48 VSS VSS 205
Layout Note:
[6] M_B_DQ36 TP1301
1 TP_M_B_CB1/NC 91 CB0/NC DQ23 70 M_B_DQ24 51 VSS VSS 206 +1D2V_S3 Place these Caps near
[6] M_B_DQ37 TP1302 CB1/NC DQ24 VSS VSS
[6] M_B_DQ38 TP1303 1 TP_M_B_CB2/NC 101
CB2/NC DQ25
71 M_B_DQ25 52
VSS VSS
209 SODIMM A DECOUPLING SO-DIMMA.
1 TP_M_B_CB3/NC 105 83 M_B_DQ26 56 210
[6] M_B_DQ39 TP1304 TP_M_B_CB4/NC CB3/NC DQ26 M_B_DQ27 VSS VSS
TP1305 1 88 84 57 213
[6] M_B_DQ40 CB4/NC DQ27 VSS VSS
1
1 TP_M_B_CB5/NC 87 66 M_B_DQ28 60 214 C1358 C1371 C1365 C1362 C1363 C1375 C1369 C1382 C1350 C1388 C1367 C1378 C1380 C1389 C1376 C1383
1 100 67 61 217
SC10U6D3V3MX-LL-GP
SC10U6D3V3MX-LL-GP
SC10U6D3V3MX-LL-GP
SC10U6D3V3MX-LL-GP
SC10U6D3V3MX-LL-GP
SC10U6D3V3MX-LL-GP
SC10U6D3V3MX-LL-GP
SC10U6D3V3MX-LL-GP
SC10U6D3V3MX-LL-GP
SC10U6D3V3MX-LL-GP
SC10U6D3V3MX-LL-GP
SC10U6D3V3MX-LL-GP
SC10U6D3V3MX-LL-GP
SC10U6D3V3MX-LL-GP
SC10U6D3V3MX-LL-GP
SC10U6D3V3MX-LL-GP
TP1308 1 104 79 64 218
[6] M_B_DQ43 CB7/NC DQ30 VSS VSS
2
80 M_B_DQ31 65 222
[6] M_B_DQ44 M_B_CLK0 DQ31 M_B_DQ32 VSS VSS
137 174 68 223
[6] M_B_DQ45 M_B_CLK#0 CK0_T DQ32 M_B_DQ33 VSS VSS
139 173 69 226
[6] M_B_DQ46 M_B_CLK1 138 CK0_C DQ33 187 M_B_DQ34 72 VSS VSS 227
[6] M_B_DQ47 M_B_CLK#1 CK1_T/NF DQ34 M_B_DQ35 VSS VSS
140 186 73 230
[6] M_B_DQ48 CK1_C/NF DQ35 170 M_B_DQ36 77 VSS VSS 231 (R_) (R_) (R_) (R_) (R_) (R_) (R_) (R_)
[6] M_B_DQ49 M_B_CKE0 DQ36 M_B_DQ37 VSS VSS
109 169 78 234
[6] M_B_DQ50 M_B_CKE1 CKE0 DQ37 M_B_DQ38 VSS VSS
110 183 81 235
[6] M_B_DQ51 CKE1 DQ38 182 M_B_DQ39 82 VSS VSS 238
[6] M_B_DQ52 M_B_CS#0 DQ39 M_B_DQ40 VSS VSS
C 149 195 85 239 C
[6] M_B_DQ53 M_B_CS#1 157 CS0# DQ40 194 M_B_DQ41 86 VSS VSS 243
[6] M_B_DQ54 CS1# DQ41 VSS VSS
1
1 TP_M_B_C0/CS2/NC 162 207 M_B_DQ42 89 244 C1357 C1381 C1351 C1377 C1390 C1354 C1387 C1384 C1368 C1360 C1352 C1391 C1359 C1374 C1356 C1361
[6] M_B_DQ55 TP1309 TP_M_B_C1/CS3_N/NC C0/CS2#/NC DQ42 M_B_DQ43 VSS VSS
1 165 208 90 247
SC1U10V2KX-1-LL-GP
SC1U10V2KX-1-LL-GP
SC1U10V2KX-1-LL-GP
SC1U10V2KX-1-LL-GP
SC1U10V2KX-1-LL-GP
SC1U10V2KX-1-LL-GP
SC1U10V2KX-1-LL-GP
SC1U10V2KX-1-LL-GP
SC1U10V2KX-1-LL-GP
SC1U10V2KX-1-LL-GP
SC1U10V2KX-1-LL-GP
SC1U10V2KX-1-LL-GP
SC1U10V2KX-1-LL-GP
SC1U10V2KX-1-LL-GP
SC1U10V2KX-1-LL-GP
SC1U10V2KX-1-LL-GP
[6] M_B_DQ56 TP1310 C1/CS3#/NC DQ43 M_B_DQ44 VSS VSS
191 93 248
[6] M_B_DQ57 DQ44 VSS VSS
2
M_B_ODT0 155 190 M_B_DQ45 94 251
[6] M_B_DQ58 M_B_ODT1 161 ODT0 DQ45 203 M_B_DQ46 98 VSS VSS 252
[6] M_B_DQ59 ODT1 DQ46 M_B_DQ47 VSS VSS
204
[6] M_B_DQ60 SA0_DIMM2 DQ47 M_B_DQ48
DIMM2:SA0=0 SPD Addr 256 216
[6] M_B_DQ61 SA1_DIMM2 SA0 DQ48 M_B_DQ49 DDR4-260P-49-GP-U1
DIMM2:SA1=1 SPD Addr 260 215
[6] M_B_DQ62 SA2_DIMM2 SA1 DQ49 M_B_DQ50
166 228 (R_) (R_) (R_) (R_) (R_) (R_) (R_) (R_)
[6] M_B_DQ63 SA2 DQ50 229 M_B_DQ51
SMB_DATA_MAIN 254 DQ51 211 M_B_DQ52
[6] M_B_DQS_DN0 SMB_CLK_MAIN SDA DQ52 M_B_DQ53
253 212
[6] M_B_DQS_DN1 +1D2V_S3 SCL DQ53 224 M_B_DQ54
[6] M_B_DQS_DN2 DQ54 M_B_DQ55
225
https://vinafix.com
[6] M_B_DQS_DN3 DDR4_DRAMRST_N 108 DQ55 237 M_B_DQ56
[6] M_B_DQS_DN4 M_B_ACT# RESET# DQ56 M_B_DQ57
114 236
[6] M_B_DQS_DN5 M_B_ALERT# ACT# DQ57 M_B_DQ58
116 249
[6] M_B_DQS_DN6 1 R1316 2 M_B_EVENT# 134 ALERT# DQ58 250 M_B_DQ59
[6] M_B_DQS_DN7
240R2F-1-GP
M_B_PAR 143
EVENT#/NF DQ59
DQ60
232
233
M_B_DQ60
M_B_DQ61
VREF_DQ (Ch. B)
[6] M_B_DQS_DP0 PARITY DQ61 M_B_DQ62 +1D2V_S3
245
[6] M_B_DQS_DP1 M_B_VREF_CA_R DQ62 M_B_DQ63
164 246
[6] M_B_DQS_DP2 VREFCA DQ63
[6] M_B_DQS_DP3
[6] M_B_DQS_DP4
1
DDR4-260P-49-GP-U1 C1332
[6] M_B_DQS_DP5
R1321 SCD1U16V2KX-3-LL-GP
[6] M_B_DQS_DP6 1KR2F-3-GP
[6] M_B_DQS_DP7
2
[6] M_B_A0
2
[6] M_B_A1
R1322
to DIMM1 and CPU
[6] M_B_A2 DIMM_CA_VREF_B_L 1 2
[6] M_B_A3
SCD1U16V2KX-3-LL-GP
[6] M_B_A4
1
+2D5V_VPP 0R0402-PAD-2-GP
[6] M_B_A5
1
DIMM2B 2 OF 4 +1D2V_S3 DIMM2C 3 OF 4 +3D3V_S0 R1318 C1335
[6] M_B_A6 1KR2F-3-GP
B [6] M_B_A7 M_B_DQS_DN0 VDDSPD_DIMM2 B
11 111 255 2 R1317 1
[6] M_B_A8 DQS0_C VDD VDDSPD
2
13 M_B_DQS_DP0 112
0R0603-PAD-2-GP-U
C1329
SCD1U16V2KX-3-LL-GP
0R0603-PAD-2-GP-U
[6] M_B_A9 DQS0_T VDD
2
1
1
32 M_B_DQS_DN1 117
SC2D2U10V3KX-1-LL-GP
[6] M_B_A10
C1353 C1372 C1366 C1386 2016.06.29
DQS1_C VDD
1
34 M_B_DQS_DP1 118 257
SC10U6D3V3MX-LL-GP
SC10U6D3V3MX-LL-GP
SC1U10V2KX-1-LL-GP
SC1U10V2KX-1-LL-GP
C1330 Julian
[6] M_B_A11 DQS1_T VDD VPP
1
53 M_B_DQS_DN2 123 259 VPP_DIMM2
[6] M_B_A12 DQS2_C VDD VPP
2
55 M_B_DQS_DP2 124
R1315
[6] M_B_A13 DQS2_T VDD
2
74 M_B_DQS_DN3 129 258 M_B_VREF_DQ R1319 1 2 2R2J-2-GP M_B_VREF_CA_R
DQS3_C 76 M_B_DQS_DP3 130 VDD VTT
[6] M_B_WE# DQS3_T VDD
1
177 M_B_DQS_DN4 135
[6] M_B_CAS# DQS4_C VDD
2
179 M_B_DQS_DP4 136 SC4D7U6D3V3KX-LL-GP C1333 C1331
[6] M_B_RAS# DQS4_T VDD
1
198 M_B_DQS_DN5 141 C1334 SCD1U16V2KX-3-LL-GP
DQS5_C VDD
2
200 M_B_DQS_DP5 142 SCD022U16V2KX-3-LL-GP
[6] M_B_BA0 DQS5_T M_B_DQS_DN6 VDD
219 147 261
[6] M_B_BA1 DQS6_C VDD 261
2
221 M_B_DQS_DP6 148 262 +0D6V_VREF_S0
DQS6_T 240 M_B_DQS_DN7 153 VDD 262 DIMM_CA_CPU_VREF_RC_B
[6] M_B_BG0 DQS7_C 242 M_B_DQS_DP7 154 VDD PWR_SEQ = 19 or 29
[6] M_B_BG1 DQS7_T VDD
1
95 159 NP1
DQS8_C VDD NP1
1
1
97 160 NP2 C1355 C1373 C1379 C1370 C1364 C1385 R1320
[6] M_B_CLK0 DQS8_T 163 VDD NP2
SC10U6D3V3MX-LL-GP
SC10U6D3V3MX-LL-GP
SC1U10V2KX-1-LL-GP
SC1U10V2KX-1-LL-GP
SC1U10V2KX-1-LL-GP
SC1U10V2KX-1-LL-GP
[6] M_B_CLK#0 12 VDD Place these caps 24D9R2F-L-GP
[6] M_B_CLK1 DM0#/DBI0# close to VTT1 and
2
2
33
[6] M_B_CLK#1 DM1#/DBI# VTT2.
2
54 DDR4-260P-49-GP-U1
DM2#/DBI2# 75
[6] M_B_CKE0 DM3#/DBI3# 178
[6] M_B_CKE1 DM4#/DBI4# 199
DM5#/DBI5# 220
[6]
[6]
M_B_CS#0
M_B_CS#1
DM6#/DBI6#
DM7#/DBI7#
241 SPD Address Table
96
[6] M_B_ODT0
DM8#/DBI#/NC +1D2V_S3
SMBus 0
[6] M_B_ODT1 DDR4-260P-49-GP-U1 Device 8-bit Address(hex)
Write Addr:0xA0
[11,20,99]
[11,20,99]
SMB_DATA_MAIN
SMB_CLK_MAIN
Write Addr:0xA2
[11,20] DDR4_DRAMRST_N
Write Addr:0xA4
[6] M_B_ACT#
Write Addr:0xA6
A
[6]
[6]
M_B_ALERT#
M_B_PAR
A
[6] M_B_VREF_DQ
1 0 1 0 0 SA1 SA0 0
Note:0' 3~7 bit as default
Hsichih, Taipei
Title
Title
013_DDR DIMM_3
Size
Size DocumentNumber
Document Number Rev
Rev
C LA710 1
Date:
Sheet 13 of 107
5 4 3 2 1
5 4 3 2 1
D D
C C
https://vinafix.com
B B
A A
Hsichih, Taipei
Title
014_DDR DIMM_4
A LA710 1
5 4 3 2 1
5 4 3 2 1
+3D3V_VCCPGPPA
D D
1
R1502
10KR2F-2-GP
SPI0 (R_)
2
PCH1A 1 OF 13
[99] SPI0_SI_XDP VCCPGPPA_R PCH_PLTRST_N PLTRST_N
BE36 AV29 R1512 1 2
[22,25,91] SPI0_SI_ROM GPP_A11/PME#/SD_VDD2_PWR_EN# GPP_B13/PLTRST#
[22,25,91] SPI0_SO_ROM 0R0402-PAD-2-GP
1
TP1516 1 TP_PCH_R15 R15
[25] SPI0_CS0_ROM_N TP_PCH_R13 RSVD2
TP1517 1 R13 Y47 R1508
[25,91] SPI0_CLK_ROM RSVD1 GPP_K16/GSXCLK TP_PCH_GPP_K12
Y46 1 TP1502 100KR2F-L1-GP
GPP_K12/GSXDOUT Y48 (R_)
[22,25] SPI0_WP_ROM GPP_K13/GSXSLOAD W46
[22,25] SPI0_HOLD_ROM GPP_K14/GSXDIN
2
TP1501 1 TP_PCH_AL37 AL37 AA45
TP1510 1 TP_PCH_AN35 AN35 VSS GPP_K15/GSXSRESET#
SPI0_SI_XDP R1503 1 2 0R0402-PAD-2-GP TP
SPI0_SI_ROM R1504 1 2 0R0402-PAD-2-GP SPI0_SI_PCH AU41 AL47 TPM_DET_N
SPI0_SO_ROM R1505 1 2 0R0402-PAD-2-GP SPI0_SO_PCH BA45 SPI0_MOSI GPP_E3/CPU_GP0 AM45 PCH_FANPWR_EN_N
SPI0_CS0_ROM_N R1506 1 2 0R0402-PAD-2-GP SPI0_CS0_PCH_N AY47 SPI0_MISO GPP_E7/CPU_GP1 BF32 BT_RF_KILL_R_N
SPI0_CLK_ROM 1 2 SPI0_CLK_PCH AW47 SPI0_CS0# GPP_B3/CPU_GP2 BC33 EXTTS_SNI_DRV1_PCH +3D3V_S5
TPM R1507 0R0402-PAD-2-GP
AW48 SPI0_CLK
SPI0_CS1#
GPP_B4/CPU_GP3
AE44 TP_PCH_GPP_H18 1 TP1503
SPI0_WP_ROM R1501 1 2 0R0402-PAD-2-GP SPI0_WP_PCH AY48 GPP_H18/SML4ALERT# AJ46
SPI0_HOLD_ROM SPI0_HOLD_PCH SPI0_IO2 GPP_H17/SML4DATA RTC_DET_N (R_)
R1509 1 2 0R0402-PAD-2-GP BA46 AE43 R1521 1 2 10KR2J-3-GP
[24,62] PLTRST_N SPI0_CS_TPM SPI0_CS2_PCH_N SPI0_IO3 GPP_H16/SML4CLK GPP_H_15
R1516 1 2 0R0402-PAD-2-GP AT40 AC47
BE19 SPI0_CS2# GPP_H15/SML3ALERT# AD48
[22] GPP_H_12 GPP_D1/SPI1_CLK/SBK1_BK1 GPP_H14/SML3DATA
BF19 AF47
[22] GPP_H_15 GPP_D0/SPI1_CS#/SBK0_BK0 GPP_H13/SML3CLK GPP_H_12
[22] LPSS_GSPI1_MOSI BF18 AB47
BE18 GPP_D3/SPI1_MOSI/SBK3_BK3 GPP_H12/SML2ALERT# AD47 TP_PCH_GPP_H11 1 TP1511 +3V_RTC
[22] LPSS_GSPI0_MOSI GPP_D2/SPI1_MISO/SBK2_BK2 GPP_H11/SML2DATA R1515
BC17 AE48
BD17 GPP_D22/SPI1_IO3 GPP_H10/SML2CLK BB44 PCH_INTRUDER_N 1 2
GPP_D21/SPI1_IO2 INTRUDER#
[65] BRIGHTNESS_PLUS CANON-LAKE-GP 1MR2J-1-GP
[65] BRIGHTNESS_MINUS
[91] SPI0_CS_TPM (071.CANNO.0D0U)
C C
[39] PCH_FANPWR_EN_N
[61] BT_RF_KILL_R_N +3D3V_S0
PCH1K 11 OF 13
[65] DMIC_DET LPSS_GSPI1_MOSI BOARD_ID_0
BA26 BA20
[24,25] RTC_DET_N GPP_B22/GSPI1_MOSI GPP_D9/ISH_SPI_CS#/GSPI2_CS0# BOARD_ID_1
[91] TCM_DET_N BD30 BB20
AU26 GPP_B21/GSPI1_MISO GPP_D10/ISH_SPI_CLK/GSPI2_CLK BB16 BOARD_ID_2
[91] TPM_DET_N RTC_DET_N RTC_DET_R_N GPP_B20/GSPI1_CLK GPP_D11/ISH_SPI_MISO/GP_BSSB_CLK/GSPI2_MISO BOARD_ID_3
[65] CAM_DET_N R1524 1 2 AW26 AN18
LPSS_GSPI0_MOSI 0R0402-PAD-2-GP BE30 GPP_B19/GSPI1_CS0# GPP_D12/ISH_SPI_MOSI/GP_BSSB_DI/GSPI2_MOSI CAM_DET_N RN1502 1 4 SRN10KJ-5-GP
[33] CR_DET_N GPP_B18/GSPI0_MOSI USB_DEBUG_GPPD16 CR_DET_N
BD29 BF14 2 3
BF29 GPP_B17/GSPI0_MISO GPP_D16/ISH_UART0_CTS#/CNV_WCEN AR18
https://vinafix.com
TCM_DET_N BB26 GPP_B16/GSPI0_CLK GPP_D15/ISH_UART0_RTS#/GSPI2_CS1#/CNV_WFEN BF17
[92] PS2_DET_N GPP_B15/GSPI0_CS0# GPP_D14/ISH_UART0_TXD/I2C2_SCL LPT_PORT_DET_N PS2_DET_N
[65] COMPORT_DET_N BE17 RN1503 1 4 SRN10KJ-5-GP
TP1504 1 GPP_C9 BB24 GPP_D13/ISH_UART0_RXD/I2C2_SDA COMPORT_DET_N 2 3
[92] LPT_PORT_DET_N GPP_C8 GPP_C9/UART0_TXD
TP1505 1 BE23
AP24 GPP_C8/UART0_RXD
DMIC_DET BA24 GPP_C11/UART0_CTS#
[25] CMOS_IN GPP_C10/UART0_RTS# EXTTS_SNI_DRV1_PCH R1522 1 2 8K2R2F-1-GP (R_)
PS2_DET_N BD21 AG45
CR_DET_N AW24 GPP_C15/UART1_CTS#/ISH_UART1_CTS# GPP_H20/ISH_I2C0_SCL AH46
AP21 GPP_C14/UART1_RTS#/ISH_UART1_RTS# GPP_H19/ISH_I2C0_SDA
CAM_DET_N AU24 GPP_C13/UART1_TXD/ISH_UART1_TXD AH47
GPP_C12/UART1_RXD/ISH_UART1_RXD GPP_H22/ISH_I2C1_SCL AH48
BRIGHTNESS_MINUS AV21 GPP_H21/ISH_I2C1_SDA
BRIGHTNESS_PLUS AW21 GPP_C23/UART2_CTS#
COMPORT_DET_N BE20 GPP_C22/UART2_RTS# DMIC_DET R1517 1 2 10KR2J-3-GP
BD20 GPP_C21/UART2_TXD AV34 TP_PCH_GPP_A23 1
USB DEBUG GPIO GPP_C20/UART2_RXD GPP_A23/ISH_GP5
GPP_A22/ISH_GP4
AW32
TP1514
TP1509 1 GPP_C19 BE21 BA33 TCM_DET_N R1511 1 2 100KR2J-1-GP

TP1506 1 GPP_C18 BF21 GPP_C19/I2C1_SCL GPP_A21/ISH_GP3 BE34 TP_PCH_GPP_A20 1 TP1515
[38] USB_DEBUG_GPPD16 GPP_C17 GPP_C18/I2C1_SDA GPP_A20/ISH_GP2 TP_PCH_GPP_A19
TP1508 1 BC22 BD34 1 TP1513
TP1507 1 GPP_C16 BF23 GPP_C17/I2C0_SCL GPP_A19/ISH_GP1 BF35 TP_PCH_GPP_A18 1 TP1512 TPM_DET_N R1510 1 2 100KR2J-1-GP
GPP_C16/I2C0_SDA GPP_A18/ISH_GP0 BD38 CMOS_IN
B
BE15 GPP_A17/SD_VDD1_PWR_EN#/ISH_GP7 B
BE14 GPP_D4/ISH_I2C2_SDA/I2C3_SDA/SBK4_BK4
GPP_D23/ISH_I2C2_SCL/I2C3_SCL
CANON-LAKE-GP
(071.CANNO.0D0U)
H1502
STF237R125H42-1-GP
BOARD ID
1
+3D3V_S5 +3D3V_S5 +3D3V_S5 +3D3V_S5 PCHHT1

=Standby Power
PWR_SEQ = 8 Function = CRB:+V3P3A
1
(R_) (R_) (V330_)

R1526 R1529 R1528 R1530
10KR2J-3-GP 10KR2J-3-GP 10KR2J-3-GP 10KR2J-3-GP
(R_) HEAT-SINK16 (R_)
H1501
2
STF237R125H42-1-GP
BOARD_ID_3 BOARD_ID_2 BOARD_ID_1 BOARD_ID_0
1
R1531 R1527 R1533 R1532

1
10KR2J-3-GP 10KR2J-3-GP 10KR2J-3-GP 10KR2J-3-GP

A (A710_) A
2
Hsichih, Taipei
Title
Title
015_PCH_(SPI/UART/I2C )
Size
Size DocumentNumber
Document Number Rev
Rev
C LA710 1
Date:
Sheet 15 of 107
5 4 3 2 1
5 4 3 2 1
DMI PCH1B 2 OF 13 171114 EE Leon: SWAP USB2 Port 1 & 2 for layout request
DMI_TX_CPU_N3 K34 J3 USB2_USB20_N
[3] DMI_TX_CPU_P0 DMI_TX_CPU_P3 DMI0_RXN USB2N_1 USB2_USB20_P
J35 J2 Rear USB 3.1 / Gen2 / Port2
[3] DMI_TX_CPU_N0 DMI_RX_CPU_N3 C33 DMI0_RXP USB2P_1 N13 USB1_USB20_N
[3] DMI_RX_CPU_P0 DMI_RX_CPU_P3 B33 DMI0_TXN USB2N_2 N15 USB1_USB20_P
[3] DMI_RX_CPU_N0 DMI0_TXP USB2P_2 Rear USB 3.1 / Gen2 / Port1
DMI_TX_CPU_N2 G33 K4 USB3_USB20_N
DMI_TX_CPU_P2 F34 DMI1_RXN USB2N_3 K3 USB3_USB20_P
[3] DMI_TX_CPU_P1 DMI_RX_CPU_N2 DMI1_RXP USB2P_3 USB4_USB20_N
Rear USB 3.1 / Gen2 / Port3
C32 M10
[3] DMI_TX_CPU_N1 DMI_RX_CPU_P2 B32 DMI1_TXN USB2N_4 L9 USB4_USB20_P
[3] DMI_RX_CPU_P1 DMI_TX_CPU_N1 DMI1_TXP USB2P_4 USB5_USB20_N
Front USB 3.1 / Gen2 / Port4 , Support USB Debug
K32 M1
[3] DMI_RX_CPU_N1 DMI_TX_CPU_P1 DMI2_RXN USB2N_5 USB5_USB20_P
J32 L2 Rear USB 3.0 / Gen1 / Port5 , Support USB power on
DMI_RX_CPU_N1 C31 DMI2_RXP USB2P_5 K7 CHARGER_USB20_N
[3] DMI_TX_CPU_P2 DMI_RX_CPU_P1 DMI2_TXN USB2N_6 CHARGER_USB20_P
B31 K6 Front USB 3.0 / Gen1 / Port6 , Support USB charger
[3] DMI_TX_CPU_N2 DMI_TX_CPU_N0 G30 DMI2_TXP USB2P_6 L4 CARD_USB20_N
[3] DMI_RX_CPU_P2 DMI_TX_CPU_P0 F30 DMI3_RXN USB2N_7 L3 CARD_USB20_P
[3] DMI_RX_CPU_N2 DMI_RX_CPU_N0 C29 DMI3_RXP USB2P_7 G4 W EBCAM_USB20_N Card Reader
DMI_RX_CPU_P0 B29 DMI3_TXN USB2N_8 G5 W EBCAM_USB20_P
[3] DMI_TX_CPU_P3
A25 DMI3_TXP USB2P_8 M6 W LAN_USB20_N Webcam
[3] DMI_TX_CPU_N3 B25 DMI7_TXP USB2N_9 N8 W LAN_USB20_P
[3] DMI_RX_CPU_P3 P24 DMI7_TXN USB2P_9 H3
WLAN
[3] DMI_RX_CPU_N3 DMI7_RXP USB2N_10
D R24 H2 D
C26 DMI7_RXN USB2P_10 R10
B26 DMI6_TXP USB2N_11 P9
F26 DMI6_TXN USB2P_11 G1
PCIE WLAN G26 DMI6_RXP USB2N_12 G2
B27 DMI6_RXN USB2P_12 N3 +3D3V_S5
[61] W LAN_PCIE_RX_N DMI5_TXP USB2N_13
C27 N2
[61] W LAN_PCIE_RX_P DMI5_TXN USB2P_13
L26 E5
[61] W LAN_PCIE_TX_N DMI5_RXP USB2N_14
M26 F6
[61] W LAN_PCIE_TX_P DMI5_RXN USB2P_14
D29
E28 DMI4_TXP AH36 USB2_OC0_P1_P2_P3_N Function = OC0 USB2_OC2_P6_N R1631 1 2 10KR2F-2-GP
K29 DMI4_TXN GPP_E9/USB2_OC0# AL40 USB2_OC1_P4_P5_N Function = OC1
M29 DMI4_RXP GPP_E10/USB2_OC1# AJ44 USB2_OC2_P6_N Function = OC2
DMI4_RXN GPP_E11/USB2_OC2# AL41 Function = OC3
PCIE LAN G17 GPP_E12/USB2_OC3# AV47 USB2_OC4_N
Port7&Port8
1
VISACH2_D3
TP1601
[22] USB2_OC0_P1_P2_P3_N 1
RN1603
4
[31] LAN_PCIE_TX_N PCIE1_RXN/USB31_7_RXN
GPP_F15/USB2_OC4# USB2_OC1_P4_P5_N
F16 AR35 2 3
[31] LAN_PCIE_TX_P PCIE1_RXP/USB31_7_RXP
GPP_F16/USB2_OC5#
A17 AR37
[31] LAN_PCIE_RX_N PCIE1_TXN/USB31_7_TXN
GPP_F17/USB2_OC6#
B17 AV43 SRN10KJ-5-GP
[31] LAN_PCIE_RX_P PCIE1_TXP/USB31_7_TXP
GPP_F18/USB2_OC7#
R21
P21 PCIE2_RXN/USB31_8_RXN F4 USB2_COMP R1604 1 2 113R2F-GP
B18 PCIE2_RXP/USB31_8_RXP USB2_COMP F3 USB2_VBUSSENSE R1605 1 2 10KR2J-3-GP
C18 PCIE2_TXN/USB31_8_TXN USB2_VBUSSENSE U13 USB2_OC2_P6_N R1620 2 1 EC_USB_CHARGER_OC_N
K18 PCIE2_TXP/USB31_8_TXP RSVD1 G3 USB2_ID R1606 1 2 1KR2J-1-GP 0R0402-PAD-2-GP
J18 PCIE3_RXN/USB31_9_RXN USB2_ID
B19 PCIE3_RXP/USB31_9_RXP BE41 PCH_GPD7
C19 PCIE3_TXN/USB31_9_TXN GPD7
PCIE SSD N18 PCIE3_TXP/USB31_9_TXP G45 SSD_PCIE3_TX_P
PCIE4_RXN/USB31_10_RXN PCIE24_TXP SSD_PCIE3_TX_N
EE Leon: follow CFL EDS strap setting
R18 G46
[62] SSD_PCIE0_RX_N PCIE4_RXP/USB31_10_RXP PCIE24_TXN SSD_PCIE3_RX_P +3D3V_DSW
D20 Y41
[62] SSD_PCIE0_RX_P PCIE4_TXN/USB31_10_TXN PCIE24_RXP SSD_PCIE3_RX_N
C20 Y40
[62] SSD_PCIE0_TX_N W LAN_PCIE_RX_N PCIE4_TXP/USB31_10_TXP PCIE24_RXN SSD_PCIE2_TX_P
F20 G48
[62] SSD_PCIE0_TX_P W LAN_PCIE_RX_P PCIE5_RXN PCIE23_TXP SSD_PCIE2_TX_N
G20 G49
W LAN_PCIE_TX_N PCIE5_RXP PCIE23_TXN SSD_PCIE2_RX_P
2
WLAN B21 W44
[62] SSD_PCIE1_RX_N W LAN_PCIE_TX_P PCIE5_TXN PCIE23_RXP SSD_PCIE2_RX_N
A22 W43
[62] SSD_PCIE1_RX_P LAN_PCIE_RX_N K21 PCIE5_TXP PCIE23_RXN H48 SSD_PCIE1_TX_P SSD R1650
1KR2J-1-GP
[62] SSD_PCIE1_TX_N LAN_PCIE_RX_P PCIE6_RXN PCIE22_TXP SSD_PCIE1_TX_N
J21 H47
[62] SSD_PCIE1_TX_P LAN_PCIE_TX_N PCIE6_RXP PCIE22_TXN SSD_PCIE1_RX_P
D21 U41
LAN PCIE6_TXN PCIE22_RXP
1
LAN_PCIE_TX_P C21 U40 SSD_PCIE1_RX_N
[62] SSD_PCIE2_RX_N PCIE6_TXP PCIE22_RXN SSD_PCIE0_TX_P PCH_GPD7
B23 F46
[62] SSD_PCIE2_RX_P PCIE7_TXP PCIE21_TXP SSD_PCIE0_TX_N
C23 G47
[62] SSD_PCIE2_TX_N PCIE7_TXN PCIE21_TXN SSD_PCIE0_RX_P
J24 R44
[62] SSD_PCIE2_TX_P PCIE7_RXP PCIE21_RXP SSD_PCIE0_RX_N
L24 T43
PCIE7_RXN PCIE21_RXN
2
F24
[62] SSD_PCIE3_RX_N PCIE8_RXN
G24 R1651
[62] SSD_PCIE3_RX_P PCIE8_RXP
B24 1KR2J-1-GP
[62] SSD_PCIE3_TX_N PCIE8_TXN
C24 (R_)
[62] SSD_PCIE3_TX_P PCIE8_TXP
1
CANON-LAKE-GP
(071.CANNO.0D0U)
C C
USB 2.0
[36] USB1_USB20_N
[36] USB1_USB20_P
PCH1M 13 OF 13
BD4
[36] USB2_USB20_N CNV_WR_CLKN
AW13 BE3
[36] USB2_USB20_P GPP_G0/SD_CMD CNV_WR_CLKP
BE9
BF8 GPP_G1/SD_D0 BB3
[36] USB3_USB20_N GPP_G2/SD_D1 CNV_WR_D0N
BF9 BB4
[36] USB3_USB20_P GPP_G3/SD_D2 CNV_WR_D0P
BG8 BA3
BE8 GPP_G4/SD_D3 CNV_WR_D1N BA2
[38] USB4_USB20_N GPP_G5/SD_CD# CNV_WR_D1P
BD8
[38] USB4_USB20_P GPP_G6/SD_CLK
AV13 BC5
GPP_G7/SD_WP CNV_WT_CLKN BB6
[38] USB5_USB20_N H_SKTOCC_N PCH_H_SKTOCC_N CNV_WT_CLKP
R1607 2 1 AP3
[38] USB5_USB20_P GPP_I11/M2_SKT2_CFG0
0R0402-PAD-2-GP AP2 BE6
AN4 GPP_I12/M2_SKT2_CFG1 CNV_WT_D0N BD7
[34] CHARGER_USB20_N GPP_I13/M2_SKT2_CFG2 CNV_WT_D0P
AM7 BG6
[34] CHARGER_USB20_P GPP_I14/M2_SKT2_CFG3 CNV_WT_D1N BF6
AV6 CNV_WT_D1P BA1 CNV_W T_RCOMP R1609 1 2 150R2F-1-GP
CPU_VCCIO_PW R_GATEB AY3 GPP_J0/CNV_PA_BLANKING CNV_WT_RCOMP
AR13 GPP_J1/CPU_VCCIO_PWR_GATE# B12 PCIE_RCOMPN
AV7 GPP_J11/A4WP_PRESENT PCIE_RCOMPN A13 PCIE_RCOMPP R1608 1 2
GPP_J10 PCIE_RCOMPP
1
AW3 BE5 100R2F-L1-GP-U

AT10 GPP_J_2 SD_RCOMP_1P8 BE4
Card Reader R1601
47KR2F-GP CNV_BRI_DT AV4 GPP_J_3 SD_RCOMP_3P3 BD1
EE Leon: follow CFL CRB setting GPP_J_4_CNV_BRI_DT_UART0_RTSBGPPJ_RCOMP_1P81 PCH_SD3_GPPJ_RCOMP
R1602
AY2 BE1 1 2 EE Leon: follow CFL EDS setting
[33] CARD_USB20_N CNV_RGI_DT GPP_J5/CNV_BRI_RSP/UART0_RXD GPPJ_RCOMP_1P82
BA4 BE2
[33] CARD_USB20_P GPP_J6/CNV_RGI_DT/UART0_TXD GPPJ_RCOMP_1P83
2
AV3 200R2F-L-GP
AW2 GPP_J7/CNV_RGI_RSP/UART0_CTS# Y35
GPP_J_9_CNV_MFUART2_TXD AU9 GPP_J8/CNV_MFUART2_RXD RSVD2 Y36
Webcam
https://vinafix.com
GPP_J9/CNV_MFUART2_TXD RSVD3
[65] W EBCAM_USB20_N
BC1
[65] W EBCAM_USB20_P RSVD1 AL35
TP
NGFF WLAN CANON-LAKE-GP

(071.CANNO.0D0U)
[61] W LAN_USB20_N
[61] W LAN_USB20_P
[36] USB2_OC0_P1_P2_P3_N
[35,36] USB2_OC1_P4_P5_N
[24] EC_USB_CHARGER_OC_N
B B
HDMI
[56] HDMI_DET_PCH
[56] HDMI_CTRL_CLK_PCH
[56] HDMI_CTRL_DATA_PCH
PCH1E 5 OF 13
AL13 HDMI_CTRL_CLK_PCH
HDMI_DET_PCH AT6 GPP_I5/DDPB_CTRLCLK AR8 HDMI_CTRL_DATA_PCH
eDP GPP_I0/DDPB_HPD0/DISP_MISC0 GPP_I6/DDPB_CTRLDATA
1
AN10 AN13
[95] eDP_HPD_PCH GPP_I1/DDPC_HPD1/DISP_MISC1 GPP_I7/DDPC_CTRLCLK DDPC_CTRLDATA_PCH R1641 1
(R_) AP9 AL10 2 2K2R2J-2-GP
R1611 SMC_EXTSMI_R_N AL15 GPP_I2/DPPD_HPD2/DISP_MISC2 GPP_I8/DDPC_CTRLDATA AL9 MPCIE_DISABLE_N
100KR2F-L1-GP GPP_I3/DPPE_HPD3/DISP_MISC3 GPP_I9/DDPD_CTRLCLK AR3 DDPD_CTRLDATA_PCH R1640 1 2 2K2R2J-2-GP
GPP_I10/DDPD_CTRLDATA AN40 DDPF_CTRLDATA_PCH R1603 1 2 2K2R2J-2-GP
GPP_F23/DDPF_CTRLDATA
2
AT49
GPP_F22/DDPF_CTRLCLK TP1602
AP41 PCH_PS_ON_N 1
eDP_HPD_PCH AN6 GPP_F14/EXT_PWR_GATE#/PS_ON#
GPP_I4/EDP_HPD/DISP_MISC4 M45 TPAD26-OP-GP
GPP_K23/IMGCLKOUT1
1
L48
R1610 GPP_K22/IMGCLKOUT0 T45 SPI_SIRQ#
100KR2F-L1-GP GPP_K21 T46 PCH_TEST_SETUP_MENU
(R_) GPP_K20 AJ47
GPP_H23/TIME_SYNC0
[4] H_SKTOCC_N
2
CANON-LAKE-GP
[22] CNV_BRI_DT (071.CANNO.0D0U)
[22] CNV_RGI_DT
[22] GPP_J_9_CNV_MFUART2_TXD
+3D3V_S0
[61] MPCIE_DISABLE_N
[91] SPI_SIRQ# Follow CRB, pull high 2.2K

Wise: 0905
4
3
RN1602 R1614
For DVI dongle SRN2K2J-1-GP 10KR2F-2-GP
Wise 0814
1
1
2
HDMI_CTRL_DATA_PCH PCH_TEST_SETUP_MENU
HDMI_CTRL_CLK_PCH
A A
+3D3V_S5
2
R1612 R1613
10KR2F-2-GP 10KR2F-2-GP
(R_)
1
SMC_EXTSMI_R_N
SPI_SIRQ# Wistron Incorporated

Hsichih, Taipei
TitleTitle
016_PCH_(DMI/PCI-E/USB)
SizeSize Document
Document Number
Number RevRev
D LA710 1
Date:
Sheet 16 of 107
5 4 3 2 1
5 4 3 2 1
[61] CLINK_CLK_PCH
[61] CLINK_DATA_PCH
[61] CLINK_RST_PCH_N
D D
+3D3V_S0
SV_ADVANCE_GP48 R1712 1 2 20KR2J-L2-GP
PCH1C 3 OF 13
CLINK_CLK_PCH AR2 G36 GP39_GFX_CRB_DETECT R1720 1 2 10KR2F-2-GP
CLINK_DATA_PCH AT5 CL_CLK PCIE9_RXN F36 (R_)
CLINK_RST_PCH_N AU4 CL_DATA PCIE9_RXP C34
CL_RST# PCIE9_TXN D34 R1717 1 2 10KR2F-2-GP
P48 PCIE9_TXP
TP1702 1 TP_PCH_GPP_K9 V47 GPP_K8 PCH_RSVD_GPP_F11 R1714 1 2 10KR2F-2-GP
+3D3V_S5 V48 GPP_K9 K37
W47 GPP_K10 PCIE10_RXN J37
GPP_K11 PCIE10_RXP C35 PCH_CONFIG_JUMPER R1719 1 2 1KR2F-3-GP
HDD R1701 1 2 10KR2F-2-GP PCH_GPP_K0_I2C_ALERT L47 PCIE10_TXN B35
Reserve (CRB) GPP_K0 PCIE10_TXP
(R_) L46
[60] HDD_SATA_TX_P TP_PCH_GPP_K2 GPP_K1
[60] HDD_SATA_TX_N TP1701 1 U48 F44 R1715 1 2 10KR2F-2-GP
EC_SCI_N R1703 1 2 PCH_SCI_N U47 GPP_K2 PCIE15_RXN/SATA2_RXN E45
[60] HDD_SATA_RX_P GPP_K3 PCIE15_RXP/SATA2_RXP
[60] HDD_SATA_RX_N 0R0402-PAD-2-GP N48 B40
RN1701 PCH_SV_DETECT N47 GPP_K4 PCIE_15_SATA_2_TXN C40 PCH_SV_DETECT R1716 1 2 10KR2F-2-GP
2 3 PCH_GPP_K6 P47 GPP_K5 PCIE15_TXP/SATA2_TXP (R_)
1 4 PCH_GPP_K7 R46 GPP_K6 L41
Reserve (CRB) GPP_K7 PCIE16_RXN/SATA3_RXN M40 R1718 1 2 10KR2F-2-GP
ODD SRN10KJ-5-GP HDD_SATA_TX_P C36 PCIE16_RXP/SATA3_RXP B41
HDD_SATA_TX_N B36 PCIE11_TXP/SATA0A_TXP PCIE16_TXN/SATA3_TXN C41
[60] ODD_SATA_TX_P HDD_SATA_RX_P PCIE11_TXN/SATA0A_TXN PCIE16_TXP/SATA3_TXP
HDD F39
[60] ODD_SATA_TX_N HDD_SATA_RX_N PCIE11_RXP/SATA0A_RXP
C [60] ODD_SATA_RX_P G38 K43 C
PCIE11_RXN/SATA0A_RXN PCIE17_RXN/SATA4_RXN K44
[60] ODD_SATA_RX_N PCH_CONFIG_JUMPER PCIE17_RXP/SATA4_RXP
AR42 A42
PCH_RSVD_GPP_F11 AR48 GPP_F10/SATA_SCLOCK PCIE17_TXN/SATA4_TXN B42
Reserve (CRB) GPP_F11/SATA_SLOAD PCIE17_TXP/SATA4_TXP
GP39_GFX_CRB_DETECT AU47
SV_ADVANCE_GP48 AU46 GPP_F13/SATA_SDATAOUT0 P41 R1710 1 2 10KR2F-2-GP
GPP_F12/SATA_SDATAOUT1 PCIE18_RXN/SATA5_RXN +3D3V_S0
R40 (R_)
C39 PCIE18_RXP/SATA5_RXP C42
D39 PCIE14_TXN/SATA1B_TXN PCIE18_TXN/SATA5_TXN D42
D46 PCIE14_TXP/SATA1B_TXP PCIE18_TXP/SATA5_TXP
C47 PCIE14_RXN/SATA1B_RXN AK48 EDP_BKLTCTL R1707 1 2
PCIE14_RXP/SATA1B_RXP GPP_E8/SATA_LED# AH41 100KR2F-L1-GP
B38 GPP_E0/SATAXPCIE0/SATAGP0 AJ43 PCH_GPP_E1 1 TP1705 TPAD24 EDP_BKLTEN R1708 1 2
C38 PCIE13_TXN/SATA0B_TXN GPP_E1/SATAXPCIE1/SATAGP1 AK47 100KR2F-L1-GP
C45 PCIE13_TXP/SATA0B_TXP GPP_E2/SATAXPCIE2/SATAGP2 AN47 EDP_VDDEN R1709 1 2
C46 PCIE13_RXN/SATA0B_RXN GPP_F0/SATAXPCIE3/SATAGP_3 AM46 HPGP_M2_SATA_DET# 100KR2F-L1-GP
https://vinafix.com
PCIE13_RXP/SATA0B_RXP GPP_F1/SATAXPCIE4/SATAGP4 AM43 PCH_GPP_F2 R1722 1 2 10KR2F-2-GP
ODD_SATA_TX_P E37 GPP_F2/SATAXPCIE5/SATAGP5 AM47 (R_)
ODD_SATA_TX_N D38 PCIE12_TXP/SATA1A_TXP GPP_F3/SATAXPCIE6/SATAGP6 AM48
ODD ODD_SATA_RX_P J41 PCIE12_TXN/SATA1A_TXN GPP_F4/SATAXPCIE7/SATAGP7
ODD_SATA_RX_N H42 PCIE12_RXP/SATA_1A_RXP AU48 EDP_BKLTCTL
B44 PCIE12_RXN/SATA1A_RXN GPP_F21/EDP_BKLTCTL AV46 EDP_BKLTEN
A44 PCIE20_TXP/SATA7_TXP GPP_F20/EDP_BKLTEN AV44 EDP_VDDEN
PCIE20_TXN/SATA7_TXN GPP_F19/EDP_VDDEN (R_)
R37
R35 PCIE20_RXP/SATA7_RXP AD3 PCH_THERMTRIP_R_N R1704 1 2 620R2F-GP PCH_THERMTRIP_N PCH_PECI 1 R1702 2 H_PECI
D43 PCIE20_RXN/SATA7_RXN THRMTRIP# AF2 PCH_PECI
C44 PCIE19_TXP/SATA6_TXP PECI AF3 H_PM_SYNC_R R1705 1 2 30R2J-1-GP H_PM_SYNC 0R2J-2-GP
N42 PCIE19_TXN/SATA6_TXN PM_SYNC AG5 PLTRST_CPU_N
PCIE19_RXP/SATA6_RXP PLTRST_CPU#
1
M44 AE2 H_PM_DOWN
PCIE19_RXN/SATA6_RXN PM_DOWN
1
CANON-LAKE-GP C1701 R1706
(071.CANNO.0D0U) SC15P50V2JN-2-LL-GP 1KR2J-1-GP
(R_)
2
B B
[62] HPGP_M2_SATA_DET#
[24] EC_SCI_N
[4] PCH_THERMTRIP_N
[4,24] H_PECI
[4] H_PM_SYNC
[4] PLTRST_CPU_N
[4] H_PM_DOWN
[24,55] EDP_BKLTEN
[95] EDP_BKLTCTL
A A
Hsichih, Taipei
Title
Title
017_PCH_(PCI-E/SATA)
Size
Size DocumentNumber
Document Number Rev
Rev
C LA710 1
Date:
Sheet 17 of 107
5 4 3 2 1
5 4 3 2 1
6/21 Delete
CLKOUT_48 is only supported and enabled on SKL-H Server
PCH1G 7 OF 13
TP1801 1 CLKOUT_48M_R BE33
GPP_A16/CLKOUT_48 Y3 PCH_CLK100M_XDP_N
CLOCK CPU_MSSC_CLK24M_PCH_P
CPU_MSSC_CLK24M_PCH_N
D7
C6 CLKOUT_CPUNSSC_P
CLKOUT_ITPXDP#
CLKOUT_ITPXDP_P
Y4 PCH_CLK100M_XDP_P CLK OUT for CPU XDP
CLKOUT_CPUNSSC# B6 CPU_PCIBCLK100M_PCH_N
CPU_BCLK100M_PCH_P B8 CLKOUT_CPUPCIBCLK# A6 CPU_PCIBCLK100M_PCH_P
CPU_BCLK100M_PCH_N C8 CLKOUT_CPUBCLK_PCLKOUT_CPUPCIBCLK_P
CLKOUT_CPUBCLK# AJ6
XTAL_24M_PCH_OUT U9 CLKOUT_PCIE_N0 AJ7
XTAL_24M_PCH_IN U10 XTAL_OUT CLKOUT_PCIE_P0
D [4] CPU_MSSC_CLK24M_PCH_P XTAL_IN D
R1803 AH9
[4] CPU_MSSC_CLK24M_PCH_N XCLK_BIASREF_PCH CLKOUT_PCIE_N1
1 2 T3 AH10
XCLK_BIASREF CLKOUT_PCIE_P1
[4] CPU_BCLK100M_PCH_P PCH_RTCX1
60D4R2F-GP BA49 AE14
[4] CPU_BCLK100M_PCH_N PCH_RTCX2 RTCX1 CLKOUT_PCIE_N2
BA48 AE15
RTCX2 CLKOUT_PCIE_P2
[4] CPU_PCIBCLK100M_PCH_P
BF31 AE6
[4] CPU_PCIBCLK100M_PCH_N GPP_B5/SRCCLKREQ0# CLKOUT_PCIE_N3
BE31 AE7
AR32 GPP_B6/SRCCLKREQ1# CLKOUT_PCIE_P3
[61] WLAN_CLK100M_PCH_N GPP_B7/SRCCLKREQ2# WLAN_CLK100M_PCH_N
[61] WLAN_CLK100M_PCH_P BB30 AC2
WLAN_CLKREQ_PCH_N BA30 GPP_B8/SRCCLKREQ3# CLKOUT_PCIE_N4 AC3 WLAN_CLK100M_PCH_P
[61] WLAN_CLKREQ_PCH_N LAN_CLKREQ_PCH_N GPP_B9/SRCCLKREQ4# CLKOUT_PCIE_P4 CLK OUT OF miniPCIEx1 for WLAN
AN29
AE47 GPP_B10/SRCCLKREQ5# AB2 LAN_CLK100M_PCH_N
[31] LAN_CLK100M_PCH_N GPP_H0/SRCCLKREQ6# CLKOUT_PCIE_N5 LAN_CLK100M_PCH_P
AC48 AB3 CLK OUT OF PCIE for LAN
[31] LAN_CLK100M_PCH_P GPP_H1/SRCCLKREQ7# CLKOUT_PCIE_P5
AE41
[31] LAN_CLKREQ_PCH_N GPP_H2/SRCCLKREQ8#
AF48 W4
SSD_CLKREQ_PCH_N AC41 GPP_H3/SRCCLKREQ9# CLKOUT_PCIE_N6 W3
[62] SSD_CLK100M_PCH_N GPP_H4/SRCCLKREQ10# CLKOUT_PCIE_P6
[62] SSD_CLK100M_PCH_P AC39
AE39 GPP_H5/SRCCLKREQ11# W7
[62] SSD_CLKREQ_PCH_N GPP_H6/SRCCLKREQ12# CLKOUT_PCIE_N7
AB48 W6
AC44 GPP_H7/SRCCLKREQ13# CLKOUT_PCIE_P7
[99] PCH_CLK100M_XDP_N GPP_H8/SRCCLKREQ14#
AC43 AC14
[99] PCH_CLK100M_XDP_P GPP_H9/SRCCLKREQ15# CLKOUT_PCIE_N8 AC15
V2 CLKOUT_PCIE_P8
V3 CLKOUT_PCIE_N15 U2
CLKOUT_PCIE_P15 CLKOUT_PCIE_N9 U3
T2 CLKOUT_PCIE_P9
T1 CLKOUT_PCIE_N14 AC9 SSD_CLK100M_PCH_N
CLKOUT_PCIE_P14 CLKOUT_PCIE_N10 AC11 SSD_CLK100M_PCH_P CLK OUT OF PCIE for SSD
AA1 CLKOUT_PCIE_P10
Y2 CLKOUT_PCIE_N13 AE9
CLKOUT_PCIE_P13 CLKOUT_PCIE_N11 AE11
AC7 CLKOUT_PCIE_P11
AC6 CLKOUT_PCIE_N12 R6
CLKOUT_PCIE_P12 CLKIN_XTAL
CANON-LAKE-GP
(071.CANNO.0D0U)
C C
https://vinafix.com C1802 / C1803 value need fine tune
Crystal 32.768KHz XTAL_24M_PCH_IN 2

R1811
1 XTAL_24M_PCH_IN_R
C1802
1 2
X1801
33R2F-3-GP SC15P50V2JN-2-LL-GP
PCH_RTCX1 PCH_RTCX2_R X1802
1 2
XTAL-32D768KHZ-119-GP TR1801 3 2
2
1
1 2
(082.30003.0791) R1809 R1807
0R0402-PAD-2-GP 4 3 1MR2J-1-GP
4 1 XTAL_24M_PCH_OUT_R2
COIL-80OHM-GP (R_)
1
2
B B
XTAL-24MHZ-182-GP
R1808 1 2 PCH_RTCX2 R1810
10MR3J-L1-GP XTAL_24M_PCH_OUT 2 1 XTAL_24M_PCH_OUT_R R1801 1 2
1
don't change to 0402 0R0402-PAD-2-GP

C1801 C1804 33R2F-3-GP
SC6D8P50V2CN-LL-GP SC6D8P50V2CN-LL-GP C1803
2
1 2
Crystal 24MHz SC15P50V2JN-2-LL-GP
A A
Hsichih, Taipei
Title
Title
018_PCH_(CLKOUT/CLKREQ)
Size
Size DocumentNumber
Document Number Rev
Rev
C LA710 1
Date:
Sheet 18 of 107
5 4 3 2 1
5 4 3 2 1
USB3.0
[36] USB1_USB30_TX_N
[36] USB1_USB30_TX_P
[36] USB1_USB30_RX_N
D [36] USB1_USB30_RX_P D
171114 EE Leon: SWAP USB3 Port 1 & 2 for layout request
PCH1F 6 OF 13
USB2_USB30_TX_N F9 BB39 LPC_AD_PCH_P0 R1902 2 1 33R2F-3-GP LPC_AD_SIO_P0 1
[36] USB2_USB30_TX_P USB31_1_TXN GPP_A1/LAD0/ESPI_IO0 TP1901
Rear USB 3.1 / Gen2 / Port2 USB2_USB30_TX_P F7 AW37 LPC_AD_PCH_P1 R1903 2 1 0R0402-PAD-2-GP LPC_AD_SIO_P1 1
[36] USB2_USB30_RX_N USB31_1_TXP GPP_A2/LAD1/ESPI_IO1 TP1902
USB2_USB30_RX_N D11 AV37 LPC_AD_PCH_P2 R1904 2 1 0R0402-PAD-2-GP LPC_AD_SIO_P2 1
[36] USB2_USB30_RX_P USB31_1_RXN GPP_A3/LAD2/ESPI_IO2 TP1903
USB2_USB30_RX_P C11 BA38 LPC_AD_PCH_P3 R1906 2 1 0R0402-PAD-2-GP LPC_AD_SIO_P3 1
USB1_USB30_TX_N C3 USB31_1_RXP GPP_A4/LAD3/ESPI_IO3 TP1904
[36] USB3_USB30_TX_P USB1_USB30_TX_P D4 USB31_2_TXN
[36] USB3_USB30_TX_N Rear USB 3.1 / Gen2 / Port1 USB31_2_TXP
USB1_USB30_RX_N B9 BE38 LPC_FRAME#_PCH R1908 1 2 0R0402-PAD-2-GP LPC_FRAME#_SIO 1
[36] USB3_USB30_RX_P USB31_2_RXN GPP_A5/LFRAME#/ESPI_CS0# TP1905
USB1_USB30_RX_P C9 AW35 SER_IRQ 1
[36] USB3_USB30_RX_N USB31_2_RXP GPP_A6/SERIRQ/ESPI_CS1# TP1906
BA36 LPC_PCH_PIRQA_N R1911 2 1 0R0402-PAD-2-GP LPC_PIRQ_N
CHARGER_USB30_TX_N C17 GPP_A7/PIRQA#/ESPI_ALERT0# BE39 EC_KBRST_N
[35] USB4_USB30_TX_P USB31_6_TXN GPP_A0/RCIN#/ESPI_ALERT1#
Front USB 3.0 / Gen1 / Port6 CHARGER_USB30_TX_P C16 BF38 LPC_PCH_PD_N R1913 1 2 22R2F-1-GP LPC_PD_N
[35] USB4_USB30_TX_N USB31_6_TXP GPP_A14/SUS_STAT#/ESPI_RESET#
CHARGER_USB30_RX_N G14
[35] USB4_USB30_RX_P Support USB charger CHARGER_USB30_RX_P USB31_6_RXN LPC_CLK0_PCH24M LPC_CLK0_PCH24M_SIO
F14 BB36 R1909 1 2 22R2F-1-GP
[35] USB4_USB30_RX_N USB31_6_RXP GPP_A9/CLKOUT_LPC0/ESPI_CLK
USB5_USB30_TX_N C15 BB34 LPC_CLK1_PCH24M R1910 1 2 22R2F-1-GP LPC_CLK1_PCH24M_TPM
USB5_USB30_TX_P B15 USB31_5_TXN GPP_A10/CLKOUT_LPC1
[36] USB5_USB30_TX_N Rear USB 3.0 / Gen1 / Port5 USB31_5_TXP
USB5_USB30_RX_N J13 T48 IO_SMI_N
[36] USB5_USB30_TX_P Support USB power on USB5_USB30_RX_P USB31_5_RXN GPP_K19/SMI# TP_PCH_GPP_K18
[36] USB5_USB30_RX_N K13 T47 1 TP1907 TPAD24
USB31_5_RXP GPP_K18/NMI#
[36] USB5_USB30_RX_P
USB3_USB30_TX_P G12
USB3_USB30_TX_N F11 USB31_3_TXP AH40
[34] CHARGER_USB30_TX_N USB3_USB30_RX_P C10 USB31_3_TXN GPP_E6/SATA_DEVSLP2 AH35 +3D3V_S0
[34] CHARGER_USB30_TX_P Rear USB 3.1 / Gen2 / Port3 USB31_3_RXP GPP_E5/SATA_DEVSLP1 =Normal Power
USB3_USB30_RX_N B10 AL48
C [34] CHARGER_USB30_RX_N USB31_3_RXN GPP_E4/SATA_DEVSLP0 Function = CRB:+V3P3S C
AP47 SER_IRQ
[34] CHARGER_USB30_RX_P GPP_F9/SATA_DEVSLP7 R1905 1 2 10KR2J-3-GP
USB4_USB30_TX_P C14 AN37
USB4_USB30_TX_N B14 USB31_4_TXP GPP_F8/SATA_DEVSLP6 AN46
USB4_USB30_RX_P J15 USB31_4_TXN GPP_F7/SATA_DEVSLP5 AR47 PCH_DEVSLP_N
Front USB 3.1 / Gen2 / Port4 USB31_4_RXP GPP_F6/SATA_DEVSLP4
USB4_USB30_RX_N K16 AP48
Support USB Debug USB31_4_RXN GPP_F5/SATA_DEVSLP3
1
C1901
CANON-LAKE-GP (R_) SC150P50V2JN-3-LL-GP
(071.CANNO.0D0U)
2
(for glitch issue of Intel)
LPC interface
https://vinafix.com LPC_PIRQ_N
IO_SMI_N
R1912 1
R1901 1
2 10KR2J-3-GP
2 10KR2J-3-GP
R1907 2 1
B 10KR2J-3-GP B
[24,68,91] LPC_AD_SIO_P0
(R_)
[24,68,91] LPC_AD_SIO_P1
[24,68,91] LPC_AD_SIO_P2
[24,68,91] LPC_AD_SIO_P3
[24,68,91] LPC_FRAME#_SIO
LPC_AD_SIO_P0
[24,91] SER_IRQ
[19,68,91] LPC_CLK1_PCH24M_TPM
1
[24] EC_KBRST_N C1902 C1903
SC68P50V2JN-1-LL-GP
SC68P50V2JN-1-LL-GP
[24] LPC_CLK0_PCH24M_SIO
2
[91] LPC_PD_N
[24] LPC_PIRQ_N
[62] PCH_DEVSLP_N
DEBUG Card
A A
Hsichih, Taipei
Title
Title
019_PCH_(USB/ESPI)
Size
Size Document
DocumentNumber
Number Rev
Rev
B LA710 1
Date:
Sheet 19 of 107
5 4 3 2 1
5 4 3 2 1
[7] AUD_AZACPU_SDO
[7] AUD_AZACPU_SCLK
[7] AUD_AZACPU_SDI_R
[27] HDA_BITCLK_CODEC Close to PCH

[27] HDA_SDIN0_PCH
[27] HDA_SDOUT_CODEC
[27] HDA_SYNC_CODEC
[27] HDA_RST_N_CODEC
HDA_SDOUT_PCH
PCH1D 4 OF 13
V3P3S
HDA_BITCLK_CODEC R2005 1 2 33R2J-2-GP HDA_BITCLK_PCH BD11 BF36 ME_CNTL
HDA_SDIN0_PCH HDA_SDIN0_PCH BE11 HDA_BCLK/I2S0_SCLK GPP_A12/BM_BUSY#/ISH_GP6/SX_EXIT_HOLDOFF# AV32 CLKRUN#
HDA_SDOUT_CODEC R2021 1 2 10R2F-L-GP HDA_SDOUT_PCH BF12 HDA_SDI0/I2S0_RXD GPP_A8/CLKRUN# +3D3V_S0
BG13 HDA_SDO/I2S0_TXD BF41 LAN_DISABLE_N 1 TP2007 TPAD24 =Normal Power
HDA_SYNC_CODEC R2020 1 2 10R2F-L-GP HDA_SYNC_PCH HDA_SYNC/I2S0_SFRM GPD11/LANPHYPC CLKRUN# R2039 1 2 8K2R2F-1-GP (R_) Function = CRB:+V3P3S
1
C2014 C2013 BE10 BD42 SLP_W LAN_N
SC22P50V2JN-4-LL-GP SC22P50V2JN-4-LL-GP HDA_RST_N_CODEC R2008 1 2 33R2J-2-GP HDA_RST_N_PCH BF10 HDA_RST#/I2S1_SCLK GPD9/SLP_WLAN# PCH_SYSPW ROK R2026 1 2 1KR2J-1-GP +3D3V_S5
(R_) (R_) BE12 HDA_SDI1/I2S1_RXD BB46 PCH_DRAM_RESET_N
[99] PCH_ITP_PMODE I2S1_TXD/SNDW2_DATA DRAM_RESET#
2
BD12 BE32 VRALERTB_PU
[99] PCH_JTAG_TCK I2S1_SFRM/SNDW2_CLK GPP_B2/VRALERT# GPP_B1
D BF33 1 TP2009 TPAD24 R2009 1 2 1KR2J-1-GP (R_) D
[4,99] H_TMS GPP_B1/GSPI1_CS1#/TIME_SYNC1 GPP_B0
BE29 1 TP2010 TPAD24
[4,99] H_TDO AUD_AZACPU_SDO AUD_AZACPU_SDO_R GPP_B0/GSPI0_CS1#
Keep close to SOC R2019 1 2 30R2J-1-GP AM2 R47
[4,99] H_TDI AUD_AZACPU_SDI_R HDACPU_SDO GPP_K17/ADR_COMPLETE FP_RST_N
AN3 AP29 R2015 1 2 2K2R2J-2-GP
[4,99] H_TCK AUD_AZACPU_SCLK AUD_AZACPU_SCLK_R HDACPU_SDI GPP_B11/I2S_MCLK PCH_SYSPW ROK
R2022 1 2 30R2J-1-GP AM3 AU3 1 TP2008 TPAD26-OP-GP
HDACPU_SCLK SYS_PWROK
AV18 BB47 PCH_W AKE_N
[99] FP_RST_N GPP_D8/I2S2_SCLK WAKE# TP_PCH_SLP_A_N
AW18 BE40 1 TP2005 TPAD24
[24] EC_ME_UNLOCK_N GPP_D7/I2S2_RXD GPD6/SLP_A# SLP_LAN_N
BA17 BF40 1 TP2001 TPAD24
[24] EC_CLR_CMOS GPP_D6/I2S2_TXD/MODEM_CLKREQ SLP_LAN# PCH_SLP_S0_N
BE16 BC28
BF15 GPP_D5/I2S2_SFRM/CNV_RF_RESET# GPP_B12/SLP_S0# BF42 SLP_S3_N
BD16 GPP_D20/DMIC_DATA0/SNDW4_DATA GPD4/SLP_S3# BE42 SLP_S4_N
[24] EC_SMBCLK2 GPP_D19/DMIC_CLK0/SNDW4_CLK GPD5/SLP_S4# SLP_S5_N
AV16 BC42PW R_SEQ = 15 1
[24] EC_SMBDAT2 AW15 GPP_D18/DMIC_DATA1/SNDW3_DATA GPD10/SLP_S5# TP2006 TPAD24
GPP_D17/DMIC_CLK1/SNDW3_CLK BE45 SUSCLK_PCH
GPD8/SUSCLK BF44 BATLOW _N +3D3V_S5
[40] PCH_SIO_DPWROK GPD0/BATLOW# SUSACK_N
BE35
[24,40] SLP_SUS_N PCH_RTCRST_PULLUP GPP_A15/SUSACK# SUSW ARN_N
BE47 BC37 =Standby Power
[24] PCH_W AKE_N PCH_SRTCRSTB_PULLUP RTCRST# GPP_A13/SUSWARN#/SUSPWRDNACK LAN_SMB_CLK
BD46 R2016 1 2 499R2F-2-GP Function = CRB:+V3P3A
[24,91] PCH_SLP_S0_N SRTCRST# LAN_SMB_DATA R2018 1 2 499R2F-2-GP
PCH_PW ROK AY42 BG44 LANW AKE_SMC_W AKE_SCI_N
PCH_RSMRST_N BA47 PCH_PWROK GPD2/LAN_WAKE# BG42 TP_GPD_1 SML1CLK_PCH R2013 1 2 1KR2J-1-GP
RSMRST# GPD1/ACPRESENT BD39 SLP_SUS_N SML1DATA_PCH R2010 1 2 1KR2J-1-GP
PCH_SIO_DPWROK AW41 SLP_SUS# BE46 SW _ON_N
PCH_PORT80_LED BE25 DSW_PWROK GPD3/PWRBTN# AU2 FP_RST_N VRALERTB_PU R2023 1 2 10KR2J-3-GP (R_)
SMB_CLK_RESUME R2037 1 2 SMB_CLK_RESUME_R BE26 GPP_C2/SMBALERT# SYS_RESET# AW29 SPKR ME_CNTL R2024 1 2 10KR2J-3-GP
SMB_DATA_RESUME R2042 1 20R0402-PAD-2-GP SMB_DATA_RESUME_R BF26 GPP_C0/SMBCLK GPP_B14/SPKR AE3 H_PW RGD_R
0R0402-PAD-2-GP GPP_C_5 BF24 GPP_C1/SMBDATA CPUPWRGD
C2003 C2004 LAN_SMB_CLK BF25 GPP_C5/SML0ALERT# AL3 PCH_ITP_PMODE
(R_) LAN_SMB_DATA BE24 GPP_C3/SML0CLK ITP_PMODE AH4 H_TCK
(R_)
GPP_C4/SML0DATA PCH_JTAGX
1
PCH_HOT_R_N H_TMS
SC100P50V2JN-3-LL-GP
BD33 AJ4
SML1CLK_PCH BF27 GPP_B23/SML1ALERT#/PCHHOT# PCH_JTAG_TMS AH3 H_TDO
SML1DATA_PCH BE27 GPP_C6/SML1CLK PCH_JTAG_TDO AH2 H_TDI
GPP_C7/SML1DATA PCH_JTAG_TDI
2
AJ3 PCH_JTAG_TCK
C2005 C2008 PCH_JTAG_TCK +V3P3DSW +3D3V_DSW
=DSW Power
CANON-LAKE-GP Function = CRB:+V3P3DSW
(R_) (R_)
1
PCH_W AKE_N R2030 1 2 1KR2J-1-GP
(071.CANNO.0D0U)
BATLOW _N R2032 1 2 10KR2J-3-GP
2
R2034
LANW AKE_SMC_W AKE_SCI_N
1 2 4K7R2J-2-GP
TP_GPD_1 R2065 1 2 10KR2J-3-GP
C H_PW RGD R2067 1 2 H_PW RGD_R C

33R2F-3-GP
ME ENABLE/DISABLE
1
C2009
SC15P50V2JN-2-LL-GP
2
1 ME Disable => HDA_SDOUT_PCH_R1 =Hi
R2060
=Standby Power 1 2 ME_CNTL_2 Flash Descriptor Security (override)
+3D3V_S5
+3D3V_S0 Function = CRB:+V3P3A 0R0402-PAD-2-GP 2 ME Enable => HDA_SDOUT_PCH_R1 =Low(Default)
=Normal Power
Function = CRB:+V3P3S Q2005
S
SM2421PSANC-TRG-GP
1
DEFENSIVE DESIGN G
ME_CNTL R2017 1 2 (R_) +1V_VCCST_S3
Defensive Design
(R_)
R2011 0R2J-2-GP
10KR2J-3-GP
(R_)
2
D
EC_ME_UNLOCK_N R2002 1 ME_CNTL_1
5
3
1
(R_) 2 H_TCK R2035 2 1 1KR2J-1-GP
R2012 1 2 0R2J-2-GP PCH_SYSPW ROK 0R0402-PAD-2-GP MECLR1
[24,40,46] VR_READY H_TDO
PWR_SEQ = 25 SW -TACT-2P-33-GP-U R2038 1 2 100R2F-L1-GP-U
(R_) HDA_SDOUT_PCH R2058 1 2 HDA_SDOUT_PCH_R1
1
H_TDI
1
C2002 1KR2J-1-GP R2040 1 2 51R2F-2-GP C2015
SCD1U16V2KX-3-LL-GP SCD1U16V2KX-3-LL-GP
6
4
2
H_TMS R2043 1 2 51R2F-2-GP
2
2
EV FOR FUTURE ENGINEERING
DEBUG ONLY
+3D3V_S5
CAD NOTE: PLACE CLOSE TO PCH
=Standby Power EE Leon: no need connect susack_n & suswarn_n to ESIO
Function = CRB:+V3P3A
+3D3V_S0 +1D2V_S3
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SUSACK_N 1 2 SUSW ARN_N
CRB pull 30.1k，but PDG use 20k R2041
2
0R0402-PAD-2-GP
2
2016.7.18 SDV R2006 Change to 0ohm R2006 (R_)
1
Follow PDG Reserve R2007 1KR2J-1-GP +3D3V_S0 (R_) R2048 C2012
[40] PCH_PW ROK Wise: 1215 (R_)
1
[40,99] PCH_RSMRST_N R2053 C2010 1KR2J-1-GP SC1U10V2KX-1-LL-GP
R2049 470R2F-GP
(R_) PWR_SEQ = 21 SCD1U16V2KX-3-LL-GP
2 20KR2F-L-GP
2
=G3 Power 1 PCH_RTCRST_PULLUP PCH_PW ROK R2007 1 2 0R2J-2-GP SMB_MAIN_EN
[22] PCH_PORT80_LED +3V_RTC
1
4
3
[22] GPP_C_5 PWR_SEQ = 1
2
[22,24] PCH_HOT_R_N Function = CRB:+VRCT Q2001 RN2002
A
1
SMB_DATA_RESUME 6 1 SMB_DATA_MAIN
PWR_SEQ = 0 C2006
D2002
SRN1KJ-7-GP
SC1U10V2KX-1-LL-GP
5 2 PCH_DRAM_RESET_N R2001 1 2 DDR4_DRAMRST_N
[11,13,99] SMB_DATA_MAIN RB551V30-GP
2
+3D3V_S5 RN2001 0R0402-PAD-2-GP

[11,13,99] SMB_CLK_MAIN
1
2
1 4 4 3
K
PWR_SEQ = 8 =Standby Power 2 3

R2046
1
Function = CRB:+V3P3A 2N7002KDW -1-GP (R_)
=G3 Power 1 2 20KR2F-L-GP PCH_SRTCRSTB_PULLUP SRN1KJ-7-GP C2007
+3V_RTC SMB_CLK_MAIN
B SC30P50V3JN-LL-GP B
[11,13] DDR4_DRAMRST_N PWR_SEQ = 1
2
Function = CRB:+VCRT
SMB_CLK_RESUME
1
C2001
[24,40,51,56] SLP_S3_N SC1U10V2KX-1-LL-GP
[8,24,35,36,40] SLP_S4_N DESIGN NOTE:
2
[61,62] SUSCLK_PCH SMB RESUME/MAIN LOGIC
[22,27] SPKR
[4] H_PW RGD
CMOS CLR JUMPER PCH - EC

+3D3V_S5
PCH_RTCRST_PULLUP
[24,40] PCH_SYSPW ROK
2
R2003
1KR2J-1-GP
D
5
3
[24,99] SW _ON_N EC_CLR_CMOS Q2003 CMOS1

1
2N7002K-2-GP SW -TACT-2P-33-GP-U SML1_PCH_LS_GATE

2
(X_) Q2002
R2068 EC_SMBCLK2 6 1 SML1CLK_PCH
6
4
100KR2F-L1-GP
5 2
G
S
1
4 3
CMOS1_3
2N7002KDW -1-GP
SML1DATA_PCH
1
R2054 EC_SMBDAT2
4K75R2F-1-GP
[61] SLP_W LAN_N
2
A A
Hsichih, Taipei
Title
Title
020_PCH_(GPIO/SMBUS/HDA/JTAG )
D LA710 1
5 4 3 2 Date: 1 Sheet
5 4 3 2 1
[9] CPU_2_PCH_TRIGGER
[9] PCH_2_CPU_TRIGGER
PCH1H 8 OF 13
D PWR_SEQ = 9 AA22 AW9 D
+1D05V_PCH_S5 VCCPRIM_1P051 VCCPRIM_3P32 +3D3V_S5
AA23 PCH1J 10 OF 13
AB20 VCCPRIM_1P052 BF47 VCC_RTCEXT_CAP Y14
AB22 VCCPRIM_1P053 DCPRTC1 BG47 RSVD7 Y15
AB23 VCCPRIM_1P054 DCPRTC2 RSVD8 U37
VCCPRIM_1P055 RSVD6
1
AB27 V23 C2101 U35
VCCPRIM_1P056 VCCPRIM_3P35 +3D3V_S5 RSVD5
AB28 AN44 SCD1U16V2KX-3-LL-GP
VCCPRIM_1P057 VCCSPI +3D3V_S5
AB30 N32
VCCPRIM_1P058 RSVD3
2
AD20 BC49 R32 R2111 1 2 0R2J-2-GP
VCCPRIM_1P059 VCCRTC1 +3V_RTC RSVD4
AD23 BD49 (R_)
AD27 VCCPRIM_1P0510 VCCRTC2 AH15 PCH_AH15
AD28 VCCPRIM_1P0511 AN21
PWR_SEC = 0 RSVD2 AH14 PCH_AH14 R2112 1 2 0R2J-2-GP
AD30 VCCPRIM_1P0512 VCCPGPPG_3P3 AY8 RSVD1 (R_)
AF23 VCCPRIM_1P0513 VCCPRIM_3P33 BB7 1 TP2113 TPAD26-OP-GP
VCCPRIM_1P0516 VCCPRIM_3P34 +3D3V_S5 XDP
AF27
AF30 VCCPRIM_1P0517 AC35 AL2 H_PREQ_N
U26 VCCPRIM_1P0518 VCCPGPPHK1 AC36 PREQ# AM5 H_PRDY_N 1 TP2114
U29 VCCPRIM_1P0523 VCCPGPPHK2 AE35 PRDY# AM4 H_TRST_N_R R2107 1 2
VCCPRIM_1P0524 VCCPGPPEF1 CPU_TRST# PCH_2_CPU_TRIGGER_R H_TRST_N [4,21,99]
V25 AE36 AK3 0R0402-PAD-2-GP
V27 VCCPRIM_1P0525 VCCPGPPEF2 TRIGGER_OUT AK2 CPU_2_PCH_TRIGGER
V28 VCCPRIM_1P0526 AN24 TRIGGER_IN R2106 1 2 PCH_2_CPU_TRIGGER
V30 VCCPRIM_1P0527 VCCPGPPD AN26 CANON-LAKE-GP
V31 VCCPRIM_1P0528 VCCPGPPBC1 AP26 +3D3V_VCCPGPPA R2102 1 2 30R2J-1-GP
VCCPRIM_1P0529 VCCPGPPBC2 +3D3V_S5 (071.CANNO.0D0U)
0R0402-PAD-2-GP
AD31 AN32 R2101 1 2 0R2J-2-GP +1D8V_S5_VCCPRIM
AE17 VCCPRIM_1P0514 VCCPGPPA (R_)
VCCPRIM_1P0515 AT44
W22 VCCPRIM_3P31 BE48
VCCDUSB_1P051 VCCDSW_3P31 +3D3V_DSW
W23 BE49
VCCDUSB_1P052 VCCDSW_3P32
BG45 BB14
+1D05V_PCH_DSW VCCDSW_1P051 VCCHDA +3D3V_S5
BG46 AG19
W31 VCCDSW_1P052 VCCPRIM_1P83 AG20
+1D05V_PCH_S5 VCCPRIM_MPHY_1P05 VCCPRIM_1P84 AN15
VCCPRIM_1P85 +1D8V_S5_VCCPRIM
1
D1 AR15 C2102
E1 VCCPRIM_1P0521 VCCPRIM_1P86 BB11 SCD1U16V2KX-3-LL-GP
C49 VCCPRIM_1P0522 VCCPRIM_1P87
+1D05V_PHYPLL_PCH_S5 VCCAMPHYPLL_1P051
2
C D49 AF19 C
E49 VCCAMPHYPLL_1P052 VCCPRIM_1P81 AF20
VCCAMPHYPLL_1P053 VCCPRIM_1P82 +1D8V_S5_INT_LDO
P2 AG31 PCH1I 9 OF 13 PCH1L 12 OF 13
+1D05V_XTAL_PCH_S5 VCCA_XTAL_1P051 VCCPRIM_1P0520 +1D05V_PCH_S5
P3 AF31 A2 AL12 BG3 M24
W19 VCCA_XTAL_1P052 VCCPRIM_1P0519 AK22 A28 VSS_1 VSS_73 AL17 BG33 VSS_145 VSS_196 M32
+1D05V_PCH_S5 VCCA_SRC_1P051 VCCPRIM_1P241 VSS_2 VSS_74 VSS_146 VSS_197
W20 AK23 A3 AL21 BG37 M34
VCCA_SRC_1P052 VCCPRIM_1P242 A33 VSS_3 VSS_75 AL24 BG4 VSS_147 VSS_198 M49
C1 AJ22 VCCDPHY_1D24V_PCH R2110 1 2 0R3J-0-U-GP (R_) A37 VSS_4 VSS_76 AL26 BG48 VSS_148 VSS_199 M5
C2 VCCAPLL_1P054 VCCDPHY_1P241 AJ23 A4 VSS_5 VSS_77 AL29 C12 VSS_149 VSS_200 N12
V19 VCCAPLL_1P055 VCCDPHY_1P242 BG5 A45 VSS_6 VSS_78 AL33 C25 VSS_150 VSS_201 N16
VCCA_BCLK_1P05 VCCDPHY_1P243 A46 VSS_7 VSS_79 AL38 C30 VSS_151 VSS_202 N34
B1 K47 VCCMPHY_SENSE_PCH R2108 1 2 0R2J-2-GP (R_) A47 VSS_8 VSS_80 AM1 C4 VSS_152 VSS_203 N35
B2 VCCAPLL_1P051 VCCMPHY_SENSE K46 VSSMPHY_SENSE_PCH R2109 1 2 0R2J-2-GP (R_) A48 VSS_9 VSS_81 AM18 C48 VSS_153 VSS_204 N37
B3 VCCAPLL_1P052 VSSMPHY_SENSE A5 VSS_10 VSS_82 AM32 C5 VSS_154 VSS_205 N38
VCCAPLL_1P053 A8 VSS_11 VSS_83 AM49 D12 VSS_155 VSS_206 P26
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CANON-LAKE-GP AA19 VSS_12 VSS_84 AN12 D16 VSS_156 VSS_207 P29
AA20 VSS_13 VSS_85 AN16 D17 VSS_157 VSS_208 P4
[4,21,99] H_TRST_N (071.CANNO.0D0U) VSS_14 VSS_86 VSS_158 VSS_209
+3D3V_S5 +1D05V_PCH_S5 AA25 AN34 D30 P46
[4,99] H_PREQ_N VSS_15 VSS_87 VSS_159 VSS_210
AA27 AN38 D33 R12
[4,99] H_PRDY_N VSS_16 VSS_88 VSS_160 VSS_211
AA28 AP4 D8 R16
AA30 VSS_17 VSS_89 AP46 E10 VSS_161 VSS_212 R26
AA31 VSS_18 VSS_90 AR12 E13 VSS_162 VSS_213 R29
AA49 VSS_19 VSS_91 AR16 E15 VSS_163 VSS_214 R3
VSS_20 VSS_92 VSS_164 VSS_215
1
AA5 AR34 E17 R34
ED2101 AB19 VSS_21 VSS_93 AR38 E19 VSS_165 VSS_216 R38
AB25 VSS_22 VSS_94 AT1 E22 VSS_166 VSS_217 R4
AZ5125-02S-R7G-GP VSS_23 VSS_95 VSS_167 VSS_218
AB31 AT16 E24 T17
(R_) AC12 VSS_24 VSS_96 AT18 E26 VSS_168 VSS_219 T18
AC17 VSS_25 VSS_97 AT21 E31 VSS_169 VSS_220 T32
VSS_28 VSS_100 VSS_172 VSS_223
3
AC4 AT29 E40 T5
AD1 VSS_30 VSS_102 AT34 E8 VSS_174 VSS_225 U12
AD19 VSS_31 VSS_103 AT45 F41 VSS_175 VSS_226 U15
AD2 VSS_32 VSS_104 AV11 F43 VSS_176 VSS_227 U17
AD22 VSS_33 VSS_105 AV39 F47 VSS_177 VSS_228 U21
B
AD25 VSS_34 VSS_106 AW10 G44 VSS_178 VSS_229 U24 B
AD49 VSS_35 VSS_107 AW4 G6 VSS_179 VSS_230 U33
AE12 VSS_36 VSS_108 AW40 H8 VSS_180 VSS_231 U38
AE33 VSS_37 VSS_109 AW46 J10 VSS_181 VSS_232 V20
AE38 VSS_38 VSS_110 B47 J26 VSS_182 VSS_233 V22
EE Leon: follow CRB use internal 1.8V VRM mode AE4 VSS_39 VSS_111 B48 J29 VSS_183 VSS_234 V4
Reserve EXT 1.8V VRM solution AE46 VSS_40 VSS_112 B49 J4 VSS_184 VSS_235 V46
AF22 VSS_41 VSS_113 BA12 J40 VSS_185 VSS_236 W25
+1D05V_PCH_S5 +1D05V_PHYPLL_PCH_S5 +1D8V_S5 +1D8V_S5_VCCPRIM +1D8V_S5_INT_LDO AF25 VSS_42 VSS_114 BA14 J46 VSS_186 VSS_237 W27
AF28 VSS_43 VSS_115 BA44 J47 VSS_187 VSS_238 W28
AG1 VSS_44 VSS_116 BA5 J48 VSS_188 VSS_239 W30
L2101 R2105 R2104 AG22 VSS_45 VSS_117 BA6 J9 VSS_189 VSS_240 Y10
R2103
1 2 1 2 1 2 1 2 AG23 VSS_46 VSS_118 BB41 K11 VSS_190 VSS_241 Y12
AG25 VSS_47 VSS_119 BB43 K39 VSS_191 VSS_242 Y17
IND-2D2UH-275-GP 0R5J-5-GP 0R5J-5-GP 0R2J-2-GP (R_) AG27 VSS_48 VSS_120 BB9 M16 VSS_192 VSS_243 Y33
AG28 VSS_49 VSS_121 BC10 M18 VSS_193 VSS_244 Y38
(R_) VSS_50 VSS_122 VSS_194 VSS_245
AG30 BC13 M21 Y9
AG49 VSS_51 VSS_123 BC15 VSS_195 VSS_246
AH12 VSS_52 VSS_124 BC19 CANON-LAKE-GP
+1D05V_PCH_S5 +1D05V_XTAL_PCH_S5 AH17 VSS_53 VSS_125 BC24
VSS_54 VSS_126 (071.CANNO.0D0U)
AH33 BC26
AH38 VSS_55 VSS_127 BC31
L2102 VSS_56 VSS_128
AJ19 BC35
1 2 AJ20 VSS_57 VSS_129 BC40
AJ25 VSS_58 VSS_130 BC45
IND-2D2UH-275-GP AJ27 VSS_59 VSS_131 BC8
AJ28 VSS_60 VSS_132 BD43
AJ30 VSS_61 VSS_133 BE44
AJ31 VSS_62 VSS_134 BF1
AK19 VSS_63 VSS_135 BF2
AK28 VSS_67 VSS_139 BG17
A A
VSS_72 VSS_144
CANON-LAKE-GP
(071.CANNO.0D0U)
Hsichih, Taipei
Title
Title
021_PCH_(POWER1)
Size
Size DocumentNumber
Document Number Rev
Rev
C LA710 1
Date:
Sheet 21 of 107
5 4 3 2 1
5 4 3 2 1
(R_)
PCH STRAP FUNCTIONS
+3D3V_S5 R2202 1 2 100KR2J-1-GP
EDS suggest stuff 100K PU EDS: Reserved
(R_) External pull-up is required. Recommend 100K
R2203 1 2 4K7R2J-2-GP SPI0_SI_ROM [15,25,91] SPI_MOSI if pulled up to 3.3V
(SPI0_MOSI) Rising edge of RSMRST#
(R_)
R2204 1 2 20KR2J-L2-GP
D D
R2205 1
(R_) 2 4K7R2J-2-GP
SPI_MISO 0: Disable JTAG ODT
SPI0_SO_ROM [15,25,91]
(SPI0_MISO) 1: Enable JTAG ODT
The internal PU resistor is enabled when RSMRST# is asserted
R2206 1 2 20KR2J-L2-GP EDS: Reserved

EDS suggest stuff 100K PU SPI_IO2 External pull-up is required. Recommend 100K
(R_)
R2207 1 2 4K7R2J-2-GP
SPI0_WP_ROM [15,25] (SPI0_IO2) if pulled up to 3.3V
Rising edge of RSMRST#
EDS: Reserved
R2208 1 2 20KR2J-L2-GP
CRB stuff 20K PU External pull-up is required. Recommend 100K
EDS suggest stuff 100K PU SPI_IO3 if pulled up to 3.3V
R2209 1 (R_) 2 1KR2F-3-GP SPI0_HOLD_ROM [15,25] (SPI0_IO3) Rising edge of RSMRST#
(R_)
+3D3V_S0 R2210 1 2 4K7R2J-2-GP
0: Disable Top Swap mode. (Default)
R2211 1
(R_) 2 20KR2J-L2-GP
SPKR 1: Enable Top Swap mode.
SPKR [20,27]
PWR_SEQ = 21 (SPKR / GPP_B14) PCH internal pull-down is disabled after PCH_PWROK deasserts.
(R_)
R2212 1 2 4K7R2J-2-GP 0: Disable No Reboot mode. (Default)
(R_)
LPSS_GSPI0_MOSI 1: Enable No Reboot mode This function is useful
C R2213 1 2 1KR2J-1-GP LPSS_GSPI0_MOSI [15] (GPP_B18/GSPI0_MOSI) when running ITP/XDP. C
PCH internal pull-down is disabled after PCH_PWROK deasserts.
+3D3V_S5 R2214 1 2 4K7R2J-2-GP

0: Disable TSL confidentiality
R2215 1
(R_)
2 20KR2J-L2-GP
PCH_PORT80_LED 1: Enable TSL confidentiality (default)
PCH_PORT80_LED [20]
(GPP_C2/SMBALERT#) PCH HAS INTERNAL WEAK PD
(R_) BOOT SELECT STRAP

R2217 1 2 4K7R2J-2-GP
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0: SPI select (Default )
LPSS_GSPI1_MOSI 1: LPC select
R2218 1 2 20KR2J-L2-GP
LPSS_GSPI1_MOSI [15] (GPP_B22/GSPI1_MOSI) PCH HAS INTERNAL WEAK PD
(R_)
Rising edge of PCH_PWROK
(R_) ESPI/LPC SELECT STRAP

R2219 1 2 4K7R2J-2-GP
0: LPC is selected for EC.(Default)
GPP_C_5 1: eSPI is selected for EC.
R2220 1 2 20KR2J-L2-GP GPP_C_5 [20] (GPP_C5/SML0ALERT#) PCH HAS INTERNAL WEAK PD
R2221 1 2 4K7R2J-2-GP 0: Disable DCI OOB (Default)

CRB stuff 20K PU
EDS suggest stuff 100K PU PCH_HOT_R_N 1: Enable DCI OOB
(R_)
R2222 1 2 20KR2J-L2-GP
PCH_HOT_R_N [20,24] (GPP_B23/SML1ALERT#/PCHHOT#) PCH HAS INTERNAL WEAK PD
B
Rising edge of RSMRST# B
(R_) ESPI flash sharing mode

R2223 1 2 4K7R2J-2-GP
0: Master attached flash sharing (Default)
GPP_H_12 1: Slave attached flash sharing
(R_)
R2224 1 2 20KR2J-L2-GP GPP_H_12 [15] (GPP_H12/SML2ALERT#) PCH has internal weak PD.
R2201 1 2 10KR2J-3-GP DFX test mode

VISACH2_D3 0: XTAL input is single ended.
(R_)
R2225 1 2 10KR2J-3-GP
VISACH2_D3 [16] (GPP_E12) 1: XTAL input is differential.
The internal PD resistoris disabled after RSMRST# de-asserts
R2226 1 2 4K7R2J-2-GP
CRB stuff 4.7K PU
EDS suggest stuff 100K PU
R2228 1
(R_)
2 20KR2J-L2-GP
GPP_H15 / EDS: Reserved
GPP_H_15 [15]
SML3ALERT# External pull-up is required. Recommend 100K
if pulled up to 3.3V
+1D8V_S5_VCCPRIM
R2216 1 2 10KR2J-3-GP This signal has a weak internal pull-down.

GPP_J4 / An external pull-up is required on this strap since 38.4
(R_)
R2229 1 2 10KR2J-3-GP CNV_BRI_DT [16] CNV_BRI_DT / MHz XTAL is not supported on the PCH.
UART0_RTS# 0 = 38.4 XTAL frequency selected. (Default)
A
1 = 24MHz XTAL frequency selected. A
R2230 1 2 10KR2J-3-GP
EDS & CRB description is different GPP_J6 / An external pull-up or pull-down is required.
CNV_RGI_DT / 0 = Integrated CNVi enable.
(R_) 1 = Integrated CNVi disable.
R2227 1 2 10KR2J-3-GP CNV_RGI_DT [16] UART0_TXD Rising edge of RSMRST# Wistron Incorporated
(R_) Hsichih, Taipei
R2231 1 2 10KR2J-3-GP
GPP_J9 The signal has a weak internal pull-down Title
Title
R2232 1
(R_) 2 10KR2J-3-GP
GPP_J_9_CNV_MFUART2_TXD [16]
0 = VCCSPI is connected to 3.3V rail 022_PCH_(Strap)
1 = VCCSPI is connected to 1.8V rail Size
Size Document
DocumentNumber
Number Rev
Rev
Rising edge of RSMRST# C LA710 1
Date:
Sheet 22 of 107
5 4 3 2 1
5 4 3 2 1
+1D05V_PCH_S5 +1D05V_PHYPLL_PCH_S5
+1D05V_PCH_DSW
1
C2301 C2302 C2303 C2304 C2305 C2306
D D
SC1U10V2KX-1-LL-GP SC1U10V2KX-1-LL-GP SC22U6D3V3MX-1-LL-GP SC1U10V2KX-1-LL-GP SC22U6D3V3MX-1-LL-GP SC22U6D3V3MX-1-LL-GP
2
2
DESIGN NOTE: CAD NOTE:
BOARD CAP FOR +1P05V_PCH_DSW DESIGN NOTE: DESIGN NOTE:
BOARD CAP FOR +1V_PCH_S5 BOARD CAP FOR +1V_PCH_S5 PLACE 1-3MM FROM PACKAGE EDGE
CAD NOTE:
PLACE 1~3MM FROM PACKAGE EDGE CAD NOTE: CAD NOTE:
PLACE 1~3MM FROM PACKAGE EDGE PLACE 3~5MM FROM PACKAGE EDGE
+1D05V_XTAL_PCH_S5
+1D8V_S5_VCCPRIM +3D3V_S5
1
1
C2307 C2308 C2313
1
SC22U6D3V3MX-1-LL-GP SC22U6D3V3MX-1-LL-GP SC4D7U6D3V3KX-LL-GP C2309 C2310 C2311 C2312
SC4D7U6D3V3KX-LL-GP SCD1U16V2KX-3-LL-GP SCD1U16V2KX-3-LL-GP SCD1U16V2KX-3-LL-GP
2
2
C CAD NOTE: DESIGN NOTE: C
PLACE 1-3MM FROM PACKAGE EDGE EDGE CAP FOR +1D8V_S5 CAD NOTE:
CAD NOTE: PLACE 1-3MM FROM PACKAGE EDGE
PLACE 1-3MM FROM PACKAGE EDGE
+1D05V_PCH_S5
https://vinafix.com
1
1
C2314 C2315 C2316 C2317 C2318 C2319 C2320 C2321 C2322 C2323
SC1U10V2KX-1-LL-GP SC1U10V2KX-1-LL-GP SC1U10V2KX-1-LL-GP SC1U10V2KX-1-LL-GP SC1U10V2KX-1-LL-GP SC1U10V2KX-1-LL-GP SC1U10V2KX-1-LL-GP SC1U10V2KX-1-LL-GP SC1U10V2KX-1-LL-GP SC1U10V2KX-1-LL-GP
2
2
CAD NOTE:
PLACE 1-3MM FROM PACKAGE EDGE CAD NOTE:
PLACE 3-5MM FROM PACKAGE EDGE
B B
+3V_RTC +3D3V_DSW
1
C2324 C2325 C2326

SC1U10V2KX-1-LL-GP SCD1U16V2KX-3-LL-GP SCD1U16V2KX-3-LL-GP
2
CAD NOTE: CAD NOTE:

PLACE 1-3MM FROM PACKAGE EDGE PLACE 1-3MM FROM PACKAGE EDGE
A A
Hsichih, Taipei
Title
Title
023_PCH Power CAP
Size
Size DocumentNumber
Document Number Rev
Rev
C LA710 1
Date:
Sheet 23 of 107
5 4 3 2 1
5 4 3 2 1
ESIO I2C for PS8625 & OZ554A

Pull-up Resistor
+3D3V_DSW NCT6685D-GP
[64,95] SMB_SIO_CLK
[64,95] SMB_SIO_DAT
R2401 1
10KR2J-3-GP
2 EC_ME_UNLOCK_N PP: Default Low, Active Hi (S5) ECIO_CHAR_EN 15
GPIO80 AGND
117 PS2
118
1 2 SIO_PSON_N H_PECI R2449 1 2 EC_PECI 120 PWR_FAULT#/AMDSIC
ESIO I2C for PCH (Reserve) R2413
10KR2J-3-GP 43D2R2F-GP PECI/AMDSID 94
SIO_GND
EC_W AKE_N GPI 88 VSS 16 MSE_CLK_EC R2470 1 2 0R0402-PAD-2-GP MSE_CONN_CLK
[20] EC_SMBCLK2 SLP_SUS_N_EC 89 SLP_SUS_FET/GPIO94 VSS
[20] EC_SMBDAT2 RN2401
1 4 EC_SMBCLK2 OD: Default Hi, Active Low(Reserve for IRMT) EC_EDP_PD_N 91 SLP_SUS#/GPIO93/3VSBSW# MSE_DAT_EC R2472 1 2 0R0402-PAD-2-GP MSE_CONN_DAT
2 3 EC_SMBDAT2 PP: Default Low, Active Hi EC_LAN_PW R_EN 90 SUSACK#/GPIO92 75 UART_P80_EN GPI
EC_5V_DUAL_DET 92 SUSWARN_5VDUAL/GPIO91 GPIO63/MSCL0 76 EC_ME_UNLOCK_N OD: Default Hi, Active Low KBD_DAT_EC R2471 1 2 0R0402-PAD-2-GP KBD_CONN_DAT
OD: S5=Hi ; S3/S0=Low EC_USB_PW RON 93 5VDUAL GPIO62/MSDA0
Power manager SRN10KJ-5-GP
C2415 1 2 EC_PCHVSB_DET 97 SUSWARN#/GPIO90 56 MSE_CLK_EC KBD_CLK_EC R2473 1 2 0R0402-PAD-2-GP KBD_CONN_CLK
SCD1U16V2KX-3-LL-GP PCHVSB MCLK/MCU_TDI/DB_SO/USB_MISO 57 MSE_DAT_EC
[20,40] SLP_SUS_N EC_GA20 27 MDAT/MCU_TDO/DB_SI/DB_TX/USB_CS# 59 KBD_DAT_EC
[40] RSMRST_SIO_N
1 2 SW _ON_N
(R_)
EC_FMOSI R2422 1 2 33R2J-2-GP
EC_KBRST_N
EC_SO1
28
67
GA20/SPI_WP#/GPIO11
KBRST#/SPI_HOLD#/GPIO12
KDAT/MCU_TMS/DB_SCE#/DB_RX/USB_MOSI
KCLK/MCU_TCK/DB_SCK/USB_SCK
58
54
KBD_CLK_EC
EC_AFD#
PS2
[65] EC_PANSWH_N R2411
3KR2F-GP EC_MISO R2435 1 2 33R2J-2-GP EC_SI1 68 SO1 GPIO47/AFD#/P1_DGH#/CHPST_CS# 52 EC_INIT#
[20,99] SW _ON_N EC_FSCK EC_SCK1 SI1 GPIO45/INIT#/P1_DGL#/CHPST_MISO EC_PD0
D R2406 1 2 33R2J-2-GP 69 50 D
[20,40,51,56] SLP_S3_N R2442 1 2 SIO_DPW ROK EC_FSCE_N R2403 1 2 33R2J-2-GP EC_SCE1 66 SCK1
SCE1#
GPIO43/PD0/LED_G/CHPST_SCK
GPIO41/PD2/LED_E/CHPST_MOSI
48
47
EC_PD2
EC_PD3
LPT PLTRST_N => PCH -> EC
[8,20,35,36,40] SLP_S4_N 4K7R2J-2-GP PCH -> SSD
C2425 1 2 SIO_XOUT_R 86 GPIO40/PD3/LED_D/CSOUT#
[40] SIO_PSON_N
(R_) SIO_XIN_R 87 XOUT 26 PLTRST_N PCH -> DGPU
[40] SIO_DPW ROK XIN LRESET# LPC_FRAME#_SIO
SCD01U16V2KX-3LLGP R2468 1 2 15KR2F-GP 25
[20,40,46] VR_READY EC_W AKE_N USBSW 1_YM LFRAME# LPC_AD_SIO_P3 EC_RSTOUT0_N => EC ->LAN
R2456 1 2 6 20
[20,91] PCH_SLP_S0_N USBSW 1_YP USB_D- LAD3 LPC_AD_SIO_P2
[36] SMARTPW R_EN
10KR2J-3-GP 5 21 EC -> WLAN
R2469 1 2 15KR2F-GP USB_D+ LAD2 22 LPC_AD_SIO_P1 EC -> LPC Debug
OD: Default Hi, Active Low
Reserve
EC_USB_CHARGER_OC_N 74
EC_SCI_N 70 GPIO95/BKFD_CUT
LAD1
LAD0
23
19
LPC_AD_SIO_P0
SER_IRQ
LPC EC -> TPM/TCM
LPC interface (TPM) R2402 1 2 EC_DIS_HW ACPI EC_SMBCLK2 77 DEEP_S5_0/3VSBSW/LATCH_BKFD_CUT/GPIO66 SERIRQ 18 LPC_LDRQ_N R2483 1
(R_)
2 LPC_PIRQ_N
1KR2J-1-GP(R_) I2C connect to PCH (reserve) EC_SMBDAT2 78 GPEN13/RSTOUT2#/MSCL2 GPIO10/LDRQ# 17 LPC_CLK0_PCH24M_SIO 0R2J-2-GP
[19] LPC_PIRQ_N EC_RSTOUT0_N GPEN12/RSTOUT1#/MSDA2 PCICLK
H=SIO software ACPI R2447 1 2 79
[19,68,91] LPC_FRAME#_SIO L=SIO Hardware ACPI RSTOUT0#/GPEN11 EC_CURRENT_ALERT
100KR2F-L1-GP 98 GPI
[19,68,91] LPC_AD_SIO_P0 VR_READY TACHIN/PWMOUT/CIRWB/GPIO71 PCH_HOT_R_N
80 30 GPI R2416 1 2 0R0402-PAD-2-GP EDP_BKLTEN GPI
[19,68,91] LPC_AD_SIO_P1 ATXPGD/GPEN10 DSRA#/CIRWB/GPIO21 EC_EDP_BKLTEN
125
[19,68,91] LPC_AD_SIO_P2 RSMRST_SIO_N CIRTX2/TACHIN/PWMOUT/GPIO73 EC_AMP_EN PCH_SLP_S0_N
101 124 PP: Default Low, Active Hi (S0) R2454 1 2 0R2J-2-GP (R_) GPI, Reserve
[19,68,91] LPC_AD_SIO_P3 GPEN17/RSMRST# CIRTX1/TACHIN/PWMOUT/GPIO72 EC_DIS_HW ACPI
+3D3V_S5 32 SIO STRAP
[19,91] SER_IRQ OD: Default Hi ECIO_ILIM_SEL 71 DIS_HWACPI/DTRA#/CIRTX2/GPIO23 96 EC_AMDPW R_EN 1 2 0R0402-PAD-2-GP ECIO_CHAR_CTL3 PP: Default Low
R2452
SLP_S4_N R2407 1 2 SLP_S4_N_EC 84 3VSBSW#/LATCH_BKFD_CUT#/GPEN07 GPIO05/CIRTX1/AMDPWR_EN 31 EC_2E_4E_SEL SIO STRAP Active Hi
PWR_SEQ = 16 GPI USB_CHARGE_FAULT_N 83 SLP_S5#/GPEN06 2E_4E_SEL/RTSA#/CIRTX1/GPIO22 95 ECIO_CHAR_CTL1 PP: Default Low, Active Hi R2450 1 2 100KR2J-1-GP
0R0402-PAD-2-GP
EC_PANSWH_N 61 RESETCON#/GPEN05 GPIO70/TACHIN/PWMOUT/CIRRX 29 PANEL_ON_OFF GPI(Panel on/off)
R2421 1 2 RSMRST_SIO_N SW _ON_N 60 PSIN#/GPEN04 CTSA#/CIRRX/GPIO20
CLOCK 10KR2F-2-GP PCH_W AKE_N 65 PSOUT#/GPEN03 55 EC_STB#
[19] LPC_CLK0_PCH24M_SIO SLP_S3_N SLP_S3_N_EC PME#/GPEN02 GRN_LED/GPIO13/STB# EC_SLCT
R2444 1 2 100KR2F-L1-GP PWR_SEQ = 17 R2445 1 2 64 38
(R_) 0R0402-PAD-2-GP SLP_S3#/GPEN01 YLW_LED/GPIO30/SLCT 49 EC_PD1
SIO_DPW ROK 73 GPIO42/PD1/LED_F 45 EC_PD4
R2408 2 1 EC_CURRENT_ALERT GPI (3V) USB_CHARGER_OC_N 82 DPWROK/GPEN16 GPIO37/PD4/LED_C 44 EC_PD5
PCH_SYSPW ROK R2455 1 2 EC_PW ROK0 81 PWROK1/AMD_PWROK1/GPEN15 GPIO36/PD5/LED_B 43 EC_PD6
4K7R2J-2-GP
2 1 EC_EXT_COM_RI
0R0402-PAD-2-GP SIO_PSON_N
SMB_SIO_CLK
63
128
PWROK0/AMD_PWROK0/GPEN14
PSON#/AMD_PSON#/GPEN00
GPIO35/PD6/LED_A
GPIO32/BUSY/P2_DGL#
40
39
EC_BUSY
EC_PE
LPT
R2409
4K7R2J-2-GP I2C connect to PS8625 / OZ554A / Retimer SMB_SIO_DAT 123 MSCL1/VLDT_EN/GPIO75 GPIO31/PE/P2_DGL# 42 EC_PD7
[92] EC_STB# MSDA1/VCORE_EN/GPIO76 GPIO34/PD7/P2_DGH# 41 EC_ACK#
[92] EC_AFD# 1 2 EC_5V_DUAL_DET VRM_TEMP 111 GPIO33/ACK#/P2_DGH# 51 EC_SLIN#
R2457
[92] EC_INIT# THR16/VIN16/TD2P GPIO44/SLIN#/P1_DGL# EC_ERR#
10KR2J-3-GP (R_) 112 53
[92] EC_SLIN# 1 2 51KR2F-L-GP PCH_TEMP 113 THR15/VIN15/TD1P GPIO46/ERR#/P1_DGH#
R2480
[92] EC_PD0 THR14/VIN14/TD0P LCD_ID_3
107 33
[92] EC_PD1 SIO_BOARD_ID_STAGE 106 VDIMM/THR7/VIN7 GPIO24/SINA 36 LCD_ID_2
[92]
[92]
EC_PD2
EC_PD3
1
2
RN2403
4
3
EC_USB_PW RON
EC_PCHVSB_DET
SIO_BOARD_ID_DGPU 109 VLDT/THR6/VIN6
VCORE/THR5/VIN5
GPIO27/RIA#
GPIO26/DCDA#
35
34
LCD_ID_1
LCD_ID_0
Panel ID
[92] EC_PD4 116 GPIO25/SOUTA/SOUTA_P80
[92] EC_PD5 SOUTA_SIO 3VCC_SENSE V_COMP3/THR3/VIN3 CPU_FAN_TACH1
SRN10KJ-5-GP R2462 1 2 0R0402-PAD-2-GP 115 127
[92] EC_PD6 114 V_COMP2/THR2/VIN2 TACHIN/PWMOUT/GPIO82 126 CPU_FAN_PW M1
[92] EC_PD7 SINA_SIO 1 2 0R0402-PAD-2-GP 105 V_COMP1/THR1/VIN1 TACHIN/PWMOUT/GPIO81 122 EC_SUS_LED PP: Default Low, Active Hi
R2463
[92] EC_ERR# V_COMP0/THR0/VIN0 TACHIN/PWMOUT/GPIO03 EC_PROCHOT_N
121 OD: Default Hi, Active Low
[92] EC_ACK# B_TXD1 12 TACHIN/PWMOUT/GPIO02 104 ECIO_CHAR_CTL2 PP:
Function = COM Port Default Low, Active Hi
[92] EC_BUSY EC_SCI_N B_RXD1 IRTX/SOUTB/TACHIN/PWMOUT/GPIO55 TACHIN/PWMOUT/GPIO84 PS8625_Panel_ON_DET
R2467 2 1 Function = COM Port 11 103 R2465 1 2 0R0402-PAD-2-GP PS8625_Panel_ON GPI
[92] EC_PE IRRX/SINB/TACHIN/PWMOUT/GPIO54 TACHIN/PWMOUT/GPIO83 37 EC_Panel_ON
10KR2J-3-GP PP: Default Low, Active Hi (S0)
[92] EC_SLCT EC_PAD_CAP 62 GPIO74/TACHIN/PWMOUT 14 B_RI#
C2426 1 2
C PAD_CAP RIB#/TACHIN/PWMOUT/GPIO57 13 B_DCD1# C
+3V_RTC
+1V_VCCST_S3
SC4D7U6D3V3KX-LL-GP
119
VTT
DCDB#/TACHIN/PWMOUT/GPIO56
DTRB#/TACHIN/PWMOUT/GPIO53
10
9
B_DTR1#
B_RTS1#
COM Port
Fan Controller 1 R2420 2 EC_VBAT 99 RTSB#/TACHIN/PWMOUT/GPIO52 8 B_DSR1#
[26] CPU_FAN_TACH1
+3D3V_S0
PWR_SEQ = 0 =G3 Power
Function = CRB:+VRCT 0R0603-PAD-2-GP-U VBAT DSRB#/TACHIN/PWMOUT/GPIO51 7 B_CTS1# R2464
[26] CPU_FAN_PW M1 CTSB#/TACHIN/PWMOUT/GPIO50 PCH_PS_ON_N_DET
108 4 1 2 0R0402-PAD-2-GP SMARTPW R_EN PP: Default Low, Active Hi
+3D3V_AUX_SIO AVSB TACHIN/PWMOUT/GPIO01 EC_CLR_CMOS
3 PP: Default Low, Active Hi
+3D3V_DSW
PWR_SEQ = 4 85 TACHIN/PWMOUT/GPIO00 2 EC_EXT_COM_RI GPI
46 3VSB SMI#/OVT#/GPIO85 110 EC_VREF 1 2
USB3.0 CHARGER CTRL RN2404
LPC_AD_SIO_P0 3VSB VREF EC_SKTOCC_N
C2410 SC4D7U6D3V3KX-LL-GP SIO_GND
Charge OCP 2 3 24 102 1 2 100KR2J-1-GP
SC10U6D3V3MX-LL-GP
SCD1U16V2KX-3-LL-GP
SCD1U16V2KX-3-LL-GP
SCD1U16V2KX-3-LL-GP
C2411 C2418 C2405 C2427 R2440
(From ECIO) LPC_AD_SIO_P1 3VSB GPIO77/SKTOCC#
1
1 4 72
[34] USB_CHARGER_OC_N 1 DEEP_S5_1/CASEOPEN1# 100
Temperature Sensing Current Mode
(R_) +3D3V_S0
[34] USB_CHARGE_FAULT_N 3VCC GPIO67/CASEOPEN0#
SRN4K7J-8-GP
[16] EC_USB_CHARGER_OC_N
2
RN2405
LPC_AD_SIO_P2 C2402
1
2 3 U2402 1 2 0R0402-PAD-2-GP CL_LATCH
SC10U6D3V3MX-LL-GP
SCD1U16V2KX-3-LL-GP
C2421 R2475
[34] ECIO_CHAR_EN LPC_AD_SIO_P3
1 4
[34] ECIO_CHAR_CTL1 2 1 R2431 SIO_XIN_R
0R0402-PAD-2-GP
[34] ECIO_CHAR_CTL2
2
(R_) +3D3V_BAT_PW R
[34] ECIO_CHAR_CTL3 SRN4K7J-8-GP
[34] ECIO_ILIM_SEL LPC_FRAME#_SIO EC_BAT_DET
R2414 2 1 1 2 R2460
4K7R2J-2-GP (R_) R2412 1MR2J-1-GP
Put Q2401 near PCH1
1 2 SIO_XOUT_R_1 2 1 R2426 SIO_XOUT_R Function = Detect Battery
1
0R0402-PAD-2-GP C2422 PCH_TEMP
Codec IC 100KR2J-1-GP
1.H=>Have Mount BAT
2.L=>No Mount BAT SCD01U50V2KX-1-LL-GP
C
[27] EC_AMP_EN
RN2406 For CASEOPEN0# IN Reserved for
2
EC_KBRST_N
1
1 4 de-bounce For ambient temperature detect Q2401 B
EC_GA20 X2401
2
2 3 Cap close to SIO C2412 MMBT3904-3-GP
R2430 SC2200P50V2KX-2-LL-GP
E
SIO_XIN 1 4
COM PORT
SRN10KJ-5-GP 2K2R2J-2-GP
Detect Battery SIO_GND
1 R2425 2
0R0402-PAD-2-GP
PCH_TEMP_VENTING_G
1
[65] B_RI# SIO_XOUT

RN2402 2 3
https://vinafix.com
[65] B_CTS1# 2 3 SMB_SIO_DAT
[65] B_RTS1# SMB_SIO_CLK Put Q2402 near VCORE
1
1 4 C2408 C2406
[65] B_DSR1#
SC18P50V2JN-1-LL-GP
SC18P50V2JN-1-LL-GP
[65] B_DCD1# VRM_TEMP
[65] B_RXD1 SRN2K2J-1-GP
2
[65] B_DTR1#
C
R2451 2 1 PLTRST_N XTAL-14D31818MHZ-37-GP
[65] B_TXD1
1
4K7R2J-2-GP (R_) For CPU temperature detect Q2402 B
[65] EC_EXT_COM_RI MMBT3904-3-GP
Cap close to SIO C2414
R2405 2 1 EC_RSTOUT0_N SC2200P50V2KX-2-LL-GP
E
4K7R2J-2-GP
1 R2427 2 VRM_TEMP_VENTING_G
SIO_GND
EC_EDP_PD_N 0R0402-PAD-2-GP
R2448 2 1
10KR2J-3-GP
B
R2443 1
1KR2J-1-GP
2
(R_)
EC_2E_4E_SEL
Power +3D3V_DSW +3D3V_DSW
B
H=SIO is 0x4Eh 1 2
SCD1U16V2KX-3-LL-GP
R2446 +3D3V_S0
L=SIO is 0x2Eh
SPI flash
1KR2J-1-GP +3D3V_DSW
1
+3D3V_DSW +3D3V_AUX_SIO +3V_RTC +1V_VCCST_S3
R2466 R2439 R2429 R2423 R2410 R2419 R2404
DEBUG
1
1 2
10KR2J-3-GP
10KR2J-3-GP
10KR2J-3-GP
10KR2J-3-GP
10KR2J-3-GP
10KR2J-3-GP
R2433 C2403
1
22K6R2F-1-GP
SCD1U16V2KX-3-LL-GP
2D2R3-1-U-GP C2409 C2404
2
1
1
SC10U6D3V3MX-LL-GP
SCD1U16V2KX-3-LL-GP
[38] SINA_SIO U2401
1
SCD1U16V2KX-3-LL-GP
Function = 1.03V Range: 0 to 2.048 V C2423 C2417
[38] SOUTA_SIO
2
2
3VCC_SENSE
2
RTC_DET_N R2459 1 (R_) 2 EC_BAT_DET EC_FSCE_N 1 8

[38] EC_USB_PW RON CS# VCC
2
EC_MISO EC_HOLD_N
1
2 7
SCD1U16V2KX-3-LL-GP
0R2J-2-GP For CASEOPEN0# IN C2401

EC_W P_N SO/SIO1HOLD# EC_FSCK
1
Function = Detect Battery R2432 3 6

10KR2F-2-GP 4 WP# SCLK 5 EC_FMOSI
OTHER 1.H=>Have Mount BAT
2.L=>No Mount BAT GND SI/SIO0
2
[35,38] UART_P80_EN
2
SIO_GND MX25L8006EM2I-12G-GP
[4] EC_PROCHOT_N SLP_SUS_N 1 2 0R0402-PAD-2-GP SLP_SUS_N_EC
R2458
[17] EC_SCI_N G24011 2 GAP-CLOSE-PW R-3-GP
[20] EC_ME_UNLOCK_N
[20] EC_CLR_CMOS
C2416
[65] EC_SUS_LED
1
SCD1U16V2KX-3-LL-GP SIO_GND
[19] EC_KBRST_N
[4,17] H_PECI
(R_)
SIO_GND Voltage Sensing
2
[38] USBSW 1_YM

[38] USBSW 1_YP
[44] EC_CURRENT_ALERT
[39]
[31,61,68,91,95]
EC_EDP_PD_N
[15,62] PLTRST_N
EC_RSTOUT0_N
BOARD ID CONTROL TABLE
CLASS PCB BOARD ID(SIO PIN109) PULL LOW RESISTOR PULL HIGH RESISTOR(R2428) OUT VOLTAGE
[31] EC_LAN_PW R_EN
Board ID resserved Must pick up tolerance +/- 1%
[20,40] PCH_SYSPW ROK
Leon：setting this id for product stage Check Board ID define B V330 100.0K 63.4K 2.02V
+3D3V_DSW +3D3V_DSW A RESERVE 100.0K 76.8K 1.87V
[31,61,62] EC_W AKE_N
[20] PCH_W AKE_N
9 RESERVE 100.0K 100K 1.65V
[15,25] RTC_DET_N
[44] CL_LATCH
1
(R_)
R2481
(V330_64.63425.6DL)
R2428
8 RESERVE 100.0K 133K 1.41V
[20,22] PCH_HOT_R_N
10KR2F-2-GP 10KR2F-2-GP
A
7 RESERVE 100.0K 174K 1.20V A
[92] MSE_CONN_CLK
2
[92] MSE_CONN_DAT SIO_BOARD_ID_STAGE SIO_BOARD_ID_DGPU

[92] KBD_CONN_DAT 6 RESERVE 100.0K 226K 1.01V
[92] KBD_CONN_CLK
1
Panel ID R2482
100KR2F-L1-GP
R2461
100KR2F-L1-GP
5 RESERVE 100.0K 309K 0.8V
[55,64] LCD_ID_0
[55,64] LCD_ID_1 4 RESERVE 100.0K 442K 0.61V
2
[55,64] LCD_ID_2
[55,64] LCD_ID_3
3 RESERVE 100.0K 750K 0.39V
2 RESERVE 100.0K 1500K 0.21V 12F, 88, Hsin Tai W u Rd
[55,95] PS8625_Panel_ON
[55] EC_Panel_ON Hsichih, Taipei
1 A710 100.0K 0 0V Title
[17,55] EDP_BKLTEN
Title
[65] PANEL_ON_OFF 024_ESIO_IT8738
D LA710 1
5 4 3 2 1
PCH SPI ROM

+3D3V_DSW
Battery +3D3V_S5
+3D3V_S5
2
TP2501
R2507 +3D3V_S5 SOP8 for 16MB PWR_SEQ = 8
1
D 0R0402-PAD-2-GP D
TPAD26-OP-GP R2504 R2505 R2506
VCCRTC
1
C2502 C2503 1KR2J-1-GP 1KR2J-1-GP 1KR2J-1-GP
1
3D3V_DSW_RTC SC4D7U6D3V3KX-LL-GP SCD1U16V2KX-3-LL-GP (R_)
+3D3V_BAT_VREG +3D3V_BAT_PWR R2503
2
1
1KR2J-1-GP U2501
1
RTC1 R2501 C2506 (R_)
1 2 1 1KR2J-1-GP (R_) R2508 SCD1U16V2KX-3-LL-GP SPI0_CS0_ROM_N 1 8
+ CS# VCC
2
45K3R2F-L-GP SPI0_SO_ROM R2512 1 2 33R2F-3-GP SPI0_SO_ROM1_R 2 7 SPI0_HOLD_ROM1_R 1 2 R2513 SPI0_HOLD_ROM
DO/IO1 HOLD#/RESET#/IO3
2
2
1
NP NP1 SPI0_WP_ROM R2509 1 2 SPI0_WP_ROM1_R 3 6 0R0402-PAD-2-GP
WP#/IO2 CLK
2
+5V_S0 D2501 0R0402-PAD-2-GP 4 5
NP NP2 GND DI/IO0 SPI0_CLK_ROM1_R R2511 1 2 33R2F-3-GP SPI0_CLK_ROM
BAT54C-12-GP
WP# function is not supported when SPI0_SI_ROM1_R R2510 1 2 33R2F-3-GP SPI0_SI_ROM
2 SPI ROM is used on descriptor mode. W25Q128JVSIQ-GP
-
2N7002K-2-GP
3
+3V_RTC
SSKT1
BAT-AAA-BAT-034-P06-A-GP-U1 G
1
PWR_SEQ = 0 1 8
D =G3 Power 2 7
Function = CRB:+VRCT 3 6
1
S RTC_DET_N C2501 4 5
TP2502 SC1U10V2KX-1-LL-GP
1
TPAD26-OP-GP
Q2501 SKT-50960-0084L-001-GP
2
R2518
(R_) 6D2MR2J-GP (X_)
2
SPI socket mount in SA stage
SPI0 ROM
[15,22,91] SPI0_SI_ROM
[15,22,91] SPI0_SO_ROM
[15,22] SPI0_WP_ROM
[15,22] SPI0_HOLD_ROM
C C
[15,91] SPI0_CLK_ROM
[15] SPI0_CS0_ROM_N
BOOT BLOCK
[15,24] RTC_DET_N
+3D3V_S5
[15] CMOS_IN
1 PWR_SEQ = 21
R2502
10KR2J-3-GP
https://vinafix.com
2
CMOS_IN
1 NORMAL(DEFAULT)
1-2 BOOT BLOCK
5
3
CLR1
SW-TACT-2P-33-GP-U
6
4
B B
A A
Hsichih, Taipei
Title
Title
025_SPI&RTC
Size
Size DocumentNumber
Document Number Rev
Rev
C LA710 1
Date:
Sheet 25 of 107
5 4 3 2 1
5 4 3 2 1
SIO FAN CONTROL +3D3V_S0

+3D3V_S0
D +12V_S0_FAN D
+12V_S0_FAN
CPU FAN
K
2
2
D2602 R2601 R2602 D2603 FAN1
L1SS355T1G-GP 4K7R2J-2-GP 4K7R2J-2-GP L1SS355T1G-GP 6
1
(R_) 1
ED2601
A
1
1
2 AZ5125-02S-R7G-GP
R2604 1 2 100R2J-2-GP CPU_FAN_TACH1_C 3
[24] CPU_FAN_TACH1
1 2 CPU_FAN_IN 4 (R_)
[24] CPU_FAN_PWM1 R2603 100R2J-2-GP 5
CLX-CON4-13-GP
3
(R_)
1
C2604
C2602 C2603 C2601 SCD1U16V2KX-3-LL-GP
SCD1U25V2KX-LL-GP GND
2
C C
SC10U25V5KX-GP SC10U25V5KX-GP
(78.10622.51LLL) (78.10622.51LLL)
GND GND GND
https://vinafix.com
B B
A A
Hsichih, Taipei
Title
Title
026_FAN_
Size
Size Document
Document Number
Number Rev
Rev
B LA710 1
Date:
Sheet 26 of 107
5 4 3 2 1
5 4 3 2 1
HD LINK HPOUT-R
HPOUT-L
LINE1-VREFO-L
[20] HDA_BITCLK_CODEC LINE1-VREFO-R
[20] HDA_SDIN0_PCH MIC2-VREFO
[20] HDA_SYNC_CODEC
[20] HDA_RST_N_CODEC
[20] HDA_SDOUT_CODEC
Vref(Pin 28)/PDB(Pin47) timing
SC4D7U6D3V3KX-LL-GP
[65] DMIC_DATA
C2701 1 2 SC4D7U6D3V3KX-LL-GP AGND V
[65] DMIC_CLK C2702 1 2 SC10U6D3V3MX-LL-GP
AGND
D [29] SPKR_L+ Place close to Pin 26 D

[29] SPKR_L-
[29] SPKR_R- +5V_CODEC
[29] SPKR_R+
PDB
SCD1U16V2KX-3-LL-GP
1.8V
1
C2705
C2706 t
ADU_LDO1_CAP
[29] SLEEVE SC4D7U6D3V3KX-LL-GP Pin 27
AUD_VREF
2
C2703 1
CPVEE C2704 1
2
[29] MIC2-VREFO AGND
C2726
[29] RING2
Analog
[29] HPOUT-L
[29] HPOUT-R Digital
AGND
CBN
+3D3V_S0
[29] LINE1-R
2016.07.05
33
32
31
30
29
36
27
35
34
28
26
25
[29] LINE1-L
Julian U2701
HPOUT_L/PORT_I_L
HPOUT_R/PORT_I_R
LINE1_VREFO_L
LINE1_VREFO_R
AVSS1
AVDD1
CPVDD
CBN
MIC2_VREFO
VREF
LDO1_CAP
CPVEE
[29] LINE1-VREFO-L
L2701 1 2 HCB2012KF-221T30-GP
[29] LINE1-VREFO-R +1D5V_S0
CBP
[29] HPOUT_JD
37 24
CBP LINE2_L/PORT_E_L
2016.10.13
38 23
CODEC PD from ESIO AGND AVSS2 LINE2_R/PORT_E_R Julian
R2714 change to short pad
C2707 1 2 SC10U6D3V3MX-LL-GP ADU_LDO2_CAP 39 22 LINE1-L
AGND LDO2_CAP LINE1_L/PORT_C_L +3V_RTC +3D3V_S5
2016.10.5
Julian C2708 1 2SC4D7U6D3V3KX-LL-GP ADU_AVDD2 40 21 LINE1-R (R_)
[24] EC_AMP_EN AGND AVDD2 LINE1_R/PORT_C_R 1 2
ALC233
R2722 PWR_SEQ = 8 =Standby Power
ADU_PVDD1 41 20 CODEC_CPVREF_R R2714 1 2
0R2J-2-GP Function = CRB:+V3P3A
R2701 PVDD1 NC#20 0R0402-PAD-2-GP R2714 For ALC233VB2 mount
1
1 2 C2710 SPKR_L+ 42 19 MIC_CAP C2711 2 1 SC10U6D3V3MX-LL-GP
+5V_S0 SPK_OUT_L+ MIC_CAP AGND
C2709 SCD1U16V2KX-3-LL-GP
0R0603-PAD-2-GP-U SC10U6D3V3MX-LL-GP SPKR_L- 43 (Include Thermal pad) 18 SLEEVE
SPK_OUT_L- MIC2_R/PORT_F_R/SLEEVE PCB trace width of
1
2
C C
SPKR_R- 44 QFN48 (6x6) 17 RING2 RING2 & SLEEVE at least 40 mil
Buzzer from PCH SPKR_R+ 45
SPK_OUT_R- MIC2_L/PORT_F_L/RING2
16
R2703 For ALC233 mount
SPK_OUT_R+ MONO_OUT For ALC233VB2 set as NC
Add this Filter to avoid other 46 15 JDREF_1 R2703 1 2 20KR2F-L-GP
[20,22] SPKR PVDD2 JDREF AGND
components/chips be influenced (R_)
GPIO0/DMIC_DATA
CODEC_PD_N
GPIO1/DMIC_CLK
47 14 R2713 1 2 +3D3V_S0
PD# SENSE_B
1
HDA_SPK_MUTE_CODEC# C2728 100KR2F-L1-GP R2713 For ALC233VB2 mount
SCD1U16V2KX-3-LL-GP 48 13 SENSE_A R2715 1 2 HPOUT_JD
SDATA_OUT
For Speaker de-pop SPDIF_OUT/GPIO2 SENSE_A
LDO3_CAP
200KR2F-L-GP R2715 (64.39225.6DL)(39.2K) for
SDATA_IN
DVDD_IO
2
PCBEEP
DC_DET
RESET#
49
GND place close to pin 13 ALC233/ACL283 use
DVDD
SYNC
BCLK
speaker traces width >40mil when 2W4ohm speaker ALC233-CG-GP-U
https://vinafix.com
10
11
12
(071.00233.0003) Analog
Digital
ALC233_DVSS
HDA_RST_N_CODEC
ADU_LDO3_CAP
Place close to pin 1
1
MONO_IN C2725 SC 2013.1.17
+3D3V_S0
SC100P50V2JN-3-LL-GP Julian add
1
C2712 HDA_RST_N_CODEC
PWR_SEQ = 21
C2713
2
SCD1U16V2KX-3-LL-GP
1
SC10U6D3V3MX-LL-GP C2714 HDA_SYNC_CODEC
1
R2716
SC10U6D3V3MX-LL-GP
DVDD-IO R2717 1 2
CODEC_DMIC_DATA
+3D3V_S0
2
CODEC_DMIC_CLK
(R_) Change to 0805? 0R0402-PAD-2-GP
1
+3D3V_DSW +3D3V_S5 HDA_SDIN0_CODEC C2716
2
SC10U6D3V3MX-LL-GP
0R2J-2-GP
2
place close to CODEC
1
R2708 R2706 DMIC_DATA R2718 1 2 HDA_SDOUT_CODEC HDA_SDIN0_CODEC R2725 1 2 HDA_SDIN0_PCH

Leon：Change codec PD control from ESIO 10KR2F-2-GP 10KR2F-2-GP 0R0402-PAD-2-GP HDA_BITCLK_CODEC
DMIC_CLK R2724 1 2 33R2J-2-GP
B B
1
0R0402-PAD-2-GP C2719
2
SC22P50V2JN-4-LL-GP C2717
1
CODEC_PD_N C2727 SC4D7P50V2BN-1-GP

place close to pin 9
2
EC_AMP_EN_RS SC22P50V2JN-4-LL-GP (R_)
(R_)
2
EC_AMP_EN 1 R2709 2 EC_AMP_EN_RG (R) --> ALC233 / ALC233VB

D
0R0402-PAD-2-GP 0 Ω --> ALC283

Q2702 2016.10.5
2
2N7002K-2-GP Julian
6
R2710
100KR2F-L1-GP Q2701
2N7002KDW-1-GP R2702
1 2
1
C2718 1 2SCD1U25V2KX-LL-GP
1
0R0603-PAD
Analog_ground
Digital_ground AGND
HDA_RST_N_CODEC 1 R2707 2 HDA_RST_N_CODEC_R CODEC_PD AGND

0R0402-PAD-2-GP R2704
1 2
0R0603-PAD
C2720 1 2SCD1U25V2KX-LL-GP C2721 1 2SCD1U25V2KX-LL-GP
Digital_ground AGND Analog_ground
ANALOG DIGITAL Near AVDD1 and AVDD2 power source input
AGND AGND
R2723 2016.9.9
1 2 R2705 Julian
+5V_CODEC +5V_S0
2D2R3-1-U-GP Place beep circuit nearby codec. 1 2
0R3J-0-U-GP
R2711 (R_)
1
SPKR 1 2 EC_BEEP_L 1 2 MONO_IN Digital_ground AGND Analog_ground

A C2722 A
SC10U6D3V3MX-LL-GP
PCH Beep 4K7R2F-GP C2723
2
SCD1U16V2KX-3-LL-GP Tied at one point only under

1
ED2701 R2712 C2724

AZ5125-02S-R7G-GP 1KR2J-1-GP SC100P50V2JN-3-LL-GP Codec or near the Codec
2
AGND (R_)
1
Moat 12F, 88, Hsin Tai Wu Rd
3
Hsichih, Taipei
In order to prevent the built-in LDO damaged from
Title
Title
over-voltage on +5VSYS or Standby power line, we
suggested using this Voltage suppressing device. 027_Audio Codec_(ALC233)
Size
Size DocumentNumber
Document Number Rev
Rev
C LA710 1
Date:
Sheet 27 of 107
5 4 3 2 1
5 4 3 2 1
D D
Reserved C
https://vinafix.com
B B
A A
Hsichih, Taipei
Title
028_Audio DSP&AMP_(R)
A LA710 1
5 4 3 2 1
5 4 3 2 1
SLEEVE_CON HPOUT_JD
[27] SPKR_L+
Internal Speaker x 2 ESD
[27] SPKR_L-
[27] SPKR_R-
[27] SPKR_R+
1
SPKR1 ED2903
5 AZ5125-02S-R7G-GP
SPKR_L+ L2903 1 2 HCB2012KF-300T60-GP SPKR_L+_C 4
[27] SLEEVE SPKR_L- 1 2 HCB2012KF-300T60-GP SPKR_L-_C 3
L2904
[27] RING2 SPKR_R+ SPKR_R+_C
L2905 1 2 HCB2012KF-300T60-GP 2
D D
[27] HPOUT-L SPKR_R- 1 2 HCB2012KF-300T60-GP SPKR_R-_C 1
L2906
[27] HPOUT-R
3
(R_) (R_) 6
C2911 C2912
1 2 1 2 CLX-CON4-13-GP
[27] LINE1-R
[27] LINE1-L 2016.08.30
SC1U25V3KX-1-LL-GP
SC1U25V3KX-1-LL-GP
EMC
1
[27] LINE1-VREFO-L 1
C2901 C2902 C2903 C2904 TP2905 AFTE30-GP
[27] LINE1-VREFO-R
2
D2905 NEAR AUD1
[27] MIC2-VREFO
[27] HPOUT_JD
2016.08.30
Julian
C2901~C2904 Change to 2200 pF
UAJ Headset
(ALC233 supported iPhone/Nokia headset, Headphone)
R2906 1 2 2K2R2J-2-GP
C MIC2-VREFO R2905 1 2 2K2R2J-2-GP AUD1 C

RING2_CON 3
HPOL_CON 1
SLEEVE R2918 1 2 0R0402-PAD-2-GP
5
RING2 R2919 1 2 0R0402-PAD-2-GP 6
HPOR_CON 2
HPOUT-R R2904 1 2 HPOUT-R_1 L2901 1 2 FCM1005KF-121T05-GP SLEEVE_CON 4
47R2F-GP
HPOUT-L R2903 1 2 HPOUT-L_1 L2902 1 2 FCM1005KF-121T05-GP AUDIO-JK637-GP
47R2F-GP
1
C2905 C2906 C2907 C2908
1
(R_) (R_)
10KR2J-3-GP
10KR2J-3-GP
R2907 R2908 AGND
2
https://vinafix.com
LINE1-R C2917 1 2 LINE1-R_1 1 R2927 21KR2J-1-GP
2
SC4D7U6D3V3KX-LL-GP
LINE1-L C2918 1 2 LINE1-L_1 1 R2926 21KR2J-1-GP
SC4D7U6D3V3KX-LL-GP
LINE1-VREFO-L 1 R2920 2 4K7R2J-2-GP AGND AGND AGND
LINE1-VREFO-R 1 R2921 2 4K7R2J-2-GP
HPOUT_JD
SDV
Vender suggest:
Add for improve ESD protection
Wise: 1209
EMC REQUEST
GAP-CLOSE-PWR-3-GP
G2901 1 2
R2909 1 2 0R0603-PAD-2-GP-U
GAP-CLOSE-PWR-3-GP
R2910 1 2 0R0603-PAD-2-GP-U G2902 1 2
B B
R2911 1 2 0R0603-PAD-2-GP-U GAP-CLOSE-PWR-3-GP

G2903 1 2
2016.10.5
Julian
AGND AGND
Add for EMI/EMC SDV

Wise 1009 Add G2901,G2902,G2903 for EMI/EMC
Wise 0109
ESD
ED2901 ED2902
2 RING2_CON 2 HPOL_CON
3 3
1 1 HPOR_CON
AZ5125-02S-R7G-GP AZ5125-02S-R7G-GP
A A
Hsichih, Taipei
Title
Title
029_Audio Jack_(MIC/SPEA) (1/2)
Size
Size DocumentNumber
Document Number Rev
Rev
C LA710 1
Date:
Sheet 29 of 107
5 4 3 2 1
5 4 3 2 1
D D
Reserved
C C
https://vinafix.com
B B
A A
Hsichih, Taipei
Title
030_Audio Jack_(R) (2/2)
A LA710 1
5 4 3 2 1
5 4 3 2 1
LAN_XTALI RJ45_LED0
LAN_XTALO RJ45_LED1 1 TP3101 TPAD24
RJ45_LED2 1 TP3102 TPAD24
R3115
1 2 LAN_RSET
+3D3V_LAN
2K49R2F-GP
1
(R_) +3D3V_LAN
C3101 C3102 C3119
SCD1U16V2KX-3-LL-GP SCD1U16V2KX-3-LL-GP SC4D7U6D3V3KX-LL-GP
32
31
30
29
28
26
27
25
2
2
Near pin 32 Near pin 11 U3101 P_LAN_VDDREG_IN R3114 1 2 0R0603-PAD-2-GP-U
AVDD33
AVDD10
LED0
LED2
CKXTAL2
CKXTAL1
RSET
LED1/GPO
33
GND
D D
+1D05V_LAN LAN_MDI0_DP 1 24 LAN_1P05_OUT

LAN_MDI0_DN 2 MDIP0 REGOUT 23 P_LAN_VDDREG_IN +1D05V_LAN
3 MDIN0 VDDREG 22
LAN_MDI1_DP AVDD10 DVDD10 LAN_WAKE_N +1D05V_LAN
4 21
LAN_MDI1_DN 5 MDIP1 LANWAKE# 20 RTL_ISOLATE_N LAN_1P05_OUT R3106 1 2 0R0603-PAD-2-GP-U
MDIN1 ISOLATE#
1
LAN_MDI2_DP 6 19 LAN_RST_N C3115 SCD1U16V2KX-3-LL-GP
C3103 C3104 C3105 C3106 LAN_MDI2_DN 7 MDIP2 PERST# 18 LAN_PCIE_C_RX_N 1 2 LAN_PCIE_RX_N
MDIN2 HSON
1
SCD1U16V2KX-3-LL-GP SCD1U16V2KX-3-LL-GP SCD1U16V2KX-3-LL-GP SCD1U16V2KX-3-LL-GP 8 17 LAN_PCIE_C_RX_P 1 2 LAN_PCIE_RX_P
PCIE AVDD10 HSOP
2
Near pin 3 Near pin 8 Near pin 22 Near pin 30 C3114 SCD1U16V2KX-3-LL-GP C3108 C3109
SCD1U16V2KX-3-LL-GP SC2D2U6D3V2CX-LL-GP
2
REFCLK_N
REFCLK_P
(R_)
CLKREQ#
[16] LAN_PCIE_TX_N
AVDD33
[16] LAN_PCIE_TX_P
MDIN3
MDIP3
HSIN
HSIP
[16] LAN_PCIE_RX_N
[16] LAN_PCIE_RX_P
RTL8111G-CGT-1-GP-U2
9
10
11
12
13
14
15
16
LAN CLOCK
+1D05V_LAN
[18] LAN_CLK100M_PCH_P
[18] LAN_CLK100M_PCH_N +3D3V_S0
1
1
C3118
SC1U10V2KX-1-LL-GP C3112 R3110
LAN_MDI3_DP LAN_CLK100M_PCH_N 1KR2J-1-GP
TO ECIO WAKE ON LAN SCD1U16V2KX-3-LL-GP
2
LAN_MDI3_DN LAN_CLK100M_PCH_P
Near pin 22
[24,61,62] EC_WAKE_N +3D3V_LAN
2
LAN_CLKREQ_PCH_N RTL_ISOLATE_N
1
1
C3122 LAN_PCIE_C_TX_N 1 2 LAN_PCIE_TX_N
SC4D7U6D3V3KX-LL-GP LAN_PCIE_C_TX_P 1 2 LAN_PCIE_TX_P R3109
2
15KR2J-1-GP
LAN RST*
2
C C
[24,61,68,91,95] EC_RSTOUT0_N LAN RST*

LAN REQ* C3116 LAN CLKREQ# (LAN power saving mode)
R3105
2 1 LAN_XTALO_1 1 2 LAN_XTALO
+3D3V_S5 S0 S3 S5 DS
SC15P50V2JN-2-LL-GP 0R0402-PAD-2-GP
[18] LAN_CLKREQ_PCH_N H L L L LAN_RST_N R3108 1 2 EC_RSTOUT0_N
1
R3112 0R0402-PAD-2-GP
10KR2J-3-GP
[32] LAN_MDI0_DP
1
2
[32] LAN_MDI0_DN
X3101
XTAL-25MHZ-155-GP
https://vinafix.com
[32] LAN_MDI1_DP
2
LAN_CLKREQ_PCH_N
[32] LAN_MDI1_DN
[32] LAN_MDI2_DP
4
[32] LAN_MDI2_DN
C3117
[32] LAN_MDI3_DP +3D3V_LAN
R3125
[32] LAN_MDI3_DN LAN_XTALI_1 LAN_XTALI
2 1 1 2
SC15P50V2JN-2-LL-GP 0R0402-PAD-2-GP R3120

1 2
1KR2J-1-GP
LANWAKE_LS_GATE
[32] RJ45_LED0
1
R3107
1KR2J-1-GP
Q3101
2
B B
G
V_3P3_LAN D EC_WAKE_N
LAN_WAKE_N S
2N7002K-2-GP
EE Leon: Add Q3101 for LAN WAKE
S0 S3 S5 DS
H H H L +3D3V_S5 +3D3V_S5
[24] EC_LAN_PWR_EN
2
R3101
1
0R5J-5-GP
C3125 +PWR_3D3V_LAN +3D3V_LAN (R_)
SCD1U16V2KX-3-LL-GP U3102
2
1
1 8 2 1 R3102
R3117 2 VIN#1 VOUT#8 7 0R0805-PAD-1-GP-U
EC_LAN_PWR_EN 1 2 PWR_LAN_EN 3 VIN#2 VOUT#7 6 PWR_LAN_SS C3128
ON CT
1
+5V_DSW 4 5 SC2D2U10V3KX-1-LL-GP
0R0402-PAD-2-GP VBIAS GND C3127
2
H 9 C3126 SCD1U16V2KX-3-LL-GP
GND
2
1
C3124 SC1KP50V2KX-1-LL-GP
SCD1U16V2KX-3-LL-GP
R3104 C3120
2
100KR2F-L1-GP SCD1U16V2KX-3-LL-GP (R_) TPS22965DSGR-2-GP

2
(R_)
1
A A
Hsichih, Taipei
Title
Title
031_LAN_(RTL8111H)
Size
Size DocumentNumber
Document Number Rev
Rev
C LA710 1
Date:
Sheet 31 of 107
5 4 3 2 1
5 4 3 2 1
180109 EE Leon:Change RJ45 to 022.10001.06H1 for 1C/1D
RJ45
LAN_MDI0_DP 1
LAN_MDI0_DN MDI0_P
D LAN_MDI1_DP
2
3 MDI0_N Reserve RClamp 2016.04.25 D
LAN_MDI1_DN 4 MDI1_P
MDI1_N
Julian
LAN_MDI2_DP 7 ED3201
LAN_MDI3_DP 9 MDI2_N LAN_MDI1_DP 1 6 LAN_MDI1_DN
5 MDI3_N
RJ_45_CAP VCT1
C3201 1 2 6 2 5 +3D3V_LAN
VCT2
SCD01U50V2KX-1-LL-GP
[31] LAN_MDI0_DP LAN_MDI0_DP LAN_MDI0_DN
3 4
[31] LAN_MDI0_DN
RJ45_LED0 R3209 1 2 RJ45_Y_LED_N 14
[31] LAN_MDI1_DP Y_LED_N
510R2J-1-GP YELLOW AZ1215-04S-R7G-GP
[31] LAN_MDI1_DN
13 (R_)
Y_LED_P
[31] LAN_MDI2_DP
[31] LAN_MDI2_DN
1
+3D3V_LAN EC3201 NP1
NP2 NP1
SCD1U16V2KX-3-LL-GP
ED3202
[31] LAN_MDI3_DP NP2
15
[31] LAN_MDI3_DN SHD#G1
2
16 LAN_MDI3_DP 1 6 LAN_MDI3_DN
SHD#G2
[31] RJ45_LED0
LINK_ACTIVITY_N==>RJ_LED0 RJ45 +XFOMER 2 5
+3D3V_LAN
SPEED_100_N ==>RJ_LED1 RJ45-10P-36-GP-U1
SPEED_1000_N ==>RJ_LED2 LAN_MDI2_DP 3 4 LAN_MDI2_DN
LAN_GND
AZ1215-04S-R7G-GP
(R_)
+3D3V_LAN
D3203
2
RJ45_LED0 3
C C
1
L2 Previous component
68.00128.041: CHIP BEAD BK1005LL220-T TAIYO
BAV99H-GP
(R_) LAN_GND C10 Previous component
78.10324.2FLLL: CHIP CAP C 0.01U 50V K0402 X7R
it is not Lily's component.
RJ45_LED0
R3212 1 2 0R0402-PAD-2-GP R3219 1 2 0R0402-PAD-2-GP
R3213 1 2 0R0402-PAD-2-GP R3217 1 2 0R0402-PAD-2-GP
R3214 1 2 0R0402-PAD-2-GP R3220 1 2 0R0402-PAD-2-GP
https://vinafix.com
2
(R_)
C3205 R3215 1 2 0R0402-PAD-2-GP R3221 1 2 0R0402-PAD-2-GP
1
R3216 1 2 0R0402-PAD-2-GP R3218 1 2 0R0402-PAD-2-GP
LAN_GND Add for EMI/EMC

Wise 1009
Layout Note: LAN_GND LAN_GND
Place near RJ45 Layout Note: Layout Note:

Place around RJ45 Place around RJ45
B B
A A
Hsichih, Taipei
Title
Title
032_RJ45_
Size
Size DocumentNumber
Document Number Rev
Rev
C LA710 1
Date:
Sheet 32 of 107
5 4 3 2 1
5 4 3 2 1
D D
Card Reader
Card Reader
+3D3V_CR_CONN
[16] CARD_USB20_N
[16] CARD_USB20_P +3D3V_S0 +3D3V_CR_CONN
[15] CR_DET_N
F3301
1 2
1
C POLYSW-1D1A6V-10-GP C
C3301 ED3301
SC10U6D3V3MX-LL-GP AZ5125-02S-R7G-GP
1
(R_)
3
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TR3301
+3D3V_CR_CONN CR1
CARD_USB20_P 4 3 CARD_USB20_CON_P 6
1
CARD_USB20_N 1 2 CARD_USB20_CON_N
CARD_USB20_CON_N 2
CARD_USB20_CON_P 3
FILTER-4P-195-GP 4
CR_DET_N R3302 1 2 CR_DET_N_R 5
100R2J-2-GP 7
B B
3
(R_) CLX-CON5-31-GP
1
C3302 D3302
SCD1U16V2KX-3-LL-GP BAV99H-GP
(R_)
2
+3D3V_S5 +5V_S5
ED3302
CARD_USB20_CON_N 1 6 CARD_USB20_CON_P
2 5
SCD1U16V2KX-3-LL-GP
1
3 4 C3303
2
AZC199-04S-R7G-GP
A A
Hsichih, Taipei
Title
Title
033_Card Reader_(USB2 Module)
Size
Size DocumentNumber
Document Number Rev
Rev
C LA710 1
Date:
Sheet 33 of 107
5 4 3 2 1
5 4 3 2 1
Front USB3.0 CONNECTOR USB 3.0 Connector

For EMI TEST Pin definition
1 POWER
TR3402 +5V_USB_CHARGER +5V_USB3_4 2 USB 2.0 D-
CHARGER_USB30_RX_P 1 2 CHARGER_USB30_RX_CON_P
3 USB 2.0 D+
CHARGER_USB30_RX_N 4 3 CHARGER_USB30_RX_CON_N R3420 2 1 0R5J-5-GP
(V330_) 4 GND
FILTER-4P-61-GP
USB2.0 8
ED3403 5 StdA_SSRX-
SuperSpeed RX
3 6 StdA_SSRX+
CHARGER_USB30_RX_CON_N 1 10 CHARGER_USB30_RX_CON_N
[16] CHARGER_USB20_N
[16] CHARGER_USB20_P 7 GND
CHARGER_USB30_RX_CON_P 2 9 CHARGER_USB30_RX_CON_P
+5V_USB_CHARGER 8 StdA_SSTX-
CHARGER_USB30_TX_CON_N 4 7 CHARGER_USB30_TX_CON_N SuperSpeed TX
USB36 9 StdA_SSTX+
D USB3.0 CHARGER_USB30_TX_CON_P 5 6 CHARGER_USB30_TX_CON_P D
1 10
VBUS CHASSIS#10 11
[19] CHARGER_USB30_TX_N CHARGER_USB20_CON_N 2 CHASSIS#11 12
C3409 C3401 C3402
[19] CHARGER_USB30_TX_P CHARGER_USB20_CON_P 3 D- CHASSIS#12 13
(A710_)
ST150U6D3VDM-28-GP
[19] CHARGER_USB30_RX_N AZ1043-04F-R7G-GP
D+ CHASSIS#13
1
[19] CHARGER_USB30_RX_P
SCD1U16V2KX-3-LL-GP CHARGER_USB30_RX_CON_N 5
SSRX-
2
CHARGER_USB30_RX_CON_P 6
TR3403 SSRX+ 4
CHARGER_USB30_TX_P C3406 1 2 CHARGER_USB30_TX_CMC_P 1 2 CHARGER_USB30_TX_CON_P CHARGER_USB30_TX_CON_N 8 PGND
CHARGER_USB30_TX_CON_P 9 SSTX- 7
CHARGER_USB30_TX_N 1 2 CHARGER_USB30_TX_CMC_N 4 3 CHARGER_USB30_TX_CON_N SSTX+ GND
C3407 SCD1U16V2KX-3-LL-GP USB3.0
OTHERS ( To ECIO) FILTER-4P-61-GP SKT-USB13-381-GP

(A710_022.10005.0BP1,V330_022.10005.0AB1)
[24] USB_CHARGER_OC_N
S0:CDP 1.5A
[24] USB_CHARGE_FAULT_N
==>1 1 1 1
S4/S5:DCP 1.5A
==>0 0 1 1
+5V_USB_CHARGER
ED3402
CHARGER_USB20_CON_N 1 6 CHARGER_USB20_CON_P
CHARGER CTRL (From ECIO) TR3401

2 5
[24] ECIO_ILIM_SEL
CHARGER_USB20_DN 4 3 CHARGER_USB20_CON_N S3:SDP 0.5A
[24] ECIO_CHAR_CTL1 CHARGER_USB20_DP 1 2 CHARGER_USB20_CON_P 3 4 ==>0 1 1 1
SCD1U16V2KX-3-LL-GP
[24] ECIO_CHAR_CTL3
1
[24] ECIO_CHAR_CTL2
C3405
[24] ECIO_CHAR_EN
FILTER-4P-195-GP AZC199-04S-R7G-GP
2
For EMI TEST
C C
TP3401
1
OC EVENT FROM CHARGER IC
+5V_USB_CHARGER
USB_CHARGER_WAKE#_R
USB_CHARGE_FAULT_N
+5V_S5 =Standby Power
(A710_)
SCD1U16V2KX-3-LL-GP
(A710_)
SCD1U16V2KX-3-LL-GP
Function = CRB:+V5A
1
PWR_SEQ = 7 C3403 C3404
2
+3D3V_S5
(A710_)
SCD1U16V2KX-3-LL-GP
(A710_)
SC10U6D3V3MX-LL-GP
1
=Standby Power C3408 C3410

To PCH
2
2
2
R3406 CHARGER_IC_USB20_P R3424 1 2 0R2J-2-GP (A710_) CHARGER_USB20_P

13
12
9
1
10KR2J-3-GP U3401 CHARGER_IC_USB20_N R3422 1 2 0R2J-2-GP (A710_) CHARGER_USB20_N

(R_)
STATUS#
FAULT#
OUT
IN
1
2
CHARGER_EN1 5 3 Co-Lay R3424/R3415 , R3422/R3419 R3415 R3419
EN DP_OUT 2
DM_OUT 0R2J-2-GP 0R2J-2-GP
ILIM_SEL 4 (V330_) (V330_)
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ILIM0 15 ILIM_SEL 10
ILIM_LO DP_IN
1
ILIM1 16 11
ILIM_HI DM_IN
NON_CHARGER_USB20_N
NON_CHARGER_USB20_P
1
CTL1
CTL2
CTL3
GND
GND
R3407 R3408
ILIM_HI 24Kohm:2.1A 51KR2F-L-GP 22KR2F-GP
(A710_) (A710_) TPS2546RTER-GP
Non-Charger
6
7
8
14
17
Lenovo HW Spec change (A710_)

2
ILIM_HI:2.4A To 2.1A
USB_CHARGER_CTL1
USB_CHARGER_CTL2
USB_CHARGER_CTL3
2
R3417 R3425
0R2J-2-GP 0R2J-2-GP
B
Co-Lay R3423/R3417 , R3416/R3425 (V330_) (V330_) B
1
CHARGER_IC_USB20_DP R3423 1 2 0R2J-2-GP (A710_) CHARGER_USB20_DP
CHARGER_IC_USB20_DN R3416 1 2 0R2J-2-GP (A710_) CHARGER_USB20_DN
MODE SELECT by ECIO

To connector
+3D3V_S5 +5V_USB_CHARGER
=Standby Power
MODE SELECT by ECIO

1
R3402 R3401
10KR2J-3-GP 10KR2J-3-GP ECIO_CHAR_EN R3409 1 2 0R0402-PAD-2-GP CHARGER_EN1
(A710_) (A710_)
ECIO_CHAR_CTL1 R3410 1 2 0R0402-PAD-2-GP USB_CHARGER_CTL1
2
ECIO_CHAR_CTL2 R3411 1 2 0R0402-PAD-2-GP USB_CHARGER_CTL2
USB_CHARGER_OC_N ECIO_CHAR_CTL3 R3418 1 2 0R0402-PAD-2-GP USB_CHARGER_CTL3
To ESIO for charger OC detect USB_CHARGE_FAULT_N ECIO_ILIM_SEL R3421 1 2 0R0402-PAD-2-GP ILIM_SEL

1
R3405
15KR2F-GP
(A710_)
2
V_3P3_STBY\G
+3D3V_S5
=Standby Power
Control pin Truth Table Setting

Function = CRB:+V3P3A (R_)
R3413 1 2 10KR2J-3-GP ECIO_CHAR_CTL3
A A
ECIO_ILIM_SEL
Mode CTL1 CTL2 CTL3 ILIM_SEL
R3404 1 2 10KR2J-3-GP
(A710_)
R3412 1 2 100KR2J-1-GP ECIO_CHAR_CTL1 CDP(S0) 1 1 1 1

(A710_)
R3403 1 2 100KR2J-1-GP
(A710_)
ECIO_CHAR_CTL2
DCP(S3) 0 1 1 0
ECIO_CHAR_EN Wistron Incorporated
DCP(S4/S5) 0 0 1 1
R3414 1 2 100KR2J-1-GP
(A710_) 12F, 88, Hsin Tai W u Rd
Hsichih, Taipei
Title
Title
034_USB30 Charger_REAR PORT6
Size
D LA710
Document Number Rev
1
5 4 3 2 1
Coupling caps
D D
USB4_USB30_TX_P C3501 1 2SCD1U25V2KX-LL-GP USB4_USB30_TX_CMC_P
USB4_USB30_TX_N C3502 1 2SCD1U25V2KX-LL-GP USB4_USB30_TX_CMC_N
[38] USB4_USB20_SW_N
[38] USB4_USB20_SW_P
USB 2.0 For EMI TEST
[19] USB4_USB30_TX_P
[19] USB4_USB30_RX_N ED3501
8
[19] USB4_USB30_RX_P
3
USB4_USB30_RX_N 1 10 USB4_USB30_RX_N
[24,38] UART_P80_EN
TR3503 USB4_USB30_RX_P 2 9 USB4_USB30_RX_P
+5V_USB3_4
USB4_USB20_SW_P 4 3 USB4_USB20_CON_P USB4_USB30_TX_CMC_N 4 7 USB4_USB30_TX_CMC_N
USB4_USB20_SW_N 1 2 USB4_USB20_CON_N USB4_USB30_TX_CMC_P 5 6 USB4_USB30_TX_CMC_P USB34
1 10
VBUS CHASSIS#10 11
FILTER-4P-195-GP
USB4_USB20_CON_N 2 CHASSIS#11 12
AZ124S-04F-R7G-GP
USB4_USB20_CON_P 3 D- CHASSIS#12 13
D+ CHASSIS#13
1
C3508 C3509
USB4_USB30_RX_N 5
[16,36] USB2_OC1_P4_P5_N USB4_USB30_RX_P 6 SSRX-
SSRX+
2
4
USB4_USB30_TX_CMC_N 8 PGND
[8,20,24,36,40] SLP_S4_N USB4_USB30_TX_CMC_P SSTX- UART_P80_EN
9 7
SSTX+ GND
USB3.0
SKT-USB13-383-GP
ED3502 +5V_USB3_4
USB4_USB20_CON_P USB4_USB20_CON_N
1
1 6
R3518
100KR2J-1-GP
2 5
SCD1U16V2KX-3-LL-GP
2
1
UART_P80_EN 3 4 C3514
2
AZC199-04S-R7G-GP
C C
USB PORT4 / Non Charger Power

+5V_S5 +5V_USB3_4
U3502
5 1
VIN VOUT 2
4 GND 3 USB2_OC1_P4_P5_N
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EN OC#
1
C3515
SC1U10V2KX-1-LL-GP C3516
USB3_4_PWR_EN
UP7549TMA5-20-1-GP ST150U6D3VDM-28-GP
2
Out MAX Current=2.5A
SLP_S4_N R3515 1 2
0R0402-PAD-2-GP
B B
A A
Hsichih, Taipei
Title
Title
035_USB30_Front Port4
D LA710 1
5 4 3 2 1
USB PORT1 Power

+5V_S5 +5V_USB3_1
USB3.0 ESD
U3601
ED3601
5 1 8
USB2.0 * 4 ==> VIN VOUT
GND
2 3
4 3 USB2_OC0_P1_P2_P3_N USB1_USB30_RX_N 1 10 USB1_USB30_RX_N
EN OC#
1
[16] USB1_USB20_N C3601
SC1U10V2KX-1-LL-GP C3602 USB1_USB30_RX_P 2 9 USB1_USB30_RX_P
[16] USB1_USB20_P
USB3_1_PWR_EN
2
USB1_USB30_TX_CMC_N 4 7 USB1_USB30_TX_CMC_N
[16]
[16]
USB2_USB20_P
USB2_USB20_N Out MAX Current=2.5A USB1_USB30_TX_CMC_P 5 6 USB1_USB30_TX_CMC_P
+5V_USB3_1
[16] USB3_USB20_N USB31

D D
[16] USB3_USB20_P
1 10
VBUS CHASSIS#10 11
[38] USB5_USB20_SW_N AZ124S-04F-R7G-GP
[38] USB5_USB20_SW_P SLP_S4_N USB1_USB20_CON_P D- CHASSIS#12
R3601 1 2 3 13
0R0402-PAD-2-GP D+ CHASSIS#13
1
C3603 C3604
USB1_USB30_RX_N 5
ED3603 +5V_USB3_1 USB1_USB30_RX_P 6 SSRX-
SSRX+
2
4
USB1_USB20_CON_P 1 6 USB1_USB20_CON_N USB1_USB30_TX_CMC_N 8 PGND
USB PORT2/3 Power USB1_USB30_TX_CMC_P 9 SSTX-
SSTX+ GND
7
2 5 USB3.0
SCD1U16V2KX-3-LL-GP
SKT-USB13-383-GP
1
+5V_S5 +5V_USB3_23 (A710_022.10005.0BQ1,V330_022.10005.0AB1)
3 4 C3605
U3602
2
5 1 AZC199-04S-R7G-GP
VIN VOUT 2
4 GND 3 USB2_OC0_P1_P2_P3_N
EN OC#
1
C3606
USB3_23_PWR_EN
2
USB3.0 * 4 ==> ED3605
8
3
[19] USB1_USB30_TX_P USB2_USB30_RX_N USB2_USB30_RX_N
1 10
[19] USB1_USB30_TX_N SLP_S4_N R3602 1 2
[19] USB1_USB30_RX_P USB2_USB30_RX_P USB2_USB30_RX_P
0R0402-PAD-2-GP 2 9
USB2_USB30_TX_CMC_N 4 7 USB2_USB30_TX_CMC_N
[19] USB2_USB30_TX_N +5V_USB3_23
[19] USB2_USB30_TX_P USB2_USB30_TX_CMC_P USB2_USB30_TX_CMC_P
5 6
[19] USB2_USB30_RX_P USB32
[19] USB3_USB30_TX_P USB PORT5 Power AZ124S-04F-R7G-GP

1
VBUS CHASSIS#10
10
11
[19] USB3_USB30_TX_N +5V_S5 +5V_USB3_5 USB2_USB20_CON_N 2 CHASSIS#11 12
[19] USB3_USB30_RX_P USB2_USB20_CON_P D- CHASSIS#12
3 13
[19] USB3_USB30_RX_N D+ CHASSIS#13
U3603
1
C3611 C3608
[19] USB5_USB30_TX_N USB2_USB30_RX_N
5 1 5
[19] USB5_USB30_TX_P VIN VOUT 2 +5V_USB3_23 USB2_USB30_RX_P 6 SSRX-
[19] USB5_USB30_RX_N ED3607
GND SSRX+
2
4 3 USB2_OC1_P4_P5_N 4
[19] USB5_USB30_RX_P EN OC# PGND
1
1
C C3609 USB2_USB20_CON_N 1 6 USB2_USB20_CON_P USB2_USB30_TX_CMC_N 8 C
SC1U10V2KX-1-LL-GP C3610 USB2_USB30_TX_CMC_P 9 SSTX- 7
ST150U6D3VDM-28-GP SSTX+ GND
UP7549TMA5-20-1-GP
2
2
2 5 USB3.0
SCD1U16V2KX-3-LL-GP
SKT-USB13-383-GP
1
(A710_022.10005.0BQ1,V330_022.10005.0AB1)
3 4 C3612
2
AZC199-04S-R7G-GP
SMARTPW R_EN Support USB Power ON

To PCH USB OC pin R3603 1 2 100KR2J-1-GP
C3627 1 2 SCD1U16V2KX-3-LL-GP ED3608

8
[16] USB2_OC0_P1_P2_P3_N
(R_) 3
[16,35] USB2_OC1_P4_P5_N USB3_USB30_RX_N 1 10 USB3_USB30_RX_N
Coupling caps USB3_USB30_RX_P 2 9 USB3_USB30_RX_P

[8,20,24,35,40] SLP_S4_N USB3_USB30_TX_CMC_N USB3_USB30_TX_CMC_N +5V_USB3_23
4 7
[24] SMARTPW R_EN
USB1_USB30_TX_P C3613 1 2SCD1U25V2KX-LL-GP USB1_USB30_TX_CMC_P USB3_USB30_TX_P C3614 1 2SCD1U25V2KX-LL-GP USB3_USB30_TX_CMC_P USB3_USB30_TX_CMC_P 5 6 USB3_USB30_TX_CMC_P
USB33
USB1_USB30_TX_N C3615 1 2SCD1U25V2KX-LL-GP USB1_USB30_TX_CMC_N USB3_USB30_TX_N C3616 1 2SCD1U25V2KX-LL-GP USB3_USB30_TX_CMC_N
1 10
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VBUS CHASSIS#10 11
EC Control Pin AZ124S-04F-R7G-GP
USB3_USB20_CON_N CHASSIS#11
2 12
D+ CHASSIS#13
USB2_USB30_TX_P USB2_USB30_TX_CMC_P USB5_USB30_TX_P USB5_USB30_TX_CMC_P
1
C3617 1 2SCD1U25V2KX-LL-GP C3618 1 2SCD1U25V2KX-LL-GP C3622 C3620
USB3_USB30_RX_N 5
USB2_USB30_TX_N C3619 1 2SCD1U25V2KX-LL-GP USB2_USB30_TX_CMC_N USB5_USB30_TX_N C3621 1 2SCD1U25V2KX-LL-GP USB5_USB30_TX_CMC_N USB3_USB30_RX_P 6 SSRX-
SSRX+
2
4
ED3609 +5V_USB3_23 USB3_USB30_TX_CMC_N 8 PGND
USB3_USB30_TX_CMC_P 9 SSTX- 7
USB3_USB20_CON_P 1 6 USB3_USB20_CON_N SSTX+ GND
USB3.0
SKT-USB13-383-GP
2 5
SCD1U16V2KX-3-LL-GP
1
B USB 2.0 For EMI TEST 3 4 C3623
B
2
AZC199-04S-R7G-GP
TR3607 TR3608
USB1_USB20_P 4 3 USB1_USB20_CON_P USB3_USB20_N 1 2 USB3_USB20_CON_N ED3610
8
USB1_USB20_N 1 2 USB1_USB20_CON_N USB3_USB20_P 4 3 USB3_USB20_CON_P 3
USB5_USB30_RX_CON_N 1 10 USB5_USB30_RX_CON_N
FILTER-4P-195-GP FILTER-4P-195-GP
TR3612
USB5_USB30_RX_CON_P 2 9 USB5_USB30_RX_CON_P +5V_USB3_5 Support USB Power ON
USB5_USB30_RX_N 1 2 USB5_USB30_RX_CON_N USB5_USB30_TX_CON_N 4 7 USB5_USB30_TX_CON_N
USB35
USB5_USB30_RX_P 4 3 USB5_USB30_RX_CON_P USB5_USB30_TX_CON_P 5 6 USB5_USB30_TX_CON_P
1 10
VBUS CHASSIS#10 11
FILTER-4P-61-GP
AZ1043-04F-R7G-GP
D+ CHASSIS#13
1
TR3609 C3624 C3625
USB5_USB30_TX_CMC_N 1 2 USB5_USB30_TX_CON_N USB5_USB30_RX_CON_N 5
USB5_USB30_RX_CON_P 6 SSRX-
SSRX+
2
USB5_USB30_TX_CMC_P 4 3 USB5_USB30_TX_CON_P 4
ED3611 +5V_USB3_5 USB5_USB30_TX_CON_N 8 PGND
USB5_USB30_TX_CON_P 9 SSTX- 7
FILTER-4P-61-GP
USB5_USB20_CON_P 1 6 USB5_USB20_CON_N SSTX+ GND
USB3.0
SKT-USB13-362-GP
2 5
SCD1U16V2KX-3-LL-GP
1
TR3610 TR3611 3 4 C3626
2
USB2_USB20_P 1 2 USB2_USB20_CON_P USB5_USB20_SW_P 4 3 USB5_USB20_CON_P
AZC199-04S-R7G-GP
USB2_USB20_N 4 3 USB2_USB20_CON_N USB5_USB20_SW_N 1 2 USB5_USB20_CON_N
A FILTER-4P-195-GP FILTER-4P-195-GP A
Hsichih, Taipei
Title
Title
036_USB30_REAR PORT1235
D LA710 1
5 4 3 2
Date: 1
Sheet
5 4 3 2 1
D D
C
Reserved C
https://vinafix.com
B B
A A
Hsichih, Taipei
Title
037_USB20_(BIOS RECOVERY)_(R)
A LA710 1
5 4 3 2 1
5 4 3 2 1
SMART PWR ON Function
[16] USB5_USB20_N
[16] USB5_USB20_P
D [24] USBSW1_YM D
[24] USBSW1_YP
[16] USB4_USB20_N
[16] USB4_USB20_P
[24]
[24]
SINA_SIO
SOUTA_SIO
Non-Smart Power On EC_USB_PWRON PCH USB EC_USB_PORT
L PCH - USB CONN USB Normal (S3/S0)

R3807 1 2 0R2J-2-GP (V330_) USB5_NONSMART_USB20_P R3809 1 2 0R2J-2-GP (V330_)
[24] EC_USB_PWRON USB5_NONSMART_USB20_N
[24,35] UART_P80_EN R3810 1 2 0R2J-2-GP (V330_) R3811 1 2 0R2J-2-GP (V330_)
H EC - USB CONN USB smart power on(S5)
[15] USB_DEBUG_GPPD16
+3D3V_S5
OE# S FUNCTION
+3D3V_S5
SCD1U16V2KX-3-LL-GP H X Disconnect
C3802 L L D=1D USB power on(S5)
To connector
1
U3802 2 1
R3803 L H D=2D USB Normal (S3/S0)
10KR2J-3-GP USB5_USB20_SW_P R3806 1 2 0R2J-2-GP (A710_) USB5_USB20_SW_A_P 8 10 (A710_)
(A710_) USB5_USB20_SW_N R3804 1 2 0R2J-2-GP (A710_) USB5_USB20_SW_A_N 7 D+ VDD
D-
2
6 1 USBSW1_YP
USB_PWRON_SEL 9 OE# 1D+ 2 USBSW1_YM
S 1D-
3 USB5_A_USB20_P R3805 1 2 0R2J-2-GP (A710_) USB5_USB20_P
5 2D+ 4 USB5_A_USB20_N R3808 1 2 0R2J-2-GP (A710_) USB5_USB20_N
GND 2D-
D
C C
PI3USB221XAE-GP-U
(A710_)
To PCH
Q3802
2N7002K-2-GP Smart Power On
(A710_)
G
EC_USB_PWRON
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B B
USB DEBUG SWITCH

+3D3V_S5
+3D3V_S5
SCD1U16V2KX-3-LL-GP
C3801
1
U3801 2 1
R3802
10KR2J-3-GP USB4_USB20_SW_P 8 10
USB4_USB20_SW_N 7 D+ VDD
D- UART_P80_EN POST 80 DEBUG CARD OE# S FUNCTION
(R_)
2
6 1 SOUTA_SIO
USB_DEBUG_GPPD16 1 2 USB_UART_SEL 9 OE# 1D+ 2 SINA_SIO L DISABLE NOT INSERT H X Disconnect
R3801 S 1D-
0R2J-2-GP 3 USB4_USB20_P L L D=1D (USB Debug)
5 2D+ 4 USB4_USB20_N H ENABLE INSERT
GND 2D- L H D=2D (USB normal)
D
PI3USB221XAE-GP-U
Q3801
2N7002K-2-GP
G
UART_P80_EN
A A
Hsichih, Taipei
Title
Title
038_USB30_SMART ON_DEBUG
Size
Size DocumentNumber
Document Number Rev
Rev
C LA710 1
Date:
Sheet 38 of 107
5 4 3 2 1
5 4 3 2 1
180402 EE Leon : w/o IRMT => stuff R3905,C3902,C3904
+12V_S0 R3905 1 2 0R0805-PAD-2-GP-U

+12V_S0_FAN
Q3902
C3902 1 2 1 S D 8
SCD1U16V2KX-3-LL-GP 2 S D 7
2
3 S D 6
D IRMT_FANPWR_EN 4 G D 5 C3904 D
SCD1U16V2KX-3-LL-GP
1
AON7401-GP
(IRMT_)
[15] PCH_FANPWR_EN_N
+19V_DCBATOUT
+3D3V_S0
D
Q3901
1
2N7002K-2-GP
1
R3902
(IRMT_) 47KR2F-GP
R3901 (IRMT_)
10KR2F-2-GP
2
(IRMT_)
S
2
G
PCH_FANPWR_EN_N
1
C3901 R3903 C3903
1
SCD1U16V2KX-3-LL-GP 442KR2F-GP SCD1U25V2KX-LL-GP
(R_) (IRMT_) (IRMT_)
2
C C
2
[95]
[24]
SCALAR_PD#
EC_EDP_PD_N
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B (R_) B
SCALAR_PD# R3904 1 2 0R2J-2-GP EC_EDP_PD_N
A A
Hsichih, Taipei
Title
Title
039_IRMT
Size
Size Document
DocumentNumber
Number Rev
Rev
B LA710 1
Date:
Sheet 39 of 107
5 4 3 2 1
5 4 3 2 1
12V_S0 ENABLE 0D95V_VCCIO_S0 ENABLE 1V_CPU_CORE ENABLE

+3D3V_S5 +3D3V_S5
R4071 +3D3V_S0 3D3V_DSW_1 ENABLE +3D3V_LDO_PW R R4001
1 2 =Standby Power 100KR2J-1-GP
+3D3V_S5
Function = CRB:+V3P3A 1 2
PW R_3D3V_EN2 [45]
1
10KR2F-2-GP SEQ_12V_EN [54]
R4002 R4003 R4004
C4006 100KR2J-1-GP 100KR2J-1-GP 22KR2J-GP
1
SCD1U16V2KX-3-LL-GP
DPWROK Solution 1:ECIO(Default)

R4005
2
VCCIO_EN_2 VCCIO_EN_5 0R0402-PAD-2-GP
2
1 2
[50] PW R_VCCIO_PG VR_ENABLE [40,46]
Q4001
2N7002K-2-GP +3D3V_S5 +3D3V_S0 R4006
1
C4001 0R0402-PAD-2-GP
Q4002 Q4003 SCD1U16V2KX-3-LL-GP 1 2
[24] SIO_DPW ROK PCH_SIO_DPWROK [20,40]
2N7002KDW -1-GP 2N7002KDW -1-GP PWR_SEQ = 5
2
1
1
R4008
1D05V_VCCSA_S0 ENABLE
1
G
S
R4007 10KR2J-3-GP
For adaptor only :

[24,40] SIO_PSON_N 10KR2F-2-GP
R4010
2
D (R_) C4002 0R0402-PAD-2-GP D
VCCIO_EN_4 R4009 1 2 SC1U10V2KX-1-LL-GP 1 2 PCH_SIO_DPWROK_DIS 1 2
[40,46] VR_ENABLE PCH_SIO_DPWROK [20,40]
C4003 0R2J-2-GP (R_) PWR_SEQ = 5
1
SCD1U16V2KX-3-LL-GP
1
VCCSA_EN_R_1
2
R4013 1 2
3D3V_S0, 5V_S0 ENABLE [51] PW R_MEM_PG R4012
33KR2J-3-GP
[40,50] SEQ_VCCIO_EN
0R0402-PAD-2-GP
PW R_VCCSA_EN [50]
R4015
2 1 DPW ROK_EN2 1 2
+19V_DCBATOUT 100KR2F-L1-GP
2
PW R_S0_EN [42] +3D3V_S0 R4014
2
R4017 1 2 20KR2F-L-GP Follow CRB mount 100K
1
100KR2F-L1-GP
Wise 0915
3
C4004 C4005
3
SCD1U16V2KX-3-LL-GP Q4004 Q4005 SCD01U50V2KX-1-LL-GP
R4020 2N7002KDW -1-GP 2N7002KDW -1-GP
D
10KR2J-3-GP
Q4021 VR_ENABLE_R
4
2N7002K-2-GP R4022
4
R4021 10KR2J-3-GP
0R0402-PAD-2-GP R4023
1 2 1 2 VCCSA_EN_R 100KR2F-L1-GP
SEQ_VCCIO_EN [40,50] +3D3V_S5 DPW ROK_EN1
2 1
+3D3V_DSW
G
[24,40] SIO_PSON_N
+3D3V_S5, +5V_S5 ENABLE +1D05V_PCH_S5 ENABLE

DC-OFF SEQUENCING CIRCUIT R4024
100KR2F-L1-GP
2 1 +3D3V_S5
[20,24,40] SLP_SUS_N PW R_5V_EN1 [45]
V_CPU_VCCIO_2 R4025 1 2
VCCST_PWRGD_CPU [4,40]
1
0R0402-PAD-2-GP 2 1 R4027
PW R_3D3V_S5_EN [41]
S0 S3 S5 DS 75KR2F-GP
1
R4026
H L L L 100KR2F-L1-GP
C4007 C4008 R4028
2
SCD1U16V2KX-3-LL-GP SCD1U16V2KX-3-LL-GP 2 1
[40,53] PW R_1D8V_PG PW R_1D0V_EN [52]
1
0R2J-2-GP
V_CPU_VCCIO_G
1
Q4006 (R_)
2N7002KDW -1-GP
+1D8V_S5 ENABLE C4009
2
+3D3V_S5 SCD1U16V2KX-3-LL-GP
R4029 R4019 (R_)
0R2J-2-GP (R_) 2 1
2 1 [20,24,40] SLP_SUS_N
V_CPU_VCCIO_3 1 R4031 2 [20,24,40] SLP_SUS_N PW R_1D8V_EN [53]
R4030 1 2
VR_READY [20,24,40,46] 0R2J-2-GP
C C
1KR2J-1-GP
SLP_S4_BLEED
0R0402-PAD-2-GP PWR_SEQ = 25 (R_)
1
Merger VCCIO and VDDQ_BLEED C4010
2
SCD1U16V2KX-3-LL-GP
Control logic (R_)
Phoran/20150108
3
1
Q4007 Q4008 S0 S3 S5 DS
2N7002KDW -1-GP 2N7002KDW -1-GP
H L L L
RSMRST
4
S0 S3 S5 DS SEQ_VCCIO_EN [40,50] RSMRST_DELAY_EN3 2 1 R4032

H L L L SLP_S4_N [8,20,24,35,36,40] 0R0402-PAD-2-GP
SLP_S3_N R4033 2 1
[20,24,40,51,56] SLP_S3_N VR_ENABLE [40,46] [24] RSMRST_SIO_N PCH_RSMRST_N [20,99]
PWR_SEQ = 17 0R0402-PAD-2-GP
RSMRST_DELAY_EN6
S0 S3 S5 DS 2 1 R4034
0R2J-2-GP
1
H L L L (R_)
R4038
0R0402-PAD-2-GP
PCH_PWROK & VCCST_PWRGD
2
C4020 [40,53] PW R_1D8V_PG
1 2 SCD1U16V2KX-3-LL-GP
DIS_RSMRST_N
R4035 1 2 0R0402-PAD-2-GP R4037 (R_)
[52] PCH_1V_PG
U4001 (R_) 0R2J-2-GP
1 2 RSMRST_DELAY_EN1 1 2 RSMRST_DELAY_EN5
+3D3V_S5 +3D3V_S0 [20,24,40] SLP_SUS_N
1 5 R4036 10KR2J-3-GP
2 NC#1 VCC
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A PCH_PW ROK_SOLUTION1
1
3 4 C4011
GND Y +19V_DCBATOUT
2
SC1U10V2KX-1-LL-GP 2 1 RSMRST_DELAY_EN7 1 2
2
R4040 R4011 1 2 100KR2F-L1-GP (R_) R4042
2
1
74LVC1G14GW-GP R4070 10KR2J-3-GP (R_) R4041 1 2 20KR2F-L-GP
3
R4039 0R2J-2-GP Q4009 Q4010 100KR2F-L1-GP
(R_)
22KR2J-GP (R_) 2N7002KDW -1-GP 2N7002KDW -1-GP C4012
1
3
Q4011 SCD01U50V2KX-1-LL-GP
1
+3D3V_S0 PCH_PW ROK_SOLUTION2 1 2 2N7002KDW -1-GP

PCH_PW ROK [20]
2
R4043
4
VR_READY_SEQCTL2 249R2F-GP
1 2 R4046 R4047
VCCST_PWRGD [4]
4
2
R4044 (R_) 100KR2F-L1-GP 100KR2F-L1-GP

R4045 249R2F-GP 2 1 RSMRST_DELAY_EN2 2 1RSMRST_DELAY_EN4 R4048
+3D3V_DSW
D
10KR2J-3-GP +3D3V_DSW 100KR2F-L1-GP

6
Q4012 2 1 RSMRST_DELAY_EN8
+3D3V_DSW
2N7002K-2-GP Q4013
1
R4049 2N7002KDW -1-GP

B 1 2 B
[50] PW R_VCCSA_PGOOD
1
0R0402-PAD-2-GP R4050
DDR4 Power Sequence

4K7R2J-2-GP
G
1 2 +3D3V_S5
+1V_VCCST_S3 +3D3V_S5
R4051
1 2 VR_READY_SEQCTL1
[20,24,40,46] VR_READY
0R0402-PAD-2-GP R4076 1 2 +3D3V_S0 +3D3V_S5 CRB discharge path wrong
SE_VPP_EN Phoran
1
R4052 10KR2J-3-GP
VCCST_PWRGD_SOLUTION2
2
1
1
R4053 C4013 1 2
VCCST_PWRGD_CPU [4,40] SE_VPP_EN_B 20141223
2
10KR2J-3-GP SCD1U16V2KX-3-LL-GP R4079 1 2 +1D2V_S3
1
(R_) 0R0402-PAD-2-GP 10KR2J-3-GP R4077 R4078 R4054
2
Q4014 B R4056 10KR2J-3-GP 10KR2J-3-GP 10KR2J-3-GP

2
R4055 MMBT3904-3-GP 47KR2F-GP VDDQ_BLEED_R12 1
2
0R2J-2-GP
1
E
1 2 3 4 R4057
2
(R_) 10R6J-1-GP
1 2 SE_BJT_B1 2 5 SE_BJT_B3 1 2 SE_BJT_B2 DDR_VTT_CNTL_L2
[8,20,24,35,36,40] SLP_S4_N
R4058 R4059
1
1 6
1
10KR2J-3-GP 0R0402-PAD-2-GP
1
SYS_PWROK NORMAL POWER DOWN TRIGGERED BY PCH
Q4015 C4014 (R_) Q4016
C2 6
B1 5
E1 4
SC1U10V2KX-1-LL-GP R4060 2N7002KDW -1-GP
2N7002KDW -1-GP 1KR2J-1-GP
6
Q1
Q4017
1 E2 Q2
LMBT3904DW 1T1G-GP VDDQ_BLEED
2 B2
3 C1
VDDQ enable
+3D3V_S5
+3D3V_S5 +3D3V_S5
DDR_VTT_CNTL_L3
2
5
R4062 R4061 DDR_VTT_CNTL_L1
1
10KR2J-3-GP 1 2
[4] DDR_VTT_CNTL DDR_VTT_CNTL_L4 [51]
R4063 R4064 PW R_2V5_EN [51]
100KR2J-1-GP 100KR2J-1-GP 10KR2J-3-GP
1
VDDQ_BLEED
SLP_S3_N_XSTR_G2
1
C4015 PW R_VDDQ_EN [51]
2
SE_VDDQ_EN_1 SE_VDDQ_EN_2 SCD1U16V2KX-3-LL-GP
(R_)
2
6
Q4018 C4016 C4017 C4018
1
2N7002KDW -1-GP (R_) (R_) (R_)
SC1KP50V2KX-1-LL-GP
SC1KP50V2KX-1-LL-GP
SC1KP50V2KX-1-LL-GP
Q4019 Q4020
1
2
R4066 +3D3V_S5 2N7002KDW -1-GP 2N7002KDW -1-GP
10KR2J-3-GP SLP_S3_N_XSTR 1 R4065 2 SE_VPP_EN R4075 1 2 0R0402-PAD-2-GP
PCH_SYSPW ROK [20,24]
1
1 2 SLP_S3_N_XSTR_G1 0R0402-PAD-2-GP DDR_VTT_CNTL_L3 R4072 1 2 0R0402-PAD-2-GP
[20,24,40,51,56] SLP_S3_N
1
A R4067 A
10KR2J-3-GP
3 SLP_S4_BLEED
1
C4019 R4074 1 2 0R0402-PAD-2-GP

2
SCD1U16V2KX-3-LL-GP SE_VDDQ_EN R4073 1 2 0R0402-PAD-2-GP

(R_) R4068 1 2PW R_2V5_PG_R
[51] PW R_2V5_PG SLP_S4_N [8,20,24,35,36,40]
2
0R0402-PAD-2-GP
+3D3V_S5
1 2 SE_VDDQ_EN
4
R4069
10KR2J-3-GP Wistron Incorporated
Hsichih, Taipei
Title
Title
040_Power Plane EN Sequence
D LA710 1
5 4 3 2 1
D D
+3D3V_DSW_1 +PWR_3D3V_S5 +3D3V_S5
2
C4101 2 1 R4101
SCD1U25V2KX-LL-GP
0R0805-PAD-1-GP-U
1
C C
2 1 R4102
[40] PWR_3D3V_S5_EN
0R0805-PAD-1-GP-U
U4102
1 8
+5V_DSW 2 VIN#1 VOUT#8 7
3 VIN#2 VOUT#7 6 PWR_3D3V_S5_SS
4 ON CT 5
VBIAS GND
1
C4102
9
GND SC1KP50V2KX-1-LL-GP
2
TPS22965DSGR-2-GP
1
C4104 C4103
SCD1U16V2KX-3-LL-GP SCD1U16V2KX-3-LL-GP
https://vinafix.com
2
Iomax=5.5A
B B
A A
Hsichih, Taipei
Title
Title
041_Switch power_3D3V_S5
Size
Size Document
Document Number
Number Rev
Rev
B LA710 1
Date:
Sheet 41 of 107
5 4 3 2 1
5 4 3 2 1
+3D3V_S5
1 2 R4203
10KR2J-3-GP
R4204 2 1 PWR_5V_S0_EN
[40,42] PWR_S0_EN
0R0402-PAD-2-GP
D D
1 2 C4208
SC1U10V2KX-1-LL-GP
+3D3V_S5
1 2 R4209
10KR2J-3-GP
R4207 2 1 PWR_3D3V_S0_EN
[40,42] PWR_S0_EN
0R0402-PAD-2-GP
1 2 C4209
SC1U10V2KX-1-LL-GP
+5V_S5
C C
+5V_S0
2 1 R4208
0R0805-PAD-1-GP-U
1
C4202
1
SC1U10V2KX-1-LL-GP EC4201 EC4202
SCD1U16V2KX-3-LL-GP
SCD1U16V2KX-3-LL-GP
2
2 1 R4206
2
U4201 +PWR_5V_S0 0R0805-PAD-1-GP-U
15
1 GND 14 2 1 R4210
2 VIN1#1 VOUT1#14 13 0R0805-PAD-1-GP-U
VIN1#2 VOUT1#13
1
PWR_5V_S0_EN 3 12 PWR_P5V_S0_SS C4205 1 2
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4 EN1 SS1 11 SC330P50V2KX-3-LL-GP C4207
+3D3V_DSW_1 PWR_3D3V_S0_EN 5 BIAS GND 10 PWR_3D3V_S0_SS C4204 1 2 SC22U6D3V3MX-1-LL-GP
EN2 SS2
2
6 9 SC470P50V2KX-3-LL-GP
7 VIN2#6 VOUT2#9 8 +PWR_3D3V_S0 +3D3V_S0
VIN2#7 VOUT2#8
APL3523AQBI-TRG-GP 2 1 R4202
1
C4203 C4201 0R0805-PAD-1-GP-U
B SC1U10V2KX-1-LL-GP SCD1U16V2KX-3-LL-GP C4206 B
2
1
2 1 R4211
5V_S0 / 3V_S0 0R0805-PAD-1-GP-U
2
IDmax =6A
2 1 R4205
0R0805-PAD-1-GP-U
2 1 R4201
0R0805-PAD-1-GP-U
A A
Hsichih, Taipei
Title
Title
042_Switch power_3D3V_S0/5V_S0
Size
Size Document
DocumentNumber
Number Rev
Rev
B LA710 1
Date:
Sheet 42 of 107
5 4 3 2 1
5 4 3 2 1
D D
TP4301
AFTE30-GP
+19V_PSU_JK
TP4302 AFTE30-GP
1
DCJK1
1
GND 2
POWER 3
DETECT_ID 4
POWER 5
GND 6
GND 7
GND
DC-JACK321-GP-U
C C
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+19V_PSU_JK +19V_PSU_JK_1
B B
PL4303 1 2 HCB2012KF-GP +19V_PSU_JK_2
+19V_DCBATOUT
PL4304 1 2 HCB2012KF-GP
PQ4302
PL4305 1 2 HCB2012KF-GP PR4330 1 2 D01R2512F-3-GP 1 S D 8
2 S D 7
3 S D 6
1
D 5
1
G
K
1
PR4310 PR4313 PZ0703EK-GP PC4308 PC4309 PC4310 PC4311 PC4312
4
1
200KR2F-L-GP
SCD1U25V2KX-LL-GP
SC22U25V5MX-4-GP
SC22U25V5MX-4-GP (R_)
2D2R6J-3-GP PD4302 PC4333 PC4335
R1
SCD1U25V2KX-LL-GP
SCD22U25V3KX-LL-GP
P6SMB24A-1-GP-U
2
2
2
2
A
PSU+_2
PSU+_1
1
1
PC4328 PR4314
(R_)
SC2D2U50V6KX-2-GP 150KR2F-L-GP
2
R2
2
Snubber R use >2ohm 1206 or 1210 size . Softstart <=3ms . R1=200K , R2=150K . c=0.22uF.
Snubber C use 2.2uF .X5R or X7R 1206 size PQ4302 need choose PZ0703EK .
A A
Hsichih, Taipei
Title
Title
043_ATX(Adapter)
Size
Size DocumentNumber
Document Number Rev
Rev
C LA710 1
Date:
Sheet 43 of 107
5 4 3 2 1
5 4 3 2 1
D D
2016.07.01
Julian
Add current meter
HYSTERESIS HYSTERESIS SETTING
Current meter
Floating 2mV
+19V_PSU_JK_2 +19V_PSU_JK_1
GND 4mV
1
+3D3V_S5
+3D3V_S5
R4401 R4402 VSS 8mV
10R5J-GP 10R5J-GP
1
C4403
2
C SCD1U16V2KX-3-LL-GP C
1
2
C4401
SCD1U25V2KX-LL-GP
R4413
10KR2F-2-GP
R4408
0R2J-2-GP
R4410
0R2J-2-GP
DELAY ALERT DELAY (μs)
1 2 (R_)
U4401 Floating 10uS
2
+3D3V_S5
CL_IN_P 1 10 CL_HYS
CL_IN_N 2 IN+ HYS 9
CL_LIMIT IN- VS GND 50uS
3 8
R4411 1 2 10KR2F-2-GP CL_ENABLE 4 LIMIT GND 7 CL_DELAY
R4403 1 2 EC_ALERT_N_CL 5 ENABLE DELAY 6 CL_LATCH
[24] EC_CURRENT_ALERT ALERT LATCH VSS 100uS
0R0402-PAD-2-GP
1
11
GND
1
R4404 R4405 R4407 R4409
C4402 10KR2F-2-GP 0R2J-2-GP 0R2J-2-GP
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3KR2F-GP
SCD1U25V2KX-LL-GP (64.27015.6DL) INA300AIDSQR-GP (R_) (R_) (R_)
OUTPUT MODE LATCH SETTING
2
2
PWR_METER_GND
Transparent mode LATCH = low
[24] CL_LATCH
Latch mode LATCH = high
R4412 1 2
0R0402-PAD-2-GP
B B
PARAMETER EQUATION
VTRIP Desired current trip value ILOAD × RSENSE
VLIMIT Programmed threshold limit voltage VLIMIT = VTRIP
VLIMIT(1) Threshold voltage (ILIMIT × RLIMIT) – NAF
RLIMIT(1) Threshold limit setting resistor (VLIMIT + NAF) / ILIMIT
RLIMIT(1) Limit setting resistor (VLIMIT + 500 μV) / 20 μA
(1) NAF is used with the 10-μs delay setting. NAF can be omitted in the RLIMIT calculation for the 50-μs and 100-μs delay settings.
A A
Hsichih, Taipei
Title
Title
044_Power meter
Size
Size DocumentNumber
Document Number Rev
Rev
C LA710 1
Date:
Sheet 44 of 107
5 4 3 2 1
5 4 3 2 1
+PW R_5V +5V_S5
+19V_DCBATOUT +PW R_DCBATOUT_3D3V +19V_DCBATOUT +PW R_DCBATOUT_5V PR4507 2 1 0R0805-PAD
PR4510 2 1 0R0805-PAD
PL4503 PL4504 PR4511 2 1 0R0805-PAD

1 2 1 2
PR4513 2 1 0R0805-PAD
HCB2012KF-GP HCB2012KF-GP
+3D3V_DSW _1 +PW R_3D3V PR4525 2 1 0R0805-PAD
PL4506
1 2 PR4516 2 1 0R0805-PAD
D 2 PR4532 1 HCB2012KF-GP PR4518 2 1 0R0805-PAD D
0R0805-PAD-1-GP-U PR4524 2 1 0R0805-PAD
2 PR4533 1
0R0805-PAD-1-GP-U +19V_DCBATOUT
Input ripple current =3A
2 PR4534 1 10uF/25V, Ripple Current =1000mA
Input capacitance = 30uF
1
0R0805-PAD-1-GP-U Input ripple current =6.223A
PR4553
10uF/25V, Ripple Current =1000mA
2 PR4535 1 +PW R_DCBATOUT_3D3V 2D2R5J-1-GP Input capacitance = 60uF
2
0R0805-PAD-1-GP-U
+PW R_DCBATOUT_5V
2 PR4536 1 PW R_5V_3V_VIN
1
PC4501 PC4509 PC4511 PC4510 PC4513
0R0805-PAD-1-GP-U
1
SC10U25V5KX-LL-GP
SC10U25V5KX-LL-GP
SC10U25V5KX-LL-GP
SCD1U50V3KX-LL-GP
SCD1U50V3KX-LL-GP
PU4507 PC4506 PC4523 PC4516 PC4533 PC4515 PC4502 PC4507
5
6
7
8
SM4378NSKPC-TRG-GP
D
D
D
D
2 PR4521 1
SC10U25V5KX-LL-GP
SC10U25V5KX-LL-GP
SC10U25V5KX-LL-GP
SC10U25V5KX-LL-GP
SC10U25V5KX-LL-GP
SC10U25V5KX-LL-GP
SC10U25V5KX-LL-GP
3.3V IMAX=8.5A,OCP>12.75A PU4504
(R_)
2
PWM Frequency=355kHz
D 8
D 7
D 6
D 5
0R0805-PAD-1-GP-U SM3319NAQAC-TRG-GP
LIR=3.53A/8.5A=42%
220uF/6.3V, Ripple Current =3.11Arms 4
G
12
2 PR4523 1 PU4501
S
S
S
Cout capacitance=220uF
VIN
3
2
1
0R0805-PAD-1-GP-U 4 PR4508 PR4509 5V IMAX=14.1A,OCP>21.15A
G
Maglayer. 6.86mm*6.47mm*3mm PC4517 2D2R3-1-U-GP 2D2R3-1-U-GP PC4518
1 S
2 S
3 S
SCD1U50V3KX-LL-GP SCD1U50V3KX-LL-GP
DCR: 18~20 mOhm 2 1 PW R_3D3V_BOOT2_A
1 2 PW R_3D3V_BOOT2 9 17 PW R_5V_BOOT1 1 2 PW R_5V_BOOT2 1 2 LIR=8.33A/14.1A=59%
Idc : 8A , Isat : 14A BOOT2 BOOT1 Maglayer. 10.0mm x 11.5mm x 4.0mm
+PW R_3D3V PW R_3D3V_HG2_A PW R_3D3V_HG2 PW R_5V_HG1 PW R_5V_HG1_A DCR: 3.8~4.2 mOhm 220uF/6.3V, Ripple Current =3.11Arms
2 PR4503 1 10 16 2 PR4504 1 +PW R_5V
PL4502
0R0805-PAD-1-GP-U UGATE2 UGATE1 0R0805-PAD-1-GP-U
PL4501
Idc : 16A , Isat : 33A Cout capacitance=220uF
1 2 PW R_3D3V_PH2 8 18 PW R_5V_PH1 1 2
PHASE2 PHASE1
IND-2D2UH-122-GP-U PW R_3D3V_LG2 11 15 PW R_5V_LG1
PU4505 LGATE2 LGATE1 IND-1D5UH-52-GP
D 8
D 7
D 6
D 5
SM3317NSQAC-TRG-GP
PW R_5V_BYP1
5
6
7
8
PC4519 Rdson=15.5mohm @4.5V 14
BYP1
1
1
D
D
D
D
PT4502 PC4520 PT4501
PW R_3D3V_FB2 PW R_5V_FB1
1
4 2
SCD1U25V2KX-LL-GP
PG4530 PR4506 PR4505 PG4532 PG4531
FB2 FB1
GAP-CLOSE-PWR-3-GP
GAP-CLOSE-PWR-3-GP
SCD1U25V2KX-LL-GP
SE220U6D3VM-8GP
ST150U6D3VDM-28-GP GAP-CLOSE-PW R-3-GP 2D2R6J-3-GP 2D2R6J-3-GP
2
2
4
G
1
2
4
G
1 S
2 S
3 S
2
2
C 6 20 C
S
S
S
[40] PW R_3D3V_EN2 EN2 EN1 PW R_5V_EN1 [40]
3
2
1
PU4506
PW R_3D3V_SN1 PW R_3D3V_CS2 5 1 PW R_5V_CS1 SM4504NHKPC-TRG-1-GP PW R_5V_SN1
CS2 CS1
Rdson=9mohm @4.5V
PWR_3D3V_FB2_A
PWR_5V_FB1_A
1
1
PR4501 19 PR4502
VCLK
1
137KR2F-1-GP 86K6R2F-GP PC4503
PC4505 SC1KP50V2KX-1-LL-GP
2
SC1KP50V2KX-1-LL-GP 7 21
PGOOD GND
2
LDO3
LDO5
1
1
PR4512 RT6576DGQW 2-GP PR4515
13
6K8R2F-2-GP 15K4R2F-GP
+3D3V_LDO_PW R PG4533 PG4534 +5V_LDO_PW R
GAP-CLOSE-PW R-3-GP GAP-CLOSE-PW R-3-GP
1 2 1 2
2
2
PWR_3D3V_LDO3
PWR_5V_LDO5
1
1
PR4522 PR4520
PR4517 10KR2F-2-GP
100KR2J-1-GP
10KR2F-2-GP 1 2 PW R_RT6576_PGOOD
+3D3V_DSW _1 +5V_LDO_PW R +5V_DSW
2
2
1
PC4527 PC4526
SC4D7U25V5KX-LL-GP SC4D7U25V5KX-LL-GP PWR_SEQ = 3
PR4527 1 2 0R0603-PAD-2-GP-U
https://vinafix.com
2
+3D3V_LDO_PW R
Vout=2*(1+(R1/R2)) +3D3V_DSW _1 +3D3V_DSW Vout=2*(1+(R1/R2))
=2*(1+(6.8/10)) =2*(1+(15.4/10))
=3.36V (R_) PWR_SEQ = 4
=5.08V
PR4526 1 2 0R3J-0-U-GP
PR4529 1 2 0R0603-PAD-2-GP-U
B B
A A
Hsichih, Taipei
Title
Title
045_DSW/5V_S5(RT6576D)/3D3V_S5
D LA710 1
Date: Sheet
5 4 3 2 1
5 4 3 2 1
D
Intel Coffeelake IMVP8 POWER CKT - S-LINE 62 65W 4+2 PHASE S-Line 62 65W CPU power spec
D
High Enable Logic Vcore ICCMAX=133A, TDC=?A

+19V_DCBATOUT
Low Diable Logic +5V_S5 VccGT ICCMAX=48A, TDC=?A
1
PR4673
[40] VR_ENABLE 1 2 PR4674 PR4678
2D2R3-1-U-GP 1KR2F-3-GP +1V_VCCST_S3 PWR_VCORE_PWM4
0R0402-PAD-2-GP
2
PC4603
1
SC1KP50V2KX-1-LL-GP PWR_VCORE_VCC PWR_VCORE_VRMP
1
PC4604 PR4606
SC1U10V2KX-1-LL-GP Working 41K2R2F-GP
1
PC4601
F~405Khz
2
SC2D2U10V3KX-1-LL-GP PC4602 PR4612 PR4613 PR4614
2
SCD01U50V2KX-1-LL-GP 100R2F-L1-GP-U 45D3R2F-L-GP 75R2F-2-GP
2
(R_)
PUT CLOSE
2
TO PWM
9
PU4601 6X6 52PIN QFN
PWM_VR_EN 2 3 H_VIDSOUT_VR1 PR4615 1 2 10R2F-L-GP
VCC
VRMP
EN SDIO H_VIDSCK_VR1 H_VIDSOUT_VR [4]
5 PR4616 1 2 49D9R2F-GP
VR_READY SCLK H_VIDALERT_VR1 H_VIDSCK_VR [4] PWR_VCORE_PWM1
6 4 PR4607 1 2 0R0402-PAD-2-GP
[20,24,40] VR_READY VR_RDY ALERT H_VIDALERT_N_VR [4]
PWR_VCORE_DOUT 50 30
DIFF DRON PWR_VCORE_PWM1 PWR_VCORE_DRVON [47,49]
34 VCORE SVID
PWM1_SV_ADDR PWR_VCORE_PWM1 [47]
1
1 2PWR_VCORE_COMP_A 1 2 1 2 PWR_VCORE_COMP_R 1 2 PWR_VCORE_COMP 48 36
COMP CSN1 37 PWR_VCORE_CSP1_IC PR4617 1 (R_) 2 100KR2F-L1-GP
PWR_VCORE_CSN1 [46,47] ADDRESS=00h PR4601
PR4668 PC4630 PR4666 PC4628 CSP1 10KR2F-2-GP
47R2F-GP 1 2 SC470P50V2KX-3-LL-GP 4K02R2F-GP 1 2 SC2200P50V2KX-2-LL-GP PR4618 1 2 4K02R2F-GP PC4605 1 2 SCD1U25V2KX-LL-GP VCCGT SVID
[46,47] PWR_VCORE_CSP1 PWR_VCORE_PWM2
49 33
FB PWM2/VBOOT PWR_VCORE_PWM2 [47] ADDRESS=01h
2
PR4667 PC4629 38
CSN2 PWR_VCORE_CSP2_IC PWR_VCORE_CSN2 [46,47]
1KR2F-3-GP SC33P50V2JN-LL-GP 39 PR4619 1 (R_) 2 100KR2F-L1-GP
1 2 PWR_VCORE_FB CSP2
+1V_CPU_CORE
C PR4622 1 2 4K02R2F-GP PC4606 1 2 SCD1U25V2KX-LL-GP C
[46,47] PWR_VCORE_CSP2 PWR_VCORE_PWM3
PR4664 (R_) 32
PWM3/ICCMAX PWR_VCORE_PWM3 [47]
100R2F-L1-GP-U PR4665 40
PWR_VCORE_VSP CSN3 PWR_VCORE_CSP3_IC PWR_VCORE_CSN3 [46,47]
1 2 51 41 PR4620 1 (R_) 2 100KR2F-L1-GP
[8] VCCCORE_SENSE VSP CSP3
1
PR4662 PWR_VCORE_PWM2
0R0402-PAD-2-GP PC4627 2K4R2F-GP PR4623 1 2 4K02R2F-GP PC4607 1 2 SCD1U25V2KX-LL-GP
SC1KP50V2KX-1-LL-GP PWR_VCORE_VSN [46,47] PWR_VCORE_CSP3 PWR_VCORE_PWM4
1 2 52 31
[8] VSSCORE_SENSE VSN PWM4/ROSC PWR_VCORE_PWM4 [47]
2
42
CSN4 PWR_VCORE_CSN4 [46,47]
1
1
43 PWR_VCORE_CSP4_IC PR4621 1 (R_) 2 100KR2F-L1-GP
PR4663 1 2 CSP4 PR4602
100R2F-L1-GP-U PR4624 1 2 4K02R2F-GP PC4608 1 2 SCD1U25V2KX-LL-GP VCORE 10KR2F-2-GP
[46,47] PWR_VCORE_CSP4
PWR_VCORE_CSSUM
(R_) PC4626 45 PR4626 1 2 100KR3F-GP
SC3300P50VKX-LL-GP PWR_VCORE_IOUT 1 CSSUM PWR_VCORE_CSP1 [46,47] VBOOT=0V
IOUT
2
2
47 PWR_VCORE_CSCOMP PR4625 1 2 100KR2F-L1-GP PWR_VCORE_TCP PR4630 1 2 226KR2F-GP PR4627 1 2 100KR3F-GP
CSCOMP PWR_VCORE_CSP2 [46,47]
1
PR4669 1 2 NTC-100K-12-GP-U
2
PR4661 PC4609 1 2 SC150P50V2KX-GP PR4628 1 2 100KR3F-GP
PWR_VCORE_CSP3 [46,47]
30K9R2F-GP PC4625
SC470P50V2KX-3-LL-GP 46 PWR_VCORE_ILIM PR4635 1 2 35K7R2F-GP B-Value :4250 PC4610 1 2 SC1500P50V2KX-2-LL-GP PR4629 1 2 100KR3F-GP
PWR_VCORE_CSP4 [46,47]
ILIM
1
VCORE PORTION
2
44 PWR_VCORE_CSREF PR4631 1 2 10R2F-L-GP
CSREF PWR_VCORE_CSN1 [46,47]
1
PR4632 1 2 10R2F-L-GP PWR_GT_PWM2
PWR_VCORE_CSN2 [46,47]
PC4611 PR4633 1 2 10R2F-L-GP
PWR_GT_DOUT SC1KP50V2KX-1-LL-GP PWR_VCORE_CSN3 [46,47]
16 PR4634 1 2 10R2F-L-GP
DIFFA PWR_VCORE_CSN4 [46,47]
1
1 2 PWR_GT_COMP_A 1 2 1 2 PWR_GT_COMP_R 1 2 PWR_GT_COMP 18
COMPA 28 PWR_GT_PWM1 PR4603
PWM1A/ICCMAXA PWR_GT_PWM1 [49]
PR4660 PC4624 PR4659 PC4623
CSN1A
24
PWR_GT_CSP1_IC PWR_GT_CSN1 [46,49] VCCGT 10KR2F-2-GP
47R2F-GP 1 2 SC470P50V2KX-3-LL-GP 4K02R2F-GP 1 2 SC2200P50V2KX-2-LL-GP 23 PR4636 1 (R_) 2 100KR2F-L1-GP
17 CSP1A VBOOT=0V
FBA
2
PR4658 PC4622 PR4638 1 2 4K02R2F-GP PC4612 1 2 SCD1U25V2KX-LL-GP
[46,49] PWR_GT_CSP1 PWR_GT_PWM2
+1V_GFX_CORE 1 2 1KR2F-3-GP SC33P50V2JN-LL-GP 29
PWR_GT_FB PWM2A/VBOOTA PWR_GT_PWM2 [49]
26
CSN2A PWR_GT_CSP2_IC PWR_GT_CSN2 [46,49]
PR4655 (R_) 25 PR4637 1 (R_) 2 100KR2F-L1-GP
100R2F-L1-GP-U PR4656 CSP2A
1 2 PWR_GT_VSP 15 PR4639 1 2 4K02R2F-GP PC4613 1 2 SCD1U25V2KX-LL-GP
[8] VCCGT_SENSE VSPA [46,49] PWR_GT_CSP2
1
PR4657
https://vinafix.com
0R0402-PAD-2-GP PC4620 2K4R2F-GP 21 PWR_GT_CSSUM PR4640 1 2 68KR3F-GP PWR_VCORE_PWM3
SC1KP50V2KX-1-LL-GP PWR_GT_VSN CSSUMA PWR_GT_CSP1 [46,49]
1 2 14
B [8] VSSGT_SENSE VSNA B
2
19 PWR_GT_CSCOMP PR4642 1 2 100KR2F-L1-GP PWR_GT_TCP PR4643 1 2 226KR2F-GP PR4641 1 2 68KR3F-GP

CSCOMPA PWR_GT_CSP2 [46,49]
1
PR4670 1 2 NTC-100K-12-GP-U
1
PR4654 1 2 PC4614 1 2 SC220P50V2KX-3-LL-GP
100R2F-L1-GP-U PWR_GT_IOUT VCORE PR4604
(R_) +1V_VCCST_S3 PC4621 20 PWR_GT_ILIM PR4644 1 2 21KR2F-GP B-Value :4250 PC4615 1 2 SC1500P50V2KX-2-LL-GP
IMAX SET 133KR2F-GP
ILIMA
1
SC3300P50VKX-LL-GP 13
IOUTA AT 133A
2
PR4653 PC4619 22 PWR_GT_CSREF PR4645 1 2 10R2F-L-GP

CSREFA PWR_GT_CSN1 [46,49]
2
1
1
36K5R2F-GP SC470P50V2KX-3-LL-GP
PR4679 PC4616 PR4646 1 2 10R2F-L-GP
PWR_GT_CSN2 [46,49]
2
51R2F-2-GP VCCGT PORTION SC1KP50V2KX-1-LL-GP

2
2
(R_)
2
PR46801 2 75R2F-2-GP PWR_VCORE_VRHOT# 10 27 PWR_GT_TSNS

[4] H_PROCHOT_N VRHOT# TSENSEA
NC#11
NC#12
EPAD
1
PWR_VCORE_TSNS 35 8 PWR_PSYS 1 2 PWR_GT_PWM1
TSENSE PSYS +5V_S5
follow CRB PR4647
1
NCP81220MNTXG-4-GP PR4649 499R2F-2-GP

11
12
53
PR4650 2KR2F-3-GP
1
499R2F-2-GP PC4617
2
1
PWR_GT_TSNS_R VCCGT PR4605
44K2R2F-1-GP
SCD1U25V2KX-LL-GP
IMAX SET
2
2
PWR_VCORE_TSNS_R
AT 45A
2
PC4618 PR4648 PR4671
2
2
SCD1U25V2KX-LL-GP 5K1R2F-2-GP NTC-100K-12-GP-U

2
PR4672 PR4651 BOTTOM PAD

NTC-100K-12-GP-U 38K3R2F-GP B-Value :4250
CONNECT TO
2
(64.69815.6DL)
B-Value :4250 GND Through PUT COLSE
2
1
6 VIAs TO VCCGT
PUT COLSE HOT SPOT
1
TO VCORE
HOT SPOT
A A
Hsichih, Taipei
Title
Title
046_VCORE & V_GT IC(NCP81220)
Custom LM70Z 1
Date: Sheet
5 4 3 2 1
5 4 3 2 1
+5V_S5 +5V_S5
1
+19V_DCBATOUT +PWR_DCBATOUT_VCORE1
PR4702 PR4701
2D2R5J-1-GP 2D2R5J-1-GP
2
PL4705 1 2 HCB2012KF-GP
PWR_VCORE_VCC1 PWR_VCORE_VCCD1
1
PC4702 PC4703
SC1U10V2KX-1-LL-GP SC2D2U10V3KX-1-LL-GP
2
PR4703
3D9R3-GP
PWR_VCORE_BOOT_RC1 1 2 PWR_VCORE_BOOT1
PC4704
1 2PWR_VCORE_PHASED1
0.3V~1.35V/TDC 91A/IMAX 133A,OCP>199A
SCD22U25V3KX-LL-GP PWM Frequency=340kHz
29
LIR=8.13/(91A/4phase)=36%
3
+PWR_DCBATOUT_VCORE1 PU4702
330uF/2V, Ripple Current=3.0Arms
BOOT
PHASE
VCC
VCCD
8 560uF/2.5V, Ripple Current=3.5Arms
9 VIN 1
10 VIN PWM 30 PWR_VCORE_DISB#1 2 1 PWR_VCORE_PWM1 [46] Cout capacitance=2900uF
VIN DISB# PWR_VCORE_DRVON [46,47,49]
(R_) (R_) 11
VIN 31 PR4704
THWN
1
D PC4705 PC4706 PC4707 PC4708 2 0R0402-PAD-2-GP D
SMOD# +5V_S5
SC10U25V5KX-LL-GP
SC10U25V5KX-LL-GP
SC10U25V5KX-LL-GP
SC10U25V5KX-LL-GP
2
2
+1V_CPU_CORE
PL4701
12 26 PWR_VCORE_SW1 1 2
13 PGND VSW#26 25
14 PGND VSW#25 24
VSW#16
VSW#17
VSW#18
VSW#19
VSW#20
VSW#21
VSW#22
IND-D36UH-36-GP
PGND VSW#24
GL#27
GL#33
1
CGND
15 23
AGND
NC#6
28 PGND VSW#23
PGND
1
PR4705 PT4702 PT4703
NCP302045MNTWG-GP 1R6F-1-GP PC4709 PG4702 SE330U2VDM-4-GP SE330U2VDM-4-GP
27
33
6
32
4
16
17
18
19
20
21
22
(R_)
COPPER-CLOSE-GP-U
COPPER-CLOSE-GP-U
2
2
1PWR_VCORE_SNB1
PWR_VCORE_GL1
2
330uF/2V,
ESR=9mohm,
Ripple current=6300mA
PC4710
SC1KP50V2KX-1-LL-GP
2
[46] PWR_VCORE_CSP1
[46] PWR_VCORE_CSN1
+5V_S5 +5V_S5
1
PR4706 PR4707
2
1
PC4711 PC4712
2 SC1U10V2KX-1-LL-GP SC2D2U10V3KX-1-LL-GP
2
PR4708
3D9R3-GP
PL4706 1 2 HCB2012KF-GP PWR_VCORE_BOOT_RC2 1 2 PWR_VCORE_BOOT2
PC4713
1 2 PWR_VCORE_PHASED2
SCD22U25V3KX-LL-GP
29
7
BOOT
PHASE
VCC
8 VCCD
9 VIN 1
10 VIN PWM 30 PWR_VCORE_DISB#2 2 1 PWR_VCORE_PWM2 [46]
(R_) (R_) (R_) 11
VIN 31 PR4709
THWN
1
PC4714 PC4715 PC4716 PC4717 PT4704 2 +5V_S5 0R0402-PAD-2-GP

SMOD#
+1V_CPU_CORE
SC10U25V5KX-LL-GP
SC10U25V5KX-LL-GP
SC10U25V5KX-LL-GP
SC10U25V5KX-LL-GP
SE47U25VM-14-GP
2
PL4702
C C
13 PGND VSW#26 25
PGND VSW#25
VSW#16
VSW#17
VSW#18
VSW#19
VSW#20
VSW#21
VSW#22
14 24 IND-D36UH-36-GP
PGND VSW#24
GL#27
GL#33
1
CGND
AGND
15 23
NC#6
28 PGND VSW#23
PGND
1
PR4710
NCP302045MNTWG-GP 1R6F-1-GP PG4703 PG4704 PT4705 PT4707
27
33
6
32
4
16
17
18
19
20
21
22
SE560U2D5VM-12-GP SE560U2D5VM-12-GP
COPPER-CLOSE-GP-U
COPPER-CLOSE-GP-U
2
2
1PWR_VCORE_SNB2
PWR_VCORE_GL2
2
330uF/2V,
ESR=9mohm,
PC4718
SC1KP50V2KX-1-LL-GP
2
[46] PWR_VCORE_CSP2
+5V_S5 +5V_S5
[46] PWR_VCORE_CSN2
https://vinafix.com
1
PR4711 PR4712
2
1
PC4719 PC4720
2
PR4713
+19V_DCBATOUT +PWR_DCBATOUT_VCORE3 3D9R3-GP
PC4721
PL4707 1 2 HCB2012KF-GP
1 2PWR_VCORE_PHASED3
SCD22U25V3KX-LL-GP
29
7
BOOT
PHASE
VCC
VCCD
8
9 VIN 1
10 VIN PWM 30 PWR_VCORE_DISB#3 2 1 PWR_VCORE_PWM3 [46]
(R_) (R_) 11
VIN 31 PR4714
THWN
1
PC4722 PC4723 PC4724 PC4725 2 +5V_S5 0R0402-PAD-2-GP

SMOD#
+1V_CPU_CORE
SC10U25V5KX-LL-GP
SC10U25V5KX-LL-GP
SC10U25V5KX-LL-GP
SC10U25V5KX-LL-GP
2
PL4703
13 PGND VSW#26 25
PGND VSW#25
VSW#16
VSW#17
VSW#18
VSW#19
VSW#20
VSW#21
VSW#22
14 24 IND-D36UH-36-GP
PGND VSW#24
GL#27
GL#33
1
CGND
AGND
15 23
NC#6
28 PGND VSW#23
PGND
1
1
PR4715
NCP302045MNTWG-GP 1R6F-1-GP PG4701 PG4705 PT4708 PT4709
27
33
6
32
4
16
17
18
19
20
21
22
SE560U2D5VM-12-GP SE560U2D5VM-12-GP
COPPER-CLOSE-GP-U
COPPER-CLOSE-GP-U
B B
2
2
1PWR_VCORE_SNB3
PWR_VCORE_GL3
2
560uF/2.5V,
ESR=7mohm,
PC4726
SC1KP50V2KX-1-LL-GP
2
+5V_S5 +5V_S5
[46] PWR_VCORE_CSP3
[46] PWR_VCORE_CSN3
1
PR4716 PR4717
2
1
PC4727 PC4728
2
PR4718
3D9R3-GP
PC4729
PL4708 1 2 HCB2012KF-GP 1 2PWR_VCORE_PHASED4
SCD22U25V3KX-LL-GP
29
7
BOOT
PHASE
VCC
VCCD
8
9 VIN 1
VIN PWM PWR_VCORE_DISB#4 PWR_VCORE_PWM4 [46]
10 30 2 1
11 VIN DISB# PWR_VCORE_DRVON [46,47,49]
(R_) (R_)
VIN 31 PR4719
THWN
1
PC4701 PC4730 PC4731 PC4732 2 +5V_S5 0R0402-PAD-2-GP

SMOD#
SC10U25V5KX-LL-GP
SC10U25V5KX-LL-GP
SC10U25V5KX-LL-GP
SC10U25V5KX-LL-GP
2
+1V_CPU_CORE
PL4704
13 PGND VSW#26 25
14 PGND VSW#25 24
VSW#16
VSW#17
VSW#18
VSW#19
VSW#20
VSW#21
VSW#22
IND-D36UH-36-GP
PGND VSW#24
GL#27
GL#33
1
CGND
AGND
15 23
NC#6
28 PGND VSW#23
PGND
1
PR4720 PT4711
NCP302045MNTWG-GP 1R6F-1-GP PG4706 PG4707 SE330U2VDM-4-GP
27
33
6
32
4
16
17
18
19
20
21
22
(R_)
COPPER-CLOSE-GP-U
COPPER-CLOSE-GP-U
2
2
1PWR_VCORE_SNB4
PWR_VCORE_GL4
2
560uF/2.5V,
ESR=7mohm,
A A
PC8613
SC1KP50V2KX-1-LL-GP
2
[46] PWR_VCORE_CSP4
[46] PWR_VCORE_CSN4
Hsichih, Taipei
Title
Title
047_VCORE OUTPUT (NCP302045)
Size
Size DocumentNumber
Document Number Rev
Rev
Custom LA710 1
Date:
Sheet 47 of 107
5 4 3 2 1
5 4 3 2 1
D D
C
Reserved C
https://vinafix.com
B B
A A
Hsichih, Taipei
Title
048_CPU Core_(R)
A LA710 1
5 4 3 2 1
8 7 6 5 4 3 2 1
Input ripple current =6.39A Impedance=80ohm

during Vout= 1.1V Rated current=5000mA
PWR_81151_BT1AR +19V_DCBATOUT_VGT_A 47uF/25V, Ripple Current=2.8Arms
input capacitance= 134uF
1
+19V_DCBATOUT +19V_DCBATOUT_VGT_A
1
PR4911
2D2R5J-1-GP PC4901 PL4901
SCD1U50V3KX-LL-GP 1 2
1
PC4906 PC4909 (R_)
1
D SC10U25V5KX-LL-GP SC10U25V5KX-LL-GP PT4902 HCB2012KF-GP PC4912 D
SE47U25VM-14-GP
SCD1U25V2KX-LL-GP
PQ4901 +19V_DCBATOUT_VGT_B
2
5
6
7
8
SM4378NSKPC-TRG-GP (R_) PL4902
2
D
D
D
D
1 2
PWR_81151_BT1A
(R_)
1
PR4909 HCB2012KF-GP PC4911
2D2R5J-1-GP 0.36uH, 10*10*4 SMD type SCD1U25V2KX-LL-GP
PWR_81151_DRH1A 2 1PWR_81151_HR1A
4
G
IDC=30A, Isat=60A
2
PU4901
S
S
S
NCP81151MNTBG-GP-U2 PR4902
3
2
1
10KR2J-3-GP
1 8 2 1 PL4903
2 BST DRVH 7 PWR_81151_LX1A 1 2
[46] PWR_GT_PWM1 PWR_81151_EN1A 3 PWM SW +1V_GFX_CORE
2 1 6
[46,47,49] PWR_VCORE_DRVON EN GND
1
PWR_81151_VCC1A 4 5 IND-D36UH-36-GP
PR4904 VCC DRVL PT4904 PT4905
FLAG
51R2J-2-GP PR4903
5
6
7
8
5
6
7
8
1
SE330U2VDM-4-GP
SE560U2D5VM-12-GP
2D2R6J-3-GP
D
D
D
D
D
D
D
D
PG4901 PG4902 PT4903
SE560U2D5VM-12-GP
PR4901 PQ4902 PQ4903
COPPER-CLOSE-GP-U
COPPER-CLOSE-GP-U
2
PWR_81151_SN1A
SM4504NHKPC-TRG-1-GP
2D2R5J-1-GP SM4504NHKPC-TRG-1-GP
2 1 (R_)
+5V_S5
2
4 4
1
BOTTOM PAD PC4902
S
S
S
S
S
S
C C
1
PC4907 CONNECT TO SC1KP50V2KX-1-LL-GP
3
2
1
3
2
1
SC1U10V2KX-1-LL-GP GND Through
2
4 VIAs
2
+1V_GFX_CORE
PWR_81151_DRLA1
[46] PWR_GT_CSP1
[46] PWR_GT_CSN1
1
PT4906 PT4907
+19V_DCBATOUT_VGT_B SE330U2VDM-4-GP SE330U2VDM-4-GP
PWR_81151_BT2AR 47uF/25V, Ripple Current=2.8Arms (R_)
2
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1
PC4903
1
PR4912 SCD1U50V3KX-LL-GP PC4905 PC4910
2
2D2R5J-1-GP SC10U25V5KX-LL-GP SC10U25V5KX-LL-GP

PQ4904
2
2
5
6
7
8
SM4378NSKPC-TRG-GP
D
D
D
D
B B
PWR_81151_BT2A
PR4910
2D2R5J-1-GP 0.36uH, 10*10*4 SMD type 0.3V~1.35V/TDC 20A/IMAX 45A,OCP>110A
PWR_81151_DRH2A 2 1PWR_81151_HR2A
4
G
PU4902
IDC=30A, Isat=60A PWM Frequency=400kHz
S
S
S
NCP81151MNTBG-GP-U2 PR4906 LIR=7.19A/(73A/2phase)=19.7%
3
2
1
10KR2J-3-GP
PL4904 330uF/2V, Ripple Current=3Arms
1 8 2 1 560uF/2V, Ripple Current=3.5Arms
2 BST DRVH 7 PWR_81151_LX2A 1 2
[46] PWR_GT_PWM2 2 1 PWR_81151_EN2A 3 PWM SW 6 Cout capacitance=2340uF
[46,47,49] PWR_VCORE_DRVON EN GND
1
PWR_81151_VCC2A 4 5 IND-D36UH-36-GP
PR4908 VCC DRVL
FLAG
51R2J-2-GP PR4907
5
6
7
8
5
6
7
8
1
2D2R6J-3-GP
D
D
D
D
D
D
D
D
PR4905 PG4903 PG4904
9
2
2D2R5J-1-GP PQ4905 PQ4906
COPPER-CLOSE-GP-U
COPPER-CLOSE-GP-U
2 1 PWR_81151_SN2A
+5V_S5 SM4504NHKPC-TRG-1-GP (R_)
2
4 4
G
1
BOTTOM PAD PC4904
S
S
S
S
S
S
1
PC4908 CONNECT TO SC1KP50V2KX-1-LL-GP

3
2
1
3
2
1
SC1U10V2KX-1-LL-GP GND Through
2
4 VIAs
2
A A
PWR_81151_DRLA2
Hsichih, Taipei
Title
[46] PWR_GT_CSP2 049_V_GT OUTPUT(NCP81151)
[46] PWR_GT_CSN2
B LA710 1
8 7 6 5 4 3 2 1
5 4 3 2 1
+19V_DCBATOUT +19V_DCBATOUT_VCCIO_SA
+5V_S5
PL5003
1 2
HCB2012KF-GP
1
PR5009
2D2R5J-1-GP
PR5025
2D2R5J-1-GP
Input ripple current =2.53337A
2
2
Input capacitance = 30uF
+19V_DCBATOUT_VCCIO_SA
1
PWR_VCCSA_VCCP
PC5011 PC5009
PWR_VCCSA_VCC
SC1U10V2KX-1-LL-GP SC1U10V2KX-1-LL-GP
2
+3D3V_S0 PW R_VCCSA_BOOT1
D D
1
1
2
PR5037 PR5011 PC5014 PC5004 PC5007 PC5006
SC10U25V5KX-LL-GP
SC10U25V5KX-LL-GP
SC10U25V5KX-LL-GP
10KR2J-3-GP 0R0603-PAD-1-GP-U PC5003 SCD1U25V2KX-LL-GP
2
5
6
7
8
(R_) SCD22U25V3KX-LL-GP
15
1
1
D
D
D
D
PU5001 VCC_SA IMAX=11.1A,OCP>16.7A
PQ5002
VCCP
VCC
2
2
6 SM4378NSKPC-TRG-GP
[40] PW R_VCCSA_PGOOD PGOOD PW R_VCCSA_BOOT LIR=2.84A/11.1A=26%
4
BOOT 4 560u/2.5V, Ripple Current=3.5Arms
S
S
S
7
330uF/2V, Ripple Current =6.3Arms
SYNCH Cout capacitance=944uF
3
2
1
Maglayer 10.0mm x 11.5mm x 4.0mm
5 PW R_VCCSA_UG 2 PR5005 1 PW R_VCCSA_UG1 DCR: 2.9~3.3 mOhm
[40] PW R_VCCSA_EN
14
ROSC/EN
UG
0R0805-PAD-1-GP-U Idc : 18A , Isat : 36A +1D05V_VCCSA_S0
PL5002
1
3 PW R_VCCSA_LX 1 2
HIGH:ENABLE VCCSA NCP5230MNTW G-GP-U
LX
LOW:DISALBE VCCSA PR5028 16 (074.05230.M001)
82K5R2F-GP GND IND-1UH-376-GP
1
PR5013
1
17
GND 2D2R6J-3-GP
2
PW R_VCCSA_LG
5
6
7
8
2 PT5002 PT5003
LG
D
D
D
D
SE560U2D5VM-12-GP
SE330U2VDM-4-GP
PQ5003
Work F= PW R_VCCSA_COMP8 13 PW R_VCCSA_CSP
2
350Khz COMP CSP
PWR_VSA_SN
4
2
PW R_VCCSA_CSN
2
12
S
S
S
CSN/VO PG5001
VSEN
PG5002
FBG
3
2
1
GAP-CLOSE-PWR-3-GP
GAP-CLOSE-PWR-3-GP
FB
1
1
PC5008 +1D05V_VCCSA_S0
10
11
1
2
1
PW R_VCCSA_COMP_R PC5005 PC5010
SC100P50V2JN-3-LL-GP PW R_VCCSA_VSEN SC1KP50V2KX-1-LL-GP
2
2
1
1
PR5021
1
(R_) PR5004 0R0402-PAD-1-GP PC5001
PC5023 10KR2J-3-GP SC10U6D3V3MX-LL-GP PC5022 PC5021
SC470P50V2KX-3-LL-GP PR5027 SC22U6D3V3MX-1-LL-GP SC22U6D3V3MX-1-LL-GP
2
20KR2F-L-GP
2
PW R_VCCSA_FB 1 2 PW R_VCCSA_CSP1 (R_) (R_) (R_)
R2
1
1
1
PC5002
SC1KP50V2KX-1-LL-GP
R1 PR5012
9K53R2F-GP PC5012
PR5024
10KR2F-2-GP
+1D05V_VCCSA_S0
1
C PR5010 C
PW R_VCCSA_COMP_A SCD1U25V2KX-LL-GP
2
3KR2F-GP
2
(R_)
1
PR5023
2
1
100R2F-L1-GP-U
1
PR5001
100R2F-L1-GP-U PC5013
R5002
2
SCD1U25V2KX-LL-GP
2
1 2 PW R_VCCSA_COMP_B
2
[8] VCCSA_SENSE
0R0402-PAD-2-GP
R5003
1 2 PW R_VCCSA_FBG
[8] VCCSA_VSS_SEN
0R0402-PAD-2-GP
Vo=0.8*(1+R1/R2)=1.0518V PW R_VCCSA_VSEN
1
PR5022
100R2F-L1-GP-U
(R_) PR5089
0R2J-2-GP
1 2 PW R_VCCSA_FBG
2
(R_)
PR5090
0R2J-2-GP
1 2 PW R_VCCSA_COMP_B
(R_)
OVP setting
+5V_S5
1
PL5005
HCB2012KF-GP
2
+VCCIO_VIN
https://vinafix.com +PW R_VCCIO
2 PR5029 1
0R0805-PAD-1-GP-U
+0D95V_VCCIO_S0
2 PR5030 1
0R0805-PAD-1-GP-U
PW R_VCCIO_BST_R
B B
+5V_S5 2 PR5031 1
0R0805-PAD-1-GP-U
1
2 PR5032 1
0R0805-PAD-1-GP-U
1
PR5058 PR5059
2D2R5J-1-GP 2D2R5J-1-GP PC5061
+VCCIO_VIN SCD1U50V3KX-LL-GP IMAX=6.4A,OCP>10A
2
PW R_VCCIO_V5 PWM Frequency=1100kHz

LIR=0.47A/6.4A=7%
1
22uF/6.3V, Ripple Current=4Arms

PC5053
1
PC5075 PC5059 SC2D2U10V3KX-1-LL-GP

2
SC10U6D3V3MX-LL-GP SC10U6D3V3MX-LL-GP
2
PW R_VCCIO_AGND
PU5003
+PW R_VCCIO
PR5062 1 2 0R0402-PAD-2-GP 12 2
[40] SEQ_VCCIO_EN VDD NC#2
PR5061 PR5066
PW R_VCCIO_BST
1
PC8614 57K6R2F-GP 4 PL5052 100R2F-L1-GP-U

SCD1U16V2KX-3-LL-GP 2 1 VBST 5 PW R_VCCIO_SW 1 2 1 2
PW R_VCCIO_AGND SW#5 VCCIO_SENSE [8]
13 6 IND-1UH-94-GP-U
VIN SW#6
2
PC5071 14 7
SC100P50V2JN-3-LL-GP VIN SW#7 PC5055 PC5056 PC5057
1
2 1
PW R_VCCIO_EN 1
PW R_VCCIO_MODE 8 EN 11
PS AGND PW R_VCCIO_AGND
2
PR5092 PC5073 PW R_VCCIO_FB 10
FB
1
5K23R2F-GP SC4700P50V2KX-1-LL-GP 15 PC5060 PC5072

2 1 PW R_VCCIO_COMP1 2 1 PGND 16 SC1KP50V2KX-1-LL-GP SC4700P50V2KX-1-LL-GP
VCCIO_PWRGD 3 PGND
[40] PW R_VCCIO_PG PGD
2
PW R_VCCIO_COMP 9 17
COMP GND
PWR_VCCIO_SNB
PWR_VCCIO_FB1
NCP3136MNTXG-GP
PR5065 1 2
VCCIO_VSS_SEN [8]
0R0402-PAD-2-GP
PG5051
1
1 2
PR5051
1
PR5060 3K92R2F-GP
2D2R5J-1-GP R1
COPPER-CLOSE-GP-U PR5091
2
40D2R2F-GP
2
A PW R_VCCIO_AGND A
PW R_VCCIO_FB
1
R2PR5052
6K81R2F-1-GP
2
PW R_VCCIO_AGND 12F, 88, Hsin Tai W u Rd
Hsichih, Taipei
R2=(0.6V/(Vout-0.6V))*R1 TitleTitle
050_VCCSA/VCCIO(NCP5230/RT8237)
SizeSize Document
Document Number
Number RevRev
D LA710 1
Date:
Sheet 50 of 107
5 4 3 2 1
5 4 3 2 1
+19V_DCBATOUT +PWR_DCBATOUT_VDDQ
PL5102
1 2
HCB2012KF-GP

PR5102 10uF/25V, Ripple Current =1000mA
D
PWR_VDDQ_VDD 1 2
+5V_S5
Input capacitance = 30uF D
5D1R3J-GP
1
PC5102
(R_) SC1U10V2KX-1-LL-GP +PWR_DCBATOUT_VDDQ
PC5104
2
1
1
SC1KP50V2KX-1-LL-GP
PR5104
17K8R2F-GP +PWR_VDDQ +1D2V_S3
2
PR5114
1
PC5108 PC5116 PC5106 PC5105
2
PWR_VDDQ_VDDP 1 2 2 PR5124 1
+5V_S5
SC10U25V5KX-LL-GP
SC10U25V5KX-LL-GP
SC10U25V5KX-LL-GP
SCD1U25V2KX-LL-GP
0R0805-PAD-1-GP-U
2
1
PC5109 2D2R3J-2-GP
SC1U10V2KX-1-LL-GP
2 PR5125 1
PU5101
2
PWR_VDDQ_CS 0R0805-PAD-1-GP-U
5
6
7
8
SM3319NAQAC-TRG-GP
D
D
D
D
2 PR5126 1
0R0805-PAD-1-GP-U
G
11
12
13
PU5102 PC5110 2 PR5127 1
S
S
S
PR5107 SCD1U25V2KX-LL-GP 0R0805-PAD-1-GP-U
CS
VDDP
VDD
3
2
1
2D2R3-1-U-GP
18 PWR_VDDQ_BOOT 2 1 PWR_VDDQ_BOOT_A 1 2
PR5108 PWR_MEM_PG 10 BOOT MAG. 6.86mm*6.47mm*3mm 2 PR5128 1
620KR2F-GP PGOOD PR5116 DCR: 9~10 mOhm 0R0805-PAD-1-GP-U
+PWR_DCBATOUT_VDDQ
1 2 PWR_VDDQ_TON 9
TON UGATE
17 PWR_VDDQ_UGATE 2 1 PWR_VDDQ_UGATE_A Idc : 11A , Isat : 22A
PR5117
PWR_VDDQ_EN 8 0R0805-PAD-1-GP-U 2 1 +PWR_VDDQ 2 PR5129 1
[40,51] PWR_VDDQ_EN S5 PL5101
(R_) 0R0805-PAD-1-GP-U
1 2 SLP_S3_N_C 7 16 PWR_VDDQ_PHASE 10KR2J-3-GP 1 2
[40,51] DDR_VTT_CNTL_L4 PR5150 0R0402-PAD-2-GP S3 PHASE
(R_) 1 2 PWR_VDDQ_VLDOIN19 IND-1UH-94-GP-U 2 PR5130 1
+1D2V_S3 VLDOIN
1
PC5134 0R0805-PAD-1-GP-U
1
1 2 15 PWR_VDDQ_LGATE
SC1U10V2KX-1-LL-GP
PG5111 PC5111 (R_)
[20,24,40,56] SLP_S3_N LGATE
5
6
7
8
1
PR5151 GAP-CLOSE-PWR-3-GP SC10U6D3V3MX-LL-GP PC5112
39KR2J-GP
2
D
D
D
D
2 PR5131 1
SC1U10V2KX-1-LL-GP
(R_) PT5101
2
PU5103 SE330U2VDM-4-GP 0R0805-PAD-1-GP-U
2
C 1 2 1 14 SM3317NSQAC-TRG-GP C
VTTGND PGND
PG5115 Rdson=15.5mohm @4.5V
4
G
[40,51] PWR_VDDQ_EN PG5113 5 PWR_VDDQ_SENSE 1 2
S
S
S
GAP-CLOSE-PWR-3-GP VDDQ +PWR_VDDQ
[40,51] PWR_2V5_EN
3
2
1
20 6 PWR_VDDQ_FB
+PWR_VDDQ_VTT VTT FB GAP-CLOSE-PWR-3-GP
1
(R_)
2 PR5109 PC5113
VTTSNS
VTTREF
6K04R2F-GP SC18P50V2JN-1-LL-GP 1.2V IMAX=8.73A,OCP>12.75A
[40,51] DDR_VTT_CNTL_L4 R1
2
GND
GND
[40,51] PWR_2V5_PG LIR=2.82A/8.73A=32%
2
PWR_VDDQ_PHASE
RT8207MZQW-1-GP 330uF/2V, Ripple Current =6.3Arms
21
4
1
[8,20,24,35,36,40] SLP_S4_N
1
PR5110
Vout = 0.6V
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10KR2F-2-GP PR5115
[40] PWR_MEM_PG 2D2R6J-3-GP
Iomax = 1A
1PWR_VDDQ_VTTREF
PG5118
GAP-CLOSE-PWR-3-GP R2
2
1 2
+0D6V_VREF_S0 +PWR_VDDQ_VTT
PWR_VDDQ_SNB
1
PC5101 PC5115
SC10U6D3V3MX-LL-GP
SC10U6D3V3MX-LL-GP
Vout=0.75 x (1+R1/R2)
2
=0.75 x ( 1+6.04/10)
2
PC5118
PC5117 =1.203 SC1500P50V2KX-2-LL-GP
1
SCD047U25V2KX-2-GP
2
+2D5V_VPP
+3D3V_S5
PG5103
1 2
B B
GAP-OPEN-PWR-1-GP PC5126
APL5933 for +2D5V_VPP
1
SC10U6D3V3MX-LL-GP
PG5104 (R_) +5V_S5 Impedance=80ohm

1 2
Rated current=5000mA
2
GAP-OPEN-PWR-1-GP
+5V_S5 +2V5_VIN
Measure Current max=2.48A peak with DDR4 device*4
Imax=1.1A PL5103
1
+3D3V_S5 PC5128 1 2 Input ripple current =0.833A +2.5V,IMAX=2.58A,OCP>10A

+3D3V_S5 SC1U10V2KX-1-LL-GP
(R_) Pd=0.88W HCB2012KF-GP 0603 MLCC, Ripple Current=1Arms
LIR=0.99A/2.58A=39%
2
1
+2V5_VIN
input capacitance= 22uF
1
PR5132 22uF/6.3V, Ripple Current=1Arms

9
PR5113 10KR2F-2-GP PU5105 +PWR_2D5V +2D5V_VPP 2.2uH, 7*7*3 SMD type

100KR2F-L1-GP (R_) (R_)
IDC=8A, Isat=14A
GND
4 5 PG5102 PG5121 SC10U6D3V3MX-LL-GP SC10U6D3V3MX-LL-GP PU5104

PR5111 VCNTL NC#5
2
PWR_2D5V_VIN 3 6 1 2 RT8068AZQWID-GP-U
0R2J-2-GP VIN VOUT
2
PWR_2D5V_EN 2 7 PWR_2D5V_FB
GAP-CLOSE-PWR-3-GP
+2D5V_VPP_1
EN FB
1
1 2 PWR_2D5V_PG 1 8 GAP-OPEN-PWR-1-GP PR5101 10 1
[40,51] PWR_2V5_PG POK GND PVIN LX#1 PL5104
2D2R5J-1-GP PC5121 PC5120
2
9 2 PWR_2V5_LX 1 2
Design Current : 2.58A
(R_) PG5122
PVIN LX#2
2
APL5933CKAI-TRG-1-GP 1 2 IND-2D2UH-122-GP-U PC5129 PC5125
OCP : >10A
PR5112
2
2
1
PWR_2V5_VDD 8 3
SC22P50V2JN-4-LL-GP
SCD1U16V2KX-3-LL-GP
0R2J-2-GP (R_) SVIN LX#3 (R_)
1
PC5132 PC5131 GAP-OPEN-PWR-1-GP
1
1 2PWR_2D5V_EN 7
SCD22U10V2KX-1-LL-GP PR5105 PC5123 PC5122

[40,51] PWR_2V5_EN NC#7
1
1
(R_) PC5124 5 2D2R5J-1-GP
EN
2
6 PWR_2V5_FB
Low (R_) SC1U10V2KX-1-LL-GP
PWR_2D5V_FB_A
FB
2
4 PWR_2V5_SN PR5118
Max:0.4V PGOOD
2
11 162KR2F-L-GP
High GND
1
Vout=0.8V*(1+(R1/R2)) PC5119
2
Min:1.6V (R_) SC1KP50V2KX-1-LL-GP
R1
1
(R_) (R_)
=0.8V*(1+(21.5/10))
2
1
PR5120 PC5130 PWR_2V5_EN

[40,51] PWR_2V5_EN
+2D5V_VPP_1 +2D5V_VPP
=0.8V*(1+2.15)
2
21K5R2F-GP
(R_)
Low
SC68P50V2JN-1-LL-GP
=2.52V Max:0.4V
High
(R_) PWR_SEQ = 17
2
1
PC5127 1 PR5133 2 0R0805-PAD-2-GP-U
Min:1.6V SC680P50V2KX-2-LL-GP
0.6*(1+R1/R2)
1PWR_2V5_FB_N 2
A
R2 1 PR5123 2 0R0805-PAD-2-GP-U A
1
[40,51] PWR_2V5_PG
=0.6*(1+162/51)
1
=0.6*(1+3.17)
PR5122 PR5119
10KR2F-2-GP 51KR2F-L-GP
(R_)
=2.505V
2
2
(R_)
PR5121 Wistron Incorporated
18KR2F-GP 12F, 88, Hsin Tai Wu Rd
Hsichih, Taipei
2
Title
Title
051_MEM/MEMVTT (RT8207M)
Size
Size Document
DocumentNumber
Number Rev
Rev
A2 LA710 1
Date:
Sheet 51 of 107
5 4 3 2 1
5 4 3 2 1
+PWR_1D0V +1D05V_PCH_S5
2 PG5206 1
0R0805-PAD-1-GP-U
2 PG5207 1
D D
0R0805-PAD-1-GP-U
+19V_DCBATOUT +PWR_DCBATOUT_1D0V
2 PG5208 1
PL5202 0R0805-PAD-1-GP-U
1 2
HCB2012KF-GP 2 PG5209 1
0R0805-PAD-1-GP-U
2 PG5210 1
Input capacitance = 20uF 0R0805-PAD-1-GP-U
+3D3V_S5
+PWR_DCBATOUT_1D0V
2 PG5211 1
1
PR5202
10KR2J-3-GP 0R0805-PAD-1-GP-U
(R_) PC5202 PC5203 PC5204
SC10U25V5KX-LL-GP
SC10U25V5KX-LL-GP
SCD1U50V3KX-LL-GP
1
1
PU5202
5
6
7
8
PR5203 SM3319NAQAC-TRG-GP 1.05V IMAX=8.4A,OCP>12.6A
2
D
D
D
D
0R0402-PAD-1-GP
1 2 PWR_1D0V_PG PWM Frequency=290kHz
[40] PCH_1V_PG LIR=3.43A/8.4A=40%
1
C TPAD28-2-GP PC5234 330uF/2V, Ripple Current =6.3Arms C
TP5201 SCD1U16V2KX-3-LL-GP 4 Cout capacitance=330uF
G
PWR_1D0V_HG1
S
S
S
2
MAG. 6.86mm*6.47mm*3mm
1
3
2
1
PU5201
PR5204 PR5201 PC5205 DCR: 9~10 mOhm
137KR2F-1-GP 1
PGOOD GND
11 2D2R3-1-U-GP SCD1U50V3KX-LL-GP Idc : 11A , Isat : 22A
1 2 PWR_1D0V_CS 2 10 PWR_1D0V_BOOT 1 2 PWR_1D0V_BOOT_A 1 2 +PWR_1D0V
CS BOOT PWR_1D0V_HG PL5201
3 9 2 PR5212 1
[40] PWR_1D0V_EN PWR_1D0V_FB EN UGATE PWR_1D0V_PH
4 8 0R0805-PAD-1-GP-U 1 2
PWR_1D0V_RF 5 FB PHASE 7
RF VCC 6 PWR_1D0V_LG IND-1D5UH-53-GP-U
(R_)
PWR_1D0V_VCC
1 PR5207 LGATE
PC5207
1
1
PC5201 PT5201 PC5211 PC5212
470KR2F-GP
5
6
7
8
1
PR5210
SC1KP50V2KX-1-LL-GP
SC10U6D3V3MX-LL-GP
SC10U6D3V3MX-LL-GP
RT8237EZQW-2-GP
D
D
D
D
2D2R6J-3-GP PG5201
SCD1U25V2KX-LL-GP
SE330U2VDM-4-GP
2
PU5203
GAP-CLOSE-PWR-3-GP
2
2
PR5215 SM3317NSQAC-TRG-GP
1
2D2R5J-1-GP
2 1 4
G
+5V_S5
PWR_1D0V_SNB
(R_) (R_)
S
S
S
3
2
1
1
PC5206
https://vinafix.com
SC1U10V2KX-1-LL-GP
PWR_1D0V_FB_A
2
B B
2
PC5210
1
SC1500P50V2KX-2-LL-GP PR5208
1
(R_)
PC5209
4K99R2F-L-GP
SC18P50V2JN-1-LL-GP
2
2
PWR_1D0V_FB
Vout=0.704*(1+(R1/R2))
=2*(1+(4.99/10))
1
PR5209
=1.055296V
10KR2F-2-GP
2
A A
Hsichih, Taipei
Title
Title
052_1D05V_PCH_S5(RT8237C)
Size
Size Document Number
Document Number Rev
Rev
Custom LA710 1
Date:
Sheet 52 of 107
5 4 3 2 1
5 4 3 2 1
D D
+3D3V_S5
1D8V_LDO
2
PR5304
+5V_S5
0R0805-PAD-2-GP-U
PD=(Vin-Vout)*Iomax
=(3.3-1.5)*0.5A=0.9W
0R0603-PAD-2-GP-U
PR5302
1
1
PC5303 PC5304 PC5305
Imax=0.5A
2
SC10U6D3V3MX-LL-GP SC10U6D3V3MX-LL-GP SC1U10V2KX-1-LL-GP
1 2
(R_) (R_) (R_)
Pd=0.9W
9
PC5308 U5302 +PWR_1D8V +1D8V_S5
1
SCD1U16V2KX-3-LL-GP PR5305
GND
2 1 (R_) 1D8V_CNTL 4 5 0R0603-PAD-2-GP-U
1D8V_VIN 3 VCNTL NC#5 6 2 1
(R_) PR5306 1 2 1KR2J-1-GP 1D8V_EN 2 VIN VOUT 7
[40] PWR_1D8V_EN EN FB
1
1 8
[40] PWR_1D8V_PG POK GND
1
PC5302 PR5301 PC5306 PC5307
SC100P50V2JN-3-LL-GP 12K7R2F-GP SC10U6D3V3MX-LL-GP SC10U6D3V3MX-LL-GP
APL5933CKAI-TRG-1-GP (R_) (R_) (R_) (R_)
2
+3D3V_S5 (R_)
2
1D8V_FB
C PR5307 1 2 C
1
100KR2F-L1-GP
(R_) DY
PR5303
10KR2F-2-GP
(R_)
2
Vout = 0.8*(1+R1/R2)
= 0.8*(1+12.7/10)
=1.816V
https://vinafix.com
B
+3D3V_S0
1D5V_LDO B
2
PR5311
+5V_S0
0R0805-PAD-2-GP-U
PD=(Vin-Vout)*Iomax
=(3.3-1.5)*0.5A=0.9W
1
0R0603-PAD-2-GP-U
PR5312
(R_)
1
PC5318 PC5319 PC5320

Imax=0.5A
2
SC10U6D3V3MX-LL-GP SC10U6D3V3MX-LL-GP SC1U10V2KX-1-LL-GP

1 2
Pd=0.9W
2
PC5301 U5303 +1D5V_S0_1 +1D5V_S0

1
SCD1U16V2KX-3-LL-GP PR5313
GND
2 1 1D5V_CNTL 4 5 0R0603-PAD-2-GP-U
APL5930_1D5V_VIN 3 VCNTL NC#5 6 2 1
PR5314 1 2 22KR2J-GP 1D5V_PWR_EN PR5315 1 2 1KR2J-1-GP 1D5V_EN 2 VIN VOUT 7
+3D3V_S0 EN FB
1
PR5316 1 2 10KR2J-3-GP VCCIN_VR_ON_POK 1 8 (R_) (R_)
POK GND
1
1
PC5321 PC5322 PC5323
SC100P50V2JN-3-LL-GP PR5317 SC10U6D3V3MX-LL-GP SC10U6D3V3MX-LL-GP
APL5933CKAI-TRG-1-GP 8K87R2F-2-GP
2
2
1D5V_FB 2
1
PR5318
10KR2F-2-GP
2
A A
Vout = 0.8*(1+R1/R2)
= 0.8*(1+8.87/10)
=1.5096V
Hsichih, Taipei
Title
Title
054_1D8V_S5(RT8068A)/1D5V(LDO)
Size
Size Document
DocumentNumber
Number Rev
Rev
A2 LA710 1
Date:
Sheet 53 of 107
5 4 3 2 1
5 4 3 2 1
D D
+19V_DCBATOUT +PWR_DCBATOUT_12V
PL5402
1 2
HCB2012KF-GP
1
PR5402
1 2 PWR_12V_EN PC5417 PC5403 PC5404 PC5405
[40] SEQ_12V_EN
SC10U25V5KX-LL-GP
SC10U25V5KX-LL-GP
SC10U25V5KX-LL-GP
2
2
SCD1U25V2KX-LL-GP
0R0402-PAD-2-GP
(R_)
PWR_12V_BOOT_R
PR5409
PC5402 SCD022U16V2KX-3-LL-GP PU5403 2D2R5J-1-GP PC5407
C 1 2 1 2 C
9 +PWR_12V
1 2 PWR_12V_SS 8 GND 1 PWR_12V_BOOT SCD1U50V3KX-LL-GP
PWR_12V_EN SS BOOT PL5403
7 2 +PWR_DCBATOUT_12V
PWR_12V_COMP 6 EN VIN 3 PWR_12V_LX 1 2 +PWR_12V +12V_S0
PWR_12V_FB 5 COMP SW 4
1
FB GND
2
IND-10UH-219-GP-U
PR5401
1
PC5410 2 PR5427 1
2D2R6J-3-GP
1
RT8296AHZSP-GP PC5409 PC5413 PC5414 PC5415 PC5406 PC5416
1
PG5401
SC10U25V5KX-LL-GP
SC10U25V5KX-LL-GP
SC10U25V5KX-LL-GP
SC10U25V5KX-LL-GP
SC10U25V5KX-LL-GP
SC10U25V5KX-LL-GP
SC3300P50VKX-LL-GP
0R0805-PAD-1-GP-U
2
GAP-CLOSE-PWR-3-GP
2
2
PC5411 2 PR5428 1
1PWR_12V_SENSE 2
1PWR_12V_CP1
1PWR_12V_SNB
0R0805-PAD-1-GP-U
1
2 PR5429 1
0R0805-PAD-1-GP-U
PR5416
13K3R2F-L1-GP PC5401 PR5419
SC1KP50V2KX-1-LL-GP 71K5R2F-1-GP
https://vinafix.com
2
2
2
1
B B
PR5420
5K1R2F-2-GP
2
A A
Hsichih, Taipei
Title
Title
053_PWR_12V(NCP1589A)
Size
Size Document Number
Document Number Rev
Rev
Custom LM70Z 1
Date:
Sheet 54 of 107
5 4 3 2 1
5 4 3 2 1
U5502 +3D3V_S0
EDP_BKLTEN 1 5 EE Leon： Chang LCD_ID_0-3 power rail

2 A VCC from P3V3_S0to P3V3_S5 +3D3V_S5
3 B 4
GND Y
RN5501
LCD_ID_0 1 4
LCD_ID_1 2 3
SN74AUP1G08DCKR-GP
(R_) SRN10KJ-5-GP
RN5502
LCD_ID_2
D H: Enable LCD_ID_3
1
2
4
3 D
L: Disable
R5503 SRN10KJ-5-GP
[95] EDP_TXE3+ SCALAR_LVDS_BLTEN 1 2 INVERTER_EN
[95] EDP_TXE3-
[95] EDP_TXEC+ Connect to P.64 OZ554 (converter board)
0R0402-PAD-2-GP
[95] EDP_TXEC-
[95] EDP_TXE2+
[95] EDP_TXE2-
[95] EDP_TXE1+
[95] EDP_TXE1-
[95] EDP_TXE0-
[95] EDP_TXE0+
[95] EDP_TXO3+
[95] EDP_TXO3- 1A 20140311 Darren for EMI
[95] EDP_TXOC+
[95] EDP_TXOC-
[95] EDP_TXO2+
[95] EDP_TXO2-
[95] EDP_TXO1+
[95] EDP_TXO1-
[95] EDP_TXO0-
[95] EDP_TXO0+
[95] SCALAR_LVDS_BLTEN
[24,95] PS8625_Panel_ON
[24] EC_Panel_ON
[24,64] LCD_ID_0
[24,64] LCD_ID_1
[24,64] LCD_ID_2
C C
[24,64] LCD_ID_3
[64] RTN1 2017.12.22

[64] RTN2 Leon: LCD1 change to 020.K0368.0030 from ME request
[64] RTN3
[64] RTN4
LCD1
[17,24] EDP_BKLTEN
31
EDP_TXE0- 1
Panel Size 21.5'&20' EDP_TXE0+

EDP_TXE1-
2
3 Panel Size 20'&21.5'
EDP_TXE1+ 4
EDP_TXE2- 5
EDP_TXE2+ 6
https://vinafix.com
7
EDP_TXEC- 8
EDP_TXEC+ 9
EDP_TXE3- 10
EDP_TXE3+ 11
Panel Control EDP_TXO0-

EDP_TXO0+
12
13
14
EDP_TXO1- 15
[64] INVERTER_EN EDP_TXO1+ +19V_CON_VOUT
16
17 CLX-CON11-1-GP
EDP_TXO2- 18 13
EDP_TXO2+ 19 11 RTN4
EDP_TXOC- 20 10 RTN3
EDP_TXOC+ 21 9
EDP_TXO3- 22 8
EDP_TXO3+ 23 7 RTN2
24 6 RTN1
25 5 LCD_ID_0
+5V_PANEL TP5511 26 4 LCD_ID_1
TPAD24 1 LCD_RESERVE0 27 3 LCD_ID_2
28 2 LCD_ID_3
B B
29
30 1
1
C5501 C5502 32 12
SC1U10V2KX-1-LL-GP SCD1U16V2KX-3-LL-GP
CLX-CON30-15-GP-U COVCN1
2

+5V_S0 +5V_PANEL
U5501
PWR_SEQ = 21 Layout 60 mil 5 1
Layout 60 mil Spec max current：1.2A
VIN VOUT 2 Inrush curren=3A
GND
1
DIS_5VPANEL 4 3 5VPANEL_EN
DIS EN
1
C5520 C5521
SC1U10V2KX-1-LL-GP SC4D7U6D3V3KX-LL-GP
2
APL3522ABI-TRG-1-GP
2
R5501 1 2
499R3F-GP
PANEL_ON
1: PANEL POWER ON
0: PANEL POWER OFF
R5502
PS8625_Panel_ON 1 2 5VPANEL_EN
0R0402-PAD-2-GP
1
A R5504 C5503 A
EC_Panel_ON 1 2 SCD1U16V2KX-3-LL-GP
(R_)
2
EE Leon ： reserve EC_Panel_ON to 5VPANEL_EN circuit 0R2J-2-GP (R_)

2
for external panel on/off button

R5506
100KR2J-1-GP
(R_)
1

Hsichih, Taipei
Title
Title
055_LVDS/Converter Connector
Size
Size DocumentNumber
Document Number Rev
Rev
C LA710 1
Date:
Sheet 55 of 107
5 4 3 2 1
5 4 3 2 1
ED5601
AZ5125-02S-R7G-GP
1 (R_)
2
+5V_HDMI
HDMI1
18 15 HDMI_CTRL_CLK_CON
+5V_POWER SCL 16 HDMI_CTRL_DATA_CON
SDA
SC4D7U6D3V3KX-LL-GP
C5605
SCD1U25V2KX-LL-GP
C5602
HDMI_DDI_TX_CON_P0 7
1
HDMI_DDI_TX_CON_N0 9 TMDS_DATA0+ 13 CEC 1 2
HDMI OUT DDC LVL
(R_)
+3D3V_S0 HDMI_DDI_TX_CON_P1 4 TMDS_DATA0- CEC 17
HDMI_DDI_TX_CON_N1 6 TMDS_DATA1+ DDC/CEC_GROUND 19 HDMI_DET_CON R5611
2
HDMI_DDI_TX_CON_P2 1 TMDS_DATA1- HOT_PLUG_DETECT 1MR2J-1-GP
D HDMI_DDI_TX_CON_N2 3 TMDS_DATA2+ 14 D
Q5602 TMDS_DATA2- RESERVED#14

Solve HDMI LOGO issue
HDMI_CTRL_DATA_PCH 1 6 HDMI_CTRL_DATA_CON 8
5 TMDS_DATA0_SHIELD
2 5 2 TMDS_DATA1_SHIELD
TMDS_DATA2_SHIELD 20
HDMI_CTRL_CLK_CON 3 4 HDMI_CTRL_CLK_PCH 11 GND 21
HDMI_DDI_TX_CON_CLKP 10 TMDS_CLOCK_SHIELD GND 22
HDMI_DDI_TX_CON_CLKN 12 TMDS_CLOCK+ HDMI GND
2N7002KDW-1-GP TMDS_CLOCK- (A_Type)
SKT-HDMI22-27-GP
[16] HDMI_CTRL_DATA_PCH +5V_S5 +5V_HDMI

[16] HDMI_CTRL_CLK_PCH
[7] HDMI_DDI_TX_P0
[7] HDMI_DDI_TX_N0 U5605
[7] HDMI_DDI_TX_P1 5 1
HDMI out Reduced Level Shift
[7] HDMI_DDI_TX_N1 VIN VOUT 2
[7] HDMI_DDI_TX_P2 1 2 HDMI_PWR_EN 4 GND 3
[20,24,40,51] SLP_S3_N R5625
[7] HDMI_DDI_TX_N2 EN OC#
[7] HDMI_DDI_TX_CLKP 0R0402-PAD-2-GP
[7] HDMI_DDI_TX_CLKN
UP7549TMA5-20-1-GP
1
[16] HDMI_DET_PCH C5606
(R_) SC1U10V2KX-1-LL-GP
2
SCD1U16V2KX-3-LL-GP
HDMI_DDI_TX_P0 2 1 C5619 HDMI_DDI_TX_CMC_P0
C C
HDMI_DDI_TX_N0 2 1 C5620 HDMI_DDI_TX_CMC_N0
HDMI_DDI_TX_P1 2 1 C5617 HDMI_DDI_TX_CMC_P1
HDMI_DDI_TX_P2 2 1 C5615 HDMI_DDI_TX_CMC_P2 CMC

HDMI_DDI_TX_CLKP 2 1 C5621 HDMI_DDI_TX_CMC_CLKP

TR5603
HDMI_DDI_TX_CLKN 2 1 C5622 HDMI_DDI_TX_CMC_CLKN HDMI_DDI_TX_CMC_CLKP 4 3 HDMI_DDI_TX_CON_CLKP
HDMI_DDI_TX_CMC_CLKN HDMI_DDI_TX_CON_CLKN
https://vinafix.com
1 2
1
2
3
4
4
3
2
1
FILTER-4P-61-GP
RN5612 RN5611
SRN470J-7-GP SRN470J-7-GP
(66.47136.08L) (66.47136.08L)
8
7
6
5
5
6
7
8
TR5601
HDMI_DDI_TX_CMC_P0 4 3 HDMI_DDI_TX_CON_P0
+3D3V_S0 Q5601
HDMI_LEVEL HDMI_DDI_TX_CMC_N0 1 2 HDMI_DDI_TX_CON_N0
1 6
+3D3V_S0
2 5 +3D3V_S0 FILTER-4P-61-GP
HDMI_DET_CON HDMI_DET_PCH R5615
3 4 2 1
1MR2J-1-GP
2N7002KDW-1-GP TR5602
2
R5616
20KR2J-L2-GP HDMI_DDI_TX_CMC_N1 1 2 HDMI_DDI_TX_CON_N1
B B
1
FILTER-4P-61-GP
HDMI OUT HPD LVL

TR5604
HDMI_DDI_TX_CMC_N2 1 2 HDMI_DDI_TX_CON_N2
ESD FILTER-4P-61-GP
+5V_S0
U5603
8
3 D5601
HDMI_DDI_TX_CON_P0 1 10 HDMI_DDI_TX_CON_P0 HDMI_CTRL_DATA_CON 1 2 HDMI_CTRL_DATA_R 2
R5612
HDMI_DDI_TX_CON_N0 2 9 HDMI_DDI_TX_CON_N0 2K2R2J-2-GP 3
HDMI_DDI_TX_CON_CLKP 4 7 HDMI_DDI_TX_CON_CLKP HDMI_CTRL_CLK_CON 1 2 HDMI_CTRL_CLK_R 1

R5613
HDMI_DDI_TX_CON_CLKN 5 6 HDMI_DDI_TX_CON_CLKN 2K2R2J-2-GP BAT54A-11-GP
2
SCD1U25V2KX-LL-GP SCD1U25V2KX-LL-GP
AZ1043-04F-R7G-GP C5603 (R_) C5604 (R_)
1
ED5602 +3D3V_S5
HDMI_CTRL_CLK_CON 1 6 HDMI_CTRL_DATA_CON
A For HDMI logo test A

2 5
SCD1U16V2KX-3-LL-GP
U5604
1
8
3 CEC 3 4 HDMI_DET_CON C5601
HDMI_DDI_TX_CON_P2 1 10 HDMI_DDI_TX_CON_P2
2
HDMI_DDI_TX_CON_N2 2 9 HDMI_DDI_TX_CON_N2 AZC199-04S-R7G-GP Wistron Incorporated

HDMI_DDI_TX_CON_P1 4 7 HDMI_DDI_TX_CON_P1 12F, 88, Hsin Tai Wu Rd
Hsichih, Taipei
HDMI_DDI_TX_CON_N1 5 6 HDMI_DDI_TX_CON_N1
Title
Title
056_HDMI Out
Size
Size DocumentNumber
Document Number Rev
Rev
AZ1043-04F-R7G-GP
C LA710 1
Date:
Sheet 56 of 107
5 4 3 2 1
5 4 3 2 1
D D
C C
Reserved
https://vinafix.com
B B
A A
Hsichih, Taipei
Title
057_DP_out_(R)
A LA710 1
5 4 3 2 1
5 4 3 2 1
D D
Reserved
C C
https://vinafix.com
B B
A A
Hsichih, Taipei
Title
058_DP_REDRIVER_(R)
A LA710 1
5 4 3 2 1
5 4 3 2 1
D D
C
Reserved C
https://vinafix.com
B B
A A
Hsichih, Taipei
Title
059_Display switch_(R)
A LA710 1
5 4 3 2 1
5 4 3 2 1
D D
SATA HDD Connector (Red color)

SATA
HDD1
需靠近 CONN
HDD_SATA_RX_P C6002 1 2 SCD01U50V2KX-1-LL-GP HDD_SATA_RX_P_C 6 8
HDD_SATA_RX_N C6004 1 2 SCD01U50V2KX-1-LL-GP HDD_SATA_RX_N_C 5 RXP 8 9
RXN 9
HDD 8
ED6001
1
3 HDD_SATA_TX_P C6008 1 2 SCD01U50V2KX-1-LL-GP HDD_SATA_TX_P_C 2 GND 4
[17] HDD_SATA_TX_P HDD_SATA_TX_P_C HDD_SATA_TX_P_C HDD_SATA_TX_N HDD_SATA_TX_N_C TXP GND
1 10 C6006 1 2 SCD01U50V2KX-1-LL-GP 3 7
[17] HDD_SATA_TX_N TXN GND
[17] HDD_SATA_RX_P HDD_SATA_TX_N_C HDD_SATA_TX_N_C
[17] HDD_SATA_RX_N 2 9
SKT-SATA7P-201-GP-U
HDD_SATA_RX_N_C 4 7 HDD_SATA_RX_N_C
HDD_SATA_RX_P_C 5 6 HDD_SATA_RX_P_C
ODD
[17] ODD_SATA_TX_P
[17] ODD_SATA_TX_N
[17] ODD_SATA_RX_P AZ1043-04F-R7G-GP
ODD Connector
[17] ODD_SATA_RX_N (R_)
ED6002
C 8 ODD1 C
3 21
ODD_SATA_RX_P_C 1 10 ODD_SATA_RX_P_C 1 Leon：change odd pin define for cable
ODD_SATA_RX_N_C 2 9 ODD_SATA_RX_N_C ODD_SATA_TX_P C6003 1 2 SCD01U50V2KX-1-LL-GP ODD_SATA_TX_P_C 2

ODD_SATA_TX_N C6001 1 2 SCD01U50V2KX-1-LL-GP ODD_SATA_TX_N_C 3
ODD_SATA_TX_N_C 4 7 ODD_SATA_TX_N_C 4
ODD_SATA_RX_N C6007 1 2 SCD01U50V2KX-1-LL-GP ODD_SATA_RX_N_C 5
ODD_SATA_TX_P_C 5 6 ODD_SATA_TX_P_C ODD_SATA_RX_P C6005 1 2 SCD01U50V2KX-1-LL-GP ODD_SATA_RX_P_C 6
7
+5V_HDD 8
9
AZ1043-04F-R7G-GP 10
(R_) 11
12
13
https://vinafix.com
14
15
16
17
18
19
20
22
HRS-CON20-13-GP
+5V_S0 +5V_HDD
SATA
R6003 1 2
Layout: Please put them together
0R0805-PAD-1-GP-U Pin1(VCC12)
+5V_HDD
B Leon ：change odd pin define for cable B
SATAP1
R6001 1 2 1
+12V_HDD
0R0805-PAD-1-GP-U 2
3
2
4
+5V_HDD
ED6003
F6001 1 2 FUSE-5A32V-23-GP AZ5125-02S-R7G-GP CLX-CON4-S12-GP
1 TP6004 TPAD26-OP-GP
(R_) (R_)
1 TP6002 TPAD26-OP-GP
SCD1U16V2KX-3-LL-GP
1
C6016 1 TP6003 TPAD26-OP-GP

3
C6013
SC10U6D3V3MX-LL-GP
2
+5V_HDD
1
C6014 C6015
SC10U10V5KX-2-LL-GP (R_) SCD1U16V2KX-3-LL-GP
2
+12V_S0 +12V_HDD
AC coupling caps near connector<100 mils
R6002
1 2
0R0805-PAD-2-GP-U
1
A (78.10622.51LLL) A
(78.10622.51LLL) C6009 C6010
C6012 SCD1U25V2KX-LL-GP SC10U25V5KX-GP
2
SC10U25V5KX-GP
Hsichih, Taipei
20170330 Add 12V_HDD Landis Title
Title
060_HDD&ODD_SATA PWR
Size
Size DocumentNumber
Document Number Rev
Rev
C LA710 1
Date:
Sheet 60 of 107
5 4 3 2 1
5 4 3 2 1
WLAN1
76 77
NGFF CARD SCREW HOLE
+3D3V_S5 74 76 77 75
72 3_3VAUX GND 73
+3D3V_NGFF_WLAN 3_3VAUX RESERVED#73
(R_) 70 71
RESERVED#70 RESERVED#71 H6101
1
R6144 68 69
10KR2J-3-GP 66 RESERVED#68 GND 67 STF236R128H88-1-GP
64 RESERVED#66 RESERVED#67/2ND_LANE_PERN1 65
PCIE 62 GPIO0_NFC_RESET#/MGPIO7
NFC_I2C_IRQ/MGPIO5
RESERVED#65/2ND_LANE_PERP1
GND
63
[16] WLAN_PCIE_RX_N 60 61 X01 Jim modify
NFC_I2C_SM_CLK RESERVED#61/2ND_LANE_PETN1
2
[16] WLAN_PCIE_RX_P 58 59 03/28
MPCIE_DISABLE_N 2 1 0R2J-2-GP (R_) NGFF_W_DISABLE1_N 56 NFC_I2C_SM_DATA RESERVED#59/2ND_LANE_PETP1 57
[16] WLAN_PCIE_TX_N
To PCH R6146
W_DISABLE#1 GND
1
NGFF_BT_DISABLE R6152 2 1 0R0402-PAD-2-GP NGFF_W_DISABLE2_N 54 55 NGFF_PEWAKE0_N R6153 2 1 0R0402-PAD-2-GP EC_WAKE_N
[16] WLAN_PCIE_TX_P RESERVED#54/W_DISABLE#2 PEWAKE0#
EC_RSTOUT0_N R6134 1 2 0R0402-PAD-2-GP PLTRST_NGFF_WLAN_N 52 53 NGFF_CLKREQ0_N R6104 2 1 0R0402-PAD-2-GP WLAN_CLKREQ_CONN_N
50 PERST0# CLKREQ0# 51
D SUSCLK_32KHZ GND D
2
SUSCLK_PCH R6136 2 1 0R2J-2-GP (R_) SUSCLK_NGFF_WLAN 48 49 WLAN_CLK100M_PCH_N
R6130 46 COEX1 REFCLKN0 47 WLAN_CLK100M_PCH_P GND
0R2J-2-GP (R_) 44 COEX2 REFCLKP0 45
CLINK_CLK_PCH R6105 1 2 0R0402-PAD-2-GP CLINK_CLK_WLAN 42 COEX3 GND 43 WLAN_PCIE_RX_CON_N R6141 2 1 0R0402-PAD-2-GP WLAN_PCIE_RX_N
[24,31,62] EC_WAKE_N CLINK_DATA_PCH CLINK_DATA_WLAN CLINK_CLK PERN0 WLAN_PCIE_RX_CON_P WLAN_PCIE_RX_P
[24,31,68,91,95] EC_RSTOUT0_N R6106 1 2 0R0402-PAD-2-GP 40 41 R6142 2 1 0R0402-PAD-2-GP
CLINK_DATA PERP0
1
CLINK_RST_PCH_N R6107 1 2 0R0402-PAD-2-GP CLINK_RST_WLAN_N 38 39
36 CLINK_RESET GND 37 WLAN_PCIE_TX_CON_N C6118 1 2 SCD1U25V2KX-LL-GP WLAN_PCIE_TX_N
34 UART_CTS PETN0 35 WLAN_PCIE_TX_CON_P 1 2 SCD1U25V2KX-LL-GP WLAN_PCIE_TX_P
USB PD to disable 32 UART_RTS
UART_TX
PETP0
GND
33
C6120
22 23
[16] WLAN_USB20_N UART_RX SDIO_RESET
[16] WLAN_USB20_P 20 21
18 UART_WAKE SDIO_WAKE 19
1 TP_NGFF_LED2 16 GND SDIO_DAT3 17
TP6104 14 LED#2 SDIO_DAT2 15
12 PCM_OUT SDIO_DAT1 13
10 PCM_IN SDIO_DAT0 11
8 PCM_SYNC SDIO_CMD 9
1 TP_NGFF_LED1 6 PCM_CLK SDIO_CLK 7
TP6103 LED#1 GND WLAN_USB20_N_CON R6120 10R2F-L-GP WLAN_USB20_N
4 5 1 2
CLOCK +3D3V_NGFF_WLAN 2 3_3VAUX
3_3VAUX NGFF_KEY_E_75P
USB_D-
USB_D+
3
1
WLAN_USB20_P_CON 1 2 WLAN_USB20_P
[20,62] SUSCLK_PCH GND R6118 10R2F-L-GP
[18] WLAN_CLK100M_PCH_N
[18] WLAN_CLK100M_PCH_P NP2 NP1
NP2 NP1
OTHER SKT-NGFF75P-93-GP
[16] MPCIE_DISABLE_N
[15] BT_RF_KILL_R_N
[20] SLP_WLAN_N
+3D3V_S5 +3D3V_NGFF_WLAN
[18] WLAN_CLKREQ_PCH_N +3D3V_NGFF_WLAN +3D3V_S5 +3D3V_S0
C PWR_SEQ = 8 =Standby Power C
1
[17] CLINK_CLK_PCH Function = CRB:+V3P3A R6125
1
1
[17] CLINK_DATA_PCH R6114 R6116 10KR2J-3-GP
1
100KR2J-1-GP R6117 R6122 100KR2J-1-GP (R_) +3D3V_NGFF_WLAN +3D3V_NGFF_WLAN
[17] CLINK_RST_PCH_N Q6101 Q6102
(R_) 100KR2J-1-GP 10KR2J-3-GP (R_)
G (R_) G
2
Place near pin2 pin4 Place near pin72 pin74
2
2
WLAN_CLKREQ_PCH_N D D NGFF_BT_DISABLE
2
S WLAN_CLKREQ_CONN_N BT_RF_KILL_R_N S
1
2N7002K-2-GP C6105 C6106 C6107 C6108 C6109 C6110 C6111 C6112 C6113 C6114
2N7002K-2-GP
SCD1U16V2KX-3-LL-GP
X01 Jim modify 03/25
SCD1U16V2KX-3-LL-GP
(R_)
SC10U6D3V3MX-LL-GP
SC10U6D3V3MX-LL-GP
(R_) (R_)
SC10U6D3V3MX-LL-GP
SC10U6D3V3MX-LL-GP
2
2
R6119 1 2 0R2J-2-GP
https://vinafix.com
R6124 1 (R_) 2 0R2J-2-GP
Phoran: Add other path,
funtion==>TBD Phoran: Add other path,
20140717 funtion==>TBD
20140717
B B
2016.10.13
Julian
1 2 0R0805-PAD-2-GP-U
WLAN Power Enable
R6131
+3D3V_S5 +3D3V_NGFF_WLAN
PWR_SEQ = 8 =Standby Power Q6103

AO3413L-GP
Function = CRB:+V3P3A S D
1
(R_)
1
R6128 (R_) (R_)
G
220KR2J-L2-GP C6115
SC4D7U6D3V3KX-LL-GP SDV
R6129 2 Waiting verify and change to 84.03413.B31
2
WLAN_EN_PWR_D1 2 WLAN_EN_PWR_R_R Wise: 1216

(R_)
10KR2J-3-GP
L
D
Q6104 (R_)
1
2N7002K-2-GP C6117
(R_) 2 SC1U10V2KX-1-LL-GP
G
Jun Carins-1A 11/12

SLP_WLAN_N For Lan sequence
H
2
A A
2
R6132
10KR2J-3-GP (R_)
(R_) C6116
1
1
Hsichih, Taipei
Title
Title
061_Mini card-WLAN
Size
Size DocumentNumber
Document Number Rev
Rev
C LA710 1
Date:
Sheet 61 of 107
5 4 3 2 1
5 4 3 2 1
+3D3V_SSD
NGFF(M Key)
+3D3V_SSD SSD1 +3D3V_SSD
NP2 NP1
H:PCIe
R6206 1 2 10KR2J-3-GP SSD_CLKREQ_PCH_N NP2 NP1 L:SATA
D 76 77 D
74 76 77 75 R6207 1 2 10KR2J-3-GP
72 3_3V GND 73
(R_) 70 3_3V GND 71
SUSCLK_PCH R6201 2 1 0R2J-2-GP SSD_SUSCLK 68 3_3V GND 69 HPGP_M2_SATA_DET#
SUSCLK_32KHZ PEDET(NC_PCIE/GND_SATA) 67
NC#67
58
(R_) 56 NC#58 57
EC_WAKE_N R6210 1 2 0R2J-2-GP NGFF_PEWAKE1_N 54 NC#56 GND 55 SSD_CLK100M_PCH_P
SSD_CLKREQ_PCH_N R6209 1 2 0R0402-PAD-2-GP SSD_CLKREQ_PCH_N_R 52 PEWAKE#/NC#54 REFCLKP 53 SSD_CLK100M_PCH_N
PLTRST_N R6208 1 2 0R0402-PAD-2-GP PLTRST_SSD_N 50 CLKREQ#/NC#52 REFCLKN 51
48 PERST#/NC#50 GND 49 SSD_PCIE0_TX_CON_P C6201 1 2 SCD22U10V2KX-1-LL-GPSSD_PCIE0_TX_P
46 NC#48 PETP0/SATA_A+ 47 SSD_PCIE0_TX_CON_N C6208 1 2 SCD22U10V2KX-1-LL-GPSSD_PCIE0_TX_N
PCIE SSD 44 NC#46 PETN0/SATA_A- 45
42 NC#44 GND 43 SSD_PCIE0_RX_P
[16] SSD_PCIE0_RX_N NC#42 PERP0/SATA_B-
40 41 SSD_PCIE0_RX_N
[16] SSD_PCIE0_RX_P NC#40 PERN0/SATA_B+
PCH_DEVSLP_N R6213 1 2 0R0402-PAD-2-GP DEVSLP_SSD_N 38 39
[16] SSD_PCIE0_TX_N DEVSLP GND
36 37 SSD_PCIE1_TX_CON_P C6209 1 2 SCD22U10V2KX-1-LL-GPSSD_PCIE1_TX_P
[16] SSD_PCIE0_TX_P NC#36 PETP1
34 35 SSD_PCIE1_TX_CON_N C6210 1 2 SCD22U10V2KX-1-LL-GPSSD_PCIE1_TX_N
32 NC#34 PETN1 33
[16] SSD_PCIE1_RX_N NC#32 GND
30 31 SSD_PCIE1_RX_P
[16] SSD_PCIE1_RX_P NC#30 PERP1
[16] SSD_PCIE1_TX_N +3D3V_SSD NC#28 PERN1
[16] SSD_PCIE1_TX_P 26 27
C NC#26 GND C
24 25 SSD_PCIE2_TX_CON_P C6211 1 2 SCD22U10V2KX-1-LL-GPSSD_PCIE2_TX_P
22 NC#24 PETP2 23 SSD_PCIE2_TX_CON_N C6212 1 2 SCD22U10V2KX-1-LL-GPSSD_PCIE2_TX_N
[16] SSD_PCIE2_RX_N NC#22 PETN2
20 21
[16] SSD_PCIE2_RX_P NC#20 GND
18 19 SSD_PCIE2_RX_P
[16] SSD_PCIE2_TX_N 3_3V PERP2
[16] SSD_PCIE2_TX_P 3_3V PERN2
14 15
12 3_3V GND 13 SSD_PCIE3_TX_CON_P C6213 1 2 SCD22U10V2KX-1-LL-GPSSD_PCIE3_TX_P
[16] SSD_PCIE3_RX_N 3_3V PETP3
10 11 SSD_PCIE3_TX_CON_N C6214 1 2 SCD22U10V2KX-1-LL-GPSSD_PCIE3_TX_N
[16] SSD_PCIE3_RX_P DAS/DSS#/LED1# PETN3
8 9
[16] SSD_PCIE3_TX_N NC#8 GND
6 7 SSD_PCIE3_RX_P
[16] SSD_PCIE3_TX_P NC#6 PERP3
4 5 SSD_PCIE3_RX_N
2 3_3V PERN3 3
3_3V GND 1
GND
https://vinafix.com
SKT-NGFF75P-166-GP
[18] SSD_CLK100M_PCH_N 170504 Leon : Check stand off location

[18] SSD_CLK100M_PCH_P
[18] SSD_CLKREQ_PCH_N H6201 H6202
STF276R160H105-GP STF256R113-UH286-GP +3D3V_S0 +3D3V_SSD
B [15,24] PLTRST_N B
R6202 2 1 0R5J-5-GP
[24,31,61] EC_WAKE_N
1
R6203 2 1 0R5J-5-GP
[17] HPGP_M2_SATA_DET#
+3D3V_S5
[20,61] SUSCLK_PCH
R6205 2 1 0R5J-5-GP (R_)
[19] PCH_DEVSLP_N
R6204 2 1 0R5J-5-GP (R_)

CLOSE TO PINS 2,4,12,14,16,18 CLOSE TO PINS 70, 72, 74
+3D3V_SSD +3D3V_SSD
C6205
C6206
C6207
C6202
C6203
C6204
SC10U6D3V3MX-LL-GP
SC10U6D3V3MX-LL-GP
SCD1U16V2KX-3-LL-GP
SCD1U16V2KX-3-LL-GP
SCD1U16V2KX-3-LL-GP
SCD1U16V2KX-3-LL-GP
1
A A
2
Hsichih, Taipei
Title
Title
062_M.2 card-SSD
Size
Size Document
DocumentNumber
Number Rev
Rev
B LA710 1
Date:
Sheet 62 of 107
5 4 3 2 1
5 4 3 2 1
D D
Reserved C
https://vinafix.com
B B
A A
Hsichih, Taipei
Title
063_Mini card-NGFF_(R)
A LA710 1
5 4 3 2 1
5 4 3 2 1
CON_GND
[95] BL_PWM_CONN 1 2
CON_GND
[55] INVERTER_EN PC6407
[24,55] LCD_ID_0 SC100P50V2JN-3-LL-GP
[24,55] LCD_ID_1 +19V_CON_VOUT
[24,55] LCD_ID_2
[24,55] LCD_ID_3
D D
ISEN1
ISEN2
ISW
21
20
19
18
17
16
[24,95] SMB_SIO_CLK +19V_CON_VOUT PU6401
[24,95] SMB_SIO_DAT +19V_DCBATOUT
ISEN1
ISEN2
VLED
GND
GNDP
ISW
PC6405
+19V_DCBATOUT
PL6401 PD6401 SC4D7U6D3V3KX-LL-GP
1 2 LX A K LDR 1 15
[55] RTN1 DRV GNDA CON_GND
CON_GND 1 2 VREF 2 14 ISEN3 PR6405
[55] RTN2 (R_) IND-33UH-87-GP OZ554_EMA 3 VREF ISEN3 13
SC1U100V6KX-LL-GP
SC1U100V6KX-LL-GP
SC1U100V6KX-LL-GP
SC1U100V6KX-LL-GP
SC1U100V6KX-LL-GP
BX310F-R1-00000-GP ISEN4 10KR2F-2-GP
[55] RTN3 1 2 OZ554_VIN 4 ENA ISEN4 12 1 2
PC6412
PC6413
PC6417
PC6416
PC6418
PC6411
(R_) ISET
[55] RTN4 (068.33010.1111) OZ554_PWM 5 VIN ISET 11 SSTCMP
PWM SSTCMP
8
7
6
5
STATUS
PR6402
1
PC6414 PC6415
1
D
D
D
D
PQ6401 10R2F-L-GP
SDA
SCL
LPF
PA010BV-GP PR6401 CON_GND
RT
SC10U25V5KX-LL-GP
SC10U25V5KX-LL-GP
2
2
100R2F-L1-GP-U
2
PR6418 PC6406
SC1KP50V2KX-1-LL-GP OZ554ALN-B-0-TR-GP
6
7
8
9
10
4 LDR_1 10R0805-PAD-2-GP-U
2 LDR
2
G
2
SSTCMP_1
S
S
S
STATUS
SMB_SIO_DAT
1
2
3
PR6419
LPF
RT
200R5J-GP SMB_SIO_CLK
ISW_1 1 2 ISW
CON_GND
1
1
PC6401
PR6406
1
1
SCD47U25V3KX-1LLGP
PR6420
D33R6F-GP
D33R6F-GP
PR6421
PC6404
SC68P50V2JN-1-LL-GP
SC1U10V2KX-1-LL-GP
PC6402
2
1
SCD1U25V2KX-LL-GP
PC6403
(R_)
1
PR6403 PR6404
1
0R1206-PAD-1-GP 100KR2F-L1-GP
2
1 2
1KR2F-3-GP
2
2
CON_GND
2
CON_GND
C C
CON_GND
https://vinafix.com
LCD_ID_0
LCD_ID_1 ISEN1 1 PR6407 2 RTN1
LCD_ID_2 Cable Spec
0R0402-PAD-2-GP
LCD_ID_3
ISEN2 1 PR6409 2 RTN2
1
(R_) (R_) (R_) 0R0402-PAD-2-GP

Panel Model ID0 ID1 ID2 Vout
1
PR6413 PR6411 PR6412 (R_) ISEN3 1 PR6408 2 RTN3

10KR2J-3-GP 10KR2J-3-GP 10KR2J-3-GP PR6422 0R0402-PAD-2-GP
10KR2J-3-GP ISEN4 1 PR6410 2 RTN4
2
0R0402-PAD-2-GP
0 0 0
2
0 0 1
0 1 0
B B
OZ554_EMA 1 PR64172 INVERTER_EN
10KR2F-2-GP
OZ554_PWM 1 PR64142 BL_PWM_CONN
10KR2F-2-GP
1 0 0
1
1
1
PR6416 PR6415 PC6408

PC6410 1 1 0
300KR2F-GP
300KR2F-GP
PC6409 SC27P50V2JN-2-LL-GP
SCD01U50V2KX-1-LL-GP SC1KP50V2KX-1-LL-GP
2
(R_)
2
1 1 1
CON_GND CON_GND
A A
Hsichih, Taipei
Title
Title
064_Converter board
Size
Size DocumentNumber
Document Number Rev
Rev
C LA710 1
Date:
Sheet 64 of 107
5 4 3 2 1
5 4 3 2 1
BUTTON BOARD Power button / B+ / B- / Panel on-off for A710

WEBCAM
TR6501
W EBCAM_USB20_P 1 2 W EBCAM_USB20_P_CON
W EBCAM_USB20_N 4 3 W EBCAM_USB20_N_CON
+3D3V_S5 +3D3V_DSW
D [24] EC_PANSWH_N FILTER-4P-195-GP D

[24] PANEL_ON_OFF PWR_SEQ = 21 SW 4
PANEL_ON_OFF 3 1
2
R6505 R6506 6 5
[15] BRIGHTNESS_PLUS
K
10KR2J-3-GP
10KR2J-3-GP
[15] BRIGHTNESS_MINUS D6504 4 2 PW RBTN_N
RB551V30-GP PANEL_ON_OFF CAM1
1
SW -TACT-4P-158-GP 8
(R_) +3D3V_W EBCAM
(A710_)
A
W EBCAM_USB20_P_CON 6
BRIGHTNESS_PLUS W EBCAM_USB20_N_CON 5
EC_PANSWH_N R6519 1 2 PW RBTN_N PW R_SEQ = 14 4
Serial Port 33R2F-3-GP PANEL_ON_OFF BRIGHTNESS_PLUS 3
SW 3
1
BRIGHTNESS_MINUS
CAM_DET_N CAM_DET_R
3
+3D3V_W EBCAM R6501 1 2 100R2J-2-GP 2
C6525
C6526
C6530
C6531
6 5
1
[24] B_RI#
1
+3D3V_S0 4 2
[24] B_CTS1# 7
[24] B_RTS1#
SW -TACT-4P-158-GP
[24] B_DSR1#
1
[24] B_DCD1# (A710_) CLX-CON6-19-GP
SC10P50V2JN-4-LL-GP
SC10P50V2JN-4-LL-GP (A710_)
ED6506 C6504
[24] B_RXD1
4
3
1
+3D3V_W EBCAM AZ5125-02S-R7G-GP SCD1U16V2KX-3-LL-GP
[24] B_DTR1#
RN6504
[24] B_TXD1
SRN10KJ-5-GP F6501 (R_) (R_)
2
SW 2 1 2
[24] EC_EXT_COM_RI BRIGHTNESS_MINUS +5V_S0
3 1 POLYSW -1D1A6V-10-GP
[15] COMPORT_DET_N
1
2
3
6 5 F6503
BRIGHTNESS_PLUS 1 2
BRIGHTNESS_MINUS +3D3V_S0
4 2 POLYSW -1D1A6V-10-GP
WEBCAM SW -TACT-4P-158-GP
(A710_)
SW 1
[15] CAM_DET_N PW RBTN_N 3 1
6 5
[16] W EBCAM_USB20_N
[16] W EBCAM_USB20_P PW R_SEQ = 14
4 2
SW -TACT-4P-158-GP
(A710_)
[27] DMIC_DATA
[27] DMIC_CLK
[15] DMIC_DET
C C
+3D3V_S0
DMIC
+3D3V_DMIC
+5V_S5
F6504
1 2
[24] EC_SUS_LED
POWER LED POLYSW -1D1A6V-10-GP
1
R6522
330R3F-1-GP
(A710_)
2
MIC1
8
A SYS_LED_PWR_P
DMIC_DATA EL6501 1 2 FCM1005KF-121T05-GP
DMIC_DATA_R 6
DMIC_CLK EL6502 1 2 FCM1005KF-121T05-GP DMIC_CLK_R 5
4
+3D3V_DMIC
3
DMIC_DET 2
1
LED1 C6502 C6503 7
SC33P50V2JN-LL-GP
SC33P50V2JN-LL-GP
LED-W -45-GP
(A710_) CLX-CON6-19-GP
2
K https://vinafix.com
+5V_S5
2
R6502
10KR2J-3-GP
1
Q6501 R6518
G EC_SUS_LED 1 2
PB_LED_PW R_2 D 100KR2F-L1-GP
Function pls check

B B
2N7002K-2-GP
Power button for V3

BTN1
+5V_S5 +5V_S5_FUNCTION
F6502 (V330_) 6
1 2 4
(R_) POLYSW -1D1A6V-10-GP PW RBTN_N 3
R6504 1 2 0R3J-0-U-GP PB_LED_PW R_2 PW R_SEQ = 14 2
COM2 +5V_S0
1
F6505
2
+5V_COMPORT_PW R C6505 1
SCD1U16V2KX-3-LL-GP
2
(V330_)
1
5
POLYSW -1D1A6V-10-GP CLX-CON4-30-GP

(V330_)
COM1
B_CTS1#_CONN 2 1 +5V_COMPORT_PW R
+5V_COMPORT_PW R
B_RTS1#_CONN B_RI#_CONN
B_DCD1#_CONN
4
6
3
5 B_DSR1#_CONN 170828 Leon:Change BTN1 to 020.K0308.0004 for SB
B_DTR1#_CONN 8 7 B_RXD1_CONN
EXT_COM_RI 10 9 B_TXD1_CONN
COM_DET_N
2
12 11
ED6508
AZ5125-02S-R7G-GP
TPAD24 TP6533 1 CLX-CONN12D-S2-GP
(R_)
+5V_COMPORT_PW R 1 TP6537 TPAD24
B_RI# 1 TP6536 TPAD24
B_CTS1# 1 TP6530 TPAD24
3
B_RTS1# 1 TP6528 TPAD24

B_DSR1# 1 TP6529 TPAD24
B_DCD1# 1 TP6534 TPAD24
COMPORT_DET_N R6517 1 2 0R0402-PAD-2-GP COM_DET_N B_RXD1 1 TP6532 TPAD24
B_DTR1# 1 TP6531 TPAD24
B_TXD1 1 TP6523 TPAD24
EXT_COM_RI 1 TP6535 TPAD24
COM_DET_N 1 TP6538 TPAD24
RN6501 EXT_COM_RI
A B_CTS1# 2 3 B_CTS1#_CONN C6511 1 2 SC180P50V2JN-1LLGP (R_) EC_EXT_COM_RI A
B_RI#
1
1 4
SRN33J-5-GP-U B_RI#_CONN C6508 1 2 SC180P50V2JN-1LLGP (R_) R6516
RN6502 470KR2J-2-GP
B_RTS1# 2 3 B_RTS1#_CONN C6513 1 2 SC180P50V2JN-1LLGP (R_)
B_DSR1# 1 4
C
2
SRN33J-5-GP-U B_DSR1#_CONN C6510 1 2 SC180P50V2JN-1LLGP (R_)

RN6503 EXT_COM_RI_R B Q6502
B_DCD1# 2 3 B_DCD1#_CONN C6512 1 2 SC180P50V2JN-1LLGP (R_) MMBT3904-3-GP
B_RXD1
1
1 4
E
B_RXD1_CONN
1
SRN33J-5-GP-U C6506 1 2 SC180P50V2JN-1LLGP (R_) R6515

RN6505 560KR2J-GP C6501
B_DTR1# 2 3 B_DTR1#_CONN C6509 1 2 SC180P50V2JN-1LLGP (R_) SC1KP50V2KX-1-LL-GP
2
B_TXD1 1 4
2
SRN33J-5-GP-U B_TXD1_CONN C6507 1 2 SC180P50V2JN-1LLGP (R_)

Hsichih, Taipei
Title
Title
065_COM/CAM/Button/MIC
Size
D LA710
Document Number Rev
1
5 4 3 2 1
D D
Reserved C
https://vinafix.com
B B
<Variant Name>
A A
Hsichih, Taipei
Title
066_HDMI Redriver_(R)
A LA710 1
5 4 3 2 1
5 4 3 2 1
D D
C
Reserved C
https://vinafix.com
B B
A A
Hsichih, Taipei
Title
067_THERMAL SENSOR HEAD_(R)
A LA710 1
5 4 3 2 1
5 4 3 2 1
D D
C C
[19,24,91] LPC_AD_SIO_P0
LPC DEBUG PORT
[19,24,91] LPC_AD_SIO_P1
[19,24,91] LPC_AD_SIO_P2 DBG1
11
[19,24,91] LPC_AD_SIO_P3 1
+3D3V_S0
[19,24,91] LPC_FRAME#_SIO
2 LPC_AD_SIO_P0
3 LPC_AD_SIO_P1
[19,91] LPC_CLK1_PCH24M_TPM LPC_AD_SIO_P2
4
https://vinafix.com
[24,31,61,91,95] EC_RSTOUT0_N 5 LPC_AD_SIO_P3
6 LPC_FRAME#_SIO
7 LPC_AD_RST_N
8
9 LPC_CLK1_PCH24M_TPM
10
12
B ACES-CON10-1-GP-U1 B
(X_)
EC_RSTOUT0_N R6801 1 20R0402-PAD-2-GP LPC_AD_RST_N
A A
Hsichih, Taipei
Title
Title
068_Debug_LPC
Size
Size Document
DocumentNumber
Number Rev
Rev
B LA710 1
Date:
Sheet 68 of 107
5 4 3 2 1
5 4 3 2 1
D D
C C
Reserved
https://vinafix.com
B B
A A
Hsichih, Taipei
Title
069_4K Panel_(R)
A LA710 1
5 4 3 2 1
5 4 3 2 1
D D
C
Reserved C
https://vinafix.com
B B
A A
Hsichih, Taipei
Title
070_G Sensor_(R)
A LA710 1
5 4 3 2 1
5 4 3 2 1
D D
Reserved
C C
https://vinafix.com
B B
A A
Hsichih, Taipei
Title
071_Thunderbolt_(1/5)_(R)
A LA710 1
5 4 3 2 1
5 4 3 2 1
D D
C
Reserved C
https://vinafix.com
B B
A A
Hsichih, Taipei
Title
A LA710 1
5 4 3 2 1
5 4 3 2 1
D D
C
Reserved C
https://vinafix.com
B B
A A
Hsichih, Taipei
Title
A LA710 1
5 4 3 2 1
5 4 3 2 1
D D
Reserved C
https://vinafix.com
B B
A A
Hsichih, Taipei
Title
A LA710 1
5 4 3 2 1
5 4 3 2 1
D D
Reserved C
https://vinafix.com
B B
A A
Hsichih, Taipei
Title
A LA710 1
5 4 3 2 1
5 4 3 2 1
D D
Reserved
C C
https://vinafix.com
B B
A A
Hsichih, Taipei
Title
076_GPU_function (1/5)_(R)
A LA710 1
5 4 3 2 1
5 4 3 2 1
D D
Reserved
C C
https://vinafix.com
B B
A A
Hsichih, Taipei
Title
A LA710 1
5 4 3 2 1
5 4 3 2 1
D D
C C
Reserved
https://vinafix.com
B B
A A
Hsichih, Taipei
Title
A LA710 1
5 4 3 2 1
5 4 3 2 1
D D
C C
Reserved
https://vinafix.com
B B
A A
Hsichih, Taipei
Title
A LA710 1
5 4 3 2 1
5 4 3 2 1
D D
Reserved C
https://vinafix.com
B B
A A
Hsichih, Taipei
Title
A LA710 1
5 4 3 2 1
5 4 3 2 1
D D
C C
Reserved
https://vinafix.com
B B
A A
Hsichih, Taipei
Title
081_GPU VRAM_1,2 (1/4)_(R)
A LA710 1
5 4 3 2 1
5 4 3 2 1
D D
Reserved C
https://vinafix.com
B B
A A
Hsichih, Taipei
Title
082_GPU VRAM_3,4 (2/4)_(R)
A LA710 1
5 4 3 2 1
5 4 3 2 1
D D
Reserved C
https://vinafix.com
B B
A A
Hsichih, Taipei
Title
083_GPU VRAM_5,6 (3/4)
A LA710 1
5 4 3 2 1
5 4 3 2 1
D D
C
Reserved C
https://vinafix.com
B B
A A
Hsichih, Taipei
Title
084_GPU VRAM_7,8 (4/4)
A LA710 1
5 4 3 2 1
5 4 3 2 1
D D
Reserved
C C
https://vinafix.com
B B
A A
Hsichih, Taipei
Title
085_GPU CORE_(solution)_(R)
A LA710 1
5 4 3 2 1
5 4 3 2 1
D D
Reserved
C C
https://vinafix.com
B B
A A
Hsichih, Taipei
Title
086_GPU discrete power_(R)
A LA710 1
5 4 3 2 1
5 4 3 2 1
D D
Reserved
C C
https://vinafix.com
B B
A A
Hsichih, Taipei
Title
087_GPU Switch_(1/2)_(R)
A LA710 1
5 4 3 2 1
5 4 3 2 1
D D
Reserved C
https://vinafix.com
B B
A A
Hsichih, Taipei
Title
088_GPU Switch_(2/2)_(R)
A LA710 1
5 4 3 2 1
5 4 3 2 1
D D
Reserved C
https://vinafix.com
B B
A A
Hsichih, Taipei
Title
089_GPU_EESwitchSEQ_OPTIMUS_(R)
A LA710 1
5 4 3 2 1
5 4 3 2 1
D D
C
Reserved C
https://vinafix.com
B B
A A
Hsichih, Taipei
Title
090_NFC_(R)
A LA710 1
5 4 3 2 1
5 4 3 2 1
+3D3V_TPM
2
R9101
+3D3V_TPM 0R2J-2-GP
(Nuvoton_,Infineon_)
1
2
2
1
1
C9106 C9107 C9102 C9103
SCD1U16V2KX-3-LL-GP
(Nuvoton_,ST_)
SC10U6D3V3MX-LL-GP
(Nuvoton_,Infineon_,ST_)
SC10U6D3V3MX-LL-GP
(Infineon_)
SCD1U16V2KX-3-LL-GP
C9101 C9104
1
SCD1U16V2KX-3-LL-GP
SC10U6D3V3MX-LL-GP
2
2
D D
SIO TPM
U9101
[15] TPM_DET_N (ST_,Infineon_)
TPM_VSB 1 2 TPM_NC2 R9109 1 2 0R2J-2-GP
[19,24,68,91] LPC_FRAME#_SIO VSB NC#2 3
8 NC#3 5
22 VHIO NC#5 7 TPM_NC7 R9112 1 2 4K7R2J-2-GP
VHIO NC#7 9 (R_)
[19,24,91] SER_IRQ NC#9 10
NC#10 11 +3D3V_TPM
[24,31,61,68,91,95] EC_RSTOUT0_N PCH_SLP_S0_N 1 2 0R2J-2-GP TCM_SDA 29 NC#11 12
R9118 (R_)
[19,68,91] LPC_CLK1_PCH24M_TPM SDA/GPIO0 NC#12 TPM_PWR_R
30 14 R9103 1 2 0R2J-2-GP
SPI_SIRQ# R9111 1 2 0R2J-2-GP (Nuvoton_,ST_,Infineon_) TPM_SPI_IRQ_N 18 SCL/GPIO1 NC#14 15 (Infineon_)
R9106 2 1 4K7R2J-2-GP (Infineon_) TPM_GPIO3 6 PIRQ#/GPIO2 NC#15 25
+3D3V_TPM GPIO3 NC#25
13 26 C9105 1 2 SCD1U16V2KX-3-LL-GP
SPI0_CS_TPM R9114 1 2 0R2J-2-GP (Nuvoton_,ST_,Infineon_) TPM_CS_N 20 GPIO4 NC#26 27 (Infineon_)
4 SCS#/GPIO5 NC#27 28
[15] SPI0_CS_TPM SPI0_SI_ROM TPM_MOSI PP/GPIO6 NC#28
R9110 1 2 33R2F-3-GP (Nuvoton_,ST_,Infineon_) 21 31
[16] SPI_SIRQ# MOSI/GPIO7 NC#31 32
[15,22,25] SPI0_SI_ROM LPC_RST_SIO NC#32
17
[15,25] SPI0_CLK_ROM PLTRST#
[15,22,25] SPI0_SO_ROM SPI0_CLK_ROM TPM_SCLK
R9113 1 2 33R2F-3-GP (Nuvoton_,ST_,Infineon_) 19 16
[20,24] PCH_SLP_S0_N SCLK GND 23
SPI0_SO_ROM R9108 1 2 33R2F-3-GP (Nuvoton_,ST_,Infineon_) TPM_MISO 24 GND 33 TPM_GND
MISO GND
2
NPCT750LAAYX-GP R9119
(Nuvoton_071.00750.0A03,Infineon_071.09670.0H03,ST_071.33232.0G03) 0R2J-2-GP
1
C C
+3D3V_S0
R9115 1 2 TPM_CS_N
+3D3V_TPM
10KR2J-3-GP (Nuvoton_,ST_,Infineon_)
+5V_S0
(R_)
1
(R_)
C9109 C9110
Q9101 SC10U6D3V3MX-LL-GP SCD1U16V2KX-3-LL-GP
2
G
TPM_DET_N D
+3D3V_TPM (R_)
1
C9108 EC_RSTOUT0_N S +3D3V_S5
https://vinafix.com
1
SCD1U16V2KX-3-LL-GP
R9123
R9117 R9122 1 2 0R2J-2-GP 2N7002K-2-GP Q9101_S 1 2 LPC_RST_SIO =Standby Power
+3D3V_S0
2
1KR2J-1-GP (R_) (Nuvoton_,ST_,Infineon_) Function = CRB:+V3P3A
(Nuvoton_,ST_,Infineon_) 33R2F-3-GP
1
+3D3V_S5 R9124 1 2 0R0402-PAD-2-GP (Nuvoton_,ST_,Infineon_) C9111
2
1
SC68P50V2JN-1-LL-GP C9113
(Nuvoton_,ST_,Infineon_) R9125 1 2 0R2J-2-GP (Nuvoton_,ST_,Infineon_) C9112 SCD1U16V2KX-3-LL-GP
2
(R_) SC10U6D3V3MX-LL-GP
2
(Nuvoton_,ST_,Infineon_)
(Nuvoton_,ST_,Infineon_)
+3D3V_S0
R9126 1 2 0R2J-2-GP TCM_VDD
B
(TCM_) 170504 Leon: Pin define need check B
(TCM_) (TCM_) (TCM_) (TCM_) (TCM_)

1
1 170828 Leon:Change TCM1 to 021.60871.0210

C9114 C9115 C9116 C9117 C9118
SCD1U16V2KX-3-LL-GP SCD1U16V2KX-3-LL-GP SCD1U16V2KX-3-LL-GP SCD1U16V2KX-3-LL-GP SC1U10V2KX-1-LL-GP
for SB
2
TCM1
1 2
3 4
[19,24,68,91] LPC_FRAME#_SIO A_RST#_TPM X
LPC interface R9127 1 2 0R2J-2-GP 5 6
[24,31,61,68,91,95] EC_RSTOUT0_N
(TCM_) 7 8
[19,24,68,91] LPC_AD_SIO_P3 9 10 LPC_AD_SIO_P2 [19,24,68,91]
[19,68,91] LPC_CLK1_PCH24M_TPM 11 12 LPC_AD_SIO_P1 [19,24,68,91]
[19,24,68,91] LPC_AD_SIO_P0 13 14
[19,24,68,91] LPC_FRAME#_SIO +3D3V_S0 15 16
R9128 TCM_DET_N_CONN TCM_CONN_P18 SER_IRQ [19,24,91]
17 18
[19,24,68,91] LPC_AD_SIO_P0 1 2 LPC_PD_N 19 20
[19,24,68,91] LPC_AD_SIO_P1
[19,24,68,91] LPC_AD_SIO_P2
1
4K7R2J-2-GP DER-CONN20A-FP-GP
[19,24,68,91] LPC_AD_SIO_P3
(R_) (TCM_) R9129
[19,24,91] SER_IRQ 0R2J-2-GP
(R_)
[24,31,61,68,91,95] EC_RSTOUT0_N
2
[19] LPC_PD_N
[15] TCM_DET_N
TCM_DET_N R9120 1 2 0R2J-2-GP TCM_DET_N_CONN

(TCM_)
A A
1
R9102
0R2J-2-GP
(R_)
2
Hsichih, Taipei
Title
Title
091_TPM/TCM
Size
Size DocumentNumber
Document Number Rev
Rev
C LA710 1
Date:
Sheet 91 of 107
5 4 3 2 1
5 4 3 2 1
PS2 KEYBOARD& PS2 MOUSE

(R_) +5V_KEYBRD_PW R
R9202 1 2 0R3J-0-U-GP
+5V_USB3_1
CNPS2
F9201 (A710_) 9 PS2_DET_N_R
1 2 1
+5V_KEYBRD_PW R
POLYSW -1D1A6V-10-GP R9201
PS2_DET_N 1 2 PS2_DET_N_R 2
3
(A710_) (A710_) KBCLOCK_FB 3
1
C9201 C9202 100R2J-2-GP MSCLOCK_FB 4 D9206
SCD1U16V2KX-3-LL-GP SC470P50V2KX-3-LL-GP (A710_) KBDATA_FB 5 BAV99H-GP
4
3
4
3
MSDATA_FB 6 (A710_)
[24] MSE_CONN_CLK
2
D 7 D
[24] MSE_CONN_DAT 1PS2_TP 8
RN9206 RN9210 AFTE30-GP TP9208
[24] KBD_CONN_DAT
2
SRN2K2J-1-GP SRN2K2J-1-GP 10
[24] KBD_CONN_CLK
(A710_) (A710_) +5V_KEYBRD_PW R
1
2
1
2
[15] PS2_DET_N KBD_CONN_DAT 1 2 FCM1005KF-121T05-GP KBDATA_FB
L9204 (A710_) CLX-CON8-26-GP
1
KBD_CONN_CLK KBCLOCK_FB (A710_) TP9207 AFTE30-GP
L9203 1 2 FCM1005KF-121T05-GP (A710_)
MSE_CONN_DAT L9202 1 2 FCM1005KF-121T05-GP (A710_) MSDATA_FB

PS2 KEYBOARD& PS2 MOUSE +5V_KEYBRD_PW R
MSE_CONN_CLK L9201 1 2 FCM1005KF-121T05-GP (A710_) MSCLOCK_FB EMC

+5V_KEYBRD_PW R
2016.05.19
Julian
07:DATA
1
EMC ED9201
12 11 08:NC KBCLOCK_FB MSCLOCK_FB
ED9205
1 6
09:GND AZ5125-02S-R7G-GP
10:VCC (R_)
10 9
11:CLK 2 5
1
(A710_) (A710_) (A710_) (A710_)
C9203 C9204 C9205 C9206 12:NC C9209
8 7
3
MSDATA_FB KBDATA_FB
2
3 4
SC33P50V2JN-LL-GP
SC33P50V2JN-LL-GP
SC33P50V2JN-LL-GP
SC33P50V2JN-LL-GP
SCD1U16V2KX-3-LL-GP
(R_)
1
AZC199-04S-R7G-GP
(A710_)
1:DATA
6 5 2:NC
3:GND
4:VCC
4 3
5:CLK
6:NC
2 1
C C
Parallel Port LPT_PD2 1

ED9202
6 LPT_PD1
+5V_S0
2 5
LPT_STB# 3 4 LPT_PD0
+5V_S0
EC_STB# L9205 (LPT_) 1 2 FCM1005KF-121T05-GP LPT_STB#
EC_AFD# L9206 (LPT_) 1 2 FCM1005KF-121T05-GP LPT_AFD# AZC199-04S-R7G-GP
EC_INIT# L9207 (LPT_) 1 2 FCM1005KF-121T05-GP LPT_INIT#
A
EC_SLIN# LPT_SLIN# (LPT_) (LPT_)
L9208 (LPT_) 1 2 FCM1005KF-121T05-GP
D9207
RB551V30-GP
EC_PD0 L9209 (LPT_) 1 2 FCM1005KF-121T05-GP LPT_PD0 LPT_STB# 1 TP9220 TPAD26-OP-GP
EC_PD1 L9210 (LPT_) 1 2 FCM1005KF-121T05-GP LPT_PD1
K
EC_PD2 L9211 (LPT_) 1 2 FCM1005KF-121T05-GP LPT_PD2 LPT_AFD# 1 TP9221 TPAD26-OP-GP
5V_PRA
EC_PD3 L9212 (LPT_) 1 2 FCM1005KF-121T05-GP LPT_PD3 +3D3V_S0
LPT_INIT# 1 TP9211 TPAD26-OP-GP
https://vinafix.com
ED9203
EC_PD4 L9213 (LPT_) 1 2 FCM1005KF-121T05-GP LPT_PD4 LPT_SLIN# 1 TP9212 TPAD26-OP-GP
EC_PD5 L9214 (LPT_) 1 2 FCM1005KF-121T05-GP LPT_PD5 LPT_PD3 1 6 LPT_PD4
EC_PD6 LPT_PD6
4
3
4
3
4
3
4
3
4
3
4
3
4
3
4
3
L9215 (LPT_) 1 2 FCM1005KF-121T05-GP LPT_PD0 1 TP9213 TPAD26-OP-GP +5V_S0
EC_PD7 L9216 (LPT_) 1 2 FCM1005KF-121T05-GP LPT_PD7
1
RN9203 RN9208 RN9207 RN9209 RN9204 RN9202 RN9205 RN9201 LPT_PD1 1 TP9214 TPAD26-OP-GP 2 5
R9220 R9203
SRN2K2J-1-GP
SRN2K2J-1-GP
SRN2K2J-1-GP
SRN2K2J-1-GP
SRN2K2J-1-GP
SRN2K2J-1-GP
SRN2K2J-1-GP
SRN2K2J-1-GP
EC_ERR# LPT_ERR# 2K7R2J-GP 100KR2J-1-GP LPT_PD2
L9217 (LPT_) 1 2 FCM1005KF-121T05-GP 1 TP9215 TPAD26-OP-GP
EC_ACK# LPT_ACK# (LPT_) (LPT_) LPT_PD5 LPT_PD6
L9218 (LPT_) 1 2 FCM1005KF-121T05-GP 3 4
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
EC_BUSY L9219 (LPT_) 1 2 FCM1005KF-121T05-GP LPT_BUSY LPT_PD3 1 TP9216 TPAD26-OP-GP
2
EC_PE L9220 (LPT_) 1 2 FCM1005KF-121T05-GP LPT_PE
EC_SLCT L9221 (LPT_) 1 2 FCM1005KF-121T05-GP LPT_SLCT LPT_PD4 1 TP9217 TPAD26-OP-GP AZC199-04S-R7G-GP
LPT_PD5 (LPT_)
(LPT_) (LPT_) (LPT_) (LPT_) (LPT_) (LPT_) (LPT_) (LPT_) 1 TP9218 TPAD26-OP-GP
LPT_PD6 1 TP9219 TPAD26-OP-GP
EC_STB# R9277 (R_) 1 2 33R3J-2-GP LPT_STB#
EC_AFD# R9204 (R_) 1 2 33R3J-2-GP LPT_AFD#
B LPT_PD7 1 TP9222 TPAD26-OP-GP B
EC_INIT# R9205 (R_) 1 2 33R3J-2-GP LPT_INIT#
EC_SLIN# R9206 (R_) 1 2 33R3J-2-GP LPT_SLIN#
LPT_ERR# 1 TP9224 TPAD26-OP-GP
LPT1 LPT_ACK# 1 TP9223 TPAD26-OP-GP
[24] EC_STB# 2 1
ED9204
[24] EC_AFD# LPT_BUSY 1
EC_PD0 1 2 33R3J-2-GP LPT_PD0 4 3 TP9225 TPAD26-OP-GP
[24] EC_INIT# R9207 (R_) LPT_PD7 LPT_ACK#
EC_PD1 LPT_PD1 1 6
[24] EC_SLIN# R9208 (R_) 1 2 33R3J-2-GP 6 5 LPT_PE +5V_S0
EC_PD2 LPT_PD2 1 TP9226 TPAD26-OP-GP
[24] EC_PD0 R9209 (R_) 1 2 33R3J-2-GP 8 7
[24] EC_PD1 EC_PD3 R9210 (R_) 1 2 33R3J-2-GP LPT_PD3 10 9 LPT_SLCT 1 TP9209 TPAD26-OP-GP 2 5
[24] EC_PD2 12 11
[24] EC_PD3 14 13
[24] EC_PD4 16 15 LPT_BUSY LPT_PE
3 4
[24] EC_PD5 18 17
[24] EC_PD6 EC_PD4 R9211 (R_) 1 2 33R3J-2-GP LPT_PD4 20 19
[24] EC_PD7 EC_PD5 R9212 (R_) 1 2 33R3J-2-GP LPT_PD5 22 21
[24] EC_ERR# EC_PD6 R9213 (R_) 1 2 33R3J-2-GP LPT_PD6 24 23 AZC199-04S-R7G-GP
[24] EC_ACK# EC_PD7 R9214 (R_) 1 2 33R3J-2-GP LPT_PD7 26 25 1 TP9210 TPAD26-OP-GP (LPT_)
[24] EC_BUSY
[24] EC_PE CLX-CONN26D-S-GP
[24] EC_SLCT (LPT_)
EC_ERR# R9215 (R_) 1 2 33R3J-2-GP LPT_ERR#

[15] LPT_PORT_DET_N EC_ACK# R9216 (R_) 1 2 33R3J-2-GP LPT_ACK#
EC_BUSY R9217 (R_) 1 2 33R3J-2-GP LPT_BUSY
EC_PE R9218 (R_) 1 2 33R3J-2-GP LPT_PE
EC_SLCT R9219 (R_) 1 2 33R3J-2-GP LPT_SLCT
ED9207
LPT_SLCT 1 6 LPT_AFD#
LPT_PORT_DET_N
+5V_S0
2 5
(LPT_) (LPT_) (LPT_) (LPT_) (LPT_) (LPT_) (LPT_) (LPT_) (LPT_) (LPT_) (LPT_) (LPT_) (LPT_) (LPT_) (LPT_) (LPT_) (LPT_)
1
1
(LPT_) LPT_ERR# 3 4 LPT_INIT#
EC9228 C9212 C9213 C9298 C9214 C9215 C9216 C9217 C9218 C9219 C9220 C9221 C9222 C9223 C9224 C9225 C9226 C9227
SC1KP50V2KX-1-LL-GP 2
2
AZC199-04S-R7G-GP
parallel port pin definition (LPT_)
ED9506
LPT_SLIN# 1
A
3 A
LPT_PORT_DET_N 2
AZ5125-02S-R7G-GP
(LPT_)
Hsichih, Taipei
TitleTitle
092_PS2
SizeSize Document
Document Number
Number RevRev
D LA710 1
Date:
Sheet 92 of 107
5 4 3 2 1
5 4 3 2 1
D D
Reserved C
https://vinafix.com
B B
A A
Hsichih, Taipei
Title
093_Express Card_(R)
A LA710 1
5 4 3 2 1
5 4 3 2 1
D D
C
Reserved C
https://vinafix.com
B B
A A
Hsichih, Taipei
Title
094_Smart Card_(R)
A LA710 1
5 4 3 2 1
5 4 3 2 1
TO LVDS CONN
[55] EDP_TXE3+
[55] EDP_TXE3-
[55] EDP_TXEC+
TRANSLATER PS8625
[55] EDP_TXEC-
[55] EDP_TXE2+
[55] EDP_TXE2-
[55] EDP_TXE1+
[55] EDP_TXE1-
PN:071.08625.003
[55] EDP_TXE0+
[55] EDP_TXE0- +3D3V_S0
+1D2V_PW R +VDD12RX
[55] EDP_TXO3+ L9507
(R_)
[55] EDP_TXO3- R9517 1 2 10KR2J-3-GP SCALAR_LVDS_BLTEN 1 2 SCD1U16V2KX-3-LL-GP SCD01U50V2KX-1-LL-GP
[55] EDP_TXOC+
[55] EDP_TXOC-
SC1U10V2KX-1-LL-GP
1
2
BLM15PX121SN1D-GP C9504 C9505
[55] EDP_TXO2+ R9511 1 2 4K7R2J-2-GP BL_PW M_CONN C9506 C9508 C9507
[55] EDP_TXO2- (R_) SCD01U50V2KX-1-LL-GP
[55] EDP_TXO1+
1
[55] EDP_TXO1- R9513 1 2 4K7R2J-2-GP PS8625_Panel_ON SCD01U50V2KX-1-LL-GP +VDD33AUD
[55] EDP_TXO0+ (R_)
D [55] EDP_TXO0- D
FROM CPU eDP
1
C9518
SCD1U25V2KX-LL-GP
2
EDP_BKLTCTL
[7] eDP_TX_CPU_P1
[7] eDP_TX_CPU_N1
[7] eDP_TX_CPU_P0
[7] eDP_TX_CPU_N0
[7] eDP_AUX_CPU_N
EDP_TXEC+
EDP_TXE0+
EDP_TXE1+
EDP_TXE2+
EDP_TXEC-
EDP_TXE0-
EDP_TXE1-
EDP_TXE2-
[7] eDP_AUX_CPU_P
+3D3V_S0 EDP_TXE3-
EDP_TXE3+
[17] EDP_BKLTCTL +3D3V_S0 +VDD33
1MR2J-1-GP
[16] eDP_HPD_PCH L9501
1
1 2 SCD1U16V2KX-3-LL-GP SCD1U16V2KX-3-LL-GP
56
55
54
53
52
51
50
49
48
47
46
45
44
43
R9524
(R_) U9502
1
BLM15PX121SN1D-GP
NC#56
NC#55
VDDIO
TCK0N
TA0N
TB0N
TC0N
TCK0P
PWMI
TD0N
TA0P
TB0P
TC0P
TD0P
C9511 C9523 C9524 C9536 C9546
2 SC10U6D3V3MX-LL-GP SCD1U25V2KX-LL-GP
2
eDP_AUX_CPU_P C9532 1 2 SCD1U16V2KX-3-LL-GP AUX_CHP
SCD1U16V2KX-3-LL-GP AUX_CHN 1 42 EDP_TXO0-
AUX_CHP 2 DAUXN TA1N 41 EDP_TXO0+
3 DAUXP TA1P 40 EDP_TXO1-
LANE0P 4 GND TB1N 39 EDP_TXO1+
LANE0N 5 DRX0P TB1P 38 +VDD33AUD
+VDD12RX 6 DRX0N VDDIO 37 EDP_TXO2-
LANE1P 7 VDDRX TC1N 36 EDP_TXO2+
eDP_AUX_CPU_N +VDD33AUD 8 DRX1P TC1P 35 EDP_TXOC-
C9533 1 2 SCD1U16V2KX-3-LL-GP AUX_CHN LANE1N
DRX1N TCK1N
SCALAR_RESET 9 34 EDP_TXOC+
+3D3V_S0 L9502 SCALAR_PD# RST# TCK1P PS8625_Panel_ON
10 33
1 2 SCD1U16V2KX-3-LL-GP DP_HOT_PLUG 11 PD# ENPVCC 32 EDP_TXO3-
BL_PW M_CONN HPD TD1N EDP_TXO3+ RN9506
12 31
1
RLV_LNK/GPIO0
PWMO TD1P
1MR2J-1-GP
SC1U10V2KX-1-LL-GP
1
2
BLM15PX121SN1D-GP C9522 +VDD33 13 30 PS8625_ROM1_DAT 2 3
+VDD33
R9528
VDDIOX DDC_SDA
CSDA/MSDA
PS8625_ROM1_CLK
SW_OUT#15
SW_OUT#16
14 29 1 4
CSCL/MSCL
C9534 C9535 +VDD33
TESTMODE
(R_) VDDIOX DDC_SCL
RLV_AMP
RLV_CFG
1
57
VDD12
ENBLT
GND
GNDX
GNDX
SRN2K2J-1-GP
2
REXT
GND
PS8625QFN56GTR-A0-U12A-1-GP
15
16
17
18
19
20
21
22
23
24
25
26
27
28
L9508
1 2 PS8625_SW
+1D2V_PWR
C
@ Close to pin15/16 C
1
IND-2D2UH-250-GP-U PS8625_RLV_AMP R9527
C9501 PS8625_REXT 1 2 4K99R2F-L-GP
SC4D7U6D3V3KX-LL-GP
2
+1D2V_PWR PS8625_ROM2_CLK +VDD33
PS8625_ROM2_DAT
SCALAR_LVDS_BLTEN
ECIO
1
eDP_TX_CPU_P1 C9556 1 2 SCD1U16V2KX-3-LL-GP LANE1P PS8625_RLV_CFG
PS8625_RLV_LNK
1
C9521 C9550
eDP_TX_CPU_N1 C9555 1 2 SCD1U16V2KX-3-LL-GP LANE1N SCD1U25V2KX-LL-GPSCD01U50V2KX-1-LL-GP R9502
2
4K7R2J-2-GP U9505
[24,64] SMB_SIO_CLK eDP_TX_CPU_P0 C9554 1 2 SCD1U16V2KX-3-LL-GP LANE0P (R_)
[24,64] SMB_SIO_DAT 8 1
VCC E0
2
eDP_TX_CPU_N0 C9553 1 2 SCD1U16V2KX-3-LL-GP LANE0N (R_) PS8625_ROM1_W C# 7 2
PS8625_ROM1_CLK R9503 1 2 0R2J-2-GP PS8625_ROM1_CLK_R 6 WC# E1 3
PS8625_ROM1_DAT PS8625_ROM1_DAT_R 5 SCL E2 4
AC Cap place near SCALAR R9504 1 2 0R2J-2-GP
SDA VSS
(R_)
M24C02RMN6TP-GP
(R_072.24C02.0001)
https://vinafix.com
# Reset Circuit :
[64] BL_PW M_CONN
+VDD33AUD
+VDD33AUD Mode Configure Table(Power On Latch)
[55] SCALAR_LVDS_BLTEN
[24,55] PS8625_Panel_ON
+VDD33AUD PS8625_RLV_LNK
(internal PD 80K ohm)
1
1
R9520 PS8625_RLV_LNK R9546 1 2 4K7R2J-2-GP

R9519 10KR2J-3-GP L:Single link LVDS
[24,31,61,68,91] EC_RSTOUT0_N 10KR2J-3-GP R9541 1 2 4K7R2J-2-GP
H:Dual link LVDS
[39] SCALAR_PD#
2
R9505 (R_)
2
SCALAR_PD# SCALAR_RESET 1 2 EC_RSTOUT0_N
(R_) 0R2J-2-GP
1
C9531
1
B B
+VDD33AUD PS8625_RLV_CFG
2
L: 8-bit LVDS, VESA mapping

2
PS8625_RLV_CFG R9547 1 (R_) 2 4K7R2J-2-GP

M: 8-bit LVDS, JEIDA mapping
R9542 1 2 4K7R2J-2-GP
H: 6-bit LVDS, both VESA and JEIDA mapping
FROM CPU PORT D Main Link R9501 PS8625_RLV_AMP

PS8625_RLV_AMP 1 2 4K99R2F-L-GP LVDS output swing control
Connect to a 4.99kΩ resistor to ground for default
output swing. The output swing can be adjusted by
changing the resistor value.
EEPROM Mode
In EEPROM mode, an additional EEPROM is needed.
EP Mode
EEPROM should configure with following condition.
FROM PCH PORT D AUX CH- Link/Device/HPD +3D3V_S0
SCD1U25V2KX-LL-GP
+3D3V_S0 I2C address=0xA8
+3D3V_S0
Q9501
1
(R_)
G C9530
R9530
2
D DP_HOT_PLUG_D 1 2 DP_HOT_PLUG PS8625(T) F/W U9504
1
1KR2J-1-GP
ECIO
eDP_HPD_PCH S PS8625_ROM2_DAT R9533 1 2 0R2J-2-GP (R_) MIICSDA_R 5 4
2
R9529
2
100KR2F-L1-GP PS8625_ROM2_CLK R9534 1 2 0R2J-2-GP (R_) MIICSCL_R 6 SDA VSS 3
R9575 R9576 PS8625_RLV_LNK PS8625_RLV_LNK_R SCL E2
R9536 1 2 0R2J-2-GP (R_) 7 2
2N7002K-2-GP 4K7R2J-2-GP 4K7R2J-2-GP 8 WC# E1 1
VCC E0
2
(R_) (R_) (R_)

R9531
1
1
A A
0R0402-PAD-2-GP
R9567 1 2 PS8625_ROM2_CLK 1 2 SMB_SIO_CLK M24C02RMN6TP-GP
0R0402-PAD-2-GP (R_072.24C02.0001)
R9532
PS8625_ROM2_DAT 2 SMB_SIO_DAT
0R0402-PAD-2-GP
1
<Variant Name>
Hsichih, Taipei
TitleTitle
095_Translator PS8625/eDP SW
SizeSize Document
Document Number
Number RevRev
D LA710 1
Date: Sheet
5 4 3 2 1
5 4 3 2 1
D D
Reserved
C C
https://vinafix.com
B B
A A
Hsichih, Taipei
Title
096_MCU_(R)
A LA710 1
5 4 3 2 1
5 4 3 2 1
D D
C
Reserved C
https://vinafix.com
B B
A A
Hsichih, Taipei
Title
097_Intel LAN_(R)
A LA710 1
5 4 3 2 1
5 4 3 2 1
D D
C C
https://vinafix.com
B B
A A
Hsichih, Taipei
Title
098_LAN Switch_(R)
A LA710 1
5 4 3 2 1
5 4 3 2 1
+3D3V_DSW
XDP (CPU) XDP1

NP1
2
1 2
R9901
H_PREQ_N 3 4 TPEV_SKL_PCUSTB_0_DP 1KR2J-1-GP
H_PRDY_N 5 6 TPEV_SKL_PCUSTB_0_DN (XDP_)
7 8 R9909
1
TPEV_SKL_PCUDEBUG_0 9 10 TPEV_SKL_PCUDEBUG_8 SW_ON_N 1 2 XDP_HOOK1
D TPEV_SKL_PCUDEBUG_1 11 12 TPEV_SKL_PCUDEBUG_9 D
[4,21] H_PREQ_N 13 14 0R0402-PAD-2-GP
1
TPEV_SKL_PCUDEBUG_2 15 16 TPEV_SKL_PCUDEBUG_10 C9901
[4] TPEV_SKL_PCUSTB_0_DP TPEV_SKL_PCUDEBUG_3 TPEV_SKL_PCUDEBUG_11
17 18 SCD1U16V2KX-3-LL-GP
[4] TPEV_SKL_PCUSTB_0_DN 19 20
(XDP_) (XDP_)
2
TPEV_SKL_MBP_0 R9906 1 2 0R2J-2-GP TPEV_SKL_XDP_MBP_0 21 22 TPEV_SKL_PCUSTB_1_DP
[4] TPEV_SKL_PCUSTB_1_DP TPEV_SKL_MBP_1 R9915 1 2 0R2J-2-GP TPEV_SKL_XDP_MBP_1 23 24 TPEV_SKL_PCUSTB_1_DN
[4] TPEV_SKL_PCUSTB_1_DN 25 26
(XDP_) TPEV_SKL_PCUDEBUG_4 27 28 TPEV_SKL_PCUDEBUG_12
[4,21] H_PRDY_N
TPEV_SKL_PCUDEBUG_5 29 30 TPEV_SKL_PCUDEBUG_13
31 32 +0D95V_VCCIO_S0
[4] TPEV_SKL_PCUDEBUG_0 TPEV_SKL_PCUDEBUG_6 33 34 TPEV_SKL_PCUDEBUG_14
[4] TPEV_SKL_PCUDEBUG_1 TPEV_SKL_PCUDEBUG_7 35 36 TPEV_SKL_PCUDEBUG_15
[4] TPEV_SKL_PCUDEBUG_2
1
37 38
[4] TPEV_SKL_PCUDEBUG_3 PCH_RSMRST_N R9908 1 2 1KR2J-1-GP XDP_HOOK0 39 40 PCH_CLK100M_XDP_P R9903
[4] TPEV_SKL_PCUDEBUG_4 XDP_HOOK1 PCH_CLK100M_XDP_N
(XDP_) 41 42 150R2F-1-GP
[4] TPEV_SKL_PCUDEBUG_5 2 0R3J-0-U-GP VCC_OBS_AB_CPU VCC_OBS_CD_CPU R9902
+1D05V_PCH_S5 R9911 1 43 44 1 2 0R3J-0-U-GP
+1D05V_PCH_S5 (XDP_)
[4] TPEV_SKL_PCUDEBUG_6 XDP_HOOK2 45 46 XDP_HOOK6
(XDP_) (XDP_)
2
XDP_HOOK3 47 48 FP_RST_N R9904 1 2 1KR2J-1-GP R9905
[4] TPEV_SKL_PCUDEBUG_8 +3D3V_S0
49 50 (XDP_) XDP_HOOK2 1 2 TPEV_SKL_PCUDEBUG_0
[4] TPEV_SKL_PCUDEBUG_9 SMB_DATA_MAIN H_TDO
51 52
1
SMB_CLK_MAIN 53 54 H_TRST_N C9902 1K5R2F-2-GP
[4] TPEV_SKL_PCUDEBUG_11 PCH_JTAG_TCK 55 56 H_TDI SCD1U16V2KX-3-LL-GP (XDP_)
[4] TPEV_SKL_PCUDEBUG_12 H_TCK H_TMS
57 58 (XDP_)
C [4] TPEV_SKL_PCUDEBUG_13 C
2
59 60
NP2
[4] TPEV_SKL_PCUDEBUG_15 +3D3V_S5
[4] TPEV_SKL_MBP_0
[4] TPEV_SKL_MBP_1 SMC-CONN60A-19-GP
2
(XDP_)
[18] PCH_CLK100M_XDP_N R9912
[18] PCH_CLK100M_XDP_P 2K2R2J-2-GP
(XDP_)
[20,40] PCH_RSMRST_N R9913
1
SPI0_SI_XDP 1 2 XDP_HOOK3
[20,24] SW_ON_N
1K5R2F-2-GP
1
[15] SPI0_SI_XDP (XDP_) C9903
SCD1U16V2KX-3-LL-GP
https://vinafix.com
R9914
[20] PCH_ITP_PMODE (R_)
2
H_TRST_N 1 2
[4,21] H_TRST_N
[4,20] H_TDO
[4,20] H_TDI (R_) 51R2J-2-GP
[4,20] H_TMS
[4,20] H_TCK +1D05V_PCH_S5
[20] PCH_JTAG_TCK
B [20] FP_RST_N B
2
R9907
[11,13,20] SMB_DATA_MAIN
2K2R2J-2-GP
[11,13,20] SMB_CLK_MAIN
(XDP_)
R9910
R9916
1
PCH_JTAG_TCK 1 2 PCH_ITP_PMODE 1 2 XDP_HOOK6
(R_) 51R2J-2-GP 0R0402-PAD-2-GP
XDP
(PCH)
A A
Hsichih, Taipei
Title
Title
099_XDP&ITP
Size
Size Document
DocumentNumber
Number Rev
Rev
B LA710 1
Date:
Sheet 99 of 107
5 4 3 2 1
5 4 3 2 1
D D
LABEL
LBL1 SN LBL
LABEL 40.3KR24.011 -> 30 x (10+7)mm => for L6
(40.3KR24.011)
LAN ID :
F80F4105EB9A 40.3BZ24.011 -> 30x15mm => for L10
LBL2
C LABEL C
LAN ID : (R_)
F80F4105EB9A
LBL3
LABEL
LAN ID : (R_)
F80F4105EB9A
SKT1 SKT2 SKT3
LBL4 For MP
LABEL
LAN ID : (R_45.3E702.001)
F80F4105EB9A
LBL5 For CTN LBL

LABEL
https://vinafix.com
LAN ID : (R_45.ACA01.011)
F80F4105EB9A
Battery Symbol Load Plate Back Plate ILMCOVER

(022.70001.0101) (22.78006.011) (22.78005.281)
Second source: Second source: Second source:

BTT2
BATTERY CR2032
(23.20023.001) 022.70001.0511 0022.70001.0121 22.78005.171
B B
A A
Hsichih, Taipei
Title
100_Label_RTC BATT
C LA710 1
5 4 3 2 1
5 4 3 2 1
D D
C C
https://vinafix.com
B B
A A
Hsichih, Taipei
Title
101_GPIO table
E LA710 1
5 4 3 2 1
5 4 3 2 1
N35 POWER ON SEQUENCE

DMI Message (PCH_SYSPWROK)
N34
(PCH_PLTRST_N)
AND (H_PWRGD)
(PCH_PWROK)
PLTRST# From PCH1 AV29 to ESIO / SSD

Page=15 PLTRST_N From PCH1 AG5 to CPU1 E7
Page=17 H_VIDSCK_VR
From ECIO Waiting 300~500ms to PCH

N33
SYS_PWROK From U2402 pin81
Page=20 PCH_SYSPWROK
D
Feedback CPU SVIDH_VIDSOUT_VR
BUS N32
From CPU1 to U4601 D
Page=46
Page=46 H_VIDSCK_VR
Page=46 H_VIDALERT_N_VR
Lock and Keeping
N31
PROCPWRGD
Page=40 H_PWRGD
From PCH1 AE3 to CPU1 F8
VccCORE Value
N30
VCCST_PWRGD R4052.2
Page=40 VCCST_PWRGD
N29
ALL_SYS_PWRGD R4043.2
Page=40 PCH_PWROK
N28
VR_READY PU4601 pin6
Page=46 VR_READY
N27
V_CORE/VCCGT
Page=47 +1V_CPU_CORE
PL4701-PL4704
PL4903
Page=49 +1V_GFX_CORE
N26
VCCIO_PWRGD R4005
VR_ENABLE
Page=40 VR_ENABLE
N25
VCCIO/VCCSA PL5002
PR5056
Page=50 +0D95V_VCCIO_S0
Page=50 +1D05V_VCCSA_S0
N24
VCCIO_ENABLE R4021
Page=40 PCH_VCCIO_EN
N23
+12/VCC/VCC3/0D6V
Page=40 +12V_S0
PR5315/PR4202/
C PR4204/PR5141 C
Page=40 +5V_S0
Page=40 +3D3V_S0
Page=40 +0D6V_VREF_S0
N22
ECIO_PSON* From U2402 pin60
Page=24 SIO_PSON_N
N21
SLP_S3# PR4201.1
Page=20 SLP_S3_N
VPP/VDDQ/VCCST N20
PR5133/PR5124
Page=51 +2D5V_VPP U801 pin7 pin8
Page=51 +1D2V_S3
Page=4 +1V_VCCST_S3
N6
N19
SLP_S4# PCH1 BE42
Non-Deep S5 Press Botton Page=20 SLP_S4_N
https://vinafix.com
N18
S5 +3D3V_NGFF_WLAN Q6103.D
TO
Page=61 +3D3V_NGFF_WLAN
S0
N17
SLP_WLAN# From PCH1 BD42 to Q6104 (Reserve WLAN PWR control)
Note:WLAN==>
If using WLAN, connect signal to control
Page=61 SLP_WLAN_N WLAN subsystem power. If not using WLAN, signal
may be left as NC.
N16
3D3V_LAN From U2402 pin 90
to U3102 (LAN PWR control)
Page=31 EC_LAN_PWR_EN
N15
SLP_LAN# TP2001
Note:LAN==>
Page=20 SLP_LAN_N If using integrated LAN, connect
signal to control PHY subsystem power. If not using
integrated LAN, signal may be left as NC.
Start Location(When==>
N14 ==>Start Location(Follow SLP_S3_N When
SLP_A TP2005
SYS from S5 To S0)
SYS from EUP To S0)
B
Page=20 SLP_A# B
N13
SUS_ACK
Deep S5 Press Botton
R2041 ( connect to PCH1 BC37 =SUSWARN_N )

Page=20 SUSACK_N
N12
Page=20
SUSCLK
SUSCLK_PCH
PCH1 BE45 (Reserve for WLAN susclk ) / Strap setting
N11
Page=20
SUSWARN#
SUSWARN_N
R2041 ( connect to PCH1BE35 =SUSACK_N )
N10
Page=20
RSMRST#
PCH_RSMRST_N
From U2402 pin 101
to PCH1 BA47
Page=45
VccSUS
+5V_S5
N9
PR4507 / U4102 pin7 pin8
Page=41 +3D3V_S5 / PR5305 / PG5206
Page=53 +1D8V_S5(Reserve)
Page=52 +1D05V_PCH_S5
N8
SLP_SUS#
From PCH1 BD39 to enable S5 power rail ( if get DPWROK event)
Page=20 SLP_SUS_N
N7
SW_ON_N From U2402 pin 60
to PCH1 BE46
Page=24 SW_ON_N
N6
Press Power Button PWRBTN# From funtion button key (SW4)
to U2402 pin 61
Page=65 EC_PANSWH_N
N5
Page=20
DPWROK
PCH_SIO_DPWROK
From U2402 pin 73
to PCH1 AW41
A A
VccDSW N4
Plug PSU S5 Page=45
Page=45
+5V_DSW
+3D3V_DSW_1
PR4527/PR4529
+3D3V_DSW_1 connect to U2402 & PCH1
RTCCLK N3
Page=18 (PCH_RTCX1) X1801.1
G3
Page=20
RTCRST
PCH_RTCRST_PULLUP
N2
R2049.2 / R2046.2
PCH_SRTCRSTB_PULLUP
Hsichih, Taipei
N1
Page=25
VccRTC
+3V_RTC
D2501.3 Title
102_Power sequence
Custom LA710 1
5 4 3 2 1
5 4 3 2 1
POWER MAP S0
+1V_GFX_CORE
S5 S3 +19V_DCBATOUT
+1V_CPU_CORE
+2D5V_VPP
+5V_S5 PU4601
G3 +3D3V_DSW
+3D3V_DSW_1
+3D3V_S5
(PCH)
PU5104 VR_ENABLE
NCP81220MNTXG-GP
PWM CPU
VCORE
(PCH)
D D
VCCGT
U4102 RT8068AZQWID-GP-U PAD
19V ADAPTER (EC)
TPS22965DSGR-1-GP
PAD PWR_2V5_EN
VPP
+0D6V_VREF_S0
PR4529 DDR4 ONLY DDR4
+19V_DCBATOUT PWR_3D3V_S5_EN VTT
+1D2V_S3
+3D3V_DSW_1
+19V_DCBATOUT
+1D05V_VCCSA_S0
+5V_S5 +19V_DCBATOUT
PAD
PU5102
PU4501 PU5001
PWR_3D3V_EN2 PAD RT8207MZQW-GP-U PAD
DDR4 NCP5230MNTWG-GP-U
RT6576DGQW2-GP PWR_VDDQ_EN CPU CPU
PAD VDDQ PWR_VCCSA_EN VCCSA
PWM VCCPLL_OC
+3D3V_S5 R3101(R_) DDR_VTT_CNTL_L4
+3D3V_LAN
PWR_5V_EN1
R807(R_) +0D95V_VCCIO_S0
(LAN) +1V_VCCST_S3 +19V_DCBATOUT
+1D05V_PCH_S5
U3102
PU5003
PAD U801
EC_LAN_PWR_EN TPS22965DSGR-1-GP RT8237EZQW-2-GP
TPS22965DSGR-1-GP CPU
CPU PWR_VCCIO_EN VCCIO
+3D3V_S5 SLP_S4_N VCCST
R6131 +3D3V_NGFF_WLAN
+3D3V_DSW VCCPLL
+5V_S0
(WLAN) +5V_S5
+3V_RTC +5V_S5 +5V_USB3_1 +3D3V_S0
Q6103 (R_) +3D3V_DSW_1
HDD
C AO3413L-GP U4201 ODD C
BATTERY SLP_WLAN_N 7002 PAD CODEC

U3601 APL3523AQBI-TRG-GP
D2501 PAD
UP7549TMA5-20-GP PWR_S0_EN
USB3.1 *1
+5V_S5 +5V_USB_CHARGER
SLP_S4_N +12V_S0
+19V_DCBATOUT
U3401
PU5403
TPS2546RTER-GP +5V_S5 +5V_USB3_23
CHARGER NCP1589AMNTWG-GP-U2 HDD PAD
ECIO_CHAR_EN (USB3.0 CHARGER) FAN
PWR_12V_COMP
U3602
+5V_S5 +5V_USB3_5
UP7549TMA5-20-GP
USB3.1 *2
+1D5V_S0
SLP_S4_N +3D3V_S0
U3603
UP7549TMA5-20-GP +5V_S5 +5V_USB3_4 U5303
https://vinafix.com
(SMART_PWR_ON)
EC_USB_PWRON USB3.1 *1 APL5933CKAI-TRG-1-GP PAD
+19V_DCBATOUT +1D05V_PCH_S5 U3502 +3D3V_S0 AUDIO CODEC
(PCH) UP7549TMA5-20-GP
(Debug)
PU5201 USB3.1 *1
SLP_S4_N
RT8237CZQW-2-GP
PWR_1D0V_EN PAD
+2D5V_VPP
+3D3V_S5
B B
+3D3V_S0
+1D8V_S5
+19V_DCBATOUT
(PCH) PU5105 (R_) Converter
U5302 RT8068AZQWID-GP-U PAD

PWR_2V5_EN
APL5933CKAI-TRG-1-GP PAD
PWR_1D8V_EN VPP
DDR4 ONLY
A A
Hsichih, Taipei
Title
103_Power delivery chart
D LA710 1
5 4 3 2 1
5 4 3 2 1
D D
+3D3V_S5 +3D3V_S0
XDP DIMM1 DIMM2
R R R R ADR: ADR: ADR:

Intel PCH H B360
SMBCLK SMB_CLK_RESUME SMB_CLK_MAIN

SMBUS
SMBDATA SMB_DATA_RESUME Isolation SMB_DATA_MAIN
SML1CLK
C C
SML1DATA
+3D3V_S5 https://vinafix.com
+3D3V_DSW +3D3V_S0
Translator Convertor
R R R R R R ADR: ADR:
SIO NCT6685D
SML1CLK_PCH EC_SMBCLK2
B
SMBUS MSCL2 MSCL1 SMB_SIO_CLK B
SML1DATA_PCH Isolation EC_SMBDAT2

MSDA2 MSDA1 SMB_SIO_DAT
A A
Hsichih, Taipei
Title
104_SMBUS table
C LA710 1
5 4 3 2 1
5 4 3 2 1
Intel CNL PCH H B360
PCH_CLK100M_XDP_N
CLKOUT_ITPXDP# 100MHz PCH_CLK100M_XDP_P XDP
CLKOUT_ITPXDP_P
D CLKOUT_CPUPCIBCLK# 100MHz CPU_PCIBCLK100M_PCH_N D
CLKOUT_CPUPCIBCLK_P CPU_PCIBCLK100M_PCH_P PCIE

CLKOUT_CPUBCLK_P
100MHz CPU_BCLK100M_PCH_P
CLKOUT_CPUBCLK#
CPU_BCLK100M_PCH_N CPU <> PCH
CLKOUT_PCIE_N0
CLKOUT_PCIE_P0
CLKOUT_PCIE_N1
CLKOUT_PCIE_P1
CLKOUT_PCIE_N2
CLKOUT_PCIE_P2
CLKOUT_PCIE_N3
CLKOUT_PCIE_P3
CLKOUT_PCIE_N4 100MHz WLAN_CLK100M_PCH_N
CLKOUT_PCIE_P4 WLAN_CLK100M_PCH_P WLAN
CLKOUT_PCIE_N5 100MHz
CLKOUT_PCIE_P5 LAN_CLK100M_PCH_N 25MHz LAN_XTALO
C
LAN_CLK100M_PCH_P LAN_XTALI C
CLKOUT_PCIE_N6
CLKOUT_PCIE_P6 LAN
CLKOUT_PCIE_N7
CLKOUT_PCIE_P7
CLKOUT_PCIE_N8
CLKOUT_PCIE_P8
https://vinafix.com
CLKOUT_PCIE_N9
CLKOUT_PCIE_P9
CLKOUT_PCIE_N10 100MHz SSD_CLK100M_PCH_N
SSD
CLKOUT_PCIE_P10 SSD_CLK100M_PCH_P
CLKOUT_PCIE_N11
CLKOUT_PCIE_P11
CLKOUT_PCIE_N12
CLKOUT_PCIE_P12
B CLKOUT_PCIE_N13 B
CLKOUT_PCIE_P13
CLKOUT_PCIE_N14
CLKOUT_PCIE_P14
CLKOUT_PCIE_N15
CLKOUT_PCIE_P15
CLKOUT_CPUNSSC_P 24MHz CPU_MSSC_CLK24M_PCH_P
CLKOUT_CPUNSSC# CPU_MSSC_CLK24M_PCH_N CPU <> PCH
CLKOUT_48
XTAL_24M_PCH_OUT 24MHz 24MHz
XTAL_24M_PCH_IN
CLKOUT_LPC0/ESPI_CLK LPC_CLK0_PCH24M_SIO SIO
24MHz TPM
GPP_A10/CLKOUT_LPC1 LPC_CLK1_PCH24M_TPM
PCH_RTCX1 32.768KHz RTCX1

A PCH_RTCX2 RTCX2 A
Hsichih, Taipei
Title
105_Clock MAP
C LA710 1
5 4 3 2 1
5 4 3 2 1
NOTE:
CHIP or Circuit 7
TPM / TCM
PWR_1D8V_PG EC_RSTOUT0_N
PCH_1V_PG AND
LPC_RST_SIO/A_RST#_TPM
SLP_SUS_N behavior Pin 17 / P7
D D
SOCKET or SLOT or CON LPC_AD_RST_N DEBUG_CONN

Rs
LPC_AD_RST_N
Rs PP7
Resistor PLTRST_N PCH_PLTRST_N

SSD1 Rs Rs
LAN_RST_N RTL LAN
AND
Rs RTL8111G
behavior PERST# P19
SIO NCT6685D
Logic gate or behavior
PLTRST_N EC_RSTOUT0_N 24
LRESET# RSTOUT0# PLTRST_NGFF_WLAN_N NGFF_WLAN_CON
Rs
P26 P79
PLTRST_NGFF_WLAN_N
3D3V_S0
Pin 52
2 Intel PCH H B360
PSU/AD 3VSB
P108
Rs
KBRST#
P28 EC_KBRST_N RCIN#
17 VR_READY AU15
ATXPGD
SLP_SUS# Intel CPU
P80
P89 SLP_SUS_N
6 7
4 RSMRST# Rs PCH_RSMRST_N Coffee Lake S
BA47
RSMRST#
EC_PANSWH_N P73
6+2
PWR BTN PSIN# 3 PCH_SIO_DPWROK
DPWROK Delay AND AW41
DSW_PWROK PCH_PLTRST_N 23
P61
P73 circuit behavior PLTRST# AV29
C
15 SIO_PSON_N PSOUT# 5 SW_ON_N C
PSON# BE46
PWRBTN#
P60 22 PLTRST_CPU_N
P63
PLTRST_PROC# AG5
RESET#
SLP_S3# E7
21 PCH_SYSPWROK SLP_S3_N 14-1 SLP_S3_N SLP_S3#
PWROK1 P64 BF42
SLP_S4_N 13 SLP_S4_N 19 VCCST_PWRGD_CPU
P81
SLP_S5# BE42
SLP_S4#
VCCST_PWRGD
P84
11 SLP_LAN_N BF40 SLP_LAN# U2
10 TP_PCH_SLP_A_N BE40 SLP_A#

H_PWRGD 20
12 SLP_WLAN_N PROCPWRGD AE3
Rs PROCPWRGD
BD42
SLP_WLAN# F8
PWR_12V_COMP
PWR_S0_EN SYS_RESET# 14-1
(3V_S0/5V_S0) DDR_VTT_CNTL
DDR_VTT_CNTL
PCH_SYSPWROK
SYS_PWROK AU3 AC36
SUSCLK_PCH
WLAN Rs BE45
SUSCLK
9
https://vinafix.com
PCH_PWROK
PCH_PWROK AY42
AUDIO ALC233 HDA_RST#_CODEC HDA_RST#_PCH

p11 Rs BD8 HDA_RST# 1
SRTCRST# BD46
RESET# RTC BAT
STBY POWER 6 SLP_SUS_N RTCRST# BE47
BD39 SLP_SUS#
PWR_5V_EN1
PWR_3D3V_S5_EN 8 SUSWARN_N
PWR_1D8V_EN BC37 SUSWARN# 2
PWR_1D0V_EN
VCCDSW_3P3 BE48
BE49 PSU
Rs SUSACK_N BE35 SUSACK# Adapter
B B
PWR_VCCSA_PGOOD
18 PCH_PWROK / VCCST_PWRGD_CPU
VR_READY AND
behavior
Rs
NCP81220MNTXG
VRDY (VCORE)
VR_READY 17
14-5 P6
14-1 14-2 VR_EN
SLP_S4_N SE_VPP_EN PWR_2V5_EN RT8068AZQWID DDR_VTT_CNTL Sequence DDR_VTT_CNTL_L3 DDR_VTT_CNTL_L4 RT8207MZQW P2
Sequence Rs EN circuit Rs S3
circuit P5 (DDR4 VPP) P7 (DDR4 VDDQ)
16-4
PWR_2V5_PG SE_VDDQ_EN PWR_VDDQ_EN
PGOOD Sequence Rs S5 PGOOD
P4 circuit P8 P10
14-3 14-4 16-3
PWR_VCCIO_PG Sequence
VR_ENABLE
circuit
16-1 16-2 16-3 NCP5230MNTWG 18

(VCCSA)
PWR_MEM_PG PWR_VCCIO_EN PWR_VCCSA_EN PWR_VCCSA_PGOOD
Sequence Sequence ROSC/EN PGOOD
A circuit circuit P14 P6 A
Hsichih, Taipei
Title
106_Reset Flow Chart
D LA710 1
5 4 3 2 1
5 4 3 2 1
A710 / V330 SB
1. Unmount R9513 / R9511 for EC combine PS8625 FW
D
2. Remove U9504 R9533 R9534 R9536 C9530 for EC combine PS8625 FW D
3. Remove U9505 R9502 R9503 R9504 for BIOS combine PS8625 EDID
4. Change R3408 to 22K (64.22025.6DL) => Change USB Charger Imax setting to 2.2A
5. Change C802 to 2200pF (78.22224.2FLLL) => Fix +1V_VCCST_S3 rising time to short issue.
6. Add C805 0.1uF (78.10421.2FLLL) near C803 => Fix +1V_VCCST_S3 Vmax over spec issue.
7. Change C4208, C4209 to 1uF (78.10523.5FLLL) => Fix +5V_S5 to +5V_S0 Vdrop over spec issue.
8. Mount R429 to 0R (63.10234.1DL) / Unmount R430 => Fix IRST can't install issue.
9. Replace L2402 to R2466 => 2.2R / F / 0603 (64.2R205.55L) => Fix +3D3V_AUX_SIO analog power noise (1M~10M) >30mV issue.
10. Change R2723 to 2.2R / F / 0603 (64.2R205.55L) => Fix +5V_CODEC analog power noise (1M~10M) >30mV issue.
11. Mount C4001 to 0.1uF (78.10421.2FLLL)；Change R4045 from 22K to 10K (63.10334.1DL)
=> Fix VR_EN to VR_READY over 2.5ms issue.
12. Add C1701 to 15pF (78.15034.1FLLL) => Fix PLTRST_CPU_N overshoot issue.
C
13. Add C2009 to 15pF (78.15034.1FLLL) => Fix H_PWRGD overshoot issue. C
14. Change R4404 to 3K (64.30015.6DL) => Setting Power Meter ilimit=6A(120W)

15. Change q9101 pin G to +5V_S0 => Fix LPC_RST_SIO Vmax issue.
16. Change BTT2 -> 23.20023.001 => Change coin battery vendor to Maxell.
17. Add EC4201 / EC4202 => 0.1uF (78.10421.2FLLL) => EMC request for +5V_S0.
18. Mount C3122 to 4.7uF (78.47520.5BLLL) / C3128 to 2.2uF (78.22523.5BLLL) ；
Add EC3201=> 0.1uF (78.10421.2FLLL) => 0.1uF (78.10421.2FLLL) => EMC request for +3D3V_LAN.
19. Add R3804 R3806 R3805 R3808 for Smart Power on option
20. Add R3807 R3810 R3809 R3811 for Non-Smart Power on option
https://vinafix.com
21. Change R3603 to 100K (63.10434.1DL) Add R2464 to 0R (63.R0034.1DL) => Add SMARTPWR_EN control USB Smart Power On
22. Add C1902 to 68pF (78.68034.1FLLL) => Fix LPC_AD_SIO_P0 Ring up and Ring down warning
23. Add R6118 R6120 to 10R (64.10R05.6DL) => Fix WLAN USB eye diagram issue.
B 24. Add R2401，unmount R2017 => For EC_ME_UNLOCK_N to control ME Disable / Enable B
25. Mount R2065 => Fix if G3 to Deep S5, SLP_SUS_N have high/low level cycle issue.
A A
Hsichih, Taipei
Title
107_Change History
B LA710 1
5 4 3 2 1

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5 4 3 2 1

PCB Number: 17513

05 CPU_(DDR4 CHANNEL A) 80 GPU_function (5/5)_(R)

30 Audio Jack_(R) (2/2) 105 Clock MAP

55 LVDS/Converter Connector Size Current Build VRT==>

PCB STACKUP 6Layer NCP81220

SIT/SVT phase:Green HDMI CONN H202

P:15 SPI Flash ROM

P:17 SW4 Panel_on_off H207

P:17 SW1 PWRBTN

MIC-IN side and H208

SPI Flash ROM Title

PS2 SPI BUS

170828 Leon:Change CPU1 to 062.10015.0081 for SB

DMI_RX_CPU_P0 Y3 AC2 DMI_TX_CPU_P0

[18] CPU_BCLK100M_PCH_P +3D3V_S5

TP414 D16 TPEV_SKL_MBP_0 0R0402-PAD-2-GP

[11] M_A_DQ0 M_A_DQ0 M_A_CLK0

EDP HDMI_DDI_TX_P2 C21

170828 Leon:Change CPU1 to 062.10015.0081 for SB

AJ28 Y34 VSS_SAIO_SENSE R804 1 2 VCCSA_VSS_SEN

C802 C803 C805

Leon: change load switch replace OB part(check spec)

CPU1K 11 OF 12 CPU1L 12 OF 12 CPU1J 10 OF 12

EE Leon: VCORE / GT cap from power team request

+1V_CPU_CORE CAD NOTE: +1V_CPU_CORE CAD NOTE: +1V_GFX_CORE CAD NOTE:

+1V_GFX_CORE CAD NOTE:

C1037 C1038 C1039 C1040 C1041 C1042

[61] BT_RF_KILL_R_N +3D3V_S0

TP1509 1 GPP_C19 BE21 BA33 TCM_DET_N R1511 1 2 100KR2J-1-GP

+3D3V_S5 +3D3V_S5 +3D3V_S5 +3D3V_S5 PCHHT1

(R_) (R_) (V330_)

R1531 R1527 R1533 R1532

10KR2J-3-GP 10KR2J-3-GP 10KR2J-3-GP 10KR2J-3-GP

AW3 BE5 100R2F-L1-GP-U

NGFF WLAN CANON-LAKE-GP

[91] SPI_SIRQ# Follow CRB, pull high 2.2K

SPI_SIRQ# Wistron Incorporated

SV_ADVANCE_GP48 R1712 1 2 20KR2J-L2-GP

https://vinafix.com C1802 / C1803 value need fine tune

Crystal 32.768KHz XTAL_24M_PCH_IN 2

don't change to 0402 0R0402-PAD-2-GP

Crystal 24MHz SC15P50V2JN-2-LL-GP

[27] HDA_BITCLK_CODEC Close to PCH

TP_GPD_1 R2065 1 2 10KR2J-3-GP

C H_PW RGD R2067 1 2 H_PW RGD_R C

+3D3V_S5 RN2001 0R0402-PAD-2-GP

PWR_SEQ = 8 =Standby Power 2 3

[61,62] SUSCLK_PCH SMB RESUME/MAIN LOGIC

CMOS CLR JUMPER PCH - EC

[24,99] SW _ON_N EC_CLR_CMOS Q2003 CMOS1

2N7002K-2-GP SW -TACT-2P-33-GP-U SML1_PCH_LS_GATE

R2206 1 2 20KR2J-L2-GP EDS: Reserved

+3D3V_S5 R2214 1 2 4K7R2J-2-GP

(R_) BOOT SELECT STRAP

(R_) ESPI/LPC SELECT STRAP

R2221 1 2 4K7R2J-2-GP 0: Disable DCI OOB (Default)

(R_) ESPI flash sharing mode

R2201 1 2 10KR2J-3-GP DFX test mode

R2216 1 2 10KR2J-3-GP This signal has a weak internal pull-down.

C2324 C2325 C2326

CAD NOTE: CAD NOTE:

ESIO I2C for PS8625 & OZ554A