IEEE JOURNAL OF EMERGING AND SELECTED TOPICS IN POWER ELECTRONICS, VOL. 9, NO.

3, JUNE 2021 3353

High Step-Down Nonisolated DC–DC Converter

With Coupled Inductors
Mahdi Rezvanyvardom and Amin Mirzaei

Abstract— High step-down nonisolated dc–dc converter with

coupled inductors is proposed. The converter is used a simple
lossless clamping circuit. Moreover, it produces the current ripple
cancelation at the output due to series connection between the
coupled inductors and the output. Automatic current sharing is
done in the proposed converter even if the switches have different
duty cycles. The proposed converter has lower voltage stress in
comparison with traditional Buck converter and also different
topologies of Buck converters with the coupled inductors. Besides,
the current stress on semiconductor devices is reduced due to the
interleaved structure. Finally, the converter has lower number Fig. 1. Block diagram of the high step-down dc–dc converter in PV system.
of components in comparison with the similar structures. The
mentioned advantages candidate the proposed converter to apply
in photovoltaic system. A 200-W laboratory prototype converter losses, and poor current ripple cancelation [3]. As a result,
is considered and constructed. The experimental results presented researchers proposed several high step-down nonisolated
confirm the aforementioned features and theoretical analysis.
dc–dc converters in the literature. A two-stage converter is
Index Terms— DC–DC power conversion, high step-down con- one of the important ways to obtain high step-down voltage
verters, nonisolated dc–dc converter, pulse width modulation. ratio [4], [5]. In fact, the mentioned stages convert the voltage
level from high to intermediate and then from intermediate
I. I NTRODUCTION to low. Most of the proposed structures with this technique
have low efficiency and high conduction losses due to apply
R ECENTLY, high step-down nonisolated dc–dc convert-
ers are applied in many several industrial applications
especially photovoltaic (PV) systems. If the application needs
high number of elements. On the other hand, high step-down
nonisolated dc–dc converters with single stage are proposed in
many articles. The converters in [6]–[8] are applied coupled
a source voltage different from the battery voltage (dc link),
inductors in their structure to reach high step-down voltage
another converter is used to produce the required supply
ratio by moderate duty cycle.
as displayed in Fig. 1. This structure is used in several
The important drawback of the converters is high-current
different loads, such as charging stations for mobiles, LED
ripple when their output current rises. However, a discrete
street lightening, and so on. As a result, the first converter
inductor can be used with the coupled inductor to decrease the
acts as an interface circuit between the PV and dc link
amplitude of the output current ripple. The suggested topology
by increasing the voltage level of PV panel. In contrast,
is proper for low-current applications. Another way to obtain
the second converter is used to decrease the voltage level of
high step-down voltage ratio is using transformer-based con-
dc link and feed the particular loads which is deliberated in
verters [9]. Some articles used isolated topologies (half bridge
detail in [1] and [2]. In fact, conventional Buck converter is the
and full bridge) in their converters. Along with the numerous
most popular structure between other nonisolated step-down
benefits, isolated converters have some disadvantages, such
dc–dc topologies due to its simple structure, low cost, and
as high-voltage stresses across active elements due to leakage
maturity in design techniques. However, conventional dc–dc
inductance, high size, and high complexity due to employment
Buck converter has some major drawbacks for high step-down
of isolated voltage/current sensors or applying isolated power
applications, such as extremely low duty cycle which forces
supplies or using isolated drivers [10]–[12]. Consequently,
the researchers to overdesign the output filter, high power
nonisolated transformers are used in [13] and [14] to solve
Manuscript received February 12, 2020; revised May 11, 2020; accepted these problems. Besides, the current stress and the overall
June 21, 2020. Date of publication June 29, 2020; date of current version size of the converter are reduced. The high-voltage gain is
May 28, 2021. Recommended for publication by Associate Editor Burak achieved in the converters which are presented in [14]. The
Ozpineci. (Corresponding author: Mahdi Rezvanyvardom.)
The authors are with the Department of Electrical Engineering, converters have some drawbacks, such as pulsating current
Faculty of Engineering, Arak University, Arak 38165, Iran (e-mail: and complicated gate drivers. By applying a dc–dc unregulated
m.rezvanyvardom@gmail.com). transformer in a Buck type converter, a new type of structure
Color versions of one or more of the figures in this article are available
online at https://ieeexplore.ieee.org. as quasi-parallel converter creates, which is introduced in [15]
Digital Object Identifier 10.1109/JESTPE.2020.3005418 and [16]. The converter has high-voltage gain with high
2168-6777 © 2020 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission.
See https://www.ieee.org/publications/rights/index.html for more information.

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 3354 IEEE JOURNAL OF EMERGING AND SELECTED TOPICS IN POWER ELECTRONICS, VOL. 9, NO. 3, JUNE 2021

Fig. 2. Configuration of the proposed converter.

efficiency, while it has complex structure due to involvement

of high number of switches and isolated gate driver. High
step-down voltage ratio is achieved in [17] by using a hybrid
transformer and a hybrid switching technique in a Cuk–Buck
converter. The converter has high efficiency, while its current
ripple is quite high. High-current ripple is removed in [17] by
using interleaved structure in Cuk–Buck converter. High step-
down conversion ratio can be achieved by using transformer-
less converters [18]–[22]. The voltage conversion ratio can
be extended by putting the switched capacitors into inductor-
based topology. These converters have low efficiency and
complex controller due to operate at lower range of duty cycle
for high step-down applications.
In this article, a high step-down nonisolated dc–dc con-
verter with coupled inductors is proposed. The converter is
applied a simple lossless clamping circuit. The circuit clamps
the voltage spikes across the switch and prevents it to be
damaged. Furthermore, the proposed converter manages the
stored energy in leakage inductors. Besides, the converter
has ultra-high step-down conversion ratio. On the other hand,
the converter produces the current ripple cancelation at the
output due to series connection between the coupled inductors
and the output. Moreover, the automatic current sharing is
done in the proposed converter even if the switches have
different duty cycles. These phenomena occur due to the
existence of coupled inductors with similar turn ratio in two
interleaved paths. The proposed converter has lower voltage
stress in comparison with traditional Buck converter and
also different topologies of Buck converters with the coupled
inductors. It should be mentioned that the converter has the
advantages of interleaved structures which reduces the current
stress on semiconductor devices. Finally, the converter has
lower number of components in comparison with the similar
structures. This article is organized as follows. In Section II,
circuit configuration and operation modes of the proposed
converter are presented. Design consideration and guidelines
are analyzed in Section III. The experimental results are
deliberated in Section IV. Lastly, conclusions are explained
in Section V.
II. C IRCUIT C ONFIGURATION AND O PERATION M ODES
The proposed converter is shown in Fig. 2. Lossless clamp-
ing circuit comprises diodes D1 and D2 and capacitor CS .
Coupled inductors L 1 and L 2 along with L 3 and L 4 create
interleaved path, which transfer the power to the output and
input, respectively. It should be mentioned that switches M1
Fig. 3. Converter theoretical waveforms.
and M2 are unidirectional. In fact, switch M2 creates a path to
transfer the power from input to the output, while switch M1
manages the power transmission from the coupled inductors to
capacitor CO1 . In addition, diodes D3 and D4 create the power
transmission path from the secondary side of the coupled
inductors to the output.
Besides, CO is the output capacitor and RO is the output
load. The theoretical waveforms of the proposed high step-
down converter are illustrated in Fig. 3. The converter has four
modes of operation in each switching cycle. The explanations
for each mode are presented as follows. Furthermore, the
equivalent circuits are shown in Fig. 4.
A. Mode 1 (t0 − t1 ) [see Fig. 4(a)]
This mode starts when switch M2 is turned on at t0 . Since
the switch is connected in series with inductor L 1 which has
zero current at t = t0 , then it is turned on under ZCS condition.
When switch M2 is turned on, diode D2 will be forward biased.
Due to the coupled inductors which have zero current at the
start of mode 1, the diode is turned on under ZCS condition.
The stored energy in capacitor CS is transferred to the output
and input through diode D2 and switch M2 , while its value
is decreased. The capacitance of CS is high enough so that
it can be assumed as a constant voltage source with a value
of VCS . The value of VCS is greater than the input voltage.
Diodes D1 , D3 , and D4 and switch M1 are turned off during
this mode. On the other hand, the capacitance of CO1 is high
enough so that it can be assumed as a constant voltage source
with a value of VCO1 . This mode ends when the current passing
through inductor L 1 is equal to the output current
I L1 = −n I L2 = n I L4 (1)

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 REZVANYVARDOM AND MIRZAEI: HIGH STEP-DOWN NONISOLATED DC–DC CONVERTER 3355

Fig. 4. Equivalent circuit for each operating interval. (a) Mode 1. (b) Mode 2. (c) Mode 3. (d) Mode 4.

VCS = Vin + VL2 − VL4 (2) C. Mode 3 (t2 − t3 ) [see Fig. 4(c)]
VL1 = nV L2 , VL4 = nV L3 (3) This mode starts when switch M1 is turned on at t2 , while
VL1 = VCS − VO − VCO1 (4) switch M2 is still turned off. Due to zero current of inductors
L 1 and L 3 which are connected in series with the switch,
ICS = −(n + 1)I L2 (5)
M1 is turned on under ZCS condition. Hence, its current
VL4 = Vin + (n − 1)VL1 − VO − VCO1 is increased linearly. By turning on switch M1 , the stored
= (n + 1)VCS − n(VO − VCO1 ) − Vin (6) energy in capacitor Co1 is transferred to inductors L 1 and
L 1 × IO L 3 . Furthermore, the voltage across capacitor Co1 decreases,
t1 − t0 = (7)
(VCS − VO − VCO1 ) while inductor currents (IL1 and IL3 ) increase. Consequently,
(n + 1)VCS − n(VO − VCO1 ) − Vin the current that flows through inductors L 2 and L 4 (in the
i L4 (t) = (t − t0 ) (8) direction shown in Fig. 3) increases and leads to charge
L4
VCS − VCO1 − VO capacitor CS . Moreover, at t = t2 , diode D1 is turned on under
i L1 (t) = (t − t0 ). (9) ZCS condition due to its series connection with inductors L 2
L1
and L 4 . During this mode, diode D1 is forward biased and
diode D2 is reverse biased. Since the currents that flow through
B. Mode 2 (t1 − t2 ) [see Fig. 4(b)] inductors L 1 and L 3 are equal, power transmission is not done
in this mode and capacitor Co supplies the output load
This mode starts when switch M2 is turned off at t1 . During
this mode, the switch remains turn off. As a result, diode D3 VCO1 VCo1
i L3 (t) = i L1 (t) = (t − t2 ) = (t − t2 ) (15)
is turned on and the stored energy in coupled inductors L 1 and (L 1 + L 3 ) 2L 3
L 2 is transferred to the input and output by diodes D2 and D3 . VCS = VL4 − VL2 (16)
Besides, the stored energy in capacitor CS is transferred to the VCo1 = VL3 − VL1 (17)
input through diode D2
VCS = nV Co1 (18)
VL1 = −V O , VL2 = −nVO (10) VCo1
i CS (t) = (t − t2 ). (19)
2n L 3
VL4 = VCS − Vin − nVO (11)
VO This mode ends when the current passing through inductor
i L1 (t) = IO − (t − t1 ). (12) L 3 reaches the output current value
L1
2L 3 × IO
At the end of this mode (t = t2 ), the current flows through t3 − t2 = . (20)
VCo1
inductors L 1 , L 2 , and L 4 reach zero and their energy will be
fully discharged. Consequently, diodes D2 and D3 are turned
off under ZCS condition at the end of this mode D. Mode 4 (t3 − t4 ) [see Fig. 4(d)]
When the current passing through inductor L 3 reaches the
L 1 × IO
t2 − t1 = (13) output current at t = t3 , switch M1 is turned off and mode 4
VO starts. Therefore, diode D4 is turned on to allow the current
L1 VO to pass through inductor L 3 . As a result, the stored energy
= (14)
L4 n(VCS − Vin − nV O ). in inductor L 3 is transferred to the output through diode D4

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 3356 IEEE JOURNAL OF EMERGING AND SELECTED TOPICS IN POWER ELECTRONICS, VOL. 9, NO. 3, JUNE 2021

during this mode. Furthermore, the stored energy in capacitor TABLE I

CO1 is constant throughout this mode, while capacitor CS is C ONVERTER S PECIFICATIONS
storing energy as same as Mode 3. Besides, the stored energy
in inductor L 4 is transferred to capacitor CS through diode D1 ,
while diode D2 is reverse biased. When M1 is turned off at
t3 , the energy is transferred from the secondary to the primary
in coupled inductors L 1 and L 2 . In fact, the stored energy in
inductor L 1 is transferred to inductor L 2 . During this mode,
the energy of coupled inductors (L 1 and L 2 ) is transferred
TABLE II
to capacitor CS . This mode ends when the stored energy
PARAMETERS OF THE P ROPOSED C ONVERTER
in inductor L 3 is totally transferred to the output. Similarly,
the energy in inductors L 2 and L 4 is fully transferred to
capacitor CS

VL3 = −V O (21)
−VO
i L3 (t) = (t − t3 ) + IO (22)
L3
VL2 = −(nVO + VCS ) (23)
IO nV O + VCS
i L2 (t) = − (t − t3 ) (24)
n L2
L3 VO
= (25)
L2 n(nV O + VCS )
IO × L 3 IO × L 2
t4 − t3 = = . (26)
VO n(nVO + VCS ) Inductor L 1 volt-second balance condition is computed as
follows:
 
VCS VCS
III. D ESIGN C ONSIDERATIONS D VCS − − VO = d2 VO + d3 . (31)
n 2n
In this section, design process and important formulas to According to the converter operation, the following equa-
compute the values of elements in the proposed converter are tions can be calculated regarding the relationship between the
clarified. The converter specifications are presented in Table I. time intervals of the modes
According to the converter operation in mode 1, inductor
current IL1 varies from zero to IO during this mode. Moreover, d2 + d3 + d4 = (1 − D) (32)
the converter operates well if L 2 = L 4 and L 1 = L 3 d4
=
L3
→ L 1 = L 3 → d2 = d4 (33)
d2 L1
D(VCS −VO −VCo1 ) 0.3(76 − 12 − 33)
L1 = L3 ≥ = d3 2L 3 IO VO 2V O 2nV O
IO × f SW 16 × 100000 = = = (34)
d2 L 1 IO VCo1 VCo1 VCS
= 25.6 μH. (27) 2nV O
d3 = d2 (35)
Based on [27], the turn ratio is obtained as follows. VCS
   (1 − D)VCS
d2 = (36)
Vin 1 200 2V CS + 2nV O
n≤ +1= +1= +1∼ =5 (28)
Vo M 12 2n(1 − D)VO
= d3 . (37)
2V CS + 2nV O
where M is the voltage gain of the proposed converter.
According to the converter specifications, the turn ratio is The duty cycle of the proposed converter is achieved as
equal to two. Furthermore, the values of inductors L 2 and follows:
L 4 are calculated by (27). Clamping capacitor CS can be VCS VO
computed as follows: D=   . (38)
(n − 2
1)VCS + VCS VO n 2 − 2n + 1 − n 2 VO2
IO ×(n +1)D 16×(2+1)×0.3 Also
CS ≥ = = 20.5 μF. (29)
V CS × f SW 7×100000
VCS ∼
= nV in . (39)
Capacitor CO1 is obtained according to the following
equation: Finally, the voltage gain of the proposed converter is
IO · D 16 × 0.3 obtained as follows:
CO1 ≥
V Co1 × f SW
=
7 × 100000
= 16 μF. (30) 
 2
D(n − 1)2 + 1 − D(n − 1)2 + 1 +4n D 2 (n −1)
According to the output voltage variations, output current M= .
2n D
and the load, filter capacitor CO can be calculated [28]. (40)

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 REZVANYVARDOM AND MIRZAEI: HIGH STEP-DOWN NONISOLATED DC–DC CONVERTER
Fig. 5. Experimental prototype of the proposed converter.
Fig. 6. Output voltage ripple (vertical scale is 100 mV/div).
Fig. 7. Voltage (top waveform) and current (bottom waveform) of diodes D1
and D2 (vertical scale is 100 V/div or 5 A/div and time scale is 2.5 μs/div).
IV. E XPERIMENTAL R ESULTS
A 200-W prototype of the proposed high step-down
dc–dc converter is implemented. Circuit parameters with
details including type of materials and their values based on
the design considerations are presented in Table II.
The picture of the experimental prototype circuit is dis-
played in Fig. 5. Fig. 6 shows the output voltage ripple. The
secondary windings of the coupled inductors connected in
series with the output, which causes the low output current
ripple. Consequently, the output voltage ripple is very low
(200 mV).
Voltage and current waveforms for diodes D1 and D2 are
shown in Fig. 7. Based on the converter operation in modes
1 and 3, the diodes are switched (turn on/off) under ZCS
condition. This is done because the primary windings of the
coupled inductors connected in series with the diodes. Fig. 8
illustrates the voltage and current waveforms for switch M1 .
Based on mode 3, the switch is turned on under ZCS condition
due to the series connection of M1 with inductors L 1 and L 3 ,
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3357
Fig. 8. Voltage (top waveform) and current (bottom waveform) of switch
M1 (vertical scale is 50 V/div or 4 A/div and time scale is 2.5 μs/div).
Fig. 9. Voltage (top waveform) and current (bottom waveform) of switch
M2 (vertical scale is 100 V/div or 5 A/div and time scale is 2.5 μs/div).
TABLE III
S WITCH AND D IODE V OLTAGE AND C URRENT S TRESSES
which have zero passing current. Furthermore, the current and
voltage waveforms for switch M2 are depicted in Fig. 9. Since
the current that flows through inductor L 1 is zero at t0 and L 1
is connected in series with M2 , the switch is turned on under
ZCS condition.
Voltage and current waveforms for diode D3 are shown
in Fig. 10. According to the converter operation in mode 2,
the diode is turned on to transfer the power of coupled
inductors L 1 and L 2 to the output. In addition, diode D3 is
turned off under ZCS condition when the current that flows
through inductor L 1 falls to zero. Fig. 11 depicts the voltage
and current waveforms for diode D4 . Performance of diode D4
is similar to diode D3 and applied to transfer the power of
coupled inductors L 3 and L 4 to the output. Based on the
converter operation in mode 4, the diode is turned off under
ZCS condition when the current that flows through inductor
L 3 falls to zero. In the proposed converter, the energy stored
in the primary side of the coupled inductors is transferred
 3358 IEEE JOURNAL OF EMERGING AND SELECTED TOPICS IN POWER ELECTRONICS, VOL. 9, NO. 3, JUNE 2021

TABLE IV
C OMPARISON OF L OSSES IN [29] AND P ROPOSED H IGH S TEP -D OWN DC–DC C ONVERTER

Fig. 10. Voltage (top waveform) and current (bottom waveform) of diode D3 Fig. 11. Voltage (top waveform) and current (bottom waveform) of Diode D4
(vertical scale is 10 V/div or 9 A/div and time scale is 2.5 μs/div). (vertical scale is 10 V/div or 2.5 A/div and time scale is 2.5 μs/div).

to the secondary side through two interleaved paths to reach
the output. By using the interleaved paths, the current stress
on the power components and the output current ripple are
reduced. This reduces the conduction losses of the elements
and improves the converter efficiency. Reducing the current
stress in the proposed converter prevents the converter to use
heat sinks for switches and diodes. As can be seen from
the proposed structure, the number of circuit elements is
less compared with similar high step-down topologies. Thus,
the volume and weight of the circuit as well as the conduction
losses are decreased. Furthermore, the performance of this
converter is very simple and it has only four operation modes
that do not use any resonant path to increase the voltage gain.
Another factor to improve the converter specifications is that
the switches are turned on under soft switching condition.
Although the switches are turned off under hard switching con-
dition, but the soft switching condition at the turn on instants
greatly reduces switching losses in the proposed converter.
Consequently, choosing 100 kHz as switching frequency has
been very effective to improve the converter operation and
to reduce the Ohmic losses. Another factor to improve the
performance of the converter is achieving the appropriate
voltage gain in the low duty cycle of the switches. This reduces
conduction losses of the switches. Due to low output current
stress, a large filter is not required at the output of the proposed
converter, which is also effective to reduce losses, volume, and
weight and to increase the efficiency. Based on the converter
operation, the switch and diode voltage and current stresses are
presented in Table III. The comparison of power losses in the
high step-down soft switching full-bridge interleaved Flyback
converter in [29] and the proposed high step-down dc–dc
converter are shown in Table IV. The following definitions
are used to prepare Table IV.
These definitions are the switching times at turn on and
turn off instants as ton and to f f , respectively, the diode reverse
recovery time as trr , the diode reverse recovery current as Irr ,
switches output capacitance as Cout , average current of diodes
as Iave , forward voltage of diodes as VF , the switches on
state resistance as Rds , the constant for core material as K 1 ,
the peak flux density as B, the frequency exponent as x,

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 REZVANYVARDOM AND MIRZAEI: HIGH STEP-DOWN NONISOLATED DC–DC CONVERTER 3359

TABLE V
C OMPARISON OF THE P ROPOSED C ONVERTER W ITH R ECENT C OUNTERPARTS

ripple cancelation at the output, automatic current sharing,

lower voltage stress in comparison with traditional Buck con-
verter, low-current stress due to the interleaved structure, and
lower number of components in comparison with the similar
structures. A 200-W laboratory prototype of the converter
operating at 100 kHz is constructed. High step-down voltage
gain is achieved by using 200 V as input voltage and 12 V
as output voltage. The efficiency of the proposed converter
is 96.1% at the full load. Lastly, the experimental results are
presented to confirm the converter operation.

Fig. 12. Efficiency of the proposed converter versus the output.
the flux density exponent as y, the effective core volume (cm3 )
as Ve , equivalent series resistance in capacitor as ESR, the ac
resistance of the inductor as ACR, the dc resistance of the
inductor as DCR, the rms value of the peak current applied
to the inductor Irms1 , and the rms value of the peak–peak
ripple current applied to the inductor as Irms2 . Table V presents
the comparison between the proposed converter and other
converters introduced in the literature. The parameters such
as semiconductor counts, magnetic core counts, capacitor
counts, voltage gain, voltage stress, volume, cost, efficiency,
switching frequency, soft switching condition, input current
and isolation are used for comparison. The table shows that
the proposed converter has good characteristics in many terms
in comparison with other introduced topologies.
Fig. 12 demonstrates the efficiency versus the output power
of the converter. It is obvious that the efficiency is 96.1% at
full load that proves optimized performance of the proposed
converter.
V. C ONCLUSION
In this article, a high step-down nonisolated dc–dc converter
[10] S. Rahimi, M. Rezvanyvardom, and A. Mirzaei, “A fully soft-switched
with coupled inductors is proposed. The converter has many
advantages such as simple lossless clamping circuit, current
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Mahdi Rezvanyvardom was born in Masal, Guilan,
Iran. He received the M.Eng. degree from the Isfa-
han University of Technology (IUT), Isfahan, Iran,
in 2011, and the Ph.D. degree from the Shahid
Chamran University of Ahvaz, Ahvaz, Iran, in 2015.
He is currently an Assistant Professor with
the Department of Electrical Engineering, Fac-
ulty of Engineering, Arak University, Arak, Iran.
His research interests include power electronics,
dc–dc converters, soft switching converters, and data
converters.
Amin Mirzaei was born in Rasht, Guilan, Iran.
He received the M.Eng. degree from the Isfahan Uni-
versity of Technology (IUT), Isfahan, Iran, in 2008,
and the Ph.D. degree from Universiti Teknologi
Malaysia (UTM), Johor Bahru, Malaysia, in 2012.
He is currently an Assistant Professor with the
Department of Electrical Engineering, Faculty of
Engineering, Arak University, Arak, Iran. His cur-
rent research interests include dc–dc converters, soft
switching techniques, and renewable energies.