POWER ELECTRONICS

LAB MANUAL

MANUAL # 7
GROUP #1

SALMAN HASHMI 2018-EE-621

IRFAN SHABBIR 2018-EE-622
WALEED NADEEM 2018-EE-616
M. BILAL 2018-EE-617
10% 1.061 1.769
20% 1.068 3.347
25% 1.059 4.136
30% 1.054 4.877
40% 1.035 6.378
50% 1.033 7.907
60% 1.033 9.559
75% 1.031 11.956
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12

10
Output Voltage

0
0 10 20 30 40 50 60 70 80
Duty Cycle

If the duty cycle ratio of 50% then the efficiency of this circuit is 51%.

𝒗𝒔 𝒗𝒔
Vo =kVs + ∑∞
𝒏=𝟏 𝒔𝒊𝒏𝟐𝒏𝝅𝒌 𝒄𝒐𝒔𝟐𝒏𝝅𝒇𝒕 + ∑∞
𝒏=𝟏 (𝟏 − 𝒄𝒐𝒔𝟐𝒏𝝅𝒌) 𝒔𝒊𝒏𝟐𝒏𝝅𝒇𝒕
𝒏𝝅 𝒏𝝅

Fundamental component of output for n=1

𝒗𝒔 𝒗𝒔
V1 = 𝒔𝒊𝒏𝟐𝝅𝒌 𝒄𝒐𝒔𝟐𝝅𝒇𝒕 + (𝟏 − 𝒄𝒐𝒔𝟐𝝅𝒌) 𝒔𝒊𝒏𝟐𝝅𝒇𝒕
𝝅 𝝅

Here f=1kHz and k=0.5

𝟐𝟎
V1 = (1- cos𝜫) sin(2𝜫*1000*t)
𝝅

V1 = 12.732 sin(6283.18t)
𝟏𝟐.𝟕𝟑𝟐
V1(rms) = = 9V
√𝟐