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Advanced Packaging Presentation
Advanced Packaging Presentation
Advanced Packaging Update
Die Area Comparison: Original iPhone vs. iPhone 6
Advanced Packaging Share of Total Die Area
Conventional packaging Advanced packaging
12%
38%
88%
62%
iPhone iPhone 6
Jun 2007 Sep 2014
115mm x 61mm 138mm x 67mm
Source: TechSearch International, Inc.
• iPhone 6 had 2x the die area of the first iPhone; die area in advanced packaging grew 6.6x
• Advanced packaging share of total die area (%) more than tripled from 2007 to 2014
• Advanced packaging includes flip chip and wafer level packaging,
conventional packaging includes wire bond
w w w.techsearchi nc .c om © 2015 TechSearch International, Inc.
1
Advanced Packaging Growth in Smartphones
iPhone 6
Advanced packaging
(Flip chip & WLP)
38%
62%
Conventional packaging
(Wire bond)
iPhone 6
Sep 2014
iPhone [1]
Advanced packaging
(Flip chip & WLP)
12%
88%
Conventional packaging
(Wire bond) iPhone
Jun 2007
Source: TechSearch International, Inc.
• Silicon die area doubled in 7 years from the introduction of the first iPhone to the introduction
of the iPhone 6
• Advanced packaging (defined as flip chip and WLP) has increased from 12% of total die area in
2007 to 38% of total die area in 2014
Silicon Interposer Market Forecast
Xilinx FPGA
Silicon Interposer Demand Projection
70
60 58
49
50
Millions of Units
40 38
Image from Xilinx
30
24 AMD “Fiji” GPU
20
11
10
1
0
2015 2016 2017 2018 2019 2020
• Xilinx continues to ship an increasing number of FPGAs with Si interposers
• AMD shipping Fiji graphics module with Si interposer and HBM
• nVIDIA announces graphics processor based on Pascal architecture with Si interposer and HBM
• Network system and high‐performance server makers with Si interposers
2
AMD’s “Fiji” with Silicon Interposer and HBM
Source: AMD.
• AMD has introduced its highly anticipated “Fiji” solution for the graphics market
• Features a 595mm2 logic device (ASIC) mounted in the center of a 1,011mm2 Si interposer
• Four HBM stacks, each containing four DRAMs and a logic die, are also mounted on the
interposer
• There are approximately 200,000 interconnects in the module including Cu pillar
microbumps and C4 bumps
• The interposer has 65,000 TSVs with 10µm‐diameter vias
Fan‐Out WLP and Embedded Die Technologies
3
Process Flows for the Various FO‐WLP Approaches
Traditional WL-FO Die First HD-FO Die Last HD-FO
Face Down Die Placement RDL and Cu Pillar on Carrier RDL on Carrier
Silicon Carrier
Glass Carrier
Glass Carrier
Carrier Removal, RDL and
Singulation BGA Attach
RDL and BGA Attach
Glass Carrier
Singulation
Carrier Removal
Source: GlobalFoundries, adapted from Amkor, ASE, SPIL, STATS ChipPAC, TechSearch International, Inc., IFTLE, TSMC websites.
FO‐WLP: A Disruptive Technology
• FO‐WLP is a disruptive technology because there is no laminate
substrate and “assembly” is done on a reconstituted wafer
• The use of thin‐film metallization for the interconnect allows finer
feature sizes than today’s conventional laminate substrates
• Face‐down structures, such as the embedded Wafer‐Level Ball Grid
F d t t h th b dd d W f L l B ll G id
Array (eWLB) developed by Infineon/Intel, do not use a flip chip bump
– Production parts with multi‐die and passives
– Provides encapsulation on all sides of package
– Demonstrated electrical performance and board‐level reliability
– Millions of parts shipped over multiple years
• Face‐up structures such as Deca’s M‐Series and TSMC’s InFO use a
copper post, but no solder cap
– Finest potential features
– Alternative to grind process and alternative carrier release options
– Potential to skip laser grooving step in singulation
• Structures referred to as “chip last”
– Similar in that they use RDL on a carrier as the interconnect
– Differ in that the chip bumped and attached with a flip chip bonder
w w w.techsearchi nc .c om © 2015 TechSearch International, Inc.
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Advantages of FO‐WLP
• Smaller form factor
– Lower profile package: similar to conventional WLP in profile
– Thinner than flip chip CSP (no substrate)
– Can enable low‐profile PoP solution as thin as ≤0.8mm and as
large as 15 mm x 15 mm
• Increased I/O density
– With increased I/O and smaller die can’t “fan‐in” using
h d / d ll d ’ “f ”
conventional WLP for next silicon node with die shrink
• Multiple die in a low‐profile package/SiP
– Die fabricated from different technology nodes can be
Source: IMC.
assembled in a single package
– Can integrate passives
• Excellent electrical and thermal performance
• Excellent high temperature warpage performance
• Fine L/S (15/15µm to 10/10, 8/8 soon, 5/5 and 2/2 in future)
– Uses RDL process to produce fine features
– No traditional laminate substrate
• Multi layer RDL with FO‐WLP
– Higher routing level with denser Iines and traces
– Shield and power dissipation needs
– Enabler of further form factor reduction
• Improved board‐level reliability
– Can’t go to ≤0.35mm pitch for many companies because
requires more expensive board to route
– Board level reliability issues with fine pitch parts
w w w.techsearchi nc .c om © 2015 TechSearch International, Inc.
Application Processor Packaging Trends
• Thinner package and smaller footprint
– Today 1.0mm height requirement
– Future ≤0.8 mm Today’s PoP (1.0mm)
• 3D IC with TSV provides the ultimate in
package height reduction, but continues
to be pushed out due to cost, business,
and thermal issues
d th li
• Silicon interposers too expensive for
many mobile products
• PoP in high‐end smartphones
– Option 1: Continue with FC on thin
substrate
– Option 2: Embedded AP in bottom
laminate substrate FO-WLP as Bottom PoP (<0.8mm)
– Option 3: Fan‐out WLP with application
processor as bottom package
– Option 4: Some new format (SWIFT,
Option 4: Some new format (SWIFT
NTI, etc.)
• FO‐WLP AP in bottom PoP
– Low profile
– High routing density
– Handle high power
– System integration with competitive cost
5
FO‐WLP Projections (Millions of Units)
6,000 5,619
TOTAL FO‐WLP
High Density FO‐WLP 5,157
5,000
nits
Millions of Un 4,000
3,113
3,000
2,488
1,852
2,000
1,008 1,083
892
1,000
517
250
95
0
2015 2016 2017 2018 2019 2020
• Companies with FO‐WLP include Freescale Semiconductor, Infineon, Intel, Marvell, Maxim, NXP,
Qualcomm, and future application processor makers
• Device types include baseband processors, RF such as Bluetooth, NFC, GPS, PMIC, automotive radar,
connectivity modules, future application processors from TSMC and others considered high‐density
• Many multi‐die products in future
FO‐WLP Projections (Thousands of Reconstituted Wafers)
8,000
6,000
5,160
Reconstituted Waffers
5 000
5,000 4,803
4 535
4,535
4,000 3,622
3,000 2,529
2,000 1,713
1,052
1,000
190 314
0
2015 2016 2017 2018 2019 2020
• Demand in reconstituted wafers
• Assumes average part sizes ranging from 3 mm x 3 mm for RF to 15 mm x 15 mm for application
processor in 2016 and up to 18 mm x 18 mm in future application processors
• Assumes 80µm saw street width for most applications
6
FO‐WLP Projections in Millions of Units
6,000
5,000
4,000
Millions of Uniits
3,000
2,000
1,000
0
2015 2016 2017 2018 2019 2020
Source: TechSearch International, Inc.
• Early products included baseband processor (Infineon Wireless Division eWLB) now part of
Intel
• Device types include RF such as Bluetooth, NFC, GPS, PMIC, automotive radar, connectivity
modules, future application processors from TSMC and others
• Many multi‐die products in future
w w w.techsearchi nc .c om © 2015 TechSearch International, Inc.
FO‐WLP Suppliers Status
• Amkor Technology redeploying FO‐WLP with new 300mm line (eWLB) in K4
• ADL Engineering 200mm pilot line in Taiwan
• ASE license for Infineon’s eWLB with 300mm in Taiwan, also offers “chip last”
panel version
• Deca Technologies (300mm “panel” format)
• NANIUM (300mm wafer) license for Infineon’s eWLB
• NEPES (300mm line in Korea, R&D on panel)
• Powertech Technology (300mm line future, R&D on panel)
• SPIL (300mm wafer)
• STATS ChipPAC (300mm wafer) purchased by JCET, license for Infineon’s eWLB
• Samsung (internal production expected)
• TSMC (300mm wafer InFO process)
• New suppliers in China and other locations….
7
“NTSB: Collision Avoidance Systems Should be Standard in All Cars”
In the U.S. each year ~ 1.7M rear‐end crashes
resulting in ~500K injuries; ~1700 deaths.
80% could be avoided with systems that
automatically brake or warn drivers to avoid
rear‐end collisions in new cars and
d lli i i d
commercial trucks.
ECN – June 2015
Source: Mercedes-Benz.
10 major car manufacturers*
Audi, BMW, Ford, GM, Mazda, Mercedes‐
Benz, Tesla, Volkswagen, Toyota & Volvo
commit to making automatic emergency braking
commit to making automatic emergency braking
a standard feature on all new vehicles.
ABC News ‐‐September 2015
Source: Volvo.
* 57% of U.S. light–duty vehicle sales (2014)
Japan 2020 Olympics Initiative:
Pioneer Autonomous Driving for 2020 Olympics
• Toyota unveiled its vision for self‐driving cars in a challenge to other automakers as well as industry newcomer
Google Inc., promising to start selling such vehicles in Japan by 2020
• Toyota demonstrated the "mobility teammate concept” (meaning the driver and the artificial intelligence in a
sensor‐packed car work together as a team) on a Tokyo freeway in October
• A Lexus drove itself within the 60 kpm (37 mph) speed limit for about 10 minutes, changing lanes, braking and
steering (the human at the wheel did nothing except turn on a button to kick in the technology)
• Toyota's plans are part of a larger Japanese government initiative to pioneer automated driving in time for the
2020 Tokyo Olympics
8
Distribution of Human Factors for Traffic Accidents
Human 95.4%
47.8%
34.8%
6.4%
6.4%
Vehicle 1.6% 0.4% 2.6% Environmental
14.8% 44.2%
Source: TechSearch International, Inc., adapted from Kai Plankermann.
Example of Swiss Cheese Model of Accident Causation
9
Automotive Driver Assistance/Autonomous Driving
• Infineon’s CEO provides drivers
– Traffic fatalities (1.3 million deaths per
year; 90% caused by human errors)
– Less accidents, lower insurance rates
– Less traffic congestion (U.S. commuters
L ffi i (U S
spend 38 hours per year in traffic jams;
cost of $121 billion/year)
– Increased commuter productivity
– Improved fuel efficiency (up to 50%)
• Many safety features for automotive
– Sensor technology to collect and
process information
– Computing for data analysis
Computing for data analysis
• FO‐WLP, many are SiP used for radar
modules
– FO‐WLP format (Freescale, Infineon,
Source: Freescale.
NXP)
Automotive Semiconductor Content Growth Due to ADAS
Level22
Level Level3 3
Level Level
Level 44
• ADAS content is in addition to current $300/car semiconductor content
average
10
FO‐WLP for Automotive Application Drivers
NXP Radar Module in FO‐WLP
• Growth of active safety systems for
automotive applications
• FO‐WLP being adopted for mmWave
applications
– Parking slot measurement (SRR)
– Blind spot detection (SRR)
– Adaptive cruise control (LRR 77GHz)
– Emergency breaking Source: NXP.
– Lane correction
• Volumetric shrink of current and Freescale 77GHz Radar System
Continental announced it is integrating
future systems (40 to 90%) Freescale’s 77GHz radar technology
into its next generation short- and mid-
• Increased functionality with
y range automotive radar modules
heterogeneous integration
• Improved in system performance
– Low parasitics
– Low inductance
• Improved board level reliability Source: Freescale.
System Cost for Radar Significant Decrease
System
Technology Package Architecture Long and mid range
Next Gen. of Dual
Pedestrian Safety
11
Parking Aides: Component Ultrasonic sensors
Parking Aid
Can warn of surrounding obstacles while parking
Using ultrasonic sensors integrated into the vehicle’s bumper, the system monitors the
area immediately ahead of and/or behind the vehicle, and recognizes obstacles in real
time. If an object is detected, the system sends a signal to the driver indicating the
distance of that object.
distance of that object.
Parking Assist
Guides the vehicle into a suitable space
An ultrasonic sensor integrated into the side of the front bumper scans the side of the road
to detect a suitable parallel or perpendicular space. Once a parking space is detected, the
system alerts the driver. If the driver activates the assistant, the system calculates the best
possible path into the space as well as the necessary steering maneuver Once complete
possible path into the space as well as the necessary steering maneuver. Once complete,
the parking assistant takes control by allowing the driver to let go of the steering wheel
and only control the parking maneuver by accelerating and braking.
The assistant also helps with pulling out of the parking space. Parking assistant technology
takes control of all steering maneuvers in order to direct the car into a position from which
the driver can safely pull out of the space.
Source: Bosch.
Radar Based Sensors: Ultrasonic
Source: Bosch.
Source: TI.
• Broad market use for parking assist
• Work on sonic altimeter principal
k i li i i l
– Emit a high frequency sound wave (above human hearing)
– Evaluate the echo which is reflected back by the object
– Time interval between signal and echo evaluated by central MCU to determine the distance to
an object
• Limited by short range ( typically < 2 meters)
• Inexpensive, competes with other radar technologies for applications
12
Quality & Reliability in Typical Automotive 125˚C Mission Profile
“Bath Tub Curve”
Source: Freescale.
• Right slope is frozen after technology, packaging and product development
and can only be influenced by temperature profile.
Applications for Image Sensors
Infineon 3D camera chip
(in cabin monitoring driver/passenger)
13
Sony Image Sensors: Stacked Die with TSVs
• Advantages 2
1.5
– 30% reduction in size
1
– Decouples image sensor and processing 1.7
0.5 1
and device technology 0.8
0
– 90nm for CIS plus 65nm processor 5MP sensor 8MP sensor 8MP stacked
1.4um Pix 1.2um Pix 1.2um Pix
– Reduces power
Traditional Stacked
• Sony proven track record in Normalized Power
smartphones
Source: Sony.
Automotive Image Sensor Packaging Trends
140 160
129
144
120 140
120
100
Package Size (sq. mm)
100
Package I/O Count
80 81 72
80
60 63 57
48
68 60
40
40
20 20
14
Cooperative Driving with V2V, V2I
• Vehicle to Vehicle (V2V)
– Hazard warnings
– Virtual towbars/platooning
– Intelligent logistics
• Vehicle to Infrastructure
– Dynamic low‐emission zone
– Live fleet tracking
– Mobile payments
– Dynamic speed advisory
– Automated emergency call
Automated emergency call
Source: NXP.
– Intelligent lighting
Functions of V2X Communication
consortium
• Obstacle warning
– Emergency vehicle warning
Partners – Electronic brake light
– Intersection assistant
– Traffic light phase assist: green light
– Traffic light phase assist: red light
– Traffic sign assistant
– Road construction information
system
– Location Information services
• Communication technologies
– UMTS or LTE
– Adapted WLAN standard for Auto
Adapted WLAN standard for Auto
Purposes
+ 6 German research institutions
+ 2 public institutions
• Defined and tested by Safe and Intelligent Mobility Test Field Germany (simTD Consortium)
research project completed June 2013.
15
Infineon Aurix™ Automotive Microprocessor Family
32‐bit TriCore™ Microcontrollers
TQFP‐80 TQFP‐100 LQFP‐144 LQFP‐176 LFBGA‐292 BGA‐416 LFBGA‐516
TQFP‐144
• Package options include leadframe (QFP) and area array (BGA) packages
• Infineon has introduced two Pb‐free BGA (LFBGA) device families
Automotive MCUs by Package Type & Performance
900
32‐bit MCUs
800
700
600
Package I/O Count
500
400
300
200
16‐bit MCUs
0
TSSOP QFN LQFP BGA FCBGA
Source: TechSearch International, Inc.
• ADAS functions are driving higher performance processors with higher pin counts
• FCBGA devices creeping into AEC‐Q100 grade 1 ADAS applications
16
Renesas R‐Car W2R, Automotive Wireless
Communications SoC for V2X
Pricing and Availability
Samples of the R‐Car W2R will be available from October 1, 2015,
priced at US$30.00 per unit. Mass production of the R‐Car W2R is
scheduled to begin in December 2016 and is expected to reach a
volume of 500,000 units per month by December 2018. (Pricing
volume of 500,000 units per month by December 2018. (Pricing
and availability are subject to change without notice).
Package Size: 176‐pin 10mm x 10mm FPBGA
Operating temperature range: Ta = ‐40 to +85˚C
Source: Renesas.
Renesas 2nd‐gen R‐Car Series for Automotive, the R‐Car E2
Availability
Samples of the Renesas R‐Car E2 SoC are available now. Mass production
is scheduled to begin in June 2016 and is expected to reach a combined
production volume of 500,000 units per month by June 2017.
(Availability is subject to change without notice.)
Package Size: 501‐pin Flip Chip BGA (21 mm × 21 mm)
Source: Renesas.
• TOKYO, Japan, October 22, 2014 — Renesas Electronics Corporation (TSE: 6723), a premier provider of advanced semiconductor solutions,
is enhancing the driving experience with robust new solutions for the integrated car cockpit. As the newest member of Renesas’ state‐of‐
the‐art R‐Car Series for automotive, the R‐Car E2 automotive systems‐on‐chip (SoCs) and the new R‐Car E2 software development board
deliver optimized infotainment and display audio for entry‐level integrated cockpit systems that support smartphone interoperability
and, in combination with other Renesas R‐Car Series devices, help achieve the scalability required to bridge the full range of
integrated cockpit systems from entry‐level to high‐end models.
17
Automotive Packaging Reliability Requirements
DIS Chassis & Safety ADAS Body Powertrain
Grade 3 & 2 Grade 1 Grade 1 Grade 1 Grade 1 & 0
‐40°C to +105°C ‐40°C to +125°C ‐40°C to +125°C ‐40°C to +125°C ‐40°C to +150°C
• An
An increased number of semiconductors are being used in automotive that are not
increased number of semiconductors are being used in automotive that are not
designed for automotive
• Zero defect quality and 15+ year reliability at the ECU level
• Shortcomings can be mitigated by collaboration among automotive OEMs, Tier 1
suppliers, and component makers by modifying vehicle and/or device mission
profile and adding system level solutions such as redundancy, external
component protection, and/or cooling
ADAS Impact on Semiconductor Industry
• ADAS is driving more semiconductor content into automobiles
• Higher level of ADAS = more electronics
• To achieve autonomous driving will need redundant systems similar to
airplanes
– Predicted to be 2X, not 3X as in the case of aircraft
• One method of redundancy leads to sensor fusion where multiple types of
sensor input would be fused together to form decision
– Example: LIDAR +rRadar could be used for front collision avoidance
– This drives higher I/O counts and greater processing power for microcontrollers
– Shifts from localized MCU to centralize fusion
– Shifts from mapBGA to FC‐BGA
• Image sensors fused with processors desirable
– Localized processing of pedestrian recognition, etc.
– Faster image processor speeds drives move to advanced process nodes
– Stacked die attractive, if meets reliability requirements
18