TMS320C6000 One-Day Workshop

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TMS320C6000 One-Day Workshop

Student Guide
TMS320C6000 One-Day Workshop

Revision 2.2 -- September 2001
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Workshop Requirements
Hardware
x Pentium 266 IBM PC or compatible (faster CPU recommended)
x 600 megabytes of hard-disk space
x Read/Write access to C:\ drive
x CD-ROM drive
x 64 megabytes of RAM (128MB suggested)
x SVGA (1024 x 768) display
x Working PC Sound card or portable audio player
Software
x Win98, WinNT4, Win2000 ONLY
x Microsoft Excel 97 (or later)
x Windows Media Player (or some other midi player)
x Netscape Navigator 3.0 or later; or Internet Explorer 3.0 or later
Other
x Speaker (to connect to DSK)
x Audio source (PC sound card, portable audio player, etc.)
x Stereo cables to connect to Speaker and Audio source
x Internet access (recommended, not required)
Workshop Materials Include

Required
x Workshop CD-ROM (with labs and VAB)
x VAB software key (sticker on CD-ROM)
x TMS320C6711 DSK (with board, cables, and CCS 2.0)
Recommended
x CSL API Reference Guide (SPRU401b)
x C6000 Users Guide (SPRU189)
x C6000 Peripherals Guide (SPRU190)
x 'C6000 Sales Update Sheet
Revision History
October 1999 – Version 1.0
November 1999 – Version 1.1
November 2000 – Version 2.0
March 2001 – Version 2.1
September 2001 – Version 2.2
Copyright 1999, 2000, 2001 by Texas Instruments Incorporated. All rights reserved.
For more information on TI Semiconductor Products, please call the SC Product Information Center at
(972) 644-5580 or email them at sc-infomaster@ti.com.
Introduction
Objectives
x Be able to describe the basic architecture of the TMS320C6000
x Use Code Composer Studio (CCS) to build, debug, optimize C programs
x Use the resources of the ‘C6711 DSP Starter Kit (DSK)
x Use TI’s Software Foundation Libraries (Chip and Board Support Library) to utilize:
On-chip peripherals (McBSP, EDMA, Cache, Interrupts)
DSK resources (Codec, switches, LEDs)
x Use DSP/BIOS to build a multi-threaded system
x Use the DSP/BIOS Real-Time Analysis features
x Build an application visually
x Inspire you to use ‘C6000
Course Outline
Workshop Agenda
Overview Hello, TI DSP, ‘C6000
DSK Tour of ‘C6711 DSK
C Code Code Composer
System Algo, RT Events, Init
DSP/BIOS Real-Time Tools
Epilogue What Next?
TMS320C6000 One-Day Workshop - Introduction 1-1

Course Outline
Module Topics
Introduction ............................................................................................................................................... 1-1
Course Outline ........................................................................................................................................ 1-1

Workshop Details .................................................................................................................................... 1-3
‘C6000 One-Day Workshop ............................................................................................................... 1-3
Applications and System Needs.......................................................................................................... 1-4
TI DSP Families ...................................................................................................................................... 1-5
TMS320C6000 Architecture.................................................................................................................... 1-6
Goals of ‘C6000 Architecture ............................................................................................................. 1-6
‘C6000 CPU Architecture Overview .................................................................................................. 1-8
‘C6000 CPU Internal Data Buses ....................................................................................................... 1-9
‘C6711 Memory................................................................................................................................ 1-10
‘C6000 Peripherals............................................................................................................................ 1-12
‘C6000 Roadmap................................................................................................................................... 1-15
Optional Topics ..................................................................................................................................... 1-16
Detailed CPU Overview.................................................................................................................... 1-16
Summary of ‘C6000 CPU and Instruction Set .................................................................................. 1-20
1-2 TMS320C6000 One-Day Workshop - Introduction

Workshop Details
Workshop Details
‘C6000 One-Day Workshop
8:30 - 9:15 Intro, TI DSP, ‘C6000 Overview
9:15 - 9:45 Tour of the ‘C6711 DSK

Lab: Breakout the DSK Hardware
9:45 - 10:00 Break
10:00 - 11:30 Using C code with the ‘C6000

Lab: CCS, Compiling, Optimizing, Benchmarking
11:30 - 12:00 Lunch
12:00 - 1:30 Building a System – Using McBSP, Interrupts

Lab: Outputting a Sinewave
1:30 - 3:00 Building a System – Using EDMA, Cache

Lab: Buffering Sinewave with EDMA
3:00 - 3:15 Break
3:15 - 4:30 DSP/BIOS – Real-Time Scheduling and Analysis Tools

Lab: Using hardware (HWI) and software (SWI) interrupts
Lab: Trying out Real-Time Debug
4:30 - 4:50 Visualizing your Application (with lab)
4:50 - 5:15 Epilog -- Where to go next?

Workshop Details
Applications and System Needs

Here’s a small sample of the wide variety of applications using DSPs today:
Wireless / Cellular HDD

Voice-band audio PRML read channel
RF codecs MR pre-amp
Voltage regulation Servo control
SCSI tranceivers
Consumer Audio
Stereo A/D, D/A DSP: Automotive
PLL Technology Digital radio A/D/A
Mixers Enabler Active suspension
Voltage regulation
Multimedia
Stereo audio
Imaging
DTAD
Graphics palette
Speech synthesizer
Mixed-signal
Voltage regulation
processor
These and future applications have varying system requirements. That is, each of these systems
demands different priorities from DSPs. For example, while performance is important in a
portable MP3 player, more important would be efficiency of power dissipation and board space.
On the other hand, a cellular base station might require higher performance to maximize the
number of channels handled by each processor.
System Considerations
Performance
Interfacing
Power
Size
Ease-of Use Integration

• Programming Cost • Memory
• Interfacing • Device cost • Peripherals
• Debugging • System cost
• Development cost
• Time to market

TI DSP Families
TI DSP Families
TI provides a variety of DSP families to handle the tradeoffs in system requirements.
Different Needs? Multiple Families!

C6000
(C62x/64x/67x)
C5000 ‘C3x ‘C4x ‘C8x

(C54x/55x)
‘C5x
Max Performance
C2000 with
(C20x/24x/28x) Efficiency Best Ease-
Ease-of-
of-Use
‘C1x ‘C2x Best MIPS per Multi Channel and
Watt / Dollar / Size Multi Function App's
Wireless phones Comm Infrastructure
Lowest Cost Internet audio players Wireless Base-
Base-stations
Control Systems Digital still cameras DSL
Motor Control Modems Imaging
Storage Telephony Multi-
Multi-media Servers
Digital Ctrl Systems VoIP Video
The TMS320C2000 (‘C2000) family of devices is well suited to lower cost, microcontroller-
oriented solutions. They are well suited to users who need a bit more performance than today’s
microcontrollers are able to provide, but still need the control-oriented peripherals and low cost.
The ‘C5000 family is the model of processor efficiency. While they boast incredible performance
numbers, they provide this with just as incredible low power dissipation. No wonder they are the
favorites in most wireless phones, internet audio, and digital camera (just to name a few) designs.
Rounding out the offerings, the ‘C6000 family provides the absolute maximum performance
offered in DSP. Couple this with its phenomenal C compiler and you have one fast, easy-to-
program DSP. When performance or time-to-market counts, this is the family to choose. It also
happens to be the family the course was designed around, thus, the rest of the workshop will
concentrate only on it.

TMS320C6000 Architecture
Goals of ‘C6000 Architecture
Conundrum: How to define Digital Signal Processing (DSP) in one slide.
In its simplest form, most DSP systems receive data from an ADC (analog to digital converter).
The data is processed by the Digital Signal Processor (also called DSP) and the results are then
transformed back to analog to be output. Digitizing the analog signal (by evaluating it to a
number on a periodic basis) and the subsequent numerical (a.k.a. digital) analysis provides a more
reliable and efficient means of manipulating the signal vs. performing the manipulation in the
analog domain. With the growing interest in multimedia, the demand for DSPs to process the
various media signals is growing exponentially.
What Problem Are We Trying To Solve?
x Y
ADC DSP DAC
Digital sampling of Most DSP algorithms can be

an analog signal: expressed with MAC:
count
A
Y = 6
i = 1
ai * xi
for (i = 1; i < count; i++){

t sum += m[i] * n[i]; }
What does it take to do this fast … and easy?
While interest in DSP is constantly growing today, the DSProcessor grew out of TI over 20 years
ago in its educational products group, namely the Speak and Spell. These products demanded
speech synthesis and other traditional DSProcessing (like filters) but with quick time-to-market
constraints.
The heart of DSP algorithms hasn’t changed from the early days of TI DSP; they still rely on the
fundamental difference equation (shown above). Often this equation is referred to as a MAC
(multiply-accumulate) or SOP (sum-of-products). TI has concentrated for years on providing
solutions to MAC based algorithms. The wide variety of TI DSPs is a testament to this focus,
even with the widely varying system tradeoffs discussed earlier.

For the ‘C6000 to achieve its goal, TI wanted to provide record setting performance while coding
with the universal ANSI C language.
Fast MAC using only C

Multiply-Accumulate (MAC) in Natural C Code
for (i = 0; i < count; i++){

sum += m[i] * n[i]; }
Fastest Execution of MACs

The ‘C6x roadmap ... from 200 to 2400 MMACs
Ease of C Programming
Even using natural C, the ‘C6000 Architecture can
perform 2 to 4 MACs per cycle
Compiler generates 80-100% efficient code
How does the ‘C6000 achieve such performance from C?
TI ‘C6000 devices deliver 200 to 2400 MMACs of performance, where MMAC is mega-MAC or
millions of MACs. It's stellar performance, in any case. When this can be achieved using C code,
it's even better. While providing efficiency ratings for a compiler is difficult, TI has benchmarked
a large number of common DSP kernels to provide an example of the compiler’s efficiency:
Sample Compiler Benchmarks

Great out-of-box experience
Completely natural C code (non ’C6x specific)
Code available at: www.ti.com/sc/c6000compiler
Versus hand-coded assembly based on cycle count
How does the ‘C6000 achieve such performance from C?
As described in the graphic, please visit our website to see more results and to download the code
and try them yourself. (Note: this graphic also appears in the upcoming chapter on using C code.)
Also, even though the ‘C6000 boasts incredible MAC performance, many users have chosen it for
either its high processing rate, its compiler, or its comprehensive suite of tools.

‘C6000 CPU Architecture Overview

How does the ‘C6000 deliver its performance, the CPU is built to dispatch 8 instructions per
cycle – and the cycle rates run as fast as about 1½ ns.
'C6000 Architecture: Built for Speed

Memory
‘C6000 Compiler excels at
Natural C
A0 B0
.D1 .D2 While dual-
dual-MAC speeds
.D1 .D2 math intensive algorithms,
flexibility of 8 independent
functional units allows the
.M1 .M2 compiler to quickly perform
.M1 .M2 other types of processing
All ‘C6000 instructions are
conditional allowing efficient
.. .L1
.L1 .L2
.L2 .. hardware pipelining
A15 B15 Instruction set and CPU

.. .. hardware orthogonality allow
.S1 .S2 the compiler to achieve 80-
80-
.S1 .S2
A31 B31 100% efficiency
Controller/Decoder
Controller/Decoder
The following example demonstrates the capability of the ‘C6000 architecture. Specifically, the
‘C6700 floating-point DSP can execute these eight instructions in parallel, allowing two single-
precision floating point MACs to be performed in just one processor cycle. Oh, and all that from
ordinary C code.
Fastest MAC using Natural C

Memory float mac(float *m, float *n, int count)
{ int i, float sum = 0;
A0 B0 for (i=0; i < count; i++) {

.D1
.D1 .D2
.D2 sum += m[i] * n[i]; } …
;** --------------------------------------------------*
.M1
.M1 .M2
.M2 LOOP: ; PIPED LOOP KERNEL
LDDW .D1 A4++,A7:A6
|| LDDW .D2 B4++,B7:B6
.L1 .L2 || MPYSP .M1X A6,B6,A5
.. .L1 .L2 .. || MPYSP .M2X A7,B7,B5
A15 B15 || ADDSP .L1 A5,A8,A8
.. .. || ADDSP .L2 B5,B8,B8
.S1
.S1 .S2
.S2 || [A1] B .S2 LOOP
A31 B31
|| [A1] SUB .S1 A1,1,A1
;** --------------------------------------------------*
Controller/Decoder
Controller/Decoder

‘C6000 CPU Internal Data Buses

For the CPU to obtain the performance described above, the DSP must be designed to afford
high-throughput of data and instructions.
Shown below is a breakout of the internal bus structure of the ‘C6201, the first device in the
‘C6000 family. As you can see, the ‘C6201 is able to perform five bus operations simultaneously:
program read, two data read/writes, one DMA read, and one DMA write. This bus architecture
provides flexibility required to achieve high throughput.
‘C6000 Internal Buses

Program Addr x32
PC
Internal Program Data x256
Memory
Data Addr - T1 x32 A
Data Data - T1 x32/64 regs
External Data Addr - T2 x32 B

Memory
Data Data - T2 x32/64 regs
DMA Addr - Read

DMA Data - Read
Peripherals DMA
DMA Addr - Write
DMA Data - Write
Because the ‘C6000 architecture is designed as a semi-custom ASIC built around the ‘C6000
custom CPU core, other family devices can conveniently contain additional buses. In fact, the bus
structure of the second device in the family – the ‘C6701 – has been modified to allow 64-bit data
loads. This allows the ‘C67x CPU to perform a single-cycle load of a double-precision floating
point operand.
Here’s a summary of the families internal data buses:
Device Data Bus Width

‘C62x 32-bit Load 32-bit Store

‘C6711 Memory
The ‘C6711 memory map consists of three levels of access
x Separate Level 1 Program and Data caches
x Unified Level 2 memory – you can use this for data or program
x Level 3 consists of external memory (briefly discussed in the next topic)
‘C6711 Memory
0000_0000
4K 64KB Internal
Program
Cache
0180_0000
On-chip Peripherals
64K
CPU Prog / Data
(Level 2)
8000_0000
0 128MB External
9000_0000
4K 1 128MB External
Data A000_0000
Cache 2 128MB External
B000_0000
3 128MB External
cache logic
FFFF_FFFF
cache details
Note: Configuring the Level 2 cache memory is discussed further in Chapter 5, but your
instructor will not have time to cover the specific details of the ‘C6711 cache or the
internal memory descriptions of the other ‘C6000 devices. There just isn’t enough time.
1 - 10 TMS320C6000 One-Day Workshop - Introduction

Even though there isn’t time today to cover these details, we thought we’d pass along in your
notes a few extra specifics about the ‘C6711 internal memory and cache.
‘C6711 Cache Details

Level 1 Program
• Always cache
L1 • 1 way cache
Prog (direct mapped)
(4KB) 256 • Zero wait-state
• Line size: 512 bits
(or 16 instr)
256
Level 1 Data
L2 • Always cache
Unified • 2 way cache
CPU • Zero wait-state
• Line size: 256 bits
(64KB)
Level 2
8/16/32/64 • Unified (prog or data)
• RAM or cache
L1 • 1-4 way cache
Data • 32 data bytes in 4 cycles
(4KB) 128 • 16 instr. in 5 cycles
• Line Size: 1024 bits
(or 128 bytes)
You might notice that the data paths are wider than expected. In fact, when a request from either
Level-1 cache is made to Level-2, two transfers actually take place. That is, sixteen instructions
or 32 bytes of data are transferred (rather than just one). This “look ahead” or “burst” feature
maximizes performance.
Along with the notes in the graphic, here are a few others:
x L1P: 4 Kbytes = 1K instructions; Line size is 512 bits = 16 instructions = 2 FP
x L2: Line size is 1024 bits = 4 FP (2x L1P line size) = 128 bytes (4x L1D line size)
x L2 can be configured 5 different ways. This is discussed in Chapter 5 of this workshop.
x Here is a diagram of the cache control logic:
‘C6711 Cache Logic

CPU requests
data
Copy Data
No No
from
Is data in L1? Is data in L2?
External Mem
to L2
Yes Yes
Send Data Copy Data

to CPU from L2 to L1
TMS320C6000 One-Day Workshop - Introduction 1 - 11

‘C6000 Peripherals
High performance processing aside, DSPs exist within a larger system context. This CPU is
supported by its peripherals in supporting this larger context.
The ‘C6000 also contains several peripherals for communication with off-chip memory, co-
processors, and serial devices. The diagram below provides a quick overview of the ‘C6000
peripheral set:
'C6000 Peripherals
XB, PCI,
Host Port Internal
Memory
GPIO
External Internal Buses

EMIF
Memory
McBSP’s
Utopia .D1 .D2
Register Set A
Register Set B
DMA, EDMA .M1 .M2
(Boot)
.L1 .L2
Timers
VCP
.S1 .S2
TCP CPU
PLL
External Memory Interface (EMIF)

EMIF is the interface between the CPU and external memory and provides all of the required pins
and timing to access various types of memory.
x Glueless access to async/sync memory
x Works with PC100 SDRAM (cheap, fast, and easy!)
x Byte-wide data access
x 16, 32, or 64-bit bus widths
Parallel Peripheral Interface

x Choice of three different parallel peripheral interfaces; it depends upon which C6000
family member is selected.
x These interfaces provide means to bootstrap the C6000.
HPI: Allows another processor access to C6000’s memory using a dedicated, async
16/32-bit bus, where C6000 is slave-only to host.
XBUS: Similar to HPI but provides but adds: 32-bit width, Master or slave modes, sync
modes, and glueless I/O interface to FIFOs or memory (memory I/O can transfer up
to full processor rates, i.e. single-cycle transfer rate).
PCI: Standard master/slave 32-bit, 33MHz PCI interface

General Purpose Input/Output (GPIO)

x Observe or control the signal of a single-pin
x 8/16 dedicated GPIO pins on ‘C64x devices
x All C6000 devices have shared GPIO with unused peripheral pins
Multi-Channel Buffered Serial Port (McBSP)

x Two (or three) full-duplex, synchronous serial-ports
x High speed, up to 100 Mb/sec performance
x Supports multi-channel operation (T1, E1, MVIP, …)
Utopia
x 50 MHz wide area network connectivity
x Use for ATM connection
x New to the ‘C64x devices
Direct Memory Access (DMA / EDMA)

x Transfers any set of memory locations to any another (internal or external)
x Transfers can be triggered by any interrupt (sync)
x Operates independent of CPU
x On reset, can provide bootstrap from memory
x 4 / 16 / 64 channels (transfer parameter sets)
DMA: Offers four fully configurable channels (additional channel for the HPI), Event
synchronization, Split mode for use with McBSP, and Address/count reload
EDMA: Enhanced DMA (EDMA) offers 16 fully configurable channels (64 on ‘C64x
devices), Event synchronization, Channel linking, and Channel auto-initialization.
Timer / Counters
x Two (or three) 32-bit timer/counters
x Can generate interrupts/events
x Both input and output pins
Turbo Coprocessor (TCP)

x Supports 35 data channels at 384 kbps
x 3GPP / IS2000 Turbo coder
x Programmable parameters include mode, rate and frame length
x New to the ‘C6416 devices
Viterbi Coprocessor (VCP)

x Supports >500 voice channels at 8 kbps
x Programmable decoder parameters include constraint length, code rate, and frame length
x New to the ‘C6416 devices

PLL
On-chip PLL provides clock quadrupling. The ‘C6000 family can run at one or more times a
provided input clock. This reduces cost and electrical interference (EMI).
Device Clock Mode Pins PLL Rate
C6201
C6204
CLKMODE x1, x4
C6205
C6701
CLKMODE0
C6202 x1, x4, x6, x7,
CLKMODE1
C6203 x8, x9, x10, x11
CLKMODE2
C6211
C6711 CLKMODE x1, x4
C6712
C6414
CLKMODE0
C6415 x1, x6, x12
CLKMODE1
C6416
Power Down
x The ‘C6000 also supports power down modes to significantly reduce overall system
power.
For more detailed information on these peripherals, refer to the ‘C6000 Peripherals Guide.

‘C6000 Roadmap
‘C6000 Roadmap
The ‘C6000 family has grown considerably over the past three years. With the addition of the 2nd
generation of devices (‘C6400), performance has increased yet again.
C6000 Roadmap
Software Compatible
Floating
Floating Point
Point
Multi-core
Multi-core C64x™
C64x ™ DSP
DSP
1.1
1.1 GHz
GHz
Performance
2nd Generation
C64x™
C64x ™ DSP
DSP
General
Purpose C6414
C6414 C6415
C6415 C6416
C6416
t ce Media 3G Wireless
1st Generation es an Gateway Infrastructure
i gh orm
H rf
C6203 Pe
C6204 C62x™
C6202
C6201 C6205
C6211 C67x™
C6701 C6711 C6712
Time
Yet, the ease of design within the ‘C6000 architecture has not been abandoned with its growing
family of devices. Software compatibility is addressed by the architecture, rather than by the
hard-work of the programmer. With both the ‘C67x and ‘C64x devices being able to run ‘C62x
object code, upgrading DSPs is much easier.
TI Floating-Point DSP Innovation

OK, it is hard not to for us to be proud of TI’s accomplishments in floating-point DSP. We have
limited this list to floating point firsts (since this is a ‘C6711 DSP workshop).
TI Floating Point - A History of Firsts

x First commercially-successful floating-point DSP .......................‘C30 (1987)
x First floating-point DSP with multiprocessing support ................‘C40 (1991)
x First $10 floating-point DSP .........................................................‘C32 (1995)
x First 1-GFLOPS DSP ...................................................................‘C6701 (1998)
x First $5 floating-point DSP ...........................................................‘C33 (1999)
x First 2-level cache floating-point DSP ..........................................‘C6711 (1999)
x First to offer 600 MFLOPS for under $10.....................................‘C6712 (2000)

Optional Topics
Optional Topics
Due to the time constraints of a one-day workshop, your facilitator will not have time to cover
these additional topics. We have included them for your convenience in the unlikely case they
should be discussed.
Detailed CPU Overview

What Problem Are We Trying To Solve?
x Y
ADC DSP DAC
Digital sampling of Most DSP algorithms can be

an analog signal: expressed as:
A
40
Y = 6
i = 1
a i * xi
t
What are the two primary instructions?
The Core of DSP : Sum of Products
40
y = ¦ an * xn
Mult
.M
Mult
.M n = 1
The ’C6000
MPY .M a, x, prod
Designed to ALU
.L
handle DSP’s ALU
.L ADD .L y, prod, y
math-
math-intensive
calculations
Note:
You don’t have to
specify functional
units (.M or .L)
Where are the variables?

Optional Topics
Working Variables : The Register File
Register File A 40
a y = ¦ an * xn
.M
.M n = 1
x
16 registers
MPY .M a, x, prod
prod .L
.L ADD .L y, prod, y
y
..
.
32-bits
How are the number of iterations specified?
Loops: Coding on a RISC Processor
1. Program flow: the branch instruction

B loop
2. Initialization: setting the loop count

MVK 40, cnt
3. Decrement: subtract 1 from the loop counter

SUB cnt, 1, cnt
The “S” Unit : For Standard Operations
Register File A 40
a y = ¦ an * xn
.S
.S n = 1
x
MVK .S 40, cnt
cnt
16 registers
loop:
prod .M
.M MPY .M a, x, prod
y
ADD .L y, prod, y
.. .L SUB .L cnt, 1, cnt
.L
. B .S loop
32-bits
How is the loop terminated?

Optional Topics
Conditional Instruction Execution
To minimize branching, all instructions are conditional
[condition] B loop
Execution based on [zero/non-zero] value of specified variable
Code Syntax Execute if:

[ cnt ] cnt z 0
[ !cnt ] cnt = 0
Note: if condition is false, execution replaced with nop
Loop Control via Conditional Branch
Register File A 40
a y = ¦ an * xn
.S
.S n = 1
x
MVK .S 40, cnt
cnt
loop:
prod .M
.M MPY .M a, x, prod
y
ADD .L y, prod, y
.. .L SUB .L cnt, 1, cnt
.L
. [cnt] B .S loop
32-bits
How are the a and x array values brought in from memory?
Memory Access via “.D” Unit
Register File A 40
a y = ¦ an * xn
.S
.S n = 1
x
MVK .S 40, cnt
cnt
loop:
16 registers
prod .M
.M LDH .D *ap ,a
y
LDH .D *xp ,x
*ap
.L
.L MPY .M a, x, prod
*xp
ADD .L y, prod, y
*yp
SUB .L cnt, 1, cnt
.D
.D [cnt] B .S loop
Data Memory:
x(40), a(40), y
How do we increment through the arrays?

Optional Topics
Auto-Increment of Pointers
Register File A 40
a y = ¦ an * xn
.S
.S n = 1
x
MVK .S 40, cnt
cnt
loop:
16 registers
prod .M
.M LDH .D *ap++, a
y
LDH .D *xp++, x
*ap
.L
*xp
ADD .L y, prod, y
*yp
SUB .L cnt, 1, cnt
.D
.D [cnt] B .S loop
Data Memory:
x(40), a(40), y
How do we store results back to memory?
Storing Results Back to Memory
Register File A 40
a y = ¦ an * xn
.S
.S n = 1
x
MVK .S 40, cnt
cnt
loop:
prod .M
.M LDH .D *ap++, a
y
LDH .D *xp++, x
*ap
.L
*xp
ADD .L y, prod, y
*yp
SUB .L cnt, 1, cnt
.D
.D [cnt] B .S loop
STW .D y, *yp
Data Memory:
x(40), a(40), y
But wait - that’s only half the story...
Dual Resources : Twice as Nice
Register File A Register File B

A0 an B0
.S1
.S1 .S2
.S2
A1 xn B1
A2 cnt B2
A3 prd .M1
.M1 .M2
.M2 B3
A4 sum B4
A5 *a B5
A6 *x .L1
.L1 .L2
.L2 B6
A7 *y B7
.. .. .. ..
.D1
.D1 .D2
.D2
A15 B15
32-bits 32-bits
Our final view of the sum of products example...

Optional Topics
Summary of ‘C6000 CPU and Instruction Set

Refer to the tables below for a summary of each Functional Unit’s instruction set. Complete
details can be found in the ‘C6000 CPU reference manual.
‘C62x RISC-like instruction set
.S Unit .L Unit
ADD NEG ABS NOT
ADDK NOT ADD OR
.S ADD2 OR AND SADD
.S AND SET CMPEQ SAT
B SHL CMPGT SSUB
CLR SHR CMPLT SUB
EXT SSHL LMBD SUBC
.L
.L MV SUB MV XOR
MVC SUB2 NEG ZERO
MVK XOR NORM
MVKH ZERO
.D
.D .M Unit
MPY SMPY
.D Unit MPYH SMPYH
.M
.M ADD NEG MPYLH
ADDAB (B/H/W) STB (B/H/W) MPYHL
LDB (B/H/W) SUB
SUBAB (B/H/W) No Unit Used
MV ZERO NOP IDLE
‘C67x : Superset of Fixed-Point

.S Unit .L Unit
ADD NEG ABSSP ABS NOT ADDSP
ADDK NOT ABSDP ADD OR ADDDP
.S ADD2 OR CMPGTSP AND SADD SUBSP
.S AND SET CMPEQSP CMPEQ SAT SUBDP
B SHL CMPLTSP CMPGT SSUB INTSP
CLR SHR CMPGTDP CMPLT SUB INTDP
EXT SSHL CMPEQDP LMBD SUBC SPINT
.L
.L MV SUB CMPLTDP MV XOR DPINT
MVC SUB2 RCPSP NEG ZERO SPRTUNC
MVK XOR RCPDP NORM DPTRUNC
MVKH ZERO RSQRSP DPSP
.D
.D RSQRDP
SPDP .M Unit
MPY SMPY MPYSP
.D Unit MPYH SMPYH MPYDP
.M
.M ADD NEG MPYLH MPYI
ADDAB (B/H/W) STB (B/H/W) MPYHL MPYID
LDB (B/H/W) SUB
LDDW SUBAB (B/H/W) No Unit Used
MV ZERO NOP IDLE
‘C64x o Superset of ‘C62x

.S Unit .L Unit
SADD2 PACK2 CMPEQ2 ABS2 SHLMB PACK2 Double-
Double-size
SADDUS2 PACKH2 CMPEQ4 ADD2 SHRMB PACKH2 Register sets
SADD4 PACKLH2 CMPGT2 ADD4 MVK(5-
MVK(5-bit) PACKLH2
ANDN MAX
(A16-
(A16-A31)
.S
.S PACKHL2 CMPGT4 PACKHL2
(B16-
(B16-B31)
SHR2 UNPKHU4 BDEC MIN PACKH4
SHRU2 UNPKLU4 BPOS SUB2 PACKL4
SHLMB SWAP2 BNOP SUB4 UNPKHU4 Advanced
SHRMB SPACK2 ADDKPC SUBABS4 UNPKLU4
.L
.L SPACKU4 ANDN SWAP2/4 Instruction
Packing
.D Unit .M Unit (minimizes
.D code-
code-size)
.D ADD2 LDDW AVG2 MVD MPY2/SMPY2
SUB2 LDNW AVG4 BITC4 DOTP2
AND LDNDW .M
.M
ROTL BITR DOTPN2 Advanced
ANDN STDW SSHVL DEAL DOTPRSU2 Emulation
.M
.M OR STNW SSHVR SHFL DOTPNRSU2
Features
XOR STNDW BITC4 MPYHI DOTPU4
ADDAD MVK(5-
MVK(5-bit) BITR MPYLI DOTPSU4
DEAL MPYHIR GMPY4
SHFL MPYLIR XPND2/4

'C6711 DSK Tour
Today’s Agenda
Agenda
C Code Code Composer Studio
System x McBSP, Interrupts
x EDMA, Cache
VAB Visual Design
Epilogue What Next?
T HE WORLD LEADER IN DSP SOLUTIONS TI
Introduction
The ‘C6711 DSK provides a powerful, low-cost development environment. This chapter serves to
introduce its the main hardware and software components.
The lab at the end of this chapter asks you to hook-up your DSK and run the confidence test to
verify it’s working. We’ll get a chance to work with Code Composer Studio (CCS), the main
software package that ships with the DSK, during the next chapter.
TMS320C6000 One-Day Workshop - 'C6711 DSK Tour 2-1

DSK Summary
Module Topics
'C6711 DSK Tour ...................................................................................................................................... 2-1
DSK Summary ......................................................................................................................................... 2-2

DSK Hardware........................................................................................................................................ 2-3
Overview............................................................................................................................................. 2-3
Reset.................................................................................................................................................... 2-4
Memory Map ...................................................................................................................................... 2-6
DSK Software Utilities ............................................................................................................................ 2-7
Utilities that run from PC Host command line.................................................................................... 2-7
Utilities available within CCS............................................................................................................. 2-7
PC Host to DSK communications....................................................................................................... 2-8
DSK Help.......................................................................................................................................... 2-10
Lab 2 – DSK Hardware Setup Lab........................................................................................................ 2-11
DSK Summary
The DSP Starter Kit provides a low-cost hardware development environment for the ‘C6000 DSP
family. Specifically, it contains the ‘C6711 processor. The following graphic provides all the
pertinent features of the DSK.
DSK Contents (i.e. What you get)

Hardware
150 MHz ‘C6711 DSP
TI 16-bit A/D Converter (‘AD535)
External Memory
16M Bytes SDRAM
128K Bytes Flash ROM
LED’s
Daughter card expansion
Power Supply & Parallel Port Cable
Software
Code Generation Tools
(C Compiler, Assembler & Linker)
Code Composer Debugger
(256K program limitation)
Example Programs & S/W Utilities
Power-on Self Test
Flash Utility Program
Board Confidence Test
Host access via DLL
Sample Program(s)
Along with this information, TI provides schematics and board layout information for the
hardware design.
2-2 TMS320C6000 One-Day Workshop - 'C6711 DSK Tour

DSK Hardware
DSK Hardware
Overview
Here’s a detailed look at the DSK board and it’s primary features:
‘C6711 DSK Overview

1.8V Power Supply 16M SDRAM 128K FLASH Daughter Card I/F
(EMIF Connector)
Parallel
Port I/F
TMS320C6711 ‘C6711
DSP
Power
Jack D. Card I/F
(Periph Con.)
Power
LED User DIP
switches
Reset Three User LEDs

3.3V Power Supply Emulation 16-bit codec (A/D & D/A)
JTAG Header Line Level Input (microphone)
JTAG Header Line Level Output (speakers)
The daughter card sockets included on the DSK are similar to those found on the other DSKs and
EVMs available from Texas Instruments. Thus, any work (by you or any 3rd Party) applied to
daughter card development can be reused with the DSK. If you’re interested in designing a
daughter card for the DSK/EVM, check the TI website for an application note which describes it
in detail.

DSK Hardware
Reset
Providing reset control for development boards is always challenging. Understanding the various
reset capabilities and issues will help to provide you an easy DSP development experience.
CCS Reset DSK Resets

Menu selection:
DebugoDSP Reset
Resets ‘C6711 DSP
Causes bootload
from FLASH which
overwrites internal
memory
TMS320C6711
Absolute Reset
On rare occasions
you might have to: Reset Pushbutton Power On Self Test (POST)
Pull power jack Counts 1 - 7
Don’t push when CCS
Pull parallel port is running 4: }}z mic input o spkr out
5: z}z sinewave o spkr out
Does not force FULL
Don’t start CCS until end
Apply Power system reset
POST runs
(all 3 LEDs flash at the end)
To fully reset board, If switches are set to 0100, a fast
pull power plug version of POST is run
There are four or five reset methodologies for the ‘C6711 DSK. We’ll list each below; please
refer to the diagram above for additional caveats on the various DSK resets.
1. Power – Removing power from the board, then applying power forces the board to begin
operating from its reset state. The DSK Power-On Self-Test (POST) should run after
applying power to the board.
2. Absolute Reset – In rare cases, the power drawn from the parallel port may prevent a full
DSK reset, even if you have removed the power connector. Therefore, to absolutely force a
reset, remove all cable connections, then reconnect them to begin in from the DSKs reset
state. (POST should run.)
3. Reset Pushbutton – The DSK has a reset pushbutton that may or may not reset the whole
DSK board. By design, if Code Composer Studio (CCS) has been run, the reset pushbutton
will not reset the emulation logic which connects the parallel port to the JTAG test access
port on the DSP. This was designed to prevent CCS from crashing if the button was pushed
while CCS was running. Still, it is recommended that you close CCS before pushing the
reset button the board. While nothing will be damaged, CCS may not work properly after
the reset button has been pushed.
Occasionally, the codec may not be properly reset after pushing the reset button. If you are
using the codec, your best bet to assure reset is to remove and apply power.
Pushing the reset button may or may not cause the POST to run. If it runs, then the board can
be assured it has been fully reset. If not, then you may want to remove/reapply power to
verify the codec was properly reset.
4. Software DSK Reset – The DSK software installation provides an DOS batch file which
forces the emulation logic on the board to be reset. A shortcut to this can be found on the
Windows Start menu (and may also be on the Windows desktop). This software reset is

DSK Hardware
similar to that provided with TI’s full hardware emulation tools (XDS tools). This reset does
not cause the POST to run.
5. DSP Reset on the CCS Debug Menu –The DSP Reset menu selection within CCS is
intended to reset the DSP chip only. This is accomplished by sending a reset signal via the
emulation port on the DSP which forces it to reset and sets the program counter back to its
reset location (address 0).
The ‘C6711 bootloader cannot be disabled; therefore, the internal memory of the DSP is
overwritten from the DSKs FLASH memory whenever the device is reset. While convenient
for production usage, this presents a challenge to development board designers. In the case of
the DSK, TI provides a DSP RESET script (GEL script) that is run by CCS every time you
invoke DSP Reset. (You can view this script by viewing the contents of the dsk6xinit.gel file
that ships with the DSK.) Essentially, this script forces the DSP internal memory and EMIF
control registers to their reset states before actually sending the reset command to the DSP.
This assures that CCS is cognizant that the DSPs memory state has changed.
Note: The Restart command on the CCS Debug menu does not emulate a DSP device reset. The
only register that is modified by restart is the program counter (PCE1). The program
counter is loaded with the entry point specified by the code generation tools (-e linker
option, or default value which is usually _c_int00).
We suggest you refer to the DSK Help file for additional details.
Power On Self-Test stages

The following table details the various states of the POST routine and how you can visually track
its progress.
Power On Self Test (POST)

Test LED 3 LED 2 LED 1 Description
0 0 0 0 Start state
1 0 0 1 DSP internal SRAM test
2 0 1 0 External SDRAM test
3 0 1 1 DSP McBSP0 loop back test
4 1 0 0 External codec read/write test
5 1 0 1 External codec tone generation test
6 1 1 0 External LED and DSP timer test
7 1 1 1 Unused – available for future test use
BLINK ALL All tests completed successfully
Stored in FLASH memory

Runs every time DSK is powered on and reset
Source code on DSK CD-ROM
If switch 2 is down, then a Fast POST occurs - a shorter
version of the POST sequence
Note: Don’t worry if it takes a few seconds to perform Test 2 (External SDRAM test). It can
take a while to test all the SDRAM memory included on the DSK. (Of course, if it takes
more than 15-30 seconds, then there might be a problem.)

DSK Hardware
Memory Map
The following memory map and table describe the memory resources designed into the ‘C6711
DSK.
Memory Maps
TMS320C6711 ‘C6711 DSK
0000_0000
16MB SDRAM
64KB Internal
(Program or Data)
0180_0000 128K byte FLASH

On-chip Periph
4 byte I/O Port 9008_0000
LED’s
Switches
8000_0000
128MB External DSK status
DSK rev#
9000_0000 Daughter Card
128MB External
A000_0000 Available via
128MB External Daughter Card
B000_0000 Connector
128MB External
FFFF_FFFF
The left map describes the resources available on the ‘C6711 DSP, the right map details how the
external memory resources were used on the DSK.
DSK Memory
Description Origin
MapLength
Internal RAM (L2) mem 0x00000000 0x00010000
EMIF control regs 0x01800000 0x00000024
Cache configuration reg 0x01840000 0x00000004
L2 base addr & count regs 0x01844000 0x00000020
L1 base addr & count regs 0x01844020 0x00000020
L2 flush & clean regs 0x01845000 0x00000008
CE0 mem attribute regs 0x01848200 0x00000010
CE3 mem attribute regs 0x018482c0 0x00000010
HPI control reg 0x01880000 0x00000004
McBSP0 regs 0x018c0000 0x00000028
McBSP1 regs 0x01900000 0x00000028
Timer0 regs 0x01940000 0x0000000c
Timer1 regs 0x01980000 0x0000000c
Interrupt selector regs 0x019c0000 0x0000000c
EDMA parameter RAM 0x01a00000 0x00000800
EDMA control regs 0x01a0ffe0 0x00000020
QDMA regs 0x02000000 0x00000014
QDMA pseudo-
pseudo-regs 0x02000020 0x00000014
McBSP0 data 0x30000000 0x04000000
McBSP1 data 0x34000000 0x04000000
CE0, SDRAM, 16 MBytes 0x80000000 0x01000000
CE1, 8-
8-bit ROM, 128 Kbytes 0x90000000 0x00020000
CE1, 8-
8-bit I/O port 0x90080000 0x00000004
CE2 - Daughtercard 0xA0000000 0x10000000
CE3 - Daughtercard 0xB0000000 0x10000000

DSK Software Utilities

Utilities that run from PC Host command line
PC Host Utilities
DSK Loader dsk6ldr.exe filename.out
Runs on PC host
Downloads .out file to DSK memory map
Stand alone DSK loader for when you want to bypass CCS
FLASH Programming hex6x.exe f.out h.cmd

flash.exe f.hex
First, convert file.out to file.hex
The flash utility downloads the hex file into the on-
on-DSK FLASH
Both programs run on the PC host
DSK Confidence Test dsk6xtst

Run from MSDOS prompt
Command-line utility tests proper installation of the DSK board
Additionally, it tests: Internal SRAM, SDRAM, FLASH, McBSP,
Timers, EDMA, LEDs, Audio codec
Utilities available within CCS

CCS DSK Utilities
Confidence Test Quick Test
1. Unload dsk6xinit.gel Run from CCS GEL menu

2. Load conftest.gel Defined in dsk6xinit.gel
3. Run confidence tests from Non-
Non-intrusive test by
GEL menu reading and writing:
LEDs
Switches
DSK board revision
Outputs switch values
Note: The Confidence Test may be run from either the PC host (former) or on the DSP within
CCS (latter). In the upcoming lab exercise, we will run it from the PC only.

PC Host to DSK communications

The parallel port interface provides communication pathway between the PC and the DSK.
PC Æ DSK Communications
CCS uses parallel port to control DSP via JTAG port
You can use full TI eXtended Dev System (XDS) via 14 pin
header connector
Communicate from Windows program (C++, VB) via parallel
port using Win32 DLL
Use HPI via Win32 DLL

DSP
JTAG
JTAG
Emulation
.......
....... Port
Note: You should not use the parallel port for simultaneous emulation and HPI connection.
This interface operates in one of two modes:

1. CCS emulation mode, where the parallel port is connected to the JTAG test access port on the
DSP. This is the normal mode which allows you to load, run, and debug your DSP programs.
If you chose to use a separate emulation connection, such as TI’s XDS510 eXtended
Development System, the DSK provides the required 14 pin header connector. When the
XDS is plugged into the connector, the DSK automatically disables the parallel port JTAG
connection to prevent conflicts. (No switches setting or jumpers are required.)

2. The Win32 HPI mode (for lack of a better name) provides a second method to
control/observe the DSP. Using the Win32 API functions delivered as a DLL file with the
DSP, you can write a PC based program that can communicate with the DSP via its Host Port
Interface (HPI).
Win32 API for Host

dsk6x_open( ) Open a connection to the DSK
dsk6x_close( ) Close a connection to the DSK
dsk6x_reset_board( ) Reset the entire DSK board
dsk6x_reset_dsp( ) Reset only the DSP on the DSK
dsk6x_coff_load( ) Load a COFF image to DSP memory
dsk6x_hpi_open( ) Open the HPI for the DSP
dsk6x_hpi_close( ) Close the HPI for the DSP
dsk6x_hpi_read( ) Read DSP memory via the HPI
dsk6x_hpi_write( ) Write to DSP memory via the HPI
dsk6x_generate_int( ) Generate a DSP interrupt
The Win32 HPI mode provides great flexibility for controlling the DSP. It is also an nice
example of an HPI interface. For other examples, please refer to the wide selection of
application notes on the TI website (http://www.dspvillage.com).
Note: The parallel port interface is designed to only support one mode at a time. If you are
using CCS via the parallel port connection, you should not talk to the DSP via the Win32
HPI mode.
If you connect CCS via an XDS emulation tool (by connecting it to the 14 pin header
connector), you are free to communicate to the HPI via the parallel port.

DSK Help
This file describes the board design, its schematics, and how the DSK utilities work.
DSK Help
2 - 10 TMS320C6000 One-Day Workshop - 'C6711 DSK Tour

Lab 2 – DSK Hardware Setup Lab

1. If sharing a PC, select one DSK to use.
In most workshops you will be required to share a PC with a classmate. Please select one of
your DSKs to hook up and use throughout the day. It shouldn’t matter which one is used as
they’re all the same. (If you have time, you may want to hook-up and run the confidence test
on both boards. This way you can be assured of your board’s correct operation.)
2. Connect cables:
x Parallel Port
x Speaker
x Audio Input*
* You may or may not have audio input cables available in your classroom. If you do, then
connect it. During the board confidence test, run in step 5, you will hear the audio input
passed through to the speaker if an audio input is connected.
3. Connect Power and observe Power On Self-Test (POST). Refer to page 2-5 if you wish to
know more about this specific LED indicator sequence.
4. In the unlikely event that the DSK software tools have not been previously installed on the
workshop PCs, your instructor may direct you to do so. These instructions are contained in
the workshop appendix.
5. Without using CCS, perform a DSK confidence test from your PC. Here’s a couple notes
before you begin the test:
x The SDRAM may take a while due to the large amount of SDRAM on the ‘C6711 DSK.
x The CODEC test performs two operations: (1) a 1KHz tone output, and (2) an audio
input to output loopback. To hear these tests you must have connected a speaker and
audio source. Nothing bad will happen if you don’t, you just won’t hear the sound.
For your convenience, we have created a conftest.bat file in the directory with the other
workshop lab files.
Navigate to: C:\c60001day\labs\lab2
Double-click on the batch file: ConfTest.bat
Close the DOS window when the tests are completed.
Note: If the DSK fails the confidence test, first assure that you have properly connected all
wires and that none of them are loose.
If the wiring is OK, did the POST run when power was applied? Try unplugging and
plugging back in the power jack to test this again.
If you are still unable to proceed, please ask the facilitator for help.
TMS320C6000 One-Day Workshop - 'C6711 DSK Tour 2 - 11

Note, we used a batch file to run the confidence test. It can also be run directly by navigating
in Windows Explorer or DOS to c:\ti\c6000\dsk6x11\conftest\dsk6xtst.exe. Also, you can
chose the Confidence Test shortcut on the start menu (placed there during CCS installation)
or on the Windows desktop (placed there by installing the C6000 1-day Workshop lab files).
End of Exercise
Please inform your facilitator that you have finished. Thank You.
2 - 12 TMS320C6000 One-Day Workshop - 'C6711 DSK Tour

Using C on the 'C6000
Introduction
The use of the C language has grown significantly over the past few years. TI has responded by
creating an architecture and compiler that yields such efficient processor code, that you may never
need to program in assembly. Thus, we shall begin discussing ‘C6000 coding with the C Compiler.
All it takes is a couple of minutes to get C code running on the 'C6000. That's the goal of this module.
First you'll compile a C dot-product routine, then learn how to debug and benchmark, as well.
Outline
Agenda
C Code Code Composer Studio
System x McBSP, Interrupts
x EDMA, Cache
VAB Visual Design
Epilogue What Next?
T HE WORLD LEADER IN DSP SOLUTIONS
TMS320C6000 One-Day Workshop - Using C on the 'C6000 3-1

Module Topics
Using C on the 'C6000 ............................................................................................................................... 3-1
Programming Methods for the ‘C6000 ................................................................................................... 3-3

Code Composer Studio............................................................................................................................ 3-5
Code Composer Projects......................................................................................................................... 3-7
CCS Project Options ........................................................................................................................... 3-9
Using the Configuration Tool (.CDB files)....................................................................................... 3-14
C Data Types......................................................................................................................................... 3-16
LAB 3: Using C ..................................................................................................................................... 3-17
Reset Board and Start CCS ............................................................................................................... 3-18
Configure CCS Environment ............................................................................................................ 3-18
Create the Lab3 project ..................................................................................................................... 3-20
Create a CDB file.............................................................................................................................. 3-21
Run and Debug Code ........................................................................................................................ 3-24
Benchmark with Optimization .......................................................................................................... 3-30
Lab 3 Summary................................................................................................................................. 3-33
Take Home Exercises ............................................................................................................................ 3-34
Lab 3a – Floating-Point Dot-Product................................................................................................ 3-34
Lab 3b – Faster floating-point dotp() using DATA_ALIGN ............................................................ 3-37
Lab 3c – Customize CCS .................................................................................................................. 3-39
Debrief - Lab Exercises......................................................................................................................... 3-41
Further C Optimization ......................................................................................................................... 3-42
CCS Scripting/Automation Tools .......................................................................................................... 3-43
Volatile .................................................................................................................................................. 3-45
PBC – Profile Based Compiler.............................................................................................................. 3-46
3-2 TMS320C6000 One-Day Workshop - Using C on the 'C6000

Programming Methods for the ‘C6000

Texas Instruments offers three methods for programming the ‘C6000 series of DSP microprocessors:
C, Linear Assembly, and standard assembly language. While C and assembly are common among
processors, Linear Assembly is something new.
Programming the ‘C6000

Source Efficiency* Effort
C
Compiler 80 - 100% Low
C ++ Optimizer
Linear
Assembly 95 - 100% Med
ASM Optimizer
ASM Hand 100% High

Optimize
* Typical efficiency vs. hand optimized assembly
As described in the introduction, C is –by far– the most popular method of programming the ‘C6000
family of devices. The ‘C6000 processor was designed with C code in mind. In fact, its architecture
was designed concurrently with its C compiler. This provided a rapid prototyping design environment
and afforded effective architectural decisions.
Unlike most real-time embedded DSPs, the efficiency of the C compiler, combined with the raw high-
performance of the ‘C6000, makes for an incredible combination. The goal? To achieve
supercomputing performance with maximum ease-of-use.
OK, so this sounds like marketing stuff (and it is), but it’s also true. C is the predominant language for
‘C6000 programming. The efficiency enumerated above has been demonstrated across a series of
DSP-centric benchmarks. In fact, in the first couple of lab exercises, we’ll see the performance in the
100% range.

Here are some additional benchmarks you can view online:
Sample Compiler Benchmarks

Algorithm Used In Asm Assembly C Cycles C Time % Efficiency
vs
Cycles Time (Ps) (Rel 4.0) (Ps) Hand Coded
Block Mean Square Error For motion
MSE of a 20 column
image matrix
compensation
of image data
348 1.16 402 1.34 87%
CELP based
Codebook Search voice coders 977 3.26 961 3.20 100%
Vector Max Search
40 element input vector Algorithms 61 0.20 59 0.20 100%
All-zero FIR Filter VSELP based
40 samples,
10 coefficients voice coders 238 0.79 280 0.93 85%
Minimum Error Search Search
Table Size = 2304 Algorithms 1185 3.95 1318 4.39 90%
IIR Filter
16 coefficients Filter 43 0.14 38 0.13 100%
IIR – cascaded biquads
10 Cascaded biquads
(Direct Form II)
Filter 70 0.23 75 0.25 93%
MAC VSELP based
Two 40 sample vectors voice coders 61 0.20 58 0.19 100%
Vector Sum
Two 44 sample vectors 51 0.17 47 0.16 100%
MSE Mean Sq. Error
Computation
MSE between two 256
element vectors in Vector 279 0.93 274 0.91 100%
Quantizer
TI C62x™ Compiler Performance Release 4.0: Execution Time in Ps @ 300 MHz
Versus hand-coded assembly based on cycle count
x Great out-of-box experience

x Completely natural C code (non ’C6000 specific)
x Code available at: http://www.ti.com/sc/c6000compiler
So if C is so good, how come we offer two other programming methodologies?
As with all microprocessors, our machine instructions are translated into assembly mnemonic syntax.
While you may program in assembly language, it is done rarely. Rather, when you want to write
directly at the machine level, Linear Assembly is a better option. Linear assembly is a variation of
standard assembly. It provides access to the same mnemonic instructions but, since code passes
through an Assembly Optimizer tool, Linear Assembly provides three important benefits:
Instead of defining and specifying specific register usage, the Assembly Optimizer can provide
register assignment and optimization for you.
The tedious chore of setting up argument passing from subroutine to subroutine, or C function to
assembly subroutine is handled automatically for you.
The ‘C6000, like most RISC processors, provides a simple, fast instruction set. Likewise, it’s also a
pipelined processor that requires management of instruction latencies. With the Assembly Optimizer
you are freed from worrying about these issues. While the “rules” to follow are simple, we thought,
‘Why can’t we handle these issues for you?’.
Unfortunately, there is no time to discuss Linear Assembly and the Assembly Optimizer in the one-
day workshop. They are covered in greater detail in the four-day ‘C6000 workshop.

Code Composer Studio

The Code Composer Studio (CCS) application provides all the necessary software tools for DSP
development. At the heart of CCS you’ll find the original Code Composer IDE (integrated
development environment). The IDE provides a single application window in which you can perform
all your code development; from entering and editing your program code, to compilation and building
an executable file, and finally, to debugging your program code.
Standard SIM
3rd Party PLUG INS
Compiler
Runtime
Asm Opt Libraries
DSK
.out
Edit Asm Link Debug
EVM
DSP/BIOS DSP/BIOS
Config Third
Tool Libraries
Party
Code Composer Studio Includes:

Integrated Edit / Debug GUI Simulator *
Code Generation Tools Plug-ins
BIOS: Real-time kernel
Real-time analysis Æ RTDX
* Simulator not included with DSK, only with full version of CCS.
When TI developed Code Composer Studio, it added a number of capabilities to the environment.
First of all, the code generation tools (compiler, assembler, linker) were added so that you wouldn’t
have to purchase them separately. Secondly, the simulator was included (only in the full version of
CCS, though). Third, TI has included DSP/BIOS. DSP/BIOS is a real-time kernel consisting of three
main features: a real-time pre-emptive scheduler; real-time capture and analysis; and finally, real-time
I/O.
Finally, CCS has been built around an extensible software architecture which allows third parties to
build new functionality via plug-ins. See the TI website for a listing of 3rd parties already developing
for CCS. At some point in the future, this capability may be extended to all users. If you have an
interest, please voice your opinion by calling the TI SC Product Information Center (you can find their
phone number and email address in last module, “What Next?”).

Here’s a snapshot of the CCS screen:
Since it’s hard to evaluate a tool by looking at a simple screen capture, we’ll provide you with plenty
of hands-on-experience throughout today.

Code Composer Projects

Code Composer works within a project paradigm. If you’ve done code development with most any
sophisticated IDE (Microsoft, Borland, etc.), you’ve no doubt run across the concept of projects.
Essentially, within CCS you create a project for each executable program you wish to create. Projects
store all the information required to build the executable. For example, it lists things like: the source
files, the header files, the target system’s memory-map, and program build options.
What is a Project?
Project (.PJT) file contains

Project files (by reference):
Source
Libraries
Linker, etc …
Project settings:
Build configurations
(compiler, asm options)
DSP/BIOS
Linking, etc …
The project information is stored in a .PJT file, which is created and maintained by CCS. To create a
new project, you need to select the Project:New… menu item.
Project Menu
Project Menu
Create new projects
Open projects
Manage projects

Along with the main Project menu, you can also manage open projects using the right-click
popup menu. Either of these menus allows you to Add Files… to a project. Of course, you can
also drag-n-drop files onto the project from Windows Explorer.
Right-Click Menu
Add files… to project
Add drag-n-drop files onto .PJT
Export Makefile
New Export project details
to a standard .mak file
Set as Active Project
New Keep multiple
projects open
Open for Editing
New Opens PJT with
text editor
Configurations…
New Keep multiple sets
of build options
Options…
Set build options
There are many other project management options. In the preceding graphic we’ve listed a few of
the most commonly used actions:
x If your project team builds code outside the CCS environment, you may find Export
Makefile (and/or Source Control) useful.
x CCS now allows you to keep multiple projects open simultaneously. Use the Set as
Active Project menu option or the project drop-down to choose which one is active.
x If you like digging below the surface, you’ll find that the .PJT file is simply an ASCII
text file. Open for Editing opens this file within the CCS text editor.
x Configurations… and Options… are covered in detail, next.

CCS Project Options

Project options direct the code generation tools (i.e. compiler, assembler, linker) to create code
according to your system’s needs. Do you need to logically debug your system, improve performance,
and/or minimize code size? Your C6000 results can be dramatically affected by compiler options.
There are probably about a 100 options available for the compiler alone. Usually, this is a bit
intimidating to wade through. To that end, we’ve provided a condensed set of options. These few
options cover about 80% of most users needs.
Compiler Build Options

Nearly one-hundred compiler options available to
tune your code's performance, size, etc.
Following table lists most commonly used options:
Options Description
-mv6700 Generate ‘C67x code (‘C62x is default)
-mv6400 Generate 'C64x code
-fr <dir> Directory for object/ouput files
-q Quiet mode (display less info while compiling)
-g Enables src-level symbolic debugging
debug
-s Interlist C statements into assembly listing
-o3 Invoke optimizer (-o0, -o1, -o2/-o, -o3)
optimize -gp Enable function-level profiling
(release)
-k Keep asm files, but don't interlist
As you probably learned in college programming courses, you should probably follow a two-step
process when creating code:
x Write your code and debug its logical correctness (without optimization).
x Next, optimize your code and verify it still performs as expected.
As demonstrated above, certain options are ideal for debugging, but others work best to create
highly optimized code. When you create a new project, CCS creates two sets of build options –
called Configurations: one called Debug, the other Release (you might think of as Optimize).
Configurations will be explored in the next section.
Note: Like any compiler or toolset, learning the various options requires a bit of
experimentation, but it pays off in the tremendous performance gains that can be
achieved by the compiler.

Build Option Configurations

To help make sense of the many compiler options, TI provides two default sets of options
(configurations) in each new project you create:
Debug -g -q -fr"c:\modem\Debug" -d"_DEBUG" -mv6700
Release -q -o3 -fr"c:\modem\Release" -mv6700
The Release (optimized) configuration invokes the optimizer with –o3 and disables source-level,
symbolic debugging by omitting –g (which disables some optimizations to enable debug).
Two Default Build Configurations

-g -q -fr"c:\modem\Debug" -d"_DEBUG" -mv6700
For new projects, CCS
automatically creates two
-q -o3 -fr"c:\modem\Release" -mv6700 build configurations:
Debug (unoptimized)
Release (optimized)
Use the drop-down to
quickly select build config.
Add/Remove build config's
with Project Configurations
dialog (on project menus)
Edit a configuration:
1. Set it active
2. Modify build options
(shown next)
3. Save project
In many cases you might also want to add the –gp option to the Release configuration as this
makes it easier to evaluate the optimized performance. In the upcoming lab exercise, you will
build a new configuration (called Optimize) that adds –gp to the Release configuration.
Note: The examples shown here are for a C67x DSP, hence the –mv6700 option.
3 - 10 TMS320C6000 One-Day Workshop - Using C on the 'C6000

CCS Graphical Interface for Build Options

To make it easier to choose build options, CCS provides a graphical user interface (GUI) for the
various compiler options. Here’s a sample of the Debug configuration options.
Build Options GUI (Debug)
These are the default

build options for a
new project
GUI has 8 pages of
options for code
generation tools
Basic page defaults
are -g -mv6700
There is a one-to-one relationship between the items in the text box and the GUI check and drop-
down box selections. Once you have mastered the various options, you’ll probably find yourself
just typing in the options.
Here are a few more compiler option pages (the ones that contain options from the Debug
configuration):
Feedback page
Default is -q, which
suppresses some
tool feedback
TMS320C6000 One-Day Workshop - Using C on the 'C6000 3 - 11

Files page
Code gen tools create:
.obj
.out
.map
These files are saved

to the -fr path
why use -fr
Why Use –fr?

When changing configurations, the -fr option prevents the object (and .OUT) files from being
overwritten. While not required, it allows you to preserve all variations of your projects output.
Why use -fr?

When changing configurations, using -fr prevents
the object (and .out) files from being overwritten
While not required, it allows you to preserve all
variations of your projects output

Preprocessor page
-d option allows symbols
to be defined
_DEBUG used by CCS
enviroment during debug
Linker Build Options

There are many linker options but these four handle all of the basic needs.
x -o <filename> specifies the output (executable) filename.
x -m <filename> creates a map file. This file reports the linker’s results.
x -c tells the compiler to autoinitialize your global and static variables.
x -x tells the compiler to exhaustively read the libraries. Without this option libraries are
searched only once, and therefore backwards references may not be resolved.
Linker Options
Options Description
-o<filename> Output file name
-m<filename> Map file name
-c Auto-initialize global/static C variables
-x Exhaustively read libs (resolve back ref's)
Like Compiler Options,
Build Configurations also
contain Linker Options
-q -c -o".\Debug\lab3.out" -x Default linker options are
shown for the Debug
configuration of a project
name lab3.pjt
".\Debug\" indicates one
subfolder level below
.\Debug\lab3.out project (.pjt) location
Linking discussed in
Run-time Autoinitialization detail during four-day
workshop
Due to time, the linker is not covered in greater detail. Please refer to the C6000 Assembly
Language Tools User’s Guide or attend the 4-day C6000 DSP Workshop.
Using the Configuration Tool (.CDB files)

The Configuration Tool is often called the DSP/BIOS Configuration Tool since many of its
modules pertain to DSP/BIOS items. Sometimes it’s also called the GUI Tool or GUI
Configuration Tool. In this workshop, we use all these names interchangeably; though, most
often we’ll call it the Config Tool.
The Config Tool is used to create and edit a Configuration DataBase (.CDB) file. If we talk about
using CDB files, we’re also talking about using the Config Tool. The following figure shows a
CDB file opened within the configuration tool:
Configuration Tool

Simplifies
Simplifies system
system design
design

Automatically
Automatically includes the
includes the
appropriate
appropriate runtime
runtime support
support libraries
libraries

Automatically
Automatically handles
handles interrupt
interrupt
vectors
vectors and
and system
system reset
reset

MEM
MEM handles
handles system
system memory
memory
configuration
configuration (builds
(builds CMD
CMD file)
file)

Many
Many other capabilities will be
other capabilities will be
discussed
discussed later
later …
…
As the bullets in the figure state, the Config Tool simplifies embedded design by providing a GUI
interface to configure many system objects. It also automates many system requirements
(including libraries, building vector tables, etc.). For pure coding (and code optimization) the
Config Tool offers only a few features. These few features will be explored in this – and the next
few – chapters. Later in the workshop, we will examine some of its many other capabilities. To
explore its full capabilities, we suggest you attend the 4-day DSP/BIOS workshop. (We just don’t
have time to explore all of it in this workshop.)

When a CDB file is saved, the Config Tool creates a number of other files:
Filename.cdb Configuration Database
Filenamecfg_c.c C code created by Config Tool
Filenamecfg.s62 ASM code created by Config Tool
Filenamecfg.cmd Linker commands
Filenamecfg.h header file for *cfg_c.c
Filenamecfg.h62 header file for *cfg.s62
When you add a CDB file to your project, CCS automatically adds the .C and assembly (.S62)
files. To prevent confusion, these files are added to the Generated Files folder.
On the other hand, the CMD file must be added manually. In some systems, a user will create
their own CMD file and reference the config tool’s CMD file. Since a project may only contain a
single CMD file, the decision was made to make this a manual step for the user.
These steps will be explored in the upcoming lab exercise.

C Data Types
C Data Types
OK, so discussing data types isn’t a sexy topic. It is an important topic, though, if you’re interested in
achieving maximum performance.
‘C6000 C Data Types

Type Size Representation
char, signed char 8 bits ASCII
unsigned char 8 bits ASCII
short 16 bits 2’s complement
unsigned short 16 bits binary
int, signed int 32 bits 2s complement
unsigned int 32 bits binary
long, signed long 40 bits 2’s complement
unsigned long 40 bits binary
enum 32 bits 2’s complement
float 32 bits IEEE 32-bit
double 64 bits IEEE 64-bit
long double 64 bits IEEE 64-bit
pointers 32 bits binary
Here are a few short rules to keep in mind regarding C data types:
1. Use short types for integer multiplication. As with most fixed-point DSPs, our ‘C62x devices use
a 16x16 integer multiplier. If you specify an int multiply, a software function in the runtime
support library will be called. (Note, the ‘C67x devices do have a 32x32o64-bit multiply
instruction, MPYID.)
2. Use int types for counters and indexes. As we examine during the next module, all registers and
data paths are 32-bits wide.
3. Avoid accidentally mixing long and int variables. Many compilers allocate 32-bits for both types,
thus some users interchange these types. The ‘C6000 allocates longs at 40-bits to take advantage
of 40-bit hardware within the CPU. If you mix types, the compiler may be forced to manage this –
which will most likely cost you some performance.
Why 40-bits? The extra 8-bits are often used to provide headroom in integer operations. Also,
they can act like an 8-bit “carry bit”.
4. On ‘C67x devices, 32-bit float operations are performed in hardware. The ‘C6000 supports IEEE
32-bit floating-point math.
5. double precision floating-point hardware supports IEEE 64-bit floating-point math.
6. Pointers, at 32-bits, can reach across the entire ‘C6000 memory-map.

LAB 3: Using C
LAB 3: Using C
This lab has four goals:
x Build a project using C source files.
x Benchmark/profile C code.
x Contrast results for both sets suggested compiler options:
Debug build configuration
Release (Optimized) build configuration
x Examine fixed vs. floating-point solutions
We’ll begin by building the fixed-point version of the dot-product code shown below. Halfway
through the lab we’ll switch to the floating-point version. At the end, we’ll compare our results.
// Lab3.c
/* Prototype */
int dotp(short *m, short *n, int count);
/* Include Files */
#include <stdio.h>
#include "data.h"
/* Definitions */
#define COUNT 256
/* Declarations */
short a[COUNT] = {A_ARRAY};
short x[COUNT] = {X_ARRAY};
volatile int y = 0;
/* Main Code */
main()
{
y = dotp(a, x, COUNT);
printf("y = %x hex (%d decimal)\n", y, y);

}
int dotp(short *m, short *n, int count)

{ int i;
int sum = 0;
for (i=0; i < count; i++)

{
sum = sum + m[i] * n[i];
}
return(sum);
}
// data.h
#define A_ARRAY 1, 2, 3, ... , 256
#define X_ARRAY 256, 255, 254, ... ,1
Note: The dot-product routine is called twice so that we can examine the effects of on-chip cache.

LAB 3: Using C
Reset Board and Start CCS

1. Before starting Code Composer Studio (CCS), make sure the DSK is properly reset.
x Power cycle the board by removing and replacing the plug.
x Verify the Power-On Self Test (POST) runs.
2. If instructed to do so, configure CCS to use the DSK’s driver (as opposed to the simulator
driver). Your instructor will tell you where to find instructions, if this step is required.
3. Start Code Composer using the Code Composer Studio desktop icon.
Configure CCS Environment

There are a couple option settings that need to be verified before we begin. Otherwise, the lab
procedure may be difficult to follow.
Program Load After Build

Think of the CCS integrated development environment (IDE) as having two parts:
x Edit and Build programs
Uses editor and code generation tools to create code.
x Load and Debug programs
Communicates with processor/simulator to download and run code.
By default, after building your program using CCS, you must then use the File:Load Program to
download the executable (.OUT) file onto your target (DSP microprocessor or simulator). To
perform this download automatically – after each successful build – follow the next two
instructions:
4. Open the CCS customize options dialog: Option:Customize…
5. Navigate to the Program Load Options tab and click Load Program After Build.
Then click OK to save the change and close the Customize dialog.

LAB 3: Using C
Choose Text-Based Linker

CCS includes two different linkers. One is the traditional text-based linker (often called the
legacy linker). The other is a new Visual Linker (VL). In this workshop, we will use the Text
linker.
6. Open the CCS linker selection dialog: Tools:Linker Configuration
(CCS does use “configuration” for many things, doesn’t it?)
7. Verify and/or select Use the text linker and click OK (as shown below).

LAB 3: Using C
Create the Lab3 project

8. Create a new project called LAB3.PJT in the C:\c60001day\labs\lab3 subdirectory.
Project:New…
You will encounter the Project Creation dialog. Fill in the Project Name and Location as shown
below:
You can also use the … button to specify the correct path.
9. Verify the newly created project is open in CCS by clicking on the + sign next to the Projects
folder in the Project View window.
You may want to expand the lab3.pjt icon to observe the project contents. (Of course, it
should be empty at this time.)

LAB 3: Using C
Create a CDB file

As mentioned during the discussion, configuration database files (*.CDB), created by the Config Tool,
control a range of CCS capabilities. In this lab, the CDB file will be used to automatically create the
reset vector and perform memory management.
10. Create a new CDB file (DSP/BIOS Configuration…) as shown below:
11. CCS allows you to select a template configuration file. Since no simulator specific CDB template
is available, we’ll choose the dsk6711.cdb template.
Select the dsk6711.cdb template
Note: In some TI classrooms you may see two or more tabs of CDB templates; e.g. TMS62xx,
TMS54xx, etc. If you experience this, just choose the ‘C6x tab and make your selection.
The CDB templates automate the process of setting up numerous system objects/parameters.
Those shown above are shipped with CCS revision 2.0. You can create your own CDB templates,
just copy a CDB file you have created to the directory where the above files are stored
(C:\ti\c6000\bios\include).

LAB 3: Using C
12. While there are many objects displayed in the configuration editor, we don’t need to configure
any of them. The dsk6711 defaults will work fine.
13. Save your CDB file as LAB3.CDB in C:\c60001day\labs\lab3 directory.
File:Save As…
Note: If during the process of creating or saving a configuration file you get an error (something like Server Error), please hit the
Retry button in the error dialog box and ignore it. It’s just an internal CCS module reporting it is temporarily busy.

LAB 3: Using C
Adding files to the project

14. You can add files to a project in one of three ways:
x Select the menu Project:Add files to Project…
x Right-click the project icon in the Project Explorer window and select Add files…
x Drag and drop files from Windows Explorer onto the project icon
Using one of these methods, add the following files from C:\c60001day\labs\lab3 to your
project:
LAB3.C
LAB3.CDB
LAB3cfg.CMD
When these files have been added, the project should look like:
Building the program (.OUT)

Now that all the files have been added to our project, it’s time to verify the build options and
create the executable output program (that is, the .OUT file). By default, CCS names the
program after the project name. Therefore, your program will be named LAB3.OUT.
15. For easy debugging, use the Debug configuration; this should be the default.
Verify that Debug is in the Project Configurations drop-down box

LAB 3: Using C
16. Build the program.
Use the REBUILD ALL toolbar icon:
or the Project:Rebuild All menu selection

The Build Output window appears in the lower part of the CCS window. Note the build
progress information. It should complete with “0 Errors, 0 Warnings, 0 Remarks”.
17. Since you previously enabled the Program Load after Build option, the program should
automatically have been downloaded to the simulator by the CCS debugger. If this occurred,
the Disassembly window should have appeared in the main workspace.
Did it appear? _____________________

If it didn’t, you need to load the program using the File:Load Program… menu selection.
18. Minimize the Disassembly window to get it out of the way.
This prevents it from popping up at various times. Yet, it is still easily accessible when and if
you need it.
Note: If, for some reason, you must quit Code Composer before completing this lab, you must:
x Open the project (LAB3.PJT), and
x Load the executable program (LAB3.OUT) files with File:Load Program…
Run and Debug Code

Now that the program has been written, compiled, and loaded, it’s time to determine its logical
correctness.
19. Run to the main function using:
Debug:Go Main
The debugger should run past the system initialization code, until main() is reached. Since
main is in LAB3.C, this file should appear in CCS’s main work area.

LAB 3: Using C
Watch Variables
20. Add y to the Watch window.
Select y in the LAB3.C window, right-click, and

choose Add To Watch Window
After adding a variable, the Watch window automatically opens and y is added to it.
Alternatively, you could have opened the watch window, selected y, and drag-n-dropped it
onto the Watch 1 window.
21. Click on the Watch Locals tab.
You’ll notice this is empty since main() doesn’t contain any local variables.
22. Let’s single-step the debugger into our dotp() function, which contains local variables.
Use toolbar -or- Debug menu
In 2 or 3 single-steps, you’ll notice that Watch Locals is

updated:
Note: At some point, if the Watch window shows an error “unknown identifier” for a variable,
don’t worry, it's probably due to the variable’s scope. Local variables do not exist (and
don’t have a value) until their function is called. If requested, Code Composer will add
local variables to the Watch window, but will indicate they aren’t valid until the
appropriate function is reached.

LAB 3: Using C
Using the Command Window

Some of you may find it easier to use a keyboard than the mouse. To that end, CCS includes a
Command window. Long time users of TI DSP tools will find these commands familiar.
23. Show the Command window (Tools:Command Window)
This opens up the Command window and docks it at the bottom of the CCS window. You
may wish to resize or rearrange the windows, for your convenience. In fact, it may help to
right-click inside the Build window and select Hide to give you more space.
24. To try out the Command window, let’s add a and x to the Watch window.
The wa (watch add) command adds a variable to the watch window. Type the following into
the Command textbox and hit the Execute button (or enter key):
wa a
25. The Command window also represents one of the two automation methods provided within CCS.
As a demonstration, we created a debugger command/log file called WATCH.TXT. To invoke it,
type the following into the Command textbox and hit the enter key.
take watch.txt
You should see a and x added to the Watch window. Like batch files or macros, this works
especially well if you want to repeat a given sequence at a later time … or over and over.
Note: If you receive an error, “Cannot open file: “watch.txt”, it’s just that CCS cannot find the
file. A small idiosyncrasy (bug) in CCS causes it to look in the path of the last file opened
with File:Open, rather than the local path of the active project.
There are two solutions:
1. Use the full path name: take C:\c60001day\labs\lab3\watch.txt

2. Open any file from the current project’s path. For example, use File:Open… to open
lab3.c.Since this file is already open, nothing really happens except making CCS use
the proper default for our WATCH.TXT. Then perform the take command.

LAB 3: Using C
26. Since both a, x, and y were in our take file, a and y show up twice in the Watch window since
we had added them previously. Let’s remove them.
Select a in the Watch window and hit the delete key

You can eliminate the extra y in the same way.
27. Click back over to the Watch Locals view.
28. Try executing step command within the Command window to single-step the processor.
step
Run and Halt

29. Once you’ve had your fill of single-stepping, try
running the processor:
Use toolbar -or- Debug:
-or- F5
30. Eventually, the processor will reach the end of the main( ) function.
What happens next? _________________________________________________________

If you said it keeps running … you’d be correct. If you knew it went into an idle routine
(called IDL)… you’d be even more correct. We’ll discuss IDL later in the workshop.
31. By checking the status bar in the lower left corner, you can determine if the processor is still
running. You should see one of these messages:
CPU RUNNING CPU HALTED

32. If the processor is running, halt it:
Use Toolbar -or- Debug:Halt -or- shift-F5
What’s the Result?

33. Check the value of y in the Watch window (Watch 1 tab) and write it below.
y = ____________
The answer should be:
y = 0x002b2b00 hex -or- 2829056 decimal

LAB 3: Using C
Benchmark / Profile Code

“Analyzing how long it takes code to execute” is defined as profiling. It is also called benchmarking.
In our example, we are interested in benchmarking the dot-product function.
34. Before we begin, let’s restart our program. Make sure the processor is halted, then:
Debug:Restart
Debug: Go Main
Note: If you choose CPU Reset rather than Restart, the DSP will be reset and your program will
be erased. If this occurs, just reload the program again with File:Reload Program.
35. Also, let’s close some windows to free up some extra room. Close the Watch and Command
windows (right-click on each of them and select close.)
36. Open a new profiling session.
Profiler:Start New Session…

Go ahead and name the session anything you want. We called ours Debug profile.
37. Choose Profile All Functions.
Click the Profile All Functions toolbar button
38. Expand the lab3.c entry.

LAB 3: Using C
39. Before running the code, set a breakpoint at the end of main() to stop the processor automatically.
Double-clicking in the left most column sets a breakpoint

You should see a red dot appear, indicating a breakpoint.
40. Run the program and single-step once.
F5 then F8
41. Examine the Debug Profile window.
So, what statistics do we care about?

We are interested in the minimum number of cycles for the dotp function: 7992
What are all the columns for?
There are so many statistics shown that we can’t fit the screen capture on our printed page. Here
are some points about the other columns:
x Code Size and Count should be self explanatory.
x Exclusive (Excl.) shows the cycles for the specified function only.
(You may have to scroll right to see this in your profile window.)
x Inclusive (Incl.) is the cycles required for the specified function plus all sub-functions.
For example:
main Incl Total = main Excl Total + dotp Excl Total + printf (not shown)
25334 112 16112 9110

LAB 3: Using C
42. Since future revisions of the compiler can alter performance (by increasing performance), record
your results.
How fast was your dotp? Min Incl _________________ clock cycles
How fast was your dotp? Max Incl _________________ clock cycles
Why did you receive different results for Min and Max? _____________________________
__________________________________________________________________________
If you ran it a third time, which would you get (Min or Max)? ________________________
43. Copy the minimum result to the table on page 3-33.
44. Halt the processor if it’s still running.
Benchmark with Optimization

Remember from the class discussion, the Release build configuration enables the optimizer. After
you have verified your program works correctly, you most likely will want to improve its
performance. Using the Release configuration is the easiest way to optimize code.
45. Choose the Release build options (for optimization).
Project:Configurations...
Select the Release configuration

and click the Set Active button, then close dialog
Alternatively, you can use the quick build configurations drop-down box to make Release
active. We highlighted this in step 15.
46. Rebuild and load the program (as discussed in step 16).
47. Clear the statistics results:
Right click in statistics window and select Clear All
48. Run (press F5 ).

49. You should have received an error:
“Breakpoint Manager: Unable to move breakpoint to a valid line at source

line: lab3.c line 15
It has been disabled.”
The release configuration doesn’t enable any level of debugging. That is, no symbolic
information is included in the .OUT file. While this is great for a final release, it makes it
difficult to profile while optimizing for performance. We can either change the Release build
configuration, or create a new one. Let’s try the latter.

LAB 3: Using C
50. Open the build configurations dialog again.
Project:Configurations
51. Select Release and click the Add… button.
52. Name your new configuration “Optimize” (at least, that’s what we suggest). Make sure it
copies the settings from Release. Click OK.
53. Set the new configuration active and click Done.

LAB 3: Using C
54. Open the build options dialog to modify the active (Optimize) configuration.
Project:Build Options...
Add the Function Profile Debug (–gp) option
Function Profile Debug (-gp) is a less severe form of Full Symbolic Debug (-g). While –g
makes debugging very easy, if often severely reduces the performance of compiled code. The
–gp option places the minimum amount of debug information into the code needed for
function level profiling.
55. Rebuild and load the program (as discussed in step 16).
56. Close the current profile session (to save screen space). The original Debug session won’t
respond to the Optimize configuration.
Right click in Debug profile session window

Select Close
57. Open a new profile session (as described in steps 36-37).

58. Also, verify the breakpoint set in step 39 is still there.
59. Run (F5) and single-step.
60. How fast was dotp this time?
Min Incl _________________ clock cycles
Max Incl _________________ clock cycles

Does the code run faster using the compiler’s optimizer? ____________________
LAB 3: Using C
63. Clear any breakpoints you set in the lab. Use Debug:Breakpoints Æ Delete All or the
toolbar button:
64. Close the project and any windows associated with it.
Project:Close
Window:Close All
Lab 3 Summary
Let’s summarize the profile results.
Build
Lab Step Lab Cycles
Configuration
Lab 3 Lab 3
Debug
Step 42 Integer
Lab 3 Lab 3 Optimize

Step 60 Integer (variation of Release)
Take Home Floating-Point Build

Cycles
Exercises Lab Configuration
Lab 3a Lab 3a
Debug
Step 10 Floating-Point
Lab 3a Lab 3a Optimize

Step 19 Floating-Point (variation of Release)
Lab 3b Lab 3b #pragma

Step 12 Float DATA_ALIGN
End of Lab3 Exercise

Please inform your facilitator that you have finished. Thank You.
If time is still available, try working on the Take Home lab exercises.

Take Home Exercises
Take Home Exercises

Take home exercises are additional labs that you can use to extend your knowledge of the ‘C6000 and
the CCS toolset. If you finish the In-Class exercises early, you are welcome to begin working on these
labs.
Lab 3a – Floating-Point Dot-Product

In this lab, it didn’t really matter to us whether the code performed integer or floating-point math. In
your application though, it might make a very big difference. Let’s re-code the dot-product function to
use C float variables (32-bit IEEE floating-point).
Lab3a.c
/* Prototype */
float dotp(float *m, float *n, int count);
/* Include Files */
#include <stdio.h>
#include "data.h"
/* Definitions */
#define COUNT 256
/* Declarations */
float a[COUNT] = {A_ARRAY};
float x[COUNT] = {X_ARRAY};
volatile float y = 0;
/* Main Code */
main()
{
printf("y = %f float \n", y);

}
float dotp(float *m, float *n, int count)

{ int i;
float sum = 0;
for (i=0; i < count; i++)

{
sum = sum + m[i] * n[i];
}
return(sum);
}
Q: Should we have just done a global search and replace on int and short to change them to float
when we created LAB3a.C from LAB3.C?
A: No, it’s better for variables used as things like counters to remain integers. For example, our
counter, i, was kept as an integer type. We bolded the changes we made to LAB3a.C (above)
to make them easier to observe.
Q: If integer mathematics works, why use floating-point?

A: Integer math requires extra care be spent crafting the algorithm to avoid overflow. The increased
dynamic range of floating-point numbers simplifies algorithm design, thus shortening design time.
Unfortunately, further exploration of these issues are outside the scope of our 1-day workshop.

Take Home Exercises
Create floating-point project

1. Start CCS if it isn’t already open.
2. Create a new project called LAB3a.PJT in the C:\c60001day\labs\lab3a subdirectory.
This time, make sure the target is set for TMS320C67XX. This sets the –mv6700 option in
the project’s build options.
3. Open the file C:\c60001day\labs\lab3\LAB3.CDB and save it as LAB3a.CDB:
File:Open... C:\c60001day\labs\lab3\LAB3.CDB
File:Save As... C:\c60001day\labs\lab3a\LAB3a.CDB
4. Add the following files from C:\c60001day\labs\lab3a to your project:
LAB3a.C
LAB3a.CDB
LAB3aCFG.CMD
5. Build (and load) the program using the Debug build configuration.
6. Open a new profile session (as described in steps 36-37 on page 28). And set a breakpoint as
shown in step 39 (page 29).
7. Run (F5) to the breakpoint and single-step once.
8. What is the value of y? ________________________ (should be 2829056 decimal)
9. Is this the same as the integer result (see step 33 on page 27)? ________________________
10. How fast was the floating-point dotp?

How does compare with the integer solution? ____________________
Take Home Exercises
Benchmark optimized floating-point code

13. Create a new project build configuration called Optimize.
Use the same steps as before (steps 50-54), where you copied the Release configuration to a
new one called Optimize; then you added the –gp option.
14. Build (and load) the program using the Optimize build configuration.
15. Open a new profile session. You can call it whatever you wish; we called ours Optimized.
16. If it doesn’t still exist, set a breakpoint as shown in step 39 (page 29).
18. Is the value of y still the same? ________________________ (should be 2829056 decimal)
19. How fast was the optimized floating-point dotp?

toolbar button:
Project:Close
Window:Close All

Take Home Exercises
Lab 3b – Faster floating-point dotp() using DATA_ALIGN

1. Start CCS if it isn’t already open.
2. Create a new project called LAB3b.PJT in the C:\c60001day\labs\lab3b subdirectory.
Before clicking finish, make sure:
The path is set correctly.
The target is TMS320C67XX.
3. While we know this is a bit tedious, it’s a simple way to copy the three files needed from the
previous lab folder.
x Open the file C:\c60001day\labs\lab3a\LAB3a.C and save it as LAB3b.C:
File:Open... C:\c60001day\labs\lab3a\LAB3a.C
File:Save As... C:\c60001day\labs\lab3b\LAB3b.C
x Open the file C:\c60001day\labs\lab3a\LAB3.CDB and save it as LAB3b.CDB:
File:Open... C:\c60001day\labs\lab3a\LAB3a.CDB
File:Save As... C:\c60001day\labs\lab3b\LAB3b.CDB
x Open the file C:\c60001day\labs\lab3a\data.h and save it as DATA.H. This file is

referenced by our C source file.
File:Open... C:\c60001day\labs\lab3a\data.h
File:Save As... C:\c60001day\labs\lab3b\data.h
4. Add the following files from C:\c60001day\labs\lab3b to your project:
LAB3b.C
LAB3b.CDB
LAB3bCFG.CMD
5. Uncomment the following two lines from LAB3b.C by removing the // from the beginning of
the line. These #pragma’s force the a and x arrays to be aligned to 8-byte (double-word)
boundaries in memory.
#pragma DATA_ALIGN(a, 8);

#pragma DATA_ALIGN(x, 8);
You should notice the lines change from green (indicating they’re comment lines) to normal
code.
6. Create a new project build configuration called Optimize.
Use the same steps as before (steps 50-54), where you copied the Release configuration to a
new one called Optimize; then you added the –gp option.
7. Build (and load) the program using the Optimize build configuration.
8. Open a new profile session. You can call it whatever you wish; we called ours Optimized.
9. If it doesn’t still exist, set a breakpoint as shown in step 39 (page 29).

Take Home Exercises
11. Is the value of y still the same? ________________________ (should be 2829056 decimal)
12. How fast was the optimized floating-point dotp using the #pragma DATA_ALIGN?

toolbar button:
Project:Close
Window:Close All
For more compiler optimization hints please review the Compiler

Optimization Tutorial available in the CCS online help.

Take Home Exercises
Lab 3c – Customize CCS

Add Custom Keyboard Assignment
While most CCS commands are available via hotkeys, you may find yourself wanting to modify
CCS to better suit your personal needs. For example, to restart the processor, the default hotkey(s)
are:
Debug:Restart (or Alt-D, then E)
CCS lets you remap many of these functions. Let’s try remapping Restart.
1. Open the CCS customization dialog.
Option:Customize…
2. Choose the Keyboard tab in the customize dialog box.

3. Scroll down in the Commands list box to find Debug:Restart and select it.
4. Click the Add button.
5. When asked to, “Press new shortcut key”, press:
F4
We already checked and this one isn’t assigned within CCS, by default.
6. Click OK twice to close the dialog boxes.
7. From now on, to Restart and Run the CPU, all you need to do is push F4 then F5.
Customize your Workspace

You may not find the default workspace for CCS as convenient as you’d like. If that’s the case,
you can modify as needed. In fact, we have already provided a default workspace for you. Follow
these steps if you want to create your own.
8. Close CCS if it’s open, then open CCS.
This is forces CCS back to its default states (i.e. no breakpoints, profiling, etc.).
9. Move the toolbars around as you’d like them to be.
10. If you want the Project and File open dialogs to default to a specific path, you need to open a
project or file from those paths.
11. Make sure you close any project or file from step 10.

Take Home Exercises
12. Save the current workspace.
File:Workspace:Save Workspace As...

Save this file to a location you can remember. For example, you might want to save it to:
c:\c60001day\labs
13. Close CCS.

14. Change the properties of the CCS desktop icon.
Right-click on the CCS desktop icon
Add your workspace to the Target, as shown below
15. Open up CCS and verify it worked.

Debrief - Lab Exercises
Debrief - Lab Exercises

Lab 3 – Integer Dot Product
x Please review your results from the table on page 3-33 with the facilitator and class.
Take Home Labs

Lab 3a – Floating-Point Dot Product
x Please review your results from the table on page 3-33 with the facilitator and class.
Lab 3b – A further optimization for floating-point

x The second take-home exercise adds two #pragma’s to the C code.
Take Home Lab 3b (DATA_ALIGN)

// Lab3b.c
/* Declarations */
#pragma DATA_ALIGN(a, 8);
#pragma DATA_ALIGN(x, 8);
float a[COUNT] = {A_ARRAY};
float x[COUNT] = {X_ARRAY};
When the compiler knows:

Floats are allocated on double-word boundary
Project level optimization is on (-pm)
Compiler can load four 32-bit float values at once …
2x performance gain!
Note: This trick is not required for integer math. By default, short arrays are aligned
on 32-bit boundaries, allowing the optimizer to always make this optimization.
The DATA_ALIGN pragma’s cut 30% of the cycles from the algorithm by providing just a little
more insight about your system to the compiler can lead to big gains in performance.
Take Home Lab 3b
Lab 3a Step 19 Optimized 308
Lab 3b Step 13 Optimized 206

DATA_ALIGN pragma
To better understand the effects of the #pragma DATA_ALIGN on the ‘C67x and other
optimization techniques, please refer to the Compiler Tutorial in the CCS online help. As we do
not have time in the 1-day workshop to review all these hints, please refer to the Compiler Tutorial for
more information.
Note: The -pm mentioned above is discussed on page 3-42.

Further C Optimization
Further C Optimization
Program Level Optimization (-pm)
-q -pm -op2 -mv6700
-pm is critical in compiling for maximum performance

-pm creates a temp.c file which includes all C source files, thus
giving the optimizer a program-level optimization context
-opn describes a program's external references
Some additional details:

x -pm requires the use of -o3
x Cannot be used as file or function specific option
x Without knowing which -opn option to use, TI couldn't use
-pm in default Release config
x Unfortunately, -pm cannot provide optimizer with visibility into object code libraries
x For example, if your program modifies a global variable from another code module, -op2
cannot be used
Providing Compiler with More Insight
Program Level Optimization: -pm -o3

#pragma MUST_ITERATE(min, max, div);
#pragma UNROLL();
#pragma DATA_ALIGN(variable, 2n alignment);
These are explained in the Compiler Optimization Tutorial

CCS Scripting/Automation Tools

Command Window
Command Window
Some frequently used commands:

help load <filename.out> run
dlog <filename>,a reload run <cond>
dlog close reset go <label>
alias ... restart step <number>
take <filename.out> ba <label > cstep <number>
wa <label> halt

GEL Scripting
GEL Scripting
GEL:
GEL: General
GeneralExtension
Extension
Language
Language
CCstyle
stylesyntax
syntax
Large
Large numberof
number ofdebugger
debugger
commands
commands as GELfunctions
as GEL functions
Write
Writeyour
yourown
ownfunctions
functions
Create
CreateGEL
GELmenu
menuitems
items
x Notice the GEL folder in the Project View window. You can load/unload GEL scripts by right-
clicking this window.
x GEL syntax is very C-like. Notice that QuickTest() calls LED_cycle(), defined earlier in the file.
x You can add items to the GEL menu. An example is shown in the above graphic.
x Finally, a GEL file is loaded upon starting CCS.
DSK Note
The startup GEL filename is a property of the emulation configuration selected during CCS
Setup. The C6711 DSK uses this startup GEL file: C:\TI\CC\GEL\DSK6211_6711.GEL

Volatile
Volatile
When highly optimizing compilers are used, it is not unusual for a program to fail to execute correctly.
The optimizer analyzes data flow and avoids memory accesses whenever possible – which can lead to
incorrect behavior described below.
If C code reads memory locations that are modified outside the scope of C (such as a hardware
register), the compiler may optimize these reads out. To prevent this, these memory accesses must be
identified with the “volatile” keyword. The compiler does not optimize out any references to volatile
variables.
For example, the while loop waits (polls) for a location to be read as non-zero (i.e. it waits while the
location is equal to zero):
int *ctrl;
while (*ctrl == 0);
In this example, *ctrl is a loop-invariant expression; i.e., the expression never changes during
execution of the loop. In this case, the optimizer will reduce the loop to a single memory read — not
what was intended by this “busy-waiting loop.” This kind of code is common in control-type
applications. To prevent this busy-waiting loop from essentially being optimized out of existence, use
the “volatile” keyword. Although it is an ANSI Standard C keyword, it is often only understood by
embedded control programmers who have used highly optimizing C compilers.
To prevent the optimizer from changing this expression, the declaration for *ctrl is changed to:
volatile int *ctrl;

while (*ctrl == 0);
This error is has been a major source of optimizer problems, just ask our support hotline.

PBC – Profile Based Compiler
PBC – Profile Based Compiler

The Profile Based Compiler or PBC analyzes your project and creates a graph of Code Speed versus
Code Size. This makes it easy to determine the compiler/project options that work best for your
project.
A couple of caveats:
x Don’t run PBC until your project is fully debugged. PBC is a great optimization tool but wasn’t
designed for debugging.
x The Profile Based Compiler is included with the full version of Code Composer Studio. It does
not ship with the ‘C6711 DSK.

Building a System (McBSP & HWI)
Today’s Agenda
Agenda
System 1. McBSP, Interrupts
2. EDMA, Cache
VAB Visual Design
Epilogue What Next?
Learning Objectives
Building a Real-Time System
TI Foundation Software
What is CSL?
Sine Algorithm
Using AD535 codec
Using Interrupts
Lab 4
Create and listen to sinewave
TMS320C6000 One-Day Workshop - Building a System (McBSP & HWI) 4-1

Background
Page left intentionally blank.
4-2 TMS320C6000 One-Day Workshop - Building a System (McBSP & HWI)

Background
Module Topics
Building a System (McBSP & HWI) ........................................................................................................... 1
Background ................................................................................................................................................ 4
TI Software Foundation Support............................................................................................................ 4
TI Software Foundation Libraries.......................................................................................................... 6
What is CSL and BSL? ................................................................................................................. 6
CSL Benefits ................................................................................................................................. 7
Modules contained within CSL and BSL...................................................................................... 9
General CSL protocol.................................................................................................................. 10
Other Libraries ............................................................................................................................ 11
Generating a Sine Wave ........................................................................................................................... 12
Sine Algorithm and Code..................................................................................................................... 12
Output Sine Value to the Speaker ........................................................................................................ 13
Hardware Interrupt Driven Systems..................................................................................................... 17
Serial Port Transmit Interrupt (XINT0) ...................................................................................... 18
System Initialization ............................................................................................................................ 21
BSL and CSL Initialization ......................................................................................................... 21
Codec Initialization ..................................................................................................................... 22
Hardware Interrupt Initialization................................................................................................. 23
Lab 4......................................................................................................................................................... 25
Open Project................................................................................................................................ 29
Configure Hardware Interrupts (HWI)........................................................................................ 30
Codec Functions.......................................................................................................................... 32
Build it and they will run …........................................................................................................ 33
Using IDL.................................................................................................................................... 33
Take Home Exercises ............................................................................................................................... 34
Lab4a – Try graphing the Sine Wave .................................................................................................. 34
Lab4b – Compare floating vs. fixed-point sine algorithm ................................................................... 35
Optional Topic - Data Convert Plug-in.................................................................................................... 37

Background
Background
TI Software Foundation Support
TI Software Foundation Model
DSP/BIOS DSP/BIOS User-built PIP, DEV, and

Communications Configuration SIO objects
Layer Tool
Plug-
Plug-ins
Board Support D TI’s User.lib
Layer C bsl.lib
P
Chip Support
TI’s csl.lib
Layer
Building a system is often a process of creating layers of services or code. Like writing code, usually
one finds that the higher level you can work at, the faster you can get the job done. DSP based systems
are no different. To that end, TI has worked hard over the last few years (and continues to do so) to
create a development platform that speeds your design efforts.
Chip Support Layer

Taking a quick look at the software foundation model, the lower layer includes the Chip Support
Library (CSL). This application programming interface (API) provides an easy, portable method of
programming the DSP’s on-chip peripherals.
Board Support Layer

Most systems include resources outside of the DSP itself. For example, the ‘C6711 DSK contains
LEDs, switches, and a codec (just to name a few). Anyone writing code to be run on the DSK would
normally have to create a set of functions to access these peripherals. Of course, using the CSL created
by TI makes this easier.
Since the DSK was designed by TI, it is easy for us to create routines to access its resources. On the
other hand, if you design your own board we cannot provide these routines as there are just too many
possibilities for you to exploit in your design. To this end, we currently have two aids:
x Use TI’s Board Support Library (BSL) as an example. You can build a library of routines to
support your board’s hardware.
x TI provides a Code Composer Studio plug-in which may help you. The Data Converter Plug-
in (DCP for short) is included with CCS. When using one of many TI data converters, the
plug-in may be used to generate the code required to initialize and use the device. Essentially,
you specify the codec’s options in a GUI dialog and the plug-in creates the interface code for
you.

Background
In the Foundation Model diagram above, we displayed other vacant slots for board support layer
support. Currently DCP is the only tool available, although there are many application notes on our
website available that describe interfacing to other system resources.
Note: This workshop uses the codec routines from TI’s Board Support Library – this allows us to
use the codec without having to completely discuss the specific codec or the ‘C6711 McBSP
(serial port) used to access the codec. This level of discussion is precluded by the limited 1-
day format of the workshop.
DSP/BIOS Communications Layer

Code Composer Studio includes a number of operating system (OS) type resources often called
DSP/BIOS. Among these resources are the support for communicating to pipe objects (PIP), device
drivers (DEV), and data streams (SIO). This level of support is probably familiar to you if you have
used a Real-Time Operating System (RTOS) in the past.
While some parts of DSP/BIOS are discussed in the later Introduction to DSP/BIOS chapter, alas,
there is not enough time in the day to cover these communications capabilities. To explore these
further, we suggest you: attend the 4-day DSP/BIOS Workshop; follow the DSP/BIOS tutorial
included with CCS; and , read the DSP/BIOS users guides and many application notes on the TI
website.

Background
TI Software Foundation Libraries

This topic digs a little deeper into the actual libraries previously discussed.
Board Support Library (BSL)

Board-level routines supporting DSK-specific hardware
Higher level of abstraction than CSL
BSL functions make use of CSL
codec Chip Support Library (CSL)

Low-level routines supporting on-chip peripherals
LEDs
switches
flash
serial ports
dma/edma TI DSP
cache ‘C6000
timers or ‘C5000
etc.
What is CSL and BSL?

The Chip Support Library (CSL) and Board Support Library (BSL) provide a set of data structures and
functions to assist you in building a TMS320 DSP based system.
This library supports the use of the on-chip peripherals by providing a set of low-level functions and data
structures to ease their implementation. CSL has been designed to support multiple invocations – such as
you might find when using the multiple serial ports or DMA channels found on TI’s DSP devices.
Simplified directions for using the CSL are located in the lab exercises and in the appendix of this
workshop. For complete details, please refer to the C6000 CSL Reference Guide (SPRU401b.pdf).
The BSL has not been officially released. In other words, it is brand new. These functions support the
specific hardware found on TI hardware development platforms. The first platform being supported is the
TMS320C6711 DSP Starter Kit. If you look through the following list of modules supported, you will
notice the hardware features discussed in the early DSK Tour chapter: AD535 codec, LEDs, DIP switches,
Flash, etc.
BSL is build upon CSL. That is, to use BSL you must also include the CSL libraries in your project.
Essentially, BSL provides a higher-level system interface than CSL. Since various decisions are made
when building a board, TI can leverage those decisions to simplify your system development. For example,
one of the serial ports (McBSP0) is directly connected to the AD535 codec in the standard DSK
configuration. With this knowledge, a set of functions can be written to directly address the AD535 codec.
When configuring the AD535, these functions automatically open and configure the McBSP; then use that
McBSP to configure the AD535. This saves you from the drudgery of researching and programming the
AD535 and McBSP!
The lab exercises make use of the BSL library. Since the standard CCS install does not currently include
this new library, we have installed it in a folder along with the lab exercises. It should be located at:
C:\C60001DAY\TI\PRELIMINARY_BSL. Along with the libraries and header files, we have included the
BSL documentation in a PDF file in the C:\C60001DAY\TI directory (SPRU432.pdf).

Background
CSL Benefits
Why CSL and BSL? Here are a few reasons:
Increased Portability
x Supports all ‘C6000 DSPs. When changing from one device to another, no (or little) re-coding is
required for peripherals.
x Where possible, TI has used the same API’s for both the C5000 and C6000 DSP families. This
makes porting C code between processors much easier. Taking into account the cross-platform
support of DSP/BIOS makes TI’s software tools quite powerful.
x The goal is to provide compatibility at the _open(), _close(), _config() level. The initialization data
structures may be different, but we have striven to make the functions as compatible as possible
Easier to use
x When TI’s DSP 3rd parties and customers use the same CSL/BSL functions, it becomes easier to
use and understand code written by others.
Increased Reliability / Decreased Maintenance

x When libraries such as CSL/BSL are made available to a large population of users, they become
more reliable. The large user base quickly finds any coding bugs (if any).
x Additionally, suggestions and recommendations come from a large base of knowledgeable users.

Background

Background
Modules contained within CSL and BSL

The following diagram lists all the modules found within CSL and the ‘C6711 DSK BSL.
Additionally, we included one API module from the DSP/BIOS libraries – as HWI will be used along
with the CSL’s IRQ module to manage hardware interrupts on the DSP.
Peripheral Support Libraries

‘C6000 CSL Modules ‘C6711 DSK BSL
CSL CSL initialization BSL BSL initialization
CHIP Specify device BOARD specify board
CACHE Cache AD535 Access audio codec
DAT Device-independent data copy/fill DIP Read board DIP switches
DMA Direct memory access FLASH Program FLASH ROM
EDMA Enhanced direct memory access LED Write LED’s
EMIF External memory interface
HPI Host port interface
IRQ Interrupt controller
MCBSP Multichannel buffered serial port
PWR Power down
STDINC Standard include
TIMER Timer
Please refer to the various reference guides for specific details on each API:
x TMS320C6000 Chip Support Library API Reference Guide
This book is installed with Code Composer Studio 2.0 at:
C:\ti\docs\pdf\spru401b.pdf
x TMS320C6000 DSK Board Support Library API User’s Guide – Preliminary
You can find a preliminary version of this book at:
c:\c60001day\ti\BSL Ref Guide - spru432.pdf
x TMS320C6000 DSP/BIOS Application Programming Interface (API) Reference Guide
This book is installed with Code Composer Studio 2.0 at:
C:\ti\docs\pdf\spru403c.pdf
For the aforementioned file paths, where:

c:\ti - represents the installation path of CCS
c:\c60001day - represents the install path of the 1-day workshop files

Background
General CSL protocol

Here’s a rough description for using the CSL (DSP/BIOS and BSL, too) libraries.
General Procedure to use CSL

1. Declare variables
Usually handle & configuration
2. Open peripheral
Reserves resource
Provides ‘handle’ to reference resource
3. Configure peripheral
Apply setup configuration to peripheral
4. Use peripheral
Some periph’s use functions to read/write them
Example: 1. TIMER_Handle myHandle;

TIMER_CONFIG myConfig = {control, period, counter};
2. main() { myHandle = TIMER_open(TIMER_DEVANY, ...);

3. TIMER_config(myHandle, &myConfig);
4. TIMER_start(myHandle);
To some this syntax will appear quite familiar. To those of use who spent most of our careers writing
assembly language, though, this may be a new method of programming.
These libraries provide two levels of support:

x A set of macros, functions, and data structures to ease symbolic programming of the resource
(module).
x Basic resource management.
Let’s see how the four parts of the timer example shown above correlate to these two ideas.
1. The first two lines of the example define the required data structures.
The data type called TIMER_Handle is defined in CSL. Essentially, it is used to point to one of
the timers (as we will see later). Not all CSL modules require the use of a handle (i.e. pointer),
only those peripherals where there is more than one resource. For example, timers, DMA, EDMA,
McBSP, etc. The handle is used to specify which one of the timers you are working with.
The second line defines a data structure. The variable name is myConfig and its data type is
TIMER_Config. Again, this data type is defined in the CSL. This variable represents a C data
structure that will be used to define a timer configuration. In other words, all the values you would
need to program the timer peripheral are stored in this structure.
Note: The myHandle and myConfig names are arbitrary. We could have called them julie and frank.
The choice is yours.
4 - 10 TMS320C6000 One-Day Workshop - Building a System (McBSP & HWI)

Background
2. The third line of the example contains code that opens the peripheral. In this case, “open” means
two things:
x The CSL code checks to see if the specified resource has already been opened. In other
words, is the resource available? In this example, we have requested TIMER_DEVANY,
which means we are asking for any available timer.
x If it is available, the timer resource is marked as being used and a pointer to the specific timer
is returned as a TIMER_Handle. If the specific resource has already been opened, then the
function returns “INV” for invalid. Your code could check if the INV error code has been
returned. (We didn’t do that in our example since there wasn’t much room on the slide.
Where does the CSL keep track of opened resources? The CSL maintains a series of data
elements (you could think of them as flags) to keep track of this information. Could you have
done this? Yes, you probably could; but isn’t it nice to have this code already written for you?
Even further, if you later decide to use this code on another ‘C6000 processor, you won’t have to
find and change all the resource management code. You only need to indicate to the CSL that you
have switched CHIPs and the rest is done for you automatically.
3. The fourth line of the example configures the peripheral. In this case, the timer specified by
myHandle is configured with the myConfig data structure. The actual CSL code copies each of the
values in the myConfig data structure to the appropriate memory-mapped peripheral registers.
(How many times have I had to write this kind of code in assembly. I’d be pouring over the
reference guide trying to type in all the bits and memory addresses without making a typo mistake
– which, of course, happened too often.)
4. Finally, the last line of code is an example of how to use the peripheral. There are many functions
that allow you to easily use the peripheral. In the case of the timer, we can: start, stop, pause, etc.
With the McBSP serial port, you could: read, write, reset, etc.
Even if you have never written code along these lines before, you will find it quickly becomes second-
nature. And if ease-of-use wasn’t enough reason to use CSL, the reliability, portability, and
optimization features of CSL will make you never want to go back to the old ways.
Other Libraries
Texas Instruments provides other libraries along with CSL and BSL:
x Runtime Support Libraries – are included with the C/C++ compiler. These are referenced by the
CDB file within our lab projects and therefore do not have to be explicitly added by us. The CDB
file knows which version of the RTS library to include based upon the processor selected in the
Global Settings module of the CDB file.
x DSP/BIOS Libraries – as mentioned earlier, these provide a large number of APIs used in
scheduling, real-time analysis, and I/O. Again, they are automatically added to the project when
using a CDB file in your project.
x DSP and Imaging Libraries – provide a set of functions common to DSP and imaging
applications. Currently they support the ‘C62x set of devices. In the future they should be updated
to support the added features of the ‘C67x and ‘C64x devices. You must add these libraries to
your project if you use them.
x TMS320 Algorithm Standard – provides a methodology for application independent algorithm
creation and use. Please refer to the documentation included with Code Composer Studio, visit the
TI website (or http://www.dspvillage.com), or attend one of the TMS320 Algorithm Standard
workshops for more information.
TMS320C6000 One-Day Workshop - Building a System (McBSP & HWI) 4 - 11

Generating a Sine Wave

The goal in the forthcoming lab exercise is to create a sine wave and output it through the speaker
jack. This process requires a few steps that we’ll introduce over the next pages.
x Sine function – creates the sine wave values.
x Codec output function – writes the sine wave values to the codec (digital to analog
converter). This function uses a BSL function to handle this.
x Hardware interrupt function – for every McBSP0 (serial port 0) transmit interrupt
(XINT0), the sine function will output one value.
x System initialization functions – upon entering the main() function, we will have to
initialize the various components used in our system. These include: the CSL and BSL
libraries, the McBSP and codec (done via a codec function from the BSL), and our hardware
interrupts.
Sine Algorithm and Code

There are many ways to create a series of sinewave values. We have chosen one that is similar to
an IIR (infinite impulse response) filter. This is a simple algorithm that works quite well.
Sine_float.c A
Generates a value
for each output
sample t
float
floaty[3]
y[3]=={0,
{0,0.7071,0};
0.7071,0};
float A = 1.4142;
float A = 1.4142;
short
shortsineGen()
sineGen(){{
y[0]
y[0] ==y[1]
y[1]**AA--y[2];
y[2];
y[2]
y[2] ==y[1];
y[1];
y[1]
y[1] ==y[0];
y[0];
return((short)(32000*y[0]);
return((short)(32000*y[0]);
}}
The diagram contains the floating point algorithm code. We chose floating point for two reasons:
x We are using the ‘C6711 floating point DSP.
x Floating point code is easier to develop. When using integers, extra care must be taken to
solve numerical overflow issues. These are minimized by the wide dynamic range of 32-bit
floating point. (ANSI C does not solve integer overflow, rather this issue must be handled by
the programmer.) One of the Lab 4 take-home exercises briefly examines this issue.
In the workshop appendix, we have included a brief discussion explaining the theory behind the
chosen sinewave algorithm. Also included, are the coefficients and initial data values required to
generate the DTMF (dual tone modulated frequency) values used for touch-tone dialing.

Output Sine Value to the Speaker

How does the numerical sine value make it to the speaker?
Send to Codec via McBSP

DSK
‘C6711
sineGen McBSP AD535
DAC
Let’s take a closer look at the McBSP/codec interface?
After creating the sine value using our sinewave algorithm, the CPU writes it to the McBSP
(serial port). This, in turn, is connected to the AD535 codec (digital to analog converter) which
transforms the number into a voltage. The voltage is driven through a connector and your patch
cable into the speaker.
Writing to the codec is simple when using the Board Support Library (BSL). The codec output
function can be accomplished with a single API function call:
codec_out(value)
{
AD535_write(handle, value);
}

‘C6711 DSK (McBSP0) o Codec Interface

All you need to know to use the AD535 codec is the AD535 function calls from the Board
Support Library. But, as engineers, most of us want to know a bit more about how it all works.
Think of the following diagram as a zoom-in on the previous diagram
Codec Details
Codec Interface
AD535
McBSP0 Voice Channel
DRR ADC gain
DXR DAC gain
CLKR
CLKX Fs = 8kHz
Data Channel clock
AD535:
Has two channels (voice & data), only the voice was used on DSK
Receives all commands and exchanges data serially via McBSP0
Driven by ext. 8kHz clock on DSK board.
It drives ‘C6711 serial port 0 (McBSP0) shift clocks.
8kHz sample rate allows maximum sine wave of ______ 4 kHz?
Looking closer at the McBSP ...

McBSP Details
Zooming-in once again, when the CPU (or DMA) writes a data value to the Data Transmit
Register (DXR), the serial port hardware moves this data across to another register where it is
serially shifted out the Data Transmit (DX) pin. DX is connected to the AD535 codec input.
CPU
D R
R Expand B RSR DR
(optional)
I R R 32
n
t D
e Compress
r X (optional) XSR DX
n R
a
l
B CLKR
u CLKX
s
McBSP Control CLKS
Registers
DMA FSR
FSX
While not used in today’s lab exercises:

x The DR pin receives data which may be read via the Data Receive Register. The designers
added an extra buffer register on the input side of the McBSP.
x The input and output streams can be used with or without companding (compression). The
McBSP uses either aLaw or PLaw standards.
McBSP Interrupts and Events

Whenever the McBSP is ready for a new value to be read or written, it sets the appropriate status
bit in a McBSP control register and sends an interrupt to the CPU and/or an event to the EDMA.
McBSP Interrupts
DRR RBR
RRDY & XRDY in McBSP control register
RRDY=1 displays “status” of read and transmit ports:
“Ready to Read” 0: not ready
1: ready to read/write
DXR XSR
XRDY=1
“Ready to Write”
CPU In Lab 4:
RINT XRDY generates McBSP transmit interrupt (XINT0)
to CPU when the DXR is emptied (therefore ready for
XINT a new value)
An AD535 routine is used to write a new transmit value
DMA In Lab 5:
REVT XRDY generates transmit event to EDMA when the
XEVT DXR is ready for a new value
XINT0 is discussed in more detail on page 4-18.

McBSP o Codec Details

The ‘C6711 has two McBSP serial ports. McBSP #0 is physically connected to the serial codec
on the DSK board. We used the term “serial” codec since this device receives all data and
commands through a serial stream (via McBSP).
BSL Codec Functions

AD535
McBSP0 Voice Channel
DRR ADC gain
DXR DAC gain
CLKR
CLKX Fs = 8kHz
Data Channel clock
AD535
AD535BSL
BSL
AD535_open()
AD535_open() reserves
reservesresource
resourceand
andreturns
returnshandle
handle
AD535_config()
AD535_config() configures
configuresMcBSP0
McBSP0and
andAD535
AD535
AD535_read()
AD535_read() reads
readsfrom
fromAD535
AD535ADC
ADCthru
thruMcBSP0
McBSP0receive
receive
AD535_write() writes to AD535 DAC thru McBSP0 transmit
AD535_write() writes to AD535 DAC thru McBSP0 transmit
As described above, you don’t really need to know all this detail to use the DSK codec. The
Board Support Library provides all the functions need to initialize, read, and write the codec via
McBSP0.
The above figure contains the four most common AD535 functions. Please refer to the BSL
documentation for a complete API listing. We described how to find the BSL documentation on
page 4-9.

Hardware Interrupt Driven Systems

Running the sinewave algorithm in a loop creates a series of numerical values.
Question: What happens when the ‘C6711 creates sinewave samples and outputs them faster than the
AD535 can convert them to analog?
Answer: You won’t hear the sinewave, only noise.
Why does this happen? If you were to graph the sinewave values, they would appear correct? The
following quote seems to sum up the answer the best.
“The right answer at the wrong time … is the wrong answer.”
Since the DSK was designed to support only an 8kHz sample rate, thousands of samples would
be ignored by the codec if we let the CPU create and output samples as fast as it’s able.
Codec Interface
CPU McBSP0 AD535
sine xmit D/A speaker

150MHz
8kHz
sample
clock
CPU generates samples at 150MHz

Codec accepts samples at 8kHz
If the sinewave function isn’t synchronized with the 8KHz sample rate of our converter, only
noise (or clicks) will come out of the speaker. Using hardware interrupts can solve this dilemma.

Serial Port Transmit Interrupt (XINT0)

When the McBSP is ready to receive another value, it generates an interrupt to the CPU. Our
example would generate the Transmit Interrupt for McBSP 0, otherwise known as XINT0.
XINT0 Interrupt
Codec Interface
CPU McBSP0 AD535
sine xmit D/A speaker

XINT0
8kHz
sample
clock
When McBSP needs another sample, it issues XINT0 HWI

XINT0 should occur at 8kHz (codec sample rate)
How do we make CPU wait? Use loop: while(1);

How do you make an HWI function? Use config tool
Let’s look at a code sample for these ...
Waiting for Interrupts

Since there is a long time between XINT0 hardware interrupts (HWIs), what should we have the
processor doing?
main()
main()
{{ system
system
initialization
initialization
XINT0_HWI()
XINT0_HWI()
while(1);
while(1); {{ codecOut(sineGen());
codecOut(sineGen());
}} }}
When designing a hardware interrupt driven system, it is common practice to end the main()
function with an endless loop. The always-true while loop (above figure) serves this purpose. An
upcoming chapter describes a second (better) method for endlessly looping using the DSP/BIOS
IDL function. For now, though, the while loop will serve our purposes.
Turning a Function into an Interrupt Service Routine (ISR)

In the preceding figure, we created the XINT0_HWI() function to act as our ISR. That is, every
time the XINT0 interrupt occurs, the processor should run this function. Question is, how can we
get the processor to respond in this fashion?

Making the codec output into a Hardware Interrupt Service Routine

For those of you who are experienced with developing microprocessor based systems, you are
probably already imagining the steps needed to create an ISR and tie it to an interrupt. First you
need to provide context save/restore (save all the registers) going into and out of the function.
Second, you need to build an interrupt vector table, and so on …
Code Composer Studio has simplified this process. (Oh, if you didn’t already know all those
steps, count yourself lucky you don’t have to figure it all out.) The DSP/BIOS configuration tool
will handle all these issues for you. You only need to select three options in the HWI graphical
interface.
Turning Function into an ISR
XINT0_HWI()
XINT0_HWI() /*/* HWI
HWI */*/
{{ codecOut(sineGen());
codecOut(sineGen()); Last step:
}}
Initialization ...
The Configuration Tool can make any function into an interrupt service routine. In this case we
show our XINT_HWI() function being used as an interrupt service routine. Here are the steps
required:
1. Open the DSP/BIOS Configuration Tool, expand the HWI module by clicking on the +, and
select one of the available interrupts (HWI_INT4 thru HWI_INT15).
2. Choose the interrupt source you want associated with the HWI_INTx interrupt you have
selected. In this example, we set HWI_INT9 as McBSP0 transmit interrupt (XINT0).
The ‘C6000 devices give you an extra level of flexibility by allowing you to associate any
interrupt source with any interrupt flag. This is esp. useful since pending hardware interrupts
are serviced in priority INT4 (highest) to INT15 (lowest).
3. Enter the function name you want to use as an ISR into the Function textbox. Note, if the
function was created in C code, you must append an “_” underscore before the function
name.

4. Check the Use Dispatcher box. The interrupt dispatcher provides the context save/restore and
interrupt return to your function call. (Not shown, the dialog also allows you to specify which
interrupts can be nested within this interrupt service routine.)
When you save the configuration file (*.cdb), essentially, it will create:
x Creates the interrupt vector table (using the INT# and the function name you specify).
x Creates the initialization code needed to set the INT# to the specified interrupt condition
(in this case, INT9 as McBSP0 transmit interrupt (XINT0)).
x Provides context save/restore and return-from-interrupt for the specified function.
Note: There are other methods for creating interrupt service routines. If you prefer, you can still
create an ISR with assembly language. Due to the limited 1-day format, and this
method’s ease-of-use, we cannot cover the other methods today. The CPU reference
guide and the ‘C6000 4-day workshop covers interrupts in greater depth.
[Personally, the method we describe here is the one I always use. Ed.]

System Initialization
For our example, three items must be initialized:
x The Chip and Board Support Libraries
x AD535 codec (and associated McBSP0)
x Hardware Interrupts
BSL and CSL Initialization

The Chip and Board Support Libraries must be initialized before you can use them. Each library
contains an initialization routine:
CSL/BSL Initialization
DSK
‘C6711
HWI
sineGen McBSP
DAC
transmit interrupt
main()
main()
{{CSL_init();
CSL_init();
BSL_init();
BSL_init();
XINT0_HWI()
HWI */*/
while(1);
}} }}

Codec Initialization
The second initialization activity configures the AD535 codec.
DSK
AD535_Handle
AD535_HandlehAD535;
hAD535;
AD535_Config
AD535_ConfigmyAD535
‘C6711
myAD535=={{
AD535_LOOPBACK_DISABLE,
HWI
sineGen
AD535_MICGAIN_OFF,
AD535_MICGAIN_OFF,
McBSP
AD535_GAIN_0DB,
AD535_GAIN_0DB, DAC
AD535_GAIN_0DB
AD535_GAIN_0DB};};
void transmit interrupt

voidcodec_init()
codec_init(){{
hAD535
hAD535==AD535_open(AD535_localId);
AD535_open(AD535_localId);
main()
main() AD535_reset(hAD535);
AD535_reset(hAD535);
{{CSL_init();
CSL_init(); AD535_config(hAD535,
AD535_config(hAD535,&myAD535);
&myAD535);}}
BSL_init();
BSL_init();
codec_init();
codec_init();
XINT0_HWI()
HWI */*/
while(1);
}} }}
We copied the code for this example directly out of the BSL documentation. It suited our needs
just fine.
Using the AD535 module simplifies using the codec. In the past, users were required to first
configure the McBSP0, then initialize the codec by sending commands through the McBSP. Of
course, this also required a thorough understanding of the AD535. The BSL provides these
services, all wrapped up in a simple API.

Hardware Interrupt Initialization

At reset, interrupts are disabled. This allows you to configure/initialize them before turning them on. The
following figure diagrams the basic hardware interrupt sequence.
Enabling Interrupts
IFR IER CSRGIE
Interrupt “Individual “Master
Occurs Switch” Switch”
INT4 1
0 ‘C6000
CPU
INT15 1
Interrupt Enable Reg (IER)

turns on individual Global Interrupt Enable (GIE) bit
interrupts in Control Status Reg (CSR)
IRQ_enable( IRQ_EVT_INTn) enables all IER enabled interrupts
IRQ_globalEnable()
IRQ_globalDisable()
IRQ_globalRestore()
Similar to most processors, three steps must occur before the ‘C6000 CPU can respond to an interrupt:
1. The interrupt must occur. When it does, a flag bit is set in the Interrupt Flag Register. (You
don’t really have to know this because the CPU hardware clears the associated flag bit when
it automatically responds to a given interrupt.)
2. An interrupt must be individually enabled before it can be recognized by the CPU. Again,
there is a register (IER) dedicated for this. In our case, rather than dealing specifically with
the register, we will use the IRQ functions from the Chip Support Library to enable
individual interrupts.
3. The global interrupt enable (GIE) bit within the Control Status Register must be set before the
CPU can recognize an interrupt. Think of it as a master switch for interrupts. Rather than
poking around in registers, we will again use the IRQ functions:
IRQ_globalEnable
IRQ_globalDisable
IRQ_globalRestore
In the upcoming lab, we will only need to use the IRQ_globalEnable() function.
Note: Those of you already familiar with the ‘C6000 might remember that a NMI (non-
maskable interrupt) exists. Uniquely, the NMI is not enabled at reset. This allows a
system designer to setup the NMI ISR before an NMI instance can occur; basically, this
saves hardware many designers have been required to include over the years.

Note (cont’d): When a configuration file (*.cdb) is included in your project, an extra DSP/BIOS
initialization step is included by the compiler. While there are no adverse affects to this
initialization, there is one benefit. Namely, the NMI enable (NMIE) bit is set for you.
Therefore, upon entering your main() function, you do not have to write your own code
to set the NMIE bit.
Code to Enable Interrupts

The code required to enable a single interrupt includes the following two functions:
Enabling Interrupts
DSK
‘C6711
HWI
sineGen McBSP
init_HWI(){
init_HWI(){
//Enable
// Enableinterrupts
interruptsglobally
globally(this
(thissets
setsthe
theGIE
GIEbit
bitininCSR)
DAC
CSR)
IRQ
IRQ _globalEnable();
_globalEnable();
transmit interrupt
//Remember,
// Remember,we weused
usedMcBSP
McBSPtransmit
transmitint
int(XINT0)
(XINT0)
main()
main() IRQ
IRQ _enable(
_enable(IRQ IRQ_EV
_EVT_XINT0
T_XINT0););
{{CSL_init();
CSL_init(); }}
BSL_init();
BSL_init();
codec_init();
codec_init();
init_HWI();
init_HWI();
AD535_write(hAD535,
AD535_write(hAD535,0);
0); XINT0_HWI()
HWI */*/
while(1);
}} }}
Notice, these two functions provide the global and individual interrupt enables, respectively.
IRQ_globalEnable();
IRQ_enable(IRQ_EVT_XINT0);
The IRQ_enable() function knows which IER bit to set because the IRQ_EVT_XINT0 has been
mapped to IE9 by our choice in the HWI9 object in the configuration tool. If you had chosen not
to use the Configuration Tool or if you want to change this mapping at runtime, you can use the
IRQ_map(IRQ_EVT_XINT0, 9) function.

Lab 4
Lab 4
This lab exercise produces a sinewave output via the speaker. If you can hear the output, you’ve correctly
completed the exercise.
DSK
‘C6711
HWI AD535 BSL
sineGen McBSP
DAC
transmit interrupt
Lab 4
lab4.c #include’s sine_float.c sineGen()
global variables
main() {
CSL_init();
BSL_init(); lab4.cdb HWI_INT?
codec_init();
init_HWI(); XINT0 interrupt
AD535_write(hAD535, 0);
return;
}
// HWI routines
init_HWI(); You get to
XINT0_HWI; complete these
// Codec Routines
codec_init();
codec_out();

Lab 4
To make the lab easier, the next few pages contain a copy of LAB4.C.
/**************************************************************\
* This file contains all the functions for Lab4 except
* sineGen(). Most of it has already been written for you due
* to the limited time available in a one-day workshop.
*
* We have left a few "???" places, though, where you must enter
* the appropriate C code. Have fun!
\**************************************************************/
/**************************************************************\
* Prototypes
\**************************************************************/
void codec_out(void);
void codec_init(void);
void init_HWI(void);
void emif_init(void);
short sineGen(void);
/**************************************************************\
* Include files
\**************************************************************/
#include <c6x.h> // C6000 compiler definitions
#include <csl.h> // CSL headers

#include <csl_irq.h>
#include <csl_mcbsp.h>
#include <bsl.h> // BSL headers

#include <bsl_ad535.h> // -i build option allows CCS to find these headers
#include <bsl_suggestions.h>
/**************************************************************\
* Global Variables
\**************************************************************/
/**********************************************************\
* The following AD535 Handle and Config structure were
* entered verbatim from the BSL documentation. The config
* values are common to many applications; if nothing
* else, they make a good starting point.
\**********************************************************/
AD535_Handle hAD535;
AD535_Config my_AD535_Config = {
AD535_MICGAIN_OFF,
AD535_GAIN_0DB,
AD535_GAIN_0DB
};
/**************************************************************\
* Main Routine
\**************************************************************/
void main()
{
CSL_init(); // Initialize CSL library
BSL_init(); // Initialize BSL library
emif_init(); // Dummy function - see note below
codec_init();
init_HWI();
AD535_write(hAD535, 0); /* Write anything to cause mcbsp

to start transmit interrupts */
/**************************************************\

Lab 4
* Rather than creating an infinite loop in main,

* DSP/BIOS provides an infinite idle (IDL) loop.
* All you need to do is return from main.
\**************************************************/
while(1);
}
/**************************************************************\
* Configure External Memory Interface (EMIF)
*
* We have a dummy function here to setup the EMIF. In a "real"
* system you would be required to setup the EMIF but in our
* development system CCS sets up the memory for us (refer to
* the DSK6211_6711.gel file for the CCS script that
* accomplishes this task.
\**************************************************************/
void emif_init(void){
}
/*************************************************************\
* Initialize hardware interrupts.
**************************************************************
* The AD535 codec is hardwired to McBSP0. Therefore,
* our system uses the McBSP0 transmit interrupt
* (XINT0) to signal when to write the next output sample.
*
* Enabling the CPU to recognize the XINT0 interrupt requires:
*
* 1. Map McBSP0 transmit interrupt (XINT0) to interrupt 9 (HWI9)
* using the Config Tool
* 2. Enable interrupts globally
* 3. Enable McBSP transmit interrupt
\*************************************************************/
void init_HWI(void)
{
IRQ_????????????(); // Enable ints globally
IRQ_enable(?????????????); // Enable McBSP0 interrupt
}
// Interrupt service routine you need to reference in HWI module of CDB file
void XINT0_HWI(void)
{
codec_out(); // Outputs sine sample for each XINT0 interrupt?
}
/**********************************************************\
* Codec Functions
\**********************************************************/
void codec_init()
{
/* Use the BSL routines to: Open, reset, & config the AD535 *\
* Part of the AD535_open() routine opens and configures the McBSP0, since *
\* all communications with the AD535 codec are handled via the McBSP0. */
hAD535 = AD535_????(AD535_localId); // Open AD535 and set hAD535 handle
AD535_reset(??????); // Reset AD535
AD535_??????(??????, &??????????????); // Configure AD535
/**************************************************\
* This sets a bit in a McBSP register thus
* allowing it to continue running even when the
* debugger is halted. This keeps the codec from
* being corrupted.
*
* We've put this function in the "bsl_suggestions"

Lab 4
\**************************************************/
MCBSP_setfree(0);
}
/******************************************************\
* Output a sine sample from the function SineGen()
* to the AD535 codec.
\******************************************************/
void codec_out(void)
{
AD535_HWI_write(hAD535, sineGen());
}

Lab 4
Open Project
1. Open the project LAB4.PJT within CCS. (Project:Open…)
In the interest of time, we have pre-built most of this project for you. The project should contain the
following files:
2. Set the project options. To make this easier, we have placed the compiler options in a text file
<lab4_compiler_options.txt> for you to cut-and-paste.
-iC:\ti\c6000\dsk\include
-iC:\c60001day\ti\preliminary_bsl\include
-dCHIP_6711
-dBOARD_6711DSK
While there are text entry boxes in the GUI to enter these items into, it’s much easier to paste
this into the GUI as shown:

Lab 4
Configure Hardware Interrupts (HWI)

Configuring hardware interrupts requires two steps:
x Setting up the interrupt service routine
x Initializing HWI’s
Interrupt Service Routine

3. As discussed earlier in the chapter, this exercise uses the McBSP transmit interrupt (XINT0) to
indicate when a new sample should be output to the codec.
{
codec_out(); /* Outputs sine sample for each XINT0 interrupt? */
}
Open LAB4.C and examine the codec_out() function. What will it do in response to an XINT0
interrupt?
_________________________________________________________________________________
Note, the function AD535_HWI_write() is documented in the bsl_suggestions.h file. We’ll talk more
about how this works later (page 4-33).
4. How can you make the XINT0_HWI function into an interrupt service routine?
_________________________________________________________________________________
5. To implement the answers to the previous two steps, open LAB4.CDB and expand (open) the
HWI module (within the Scheduling folder). (We already created the CDB file for you and
added it to the project but other than that, we haven’t modified it.)
6. Examine HWI_INT4 through HWI_INT15, looking for the McBSP serial port transmit interrupt. This
is easiest if you click on HWI_INT4 as shown and look at the Interrupt Source field; then cursor down
the list …
What INT# is it associated with MCSP_0_ transmit by default? ______________________________

For MCSP_0_transmit, the DSK6711.CDB template default is HWI_INT9. In the future, if you can’t
find the one you’re looking for, just select one of the HWIs (whose source you are not using) and re-
configure it. The Config Tool takes care of all the code needed to perform this reconfiguration.

Lab 4
7. Open the properties of the HWI_INT9 (step 6 answer) by right-clicking on HWI_INT9 and selecting
Properties.
a. Enter the name of the HWI service routine into the function textbox. Note, if the function was
defined in C (as in our case), you must append a leading underscore preceding the function name
you enter.
_FunctionName
What function name should you use? _______________________________________________
b. Tell the Config Tool to use the interrupt dispatcher routine provided by CCS to handle all the
hardware interrupts context save/restore operations.
Click the Dispatcher tab, then check:
; Use Dispatcher
8. Save and close LAB4.cdb.

The configuration tool creates all the code required to configure the interrupt selections you chose.
Additionally, it creates the interrupt vector table for you.
Initializing Hardware Interrupts

9. Open LAB4.c to the init_HWI function and fill in the three missing code segments indicated by ???.
/*************************************************************\
**************************************************************
*
*
\*************************************************************/
void init_HWI(void)
{
IRQ_????????????(); // Enable ints globally
IRQ_enable(?????????????); // Enable McBSP0 transmit interrupt
}
Hints:
To check on IRQ syntax, please refer the TMS320C6000 Chip Support Library API Reference Guide
Revision 2.0 (pages 11-16 and 11-14):
C:\ti\docs\pdf\spru401b.pdf
To make it easy to find, we have placed a shortcut to this book in the Lab 4 folder.

Lab 4
Codec Functions
There are two codec routines:
x Configure the codec – codec_init();
Step 10 asks you to complete this function.
x Write to the codec – codec_out();
This function has been written for you.
These routines use the Board Support Library (BSL). BSL is available in preliminary form, as it has not yet
been production released. It is included with the workshop lab files at
c:\c60001day\ti\preliminary_bsl\.
10. Scroll down through LAB4.C to find the codec_init() function. Replace the ??? entries with the
appropriate C code.
void codec_init()
{
// Use the BSL routines to: Open, reset, & config the AD535
hAD535 = AD535_???? (AD535_localId); // Open AD535 and set handle
AD535_reset(?????? ); // Reset AD535
AD535_?????? (??????, &??????????????? ); // Configure AD535
The BSL simplifies the configuration; rather than having to write the code to initialize the McBSP and
AD535, we simply specify the needed settings and the BSL functions perform the configuration for
you.
Hint:
To check on AD535 syntax, please refer the TMS320C6000 DSK Board Support Library API User’s
Guide Preliminary (pages 2-9, 2-12, and 2-4 respectively). You can find this book at:
C:\c60001day\ti\ BSL Ref Guide - spru432.pdf

Lab 4
Codec Output
As mentioned, this function has already been written. It uses a special AD535 write function
well suited for use within an interrupt service routine.
/******************************************************\
\******************************************************/
{
}
The AD535_write function polls the McBSP transmit ready bit, waiting for it to become
ready. Waiting for ready ties up the processor. The HWI version, AD535_HWI_write
assumes the port is ready, and immediately writes the output value. If this function is
triggered by the transmit interrupt, this is a valid assumption. The benefit is that the processor
is free to perform other functions, rather than polling the ready bit, which is the whole idea
behind hardware interrupts.
Note: The AD535_HWI_read and AD535_HWI_write functions are not officially part of the
preliminary Board Support Library. They are recommendations and have been included
in the BSL_SUGGESTIONS.H file (located in the Lab 4 folder).
Build and run …

11. Rebuild the file and load the program (LAB4.out).
Note: You will most likely receive the following warning.
Warning: incompatible redefinition of macro “FLASH_SIZE”
This is a known BSL bug and will not affect our program. Please go ahead and ignore it.
12. Run your program and listen for the sinewave tone.
If you didn’t hear it, first make sure all the hardware connections are solid. If the cabling is
OK, you need to debug your code.
Using IDL
13. In the main() function, comment out the while(1); loop and replace it with:
return;
When a CDB file is present in your project and your code returns from the main function, the
processor enters the DSP/BIOS idle (IDL) loop. In our case, nothing should change – after
rebuilding the code and running, it should sound the same. Later today, we’ll discuss the
benefits of using IDL versus a while loop.
14. Verify that code using IDL works the same as your previous code.
15. Halt the DSP when you are done.

Take Home Exercises
Take Home Exercises

Lab4a – Try graphing the Sine Wave
The lab4a.pjt project can be found in C:\c60001day\labs\lab4a directory. It contains a for-loop that runs
the sine routine 64 times. Try setting up a graph to view the buffer of sine samples.
Here are a few comments/suggestions:

x Here is how we setup our graph properties. (Open with View:Graph:Time/Frequency …)
x To display graph information, the DSP must be halted. We setup a breakpoint at the end of the for-
loop, which calls the sine routine.
void main()
{
block_sine(buffer, BUFF_SIZE);
o }
x In this project we modified the CDB template to put global variables into internal memory. We
describe how this can be done in Module 5.

Take Home Exercises
Lab4b – Compare floating vs. fixed-point sine algorithm

ANSI C does not address mathematical overflow issues using fixed-point (short, integer) numbers, rather, it
allows results to become corrupted. That is, when you multiply and/or add and the numbers become too
big, you will get errors. (This is similar to what you find if you keep hitting add or multiply on your
calculator, eventually it’ll say error.)
This is the difficulty of integer processing. To correct for this, most engineers choose to use fractional
fixed-point math, often called Q-format math. Essentially, this method provides a simple means of scaling
numbers to prevent (or at least reduce) overflow. Unfortunately, there isn’t time in this workshop to discuss
these issues. Besides the fact, since you are using a ‘C6711 floating-point processor, you don’t have to be
as concerned as a fixed-point user would.
This take-home project briefly explores these issues. It calculates the sine wave in three ways: float,
standard fixed-point, and fractional fixed-point. Graphing all three of them, you’ll notice that both the float
and fractional solutions produce the expected sinewave.
The project can be found at C:\c60001day\labs\lab4b.
Note, here’s a hint on setting up the appropriate graphs:

Take Home Exercises
Other Exercise Ideas

Upgrade sine output to DTMF (dual-tone)
Rather than generating only one tone, try generating two tones by running the sineGen() function
twice – each with different coefficients and initial/feedback data. Then add the two sine tones
together to generate a DTMF tone.
We have provided DTMF information in the workshop appendix.
Use switches to vary DTMF tones, LEDs to visualize the switch settings
Taking the lab a step further, use the DIP and LED modules from the Chip Support Library to
change (and indicate) the DTMF tones generated by your code.
Have Fun …

Optional Topic - Data Convert Plug-in

Data Converter Plug-in
Easily build your own, custom functions for
the TI data converters on your board
CCS plug-in
Updates available at:
http://www.ti.com/sc/dcplug-in
Board Support D TI’s User.lib

Layer C bsl.lib
P
Chip Support
TI’s csl.lib
Layer
Data Converter Support Tool
The data converter support tool is a Code

Composer Studio plug-in which lets you
configure all the options of a data
converter:
Automatic creation of C language
support functions for:
Reset
Configuration
Read/write of sample values (single and block)
Special purpose functions (e.g. power-down)
Ease of use through device independent API
Includes full, on-line help to reduce datasheet referencing
User Interface: The Converter List
Lists all supported data

converters
Shows a short
description of each data
converter
Lets you add any number
and any combination of
data converters to your
system

User Interface: DSP Tab
Lets you set the DSP

type
Lets you set the DSP
speed
Default values are
derived from the CCS
setup file
Lists all available DSP
peripherals
User Interface: Converter Tab
Lets you configure all

converter parameters
Lets you select the
serial port (if the
converter is a serial
one)
This McBSP will be
automatically
configured to work
with the converter
Help is available for
every parameter (no
datasheet reading!)
Parameter are grouped
logically (and not by
registers)
No invalid bit
combinations
possible!
User Interface: Files Tab
Lets you set the

directory for the code
Clicking the “Write
Files” button will
generate the C source
and header files for all
selected data
converters
For more information, see Appendix 4 ...

Building a System (EDMA, Cache)
Today’s Agenda
Agenda
2. EDMA, Cache
VAB Visual Design
Epilogue What Next?
Chapter Outline
The goal of Chapter 5 is to make the DSP system more efficient by using the Enhanced DMA
(EDMA) peripheral. The EDMA moves blocks of memory around the system without CPU
intervention, therefore leaving the CPU free to work on algorithms.
Outline
What is Block Processing?
EDMA
Operation
Initialization
Interrupt to CPU
Block Processing Code
Cache
RISC vs. C6000 cache architecture
‘C6000 Double level cache
Configuring L2 cache
Lab
Use EDMA with block sineGen
TMS320C6000 One-Day Workshop - Building a System (EDMA, Cache) 5-1

Module Topics
Module Topics
Building a System (EDMA, Cache) .......................................................................................................... 5-1
Module Topics ......................................................................................................................................... 5-2

Improve System with Block Processing ................................................................................................... 5-3
How the EDMA works............................................................................................................................. 5-6
Block Processing Code.......................................................................................................................... 5-10
Configuring EDMA .......................................................................................................................... 5-10
EDMA Interrupt (to CPU) ................................................................................................................ 5-12
Block Sine Code ............................................................................................................................... 5-13
Cache..................................................................................................................................................... 5-14
‘C6711 Advantage vs. Typical RISC Architecture ........................................................................... 5-14
‘C6x11 Internal Memory .................................................................................................................. 5-15
Configuring L2 Cache....................................................................................................................... 5-16
LAB 5..................................................................................................................................................... 5-17
Take Home Exercise.............................................................................................................................. 5-32
Optional Topics ..................................................................................................................................... 5-33
Chip Support Library - DAT Module ............................................................................................... 5-33
Single / Double Buffers..................................................................................................................... 5-34
Multi-Channel Systems using the McBSP ........................................................................................ 5-35
Channel Sorting with the McBSP and EDMA (or DMA)................................................................. 5-36
5-2 TMS320C6000 One-Day Workshop - Building a System (EDMA, Cache)

Improve System with Block Processing

Here is the system used in Chapter 4:
How can we Improve System?

DSK
HWI
CPU
McBSP
DAC
CPU
CPU must:
must:
Generate
Generatesine
sinewave
wavesamples
samples
Respond to McBSP interrupt
Respond to McBSP interrupt
Send
Senddata
datatotocodec
codec(via
(viaMcBSP)
McBSP)
How can we improve system performance?
Notice that the CPU not only generates the sine wave values but is also responsible for writing
them to the codec. You might remember from the last module that hardware interrupts were
required to trigger the CPU to create and write a new value.
The downside to interrupts, on any microprocessor, is that they use-up some of the processors
performance each time an interrupt is serviced.
What is the answer?

Block processing (sometimes called vector processing) is a common solution to this problem.
Block Processing with EDMA

DSK
CPU
Buffer McBSP
EDMA DAC
CPU
CPU
Generates
Generatesbuffer
bufferof
ofsamples
samplesat
ataatime
time
EDMA
EDMA
Handles
HandlesMcBSP
McBSPinterrupt,
interrupt,reduces
reducesCPU
CPUint.
int.overhead
overhead
Sends
Sendsdata
datato
tocodec
codec
If EDMA handles the McBSP event,
how does the CPU know when to run?
Workload Distribution
Distribute some of the workload to the EDMA; let it respond to the McBSP transmit event
(interrupt) and copy data from memory to the codec (via the McBSP). Rather than servicing each
individual sample request from the McBSP, the CPU creates an entire block (or vector) of
samples, storing them into the buffer where the EDMA will read them.

Reduced Interrupt Overhead

Q: If the EDMA handles the codec/McBSP interrupt events, how does the CPU know when to
generate the next block of samples?
Use EDMA
DSK
CPU
Buffer McBSP0
EDMA DAC
EDMA XEVT0
interrupt event
8KHz y buffersize 8KHz
EDMA
EDMAinterrupt
interrupttells
tellsCPU
CPUwhen
whento torun
run
Reduces
Reduces CPU interrupts by factor ofbuffersize
CPU interrupts by factor of buffersize
How does the EDMA work?
A: The EDMA tells the CPU when to refill the buffer with data samples. You can program the
EDMA to generate an interrupt to the CPU after every so-many transfers.
Note: When the McBSP0 (serial port 0) is ready to receive a new value to transmit it generates
the XINT0 interrupt to the CPU and the XEVT0 event to the EDMA. In the Chapter 4 we
had the CPU respond to the interrupt. In this chapter we’ll let the EDMA handle it’s
counterpart (XEVT0); the CPU will not directly respond to the interrupt.
Code Efficiency
Block processing allows the compiler to generate more efficient code. Creating multiple sine
values can be performed in a highly optimized loop. On any processor, it’s hard to create the
same efficiency when only one value is calculated.
Bottom Line
Not only is the CPU freed from data movement responsibilities (by the EDMA) and can run more
efficient (block) code, its interrupt overhead is also reduced. All of these allows the CPU to spend
more cycles working on your algorithms.

How the EDMA works
How the EDMA works

Definitions
EDMA: Enhanced DMA
DMA: Direct Memory Access
What does this really mean? The ‘C6000 DMA and EDMA peripherals can move data from one
memory location (or set of memory locations) to another. More importantly, it can do this
independent of the CPU. Why waste the CPU performing load and store instructions when we
have a peripheral to do it for you?
What the EDMA needs to know

For the EDMA to work though, it needs some basic information:
x Where to copy from (source)
x Where to copy to (destination)
x How many locations to copy (count)
Also, the EDMA has a wide variety of options that can be configured. You will select these
features with control (a.k.a. option) registers.
EDMA
mem1 A0 mem2
A1
A2
A3
A4
A5
What information is needed

by the EDMA
EDMA to perform transfers?
Options
Source
Destination
Xfr Count

How the EDMA works
C6711 EDMA Inner- EDMA Overview

workings
EDMA 16 channels
The EDMA contains 16 channels. Channel 0 Stores parameters for 69 more transfer config’s
Per channel: high/low priority, else round-robin
Each channel is programmed by Channel 1
writing its six control registers Channel 2
which are found in the EDMA’s ... Options
2K byte parameter RAM. 15 Source
Reload 1 Transfer Count
Destination
Two Kbytes allows for 16 channels Reload 2
Index
(of six channels) plus an additional ...
Count Reload† Link Addr†
69 sets of reload parameters. These Reload 69
31 16 15 0
reload parameters can be used to
automatically re-initialize EDMA
channels after they complete (all
without CPU intervention).
EDMA Channel Details

The EDMA has a separate channel for each available interrupt event. Which channel will we need
to use for our example? _____________
Channel Associated Event Event Description

0 DSPINT HPI to DSP interrupt
1 TINT0 Timer 0 interrupt
2 TINT1 Timer 1 interrupt
3 SD_INT EMIF SDRAM timer interrupt
4 EXT_INT4 External interrupt pin 4
8 EDMA_TCC8 Supports DMA task chaining
9 EDMA_TCC9 “
10 EDMA_TCC10 “
11 EDMA_TCC11 “
12 XEVT0 McBSP0 transmit event
13 REVT0 McBSP0 receive event
14 XEVT1 McBSP1 transmit event
15 REVT1 McBSP1 receive event
If you selected channel 12, you’d be correct.
Note, if a specific interrupt event is not required, that channel may be used for any
unsynchronized memory-to-memory transfer.
QDMA
Beyond the basic 16 channels, the ‘C6711 contains one other DMA channel:
x The single-channel QDMA (quick-DMA) is programmed in a similar fashion as the EDMA.
Unlike the EDMA, it does not allow synchronization or autoinitialization. On the other hand,
it takes fewer cycles to program and runs with higher priority than the EDMA.

How the EDMA works
Two EDMA Features Used in Lab 5

In the upcoming lab exercise, we’ll use the EDMA to transfer an entire buffer (array) of sine
wave samples to the McBSP/codec. The Options register and Transfer Counter allow you to
specify the number of values to transfer.
EDMA - How much to move

Block piece of information
The smallest Frame Element
Frame 1
transferred by the EDMA Elem 1
is called...
Frame 2 Elem 2 ESIZE
. . 00: 32-bits
. . 01: 16-bits
Elem N 10: 8-bits
11: rsvd
Frame M
28 27
Options
ESIZE
Source
Transfer Count
Destination
# Frames # Elements
Index
31 16 15 0
Cnt Reload Link Addr
31 0
In our case, we will transfer one sample per McBSP interrupt event. After the Transfer Count
reaches zero, the EDMA should be programmed to:
x Signal the CPU to refill the buffer; that is, the EDMA should generate an interrupt to the CPU
x Re-initialize itself without CPU intervention

How the EDMA works
EDMA Autoinitialization – a.k.a. Linking

When an EDMA channel’s transfer count reaches zero (and the LINK bit in the Options register
is set to 1), the EDMA will copy the reload parameters specified by the Link Address field into
itself. In the following example, when count goes to zero, the six 32-bit values associated with
Reload 2 will be copied into the channel’s control registers.
EDMA: Linking Transfers

Options
Channel 0
Source
Channel 1
Transfer Count
Channel 2
Destination
...
Index
15 Count Reload Link Addr
Reload 1 31 16 15 0
Reload 2
...
Reload 69
Offloads CPU ... can reinitialize EDMA all channel registers

Next transfer configuration specified by Link Address
Perform simple re-initialization or create linked-list of events
Useful for ping-pong buffers, data sorting, circular buffers, etc.
Any reload set may be used with any channel. In fact, you can create a linked-list of EDMA
transfers. In our lab, we will only use one reload set, which will be used to reinitialize the EDMA
to do the same set of transfers over-and-over again.


What specific code is required for the CPU and EDMA block processing example?
x EDMA configuration
x CPU function to handle interrupt generated by the EDMA
x Convert sine algorithm into a block sine algorithm
Configuring EDMA
Configuring the EDMA using the Chip Support Library requires setting up three data structures
(two EDMA_HANDLEs, one EDMA_CONFIG) and writing an initialization function. The
function to configure the EDMA for our example consists of six steps:
EDMA Config
Options EDMA_Handle
EDMA_Handle myEDMA,
myEDMA, myLNK;
myLNK;
Source
Transfer Count EDMA_Config
EDMA_Config myConfig
myConfig == {{
options,
options,
Destination source,
source,
Index length,
length,
Count Reload Link Addr destination,
destination,
index,
index,
31 16 15 0
reload:link
reload:link
};
};
edma_init
edma_init ()() {{
1.
1. open
open XEVT0
XEVT0 EDMA
EDMA channel
channel //// McBSP0
McBSP0 transmit
transmit event
event
2. allocate LINK parameter location
2. allocate LINK parameter location
3.
3. update
update EDMA_Config
EDMA_Config with
with LINK
LINK location
location
4.
4. configure EDMA channel & link
configure EDMA channel & link location
location
5.
5. enable
enable EDMA EDMA channel
channel
6.
6. enable EDMA interrupt
enable EDMA interrupt to
to CPU
CPU
}}
5 - 10 TMS320C6000 One-Day Workshop - Building a System (EDMA, Cache)

Here is the code associated with the six steps above – each line of code represents a step,
respectively.
void
void edma_init
edma_init (void)
(void) {{
hEdma
hEdma = EDMA_open(EDMA_CHA_XEVT0,
= EDMA_open( EDMA_CHA_XEVT0,EDMA_OPEN_RESET
EDMA_OPEN_RESET););
hEdmaLINK
hEdmaLINK==EDMA_allocTable(
EDMA_allocTable(-1 -1););
myConfig.rld = EDMA_MK_RLD(myLNK,0);
myConfig.rld = EDMA_MK_RLD(myLNK,0);
EDMA_config(hEdma,
EDMA_config(hEdma, &my_edma_Config);
&my_edma_Config);
EDMA_config(hEdmaLINK,
EDMA_config(hEdmaLINK,&my_edma_Config);
&my_edma_Config);
EDMA_enableChannel(
EDMA_enableChannel(hEdmahEdma););
EDMA_intClear(5);
EDMA_intClear(5); EDMA_intEnable(5);
EDMA_intEnable(5); }}
Most of the EDMA functions should be obvious, here are a few notes for the less obvious:
x EDMA_allocTable(-1) reserves one of the 69 reload parameter sets. You can pass any
number between 0 and 66 (two are reserved by CSL). Using “-1” tells the CSL to select any
available parameter set. Notice, this function returns a ‘pointer’ to the myLNK handle.
x We run EDMA_config() twice, once to setup the XEVT0 channel itself (pointed to by the
hEdma handle), the other to setup the reload parameter set (pointed to by the myLNK
handle).
x Before a channel can run, it must be enabled; hence the EDMA_enableChannel().
x When the EDMA completes it transfer (when the element count is decremented to zero), it
can interrupt the CPU.
To do this, the EDMA channel sets a bit in the CIPR (Channel Interrupt Pending
Register)
You can choose which CIPR bit you want to use, this is done with the TCC field in
the Options register
For the CPU to receive the interrupt, the chosen CIPR bit must be enabled; this is
done by setting the appropriate bit in the Channel Interrupt Enable Register (CIER);
this is done with the EDMA_intEnable() function.
You can clear a bit in the CIPR register using EDMA_intClear()
TMS320C6000 One-Day Workshop - Building a System (EDMA, Cache) 5 - 11

EDMA Interrupt (to CPU)

When the CPU receives the EDMA interrupt, what should it do?
EDMA Interrupt (to CPU)

DSK
edma_HWI
Buffer McBSP
EDMA DAC
//
// Interrupt
Interrupt Service
Service Routine
Routine
edma_HWI()
edma_HWI() {{
block_sine();
block_sine();
}}
In our case, we want it to generate a new block of sine values.
Note: While the EDMA has 16 channels, it can only send one interrupt to the CPU. Actually,
this is nice design feature since it allows TI to include additional channels on future
processors. For example, the ‘C64x EDMA has 64 channels.
If you are using more than one channel to interrupt the CPU, the CPU’s interrupt service
routine will have to read the channel interrupt pending register in the EDMA to determine
which channel caused the CPU interrupt(s).

Block Sine Code

To generate a block of sine values, we simply created a global array (buffer) and placed the
sineGen() function into a for-loop.
block_sine()
DSK
edma_HWI
Buffer McBSP
EDMA DAC
short
short buffer[1
buffer[1228]
8];;
main()
main()
{{ init_EDMA();
init_EDMA(); void
void block_sine()
block_sine() {{
init_HWI()
init_HWI() for
for (i
(i == 00;; ii << 11228;
8; i+
i+++)) {{
...
... buffer[i]
buffer[i] == sineGen();
sineGen();
}} }}
}}

Cache
Cache
‘C6711 Advantage vs. Typical RISC Architecture
RISC Cache Systems
Unlike ‘C6x11, in typical RISC systems you
find internal memory is cache only
Requires external storage of peripheral data
Enhanced
External DMA
EMIF
Memory (EDMA)
Cache
Peripheral Port
On-Chip Memory/Cache
Configure as cache and/or mapped-RAM
Allows peripheral data or critical code/data
storage on-chip
Mapped
as RAM
Enhanced
External DMA
EMIF
Memory (EDMA)
Cache
Peripheral Port

Cache
‘C6x11 Internal Memory

‘C6x11 Internal Memory
Level 1 Caches
L1 Single-cycle access
Program
Always enabled
(4KB)
L2 accessed on miss
L2
Program Level 2 Memory
CPU & Data Unified: Prog or Data
L2 o L1D delivers
32-bytes in 4 cyles
8/16/32/64 (64K Bytes)
L2 o L1P delivers
L1 16 instr’s in 5 cycles
Data Configure L2 as cache
(4KB) or RAM
As discussed in Chapter 1, here is an overview of the internal memory on the ‘C6711. Remember
we stated you could configure the Level 2 memory in one of five modes:
Level 2 Configurations
RAM 0 RAM 0 RAM 0 RAM 0 CACHE 4
RAM 1 RAM 1 RAM 1 CACHE 3 CACHE 3

or or or or
RAM 2 RAM 2 CACHE 2 CACHE 2 CACHE 2
RAM 3 CACHE 1 CACHE 1 CACHE 1 CACHE 1

Hardware dsk6711.cdb
default template default
Four 16KB blocks

Configure as cache or addressable RAM
Unified memory -- program / data
Note: The initial ‘C64x devices have the same dual-level memory system except for two
modifications: one, larger L1 and L2 memories; and two, Level 2 memory have both a
fixed (always RAM) segment and a configurable (cache/RAM) segment similar to the
‘C6711.

Cache
Configuring L2 Cache
In the upcoming lab we want to place our buffer into internal memory. This requires changing our
CDB file from the standard dsk6711.cdb template. We provide a complete procedure for this
in the following lab exercise.
Configuring Cache in CDB
There are three reasons for our putting the sine buffer into internal memory:
x Internal memory is faster
x As mentioned previously, placing the buffer on-chip reduces the potential for EDMA and
CPU conflict while accessing external memory
x For better performance, values written by the CPU may be cached into the Level 1 data
memory rather than being written back out to external memory. Since the EDMA is unaware
that the buffer values have changed, the old values could be sent to the codec. There are three
methods used to prevent mistakes:
1. Place the buffer in internal memory (the one we chose for the lab). If the EDMA goes to
access the buffer, but the L1 cache contains more recent values, the EDMA is notified by
the L1 cache so that the newer values are used.
2. After writing values to be used by the EDMA, you need to flush those values from the
cache. Refer to the ‘C6000 Peripherals Reference Guide for details.
3. Mark the part of external memory where the buffer resides as non-cacheable memory.
This is accomplished using the MAR registers. Once again, please refer to the peripherals
guide for details.

LAB 5
LAB 5
The object of this lab is to implement the block processing example described in this chapter.
This includes using the EDMA to transfer samples from a buffer filled with a block sine
algorithm.
DSK
CPU
Buffer McBSP0
DMA DAC
EDMA XEVT0
interrupt event
Much of the code in this system is similar to that in the last chapter. For this reason (and due to
limited time), we have written much of this for you. Here are the items you are left to finish:
lab5.c #include’s
Lab 5
global variables
main() { block_sine.c block_sine()
CSL_init();
BSL_init();
codec_init();
init_HWI(); lab5.cdb HWI_INT? (edma)
edma_init();
EDMA_setChannel(); 3-way Cache
return; }
// HWI routines
init_HWI();
edma_HWI(); You get to complete:
// Codec Routines Two config struct’s
codec_init(); Three functions
codec_out();
CDB file
// EDMA routines
edma_init();

LAB 5
Additional exercise ideas to take home:

x Rather than generate a sine wave. Input music via the codec using the EDMA to copy the
input values to an input buffer. The CPU can simply copy the values to an output buffer or
you could filter the values from the input to output. Again, use the EDMA to copy the values
from the output buffer to the codec.
If you are looking for a filter example (and don’t want to code one yourself), look in the DSP
Library provided on the TI website.
x Try using the DIP switches on the DSK to turn the filter on/off. Or perhaps, you could use
them to vary the filter coefficients. The BSL provides a simple way of accessing the DIP
switches (and controlling the LEDs, too).
block_sine.c
/*********************************************************
* The coefficient A and the three initial values
* generate a 3KHz tone (sine wave) when running
* at a sample rate of 8KHz.
*
* Even though the calculations are done in floating
* point, this function returns a short value since
* this is what's needed by a 16-bit codec (DAC).
*********************************************************/
float y[3] = {0,0.7071,0};
float A = 1.4142;
short sineGen(void) {
short temp;
y[0] = y[1] * A - y[2];

y[2] = y[1];
y[1] = y[0];
y[0] *= 32000;
temp = (short)y[0] & 0xFFFE;
return(temp);
}
void block_sine(short *buf, int len)

{
int i = 0;
for (i = 0;i < len; i++)

{
buf[i] = sineGen();
}
}

LAB 5
Lab5.c
/**************************************************************\
* This file contains all the functions for Lab4 except
* sineGen(). Most of it has already been written for you due
* to the limited time available in a one-day workshop.
*
* We have left a few "???" places, though, where you must enter
\**************************************************************/
/**************************************************************\
* Prototypes
\**************************************************************/
//void codec_out(void);
void edma_init(void);
void myEdma_HWI(void);
/**************************************************************\
* Include files
\**************************************************************/

#include <csl_edma.h>

#include <std.h>
#include <log.h>
extern far LOG_Obj myLog;
/**************************************************************\
* Declarations
\**************************************************************/
#define BUFF_SIZE 64
/**************************************************************\
* Global variables
\**************************************************************/
short buffer[BUFF_SIZE];
MCBSP_Handle hCodec_mcbsp; /* McBSP handle */
/**********************************************************\
\**********************************************************/
AD535_MICGAIN_OFF,
AD535_GAIN_0DB,
AD535_GAIN_0DB
};
/**********************************************************\
* Handles act as pointers to the EDMA channel and its
* reload (i.e. link) parameters
\**********************************************************/
EDMA_Handle hEdma, hEdmaLINK;

LAB 5
/**********************************************************\
* The "EDMA Config" type data structure holds the
* parameters to be programmed into a EDMA channel.
* Register Make (RMK) macros build a 32-bit unsigned int;
* below it is used to build the Options (OPT) register.
* The OF macros provide the proper typecasting needed for
* the EDMA Config data structure.
\**********************************************************/
EDMA_Config my_edma_Config = {
EDMA_OPT_RMK(
EDMA_OPT_PRI_LOW,
EDMA_OPT_ESIZE_??BIT, // Hint, how many bits wide is the codec?
EDMA_OPT_2DS_NO,
EDMA_OPT_SUM_INC,
EDMA_OPT_2DD_NO,
EDMA_OPT_DUM_NONE,
EDMA_OPT_TCINT_YES,
EDMA_OPT_TCC_OF(5),
EDMA_OPT_LINK_YES,
EDMA_OPT_FS_NO
),
EDMA_SRC_OF(??????), // Where's the data come from?
EDMA_CNT_OF(BUFF_SIZE),
EDMA_DST_OF(0),
EDMA_IDX_OF(0),
EDMA_RLD_OF(0)
};
/**************************************************************\
* Main Routine
\**************************************************************/
void main()
{
emif_init(); // Dummy function - see below
block_sine(buffer, BUFF_SIZE); // Run once to init the buffer
codec_init();
init_HWI();
edma_init();
/* Provide "event" to cause EDMA to transfer 1st value

to AD535 - this kickstarts the process. McBSP will
provide events after this. Also could have done a
dummy-write to the AD535 to accomplish the same
thing: AD535_write(hAD535, 0); */
EDMA_setChannel(hEdma);
// Return from main function into DSP/BIOS IDL function

return;
}
/**************************************************************\
*
* the DSK6211_6711.gel file for the CCS script that
* accomplishes this task.
\**************************************************************/
void emif_init(void){
}
/*************************************************************\
**************************************************************
* Since the EDMA is writing to the McBSP, it will be triggered
* by the McBSP's event/interrupt.
*

LAB 5
* The CPU will be triggered by the EDMA. When the EDMA finishes
* writing a buffer of data, it will interrupt the CPU. In
* effect, telling the CPU to re-fill the buffer with sinewave data.
*
* By default, the CDB file already has HWI8 mapped to the
* EDMA interrupt. While you can change this, we recommend
* that you use the default.
*
* Enabling the CPU to recognize the EDMA interrupt requires:
*
* 1. Using the CDB file, map EDMA interrupt (IRQ_EVT_EDMAINT)
* to interrupt 8 (HWI8). Also, update the CDB file with the
* HWI function name "_myEdma_HWI"
* 3. Enable EDMA interrupt (IRQ_EVT_EDMAINT)
\*************************************************************/
void init_HWI(void)
{
IRQ_globalEnable(); // Enable ints globally
IRQ_enable(IRQ_EVT_???????); // Enable EDMA interrupt (to CPU)
}
void myEdma_HWI(void)
{
/* Clear the CPU interrupt pending bit in the EDMA */
EDMA_????????(5);
// Call function to that fills the buffer

LOG_printf(&myLog, "Interrupt Occurred");

}
/**********************************************************\
* Initialization Functions
\**********************************************************/
void codec_init()
{
/* Use the BSL routines to: Open, reset, & config the AD535 *\
* Part of the AD535_open() routine opens and configures the McBSP0, since *
\* all communications with the AD535 codec are handled via the McBSP0. */
hAD535 = AD535_open(AD535_localId); // Open AD535 and set hAD535 handle
AD535_reset(hAD535); // Reset AD535
AD535_config(hAD535, &my_AD535_Config); // Configure AD535
/**************************************************\
* When writing to the McBSP using the EDMA you
* must supply a destination address.
*
* This is usually obvious, but in the case of using
* the AD535 BSL to choose and configure a McBSP, you
* are abstracted from the actual hardware registers.
*
* How can we access the destination register from
* whatever McBSP the AD535 routine is using?
*
* This is what the "get McBSP handle" function is
* used for. It returns the handle to the McBSP used
* by the AD535 codec. With the McBSP handle you may
* use the McBSP CSL functions.
\**************************************************/
hCodec_mcbsp = AD535_getMcbspHandle(hAD535);

LAB 5
/********************************************************************\
* The McBSP "FREE" bit allows it to continue running even
* when the debugger is halts the CPU.
*
* A take home lab has you explore the effect of this McBSP feature.
\********************************************************************/
// MCBSP_setfree(0);
}
void edma_init()
{
// Which EDMA event are we interested in?
// Hint 1: look up EDMA_open in CSL Reference Guide
// Hint 2: we want the Xmit EVenT 0 (XEVT0)
hEdma = EDMA_open( ????_???_?????, EDMA_OPEN_RESET );
hEdmaLINK = EDMA_allocTable( -1 );
my_edma_Config.dst = MCBSP_getXmtAddr(hCodec_mcbsp);
my_edma_Config.rld = (my_edma_Config.rld & 0xFFFF0000) | (EDMA_RLD_RMK(0,hEdmaLINK)) ;
// What's the name of our EDMA_Config data structure

// used to configure the EDMA channel and reload parameters?
EDMA_config(hEdma, &??_????_??????);
EDMA_config(hEdmaLINK, &??_????_??????);
EDMA_enableChannel( hEdma );
EDMA_intClear(5);
// Which CIER bit do we want to enable?

// Hint, what TCC value did we chose?
EDMA_intEnable(5);
}

LAB 5
Open Project
1. Open the project LAB5.PJT . within CCS.
In the interest of time we have pre-built most of this project for you. The project should
contain the following files:
2. Set the project options. To make this easier, we have placed the compiler options in the text
file <lab5_compiler_options.txt> found in your lab folder, for you to cut-and-paste.
Compiler: -iC:\ti\c6000\dsk\include (where to find DSK headers)
-iC:\c60001day\ti\preliminary_bsl\include (BSL headers)
-dCHIP_6711 (tells CSL which chip you’re using)
-dBOARD_6711DSK (tells BSL which board you’re using)

LAB 5
Interrupt Service Routine

3. Configure the CPU to respond to EDMA interrupts. (The McBSP transmit interrupt is being
handled by the EDMA)
Every time the EDMA interrupts the CPU, it should re-fill the buffer with sine values. It must
also clear the pending EDMA interrupt from the CIPR register.
Please fill-in the correct function name in Lab5.c.
void myEdma_HWI(void)
{
/* Clear the CPU interrupt pending bit in the EDMA */
EDMA_???????? (5);
/* Call function to that fills the buffer

4. Open LAB5.CDB and open (expand) the HWI module in the Configuration Tool. (We
created the CDB file and added it to the project but other than that, we didn’t modify it.)
Once again, examine HWI_INT4 – HWI_INT15. This time, look for the EDMA interrupt.
What INT# is it associated with EDMA? _________________________________________

5. Open the properties of the HWI_INT8 by right-clicking on HWI_INT8 and selecting
Properties.
a. Enter the name of the HWI service routine into the function textbox.
_myEdma_HWI
b. Tell the Config Tool to use the interrupt dispatcher routine provided by CCS to handle all
the hardware interrupt context save/restore operations.
; Use Dispatcher

LAB 5
Configuring Cache and memory buffer

Let’s reconfigure the cache by changing it to a 3-way cache and placing our C global variables
(which includes our buffer) into on-chip memory.
6. As shown in the Chapter 5 discussion (page 5-16), convert the cache from it’s 4-way default
to 3-way. (Hint, under SystemoGlobal Settings).
7. Second, tell the code-generation tools that internal memory is now available.
a. Right-click on MEM – Memory Section Manager and choose Insert MEM.
b. After inserting a MEM object, rename it Internal.

LAB 5
c. Next, right-click on the Internal MEM object and choose Properties.

d. In the dialog:
Uncheck “Create a heap in this memory”
Click “Apply”

LAB 5
Then change the last two items of the dialog:
Set base = 0x0 and len = 0x4000
Space to “code/data”
Finally, click OK to close the dialog.

LAB 5
8. Finally, make one last change to the MEM – Memory Section Manager dialog:
a. Right-click on MEM – Memory Section Manager and choose Properties.

LAB 5
b. Finally, tell the config tools to locate the C global variables (.bss) in internal memory
Hit OK to close MEM dialog.
9. Save and close LAB5.cdb.

Once again, the configuration tool creates all the code required to configure the choices we
made..

LAB 5
Initializing Hardware Interrupts

10. Open LAB5.c to the init_HWI function and fill in the missing code segments indicated by ???.
void init_HWI(void)
{
IRQ_globalEnable(); // Enable ints globally
IRQ_enable(IRQ_EVT_ ??????? ); // Enable EDMA interrupt
}
Hint: You may want to refer to the CSL API Reference Guide IRQ chapter (page 11-14).
For your convenience, the CSL Guide is available at:
C:\ti\docs\pdf\SPRU401b.pdf
EDMA Functions
Along with the edma_HWI() interrupt service routine (step 3), you also need to complete the
EDMA initialization routine.
EDMA Initialization
11. Scroll up to the global variable initialization in LAB5.C to find the global EDMA
configuration structures. Replace the ???.
The EDMA_OPT_RMK is a Register MaKe macro. This macro allows you to intuitively
define the settings for the Options register in an EDMA configuration. The various register
fields and their values are described in Appendix B of the CSL API Reference Guide. (Hint,
you want to look at the bottom of page B-23.)
EDMA_Config my_edma_Config = {
EDMA_OPT_RMK(
EDMA_OPT_PRI_LOW,
EDMA_OPT_ESIZE_ ?? BIT, // Hint, how wide is the data?
EDMA_OPT_2DS_NO,
EDMA_OPT_SUM_INC,
EDMA_OPT_2DD_NO,
EDMA_OPT_DUM_NONE,
EDMA_OPT_TCINT_YES,
EDMA_OPT_TCC_OF(5), // Í Notice, here’s the TCC value
EDMA_OPT_LINK_YES,
EDMA_OPT_FS_NO
),
EDMA_SRC_OF(??????), // Where does the EDMA move the data from?
EDMA_CNT_OF(BUFF_SIZE),
EDMA_DST_OF(0),
EDMA_IDX_OF(0),
EDMA_RLD_OF(0)
};

LAB 5
12. Finally scroll down to the edma_init() function to replace the ??? two code entries with the
appropriate C code.
a. Open channel:
/******************************************************\
* Initialize the EDMA to transfer the next buffer
* of sinewave samples to the AD535 codec.
\******************************************************/
void edma_init()
{
// Which EDMA event are we interested in?
// Hint 1: look up EDMA_open in CSL Reference Guide
// Hint 2: we want the Xmit EVenT 0 (XEVT0)
hEdma = EDMA_open( ????_???_????? , EDMA_OPEN_RESET );
b. Configure hEdma channel and the reload parameters (hEdmaLINK).

// What's the name of our EDMA_Config data structure
// used to configure the EDMA channel and reload parameters?
EDMA_config(hEdma, &??_????_?????? );
EDMA_config(hEdmaLINK, & ??_????_?????? );
The EDMA initialization makes extensive use of the CSL libraries. While there are still a few
steps to initialize synchronized EDMA transactions, this is much easier than hand-coding the
various register bits required to enact the EDMA.
If you only want to move a block of data from one location to another with the DMA, try
using the CSL’s DAT module, which provides a simple non-synchronized transfer.
Build and Run

13. Rebuild the file and load the program.
14. Run your program and listen for the sinewave tone.
If you didn’t hear it, first make sure all the hardware connections are solid. If the cabling is
OK, you need to debug your code.
15. Halt the CPU and close the project.
End of Exercise

Take Home Exercise
Take Home Exercise

One you have the Lab 5 working, you might want to try this out.
1. Load the stopEDMAandMCBSP.gel file by right-clicking on the GEL folder and choosing
Load GEL. You’ll find this GEL file in the Lab5 folder.
2. Remove the comment characters (//) from the line:
// MCBSP_setfree(0);
3. Rebuild and run the lab. It should sound the same.

4. Halt the CPU … notice the sound doesn’t stop.
The CPU is halted but the McBSP and EDMA are still running. The McBSP’s FREE bit
allows the McBSP to keep running even when the CPU is halted. Since the EDMA is set to
autoinitialize, it keeps resetting itself to the start of the buffer, thus the buffer contents keep
transmitting over and over again.
The sine wave we’re creating requires 8 samples to complete the full wave. With 64 samples
in the buffer, there should be no distortion in the output.
5. To halt the noise, select the stopEDMAandMcBSP from the GEL menu.
6. Change the buffer size and
Change: #define BUFF_SIZE 64
To: #define BUFF_SIZE 60
7. Rebuild and run the lab again.

Does it still sound like a perfect sine wave? _____________________________________
Why not? ________________________________________________________________

Optional Topics
Optional Topics
Chip Support Library - DAT Module
The CSL’s DAT module is unique to the CSL. It’s a device independent method of copying or
filling memory. The device independence makes is easily portable from ‘C6711 to ‘C6201, or
even to a ‘C5000 device.
CSL: DAT
Functions
DAT_Close
DAT_Copy
DAT_Fill
DAT_Open
DAT_Wait
DAT_Copy2D
Features
High-level API for non-sync’d block move
Processor independent (DMA or EDMA)
When you specify to CSL which chip you are using (with the –dCHIP compiler option), the
correct CSL library code is used to make the transfer/fill. It might use the DMA or EDMA,
whichever peripheral is on a given device.

Optional Topics
Single / Double Buffers

The chapter demonstrated the single-buffer example shown below:
Single Buffer
DSK
CPU
Buffer McBSP0
DMA DAC
EDMA XEVT0
interrupt event
8KHz y buffersize 8KHz
Used
Usedin
inthis
thischapter
chapterand
andlab
labexercise
exercise
Reduces
ReducesCPU
CPUinterrupts
interruptsby
byfactor
factorof
ofbuffersize
buffersize
What might be better?
While this worked well in this simple application, it does have its drawbacks. Namely, if the CPU
cannot respond to the interrupt quickly enough to fill the single buffer before the EDMA starts to
copy new values to the codec, a real-time error will occur.
This error can often be eliminated by adding a second buffer to the system. In this way, the CPU
can fill one, while the EDMA is using the other. This is shown below:
Double Buffer
DSK
Buffer
McBSP
DMA DAC
EDMA XEVT0
interrupt event
Why
Whyuse
usedouble
doublebuffers?
buffers?
Allows
AllowsCPU
CPUto tobe
bebusy
busydoing
doingother
otherprocessing
processingandanddelay
delay
servicing
servicingthe
theEDMA
EDMArequest
request
Very
Veryuseful
usefulfor
forcomputationally
computationallyintensive
intensivealgorithms
algorithms
During ISR, CPU switches its pointers
During ISR, CPU switches its pointers
EDMA
EDMAhandles
handlesitsitsown
ownpointer
pointerswitch
switchwith
withLINKing
LINKing

Optional Topics
Creating a double-buffered system would be a good next challenge for you to try at home.
Multi-Channel Systems using the McBSP

Multi-channel (E1 Example)
E1 Line ‘C6000
Tx DX
Tx Line I/F Unit
Framer Rx DR
Rx (LIU) Clk CLKX
FS CLKR
- surge suppression - error condition FSR
- analog “stuff” - frame sync gen FSX
- clock extraction
DR/X Ch0 Ch1 ... Ch31 Ch0 Ch1 ... Ch31
FSR/X
CLKR/X = 2.048 MHz
TDM - Continuous stream where all Ch0’s are associated

(and so on with Ch1, Ch2, etc.)
Up to 128 channels are supported!
You can enable/disable any channel; Data is then “filtered” as ...
Multi-channel Operation
F
r
a Frame 3 Frame 2 Frame 1
m 4 3 2 1 4 3 2 1 4 3 2 1
e
r Memory
1
3
M
c
1
B 3
S ..
Allows multiple channels (words) to be P .
independently selected for transmit and 1
receive
3
Combined with the DMA’s flexibility ...

Optional Topics
Channel Sorting with the McBSP and EDMA (or DMA)

EDMA Channel Sorting
F
r
a Frame 3 Frame 2 Frame 1
m 4 3 2 1 4 3 2 1 4 3 2 1
e
r Memory
1
1
M
c
E 1
D ..
B
S
M .
A
P
3
EDMA’s flexible (indexed) addressing 3
allows it to sort each channel into
separate buffers! 3

Introduction to DSP/BIOS
Agenda
2. EDMA, Cache
DSP/BIOSReal-Time Tools
VAB Visual Design
Epilogue What Next?
Learning Objectives
DSP/BIOS
Real-time Scheduling
Simple example of real-time problem
HWI, SWI, and TSK
Scheduler
DSP/BIOS II adds multi-tasking
Real-time analysis (RTA)
C6000 One-Day Workshop - Introduction to DSP/BIOS 6-1

Module Topics
Module Topics
Introduction to DSP/BIOS ........................................................................................................................ 6-1
Module Topics ......................................................................................................................................... 6-2

Real-Time Scheduling.............................................................................................................................. 6-3
The Challenge ..................................................................................................................................... 6-3
Traditional Solutions........................................................................................................................... 6-4
DSP/BIOS Solution ............................................................................................................................ 6-6
DSP/BIOS Thread Types (HWI, SWI, IDL)....................................................................................... 6-7
Task’s (TSK)....................................................................................................................................... 6-9
Real-Time Analysis................................................................................................................................ 6-11
Background....................................................................................................................................... 6-11
LOG_printf (LOG)............................................................................................................................ 6-12
Statistics (STS).................................................................................................................................. 6-13
RTA – Low Overhead....................................................................................................................... 6-15
Visual Instrumentation...................................................................................................................... 6-15
Lab 6...................................................................................................................................................... 6-18
Lab 6a – Using LOG_printf .................................................................................................................. 6-24
Lab 6b – Adding a Second Load Thread ............................................................................................... 6-27
Take Home Exercises ............................................................................................................................ 6-29
Lab 6c ............................................................................................................................................... 6-29
Lab 6d - Using RTDX....................................................................................................................... 6-30
Background Info .................................................................................................................................... 6-35
RTDX - How It All Works ............................................................................................................... 6-35
6-2 C6000 One-Day Workshop - Introduction to DSP/BIOS

Real-Time Scheduling
The Challenge
To: Engineering
From: Marketing
Re: Design Spec Change
Due to customer request, we
need to add DTMF functions to
the Audio Player ASAP!!!
Cannot increase system cost !!!
New System Requirement - Abstract
Previous Requirement
Filter
DSP filters audio signal
DTMF New Requirement

Add DTMF function
DTMF is independent of filter
TI DSP Issues:
Do we have enough bandwidth (MIPS)?
Will one routine conflict with the other?
How do we create the compound system?

Traditional Solutions
System Implementation Considerations
main One method: put each algo into

{ an endless loop under main
while(1)
Problems:
{
Filter What if algorithms run at
differing rates?
DTMF (eg: our filter runs ~ 44 KHz
} and the DTMF algo ~ 8 KHz)
}
What if one algorithm
overshadows another,
starving it for recognition or
delaying it’s response beyond
the limits of the system?
Interrupt Driven System

Period Compute CPU Usage
main
{ Routine A: 22 Ps 11 Ps (50%)
while(1); Routine B: 125 Ps 33 Ps (26%)
} 76%
Timer1_ISR running
{ A
idle
A
}
B
Timer2_ISR
{ Time 0 1 2 3 4 5 6 7
B
}
TI DSP Only one can run at a time...

Interrupt Driven System - Problem

Period Compute CPU Usage
main
{ Routine A: 22 Ps 11 Ps (50%)
while(1); Routine B: 125 Ps 33 Ps (26%)
} 76%
Missed !
Timer1_ISR running
{ A y1 y2 y3 y4
idle
A
}
B
Timer2_ISR
{ Time 0 1 2 3 4 5 6 7
B
}
TI DSP There are two elements of CPU loading:
average & instantaneous
Nested Interrupts
A common solution is to allow hardware
interrupts to preempt each other - called
main 'nesting' interrupts
{ running
while(1); A
} idle
Timer1_ISR B
{
A Time 0 1 2 3 4 5 6 7
}
Problem is, the user must handle all context
Timer2_ISR save and restore
{ While reasonable for 1-2 interrupts, it
B becomes tedious and trouble-prone for more
} Can become near impossible when using
TI DSP object-coded algorithms or libraries
(thus, making it difficult to purchase algo's)
DSP/BIOS handles this for you with simple
drag -n- drop editing
Interrupt Driven State Machines

To solve this scheduling problem, you could
build a complicated state-machine in your
main main( ) routine.
{
if tick>set1 running
if … A y1 y2 y3 y4
idle
A
B B1 B2 B3
else if
if …
B (part 1) Time 0 1 2 3 4 5 6 7
else if ...
B (part 2) Difficult and tedious to write - Need to keep
else … track of various execution times and paths
through software
B (part 3)
Difficult to maintain - Code is too tightly coupled
... to allow any changes or updates
} Can be slow and large - Conditional
statements lead to branching operations and
disruptions in normal software flow

Real-time Problem Summary
C main background functions

No Guarantee of Concurrency
Non-deterministic timing
No Software Preemption
Ad Hoc Analysis
Hardware-Interrupt Only Scheduling

No or Difficult Interrupt Pre-emption
Unmanaged Interrupt Context Switch
DSP/BIOS Solution
The DSP/BIOS Solution
DSP/BIOS provides scheduling:
You needn’t build a custom (inflexible)
main state-machine for each DSP design
{
Instead, you can leverage 1000’s of hours
return; of development, proven in 100’s of systems!
}
running
ªDSP/BIOS A
idle
A
B
B
Time 0 1 2 3 4 5 6 7
Easy to write - Modules written independently

Easy to maintain - Module interaction minimized
Built-in Scheduling - Managed by DSP/BIOS

DSP/BIOS Thread Types (HWI, SWI, IDL)

Some Terminology
thread independent function -- within it’s own context

scheduler system software to manage execution of
threads
preemption higher priority thread interrupts thread of
lower priority
post signal an event, or make a thread “ready”
pend test for an event, possibly wait (block)
What types of threads can we define?

How are they scheduled to run?
DSP/BIOS Thread Types

HWI Used to implement 'urgent' part of real-time event
Triggered by hardware interrupt
Hardware Interrupts HWI priorities set by hardware
Use SWI to perform HWI 'follow-up' activity

SWI SWI's are 'posted' by HWI's or SWI's
Software Interrupts
Priority
Multiple SWIs at each of 14 priority levels
IDL Multiple IDL functions

Background Run round-robin
h/w INT
HWI and SWI
HWI:
urgent code
post SWI
SWI (or TSK)
read run filter with new data

serial port
ints disabled rather than all this time
HWI SWI or TSK

Fast response to interrupts Latency in response time
Minimal context switching Context switch performed
High priority only Selectable priority levels
Can post SWI or TSK Can post another SWI
Danger of missing an interrupt Execution managed by
while executing ISR scheduler
Let’s look at a scheduling example...

HWI with SWI & IDL

return return
post swi1
post swi2
HWI
return
SWI 2
return
SWI 1
return interrupt
main()
IDL
interrupt
SWI Properties
Managing SWI Priority

Drag
Dragand
andDrop
DropSWIs
SWIsto
tochange
change
priority
priority

Equal
Equalpriority
prioritySWIs
SWIsrun
runround-robin
round-robin

Task’s (TSK)
DSP/BIOS Thread Types
HWI Used to implement 'urgent' part of real-time event
Triggered by hardware interrupt
Hardware Interrupts HWI priorities set by hardware
Use SWI to perform HWI 'follow-up' activity

SWI SWI's are 'posted' by HWI's or SWI's
Software Interrupts
Priority
Multiple SWIs at each of 14 priority levels
Use TSK to run different programs concurrently

TSK under separate contexts
Tasks TSK's are usually enabled to run by setting a flag,
called a 'semaphore'
IDL Multiple IDL functions

Background Run round-robin
SWI vs. TSK

SWI SWI_post TSK SEM_post
start
SEM_pend Pause
“run to (blocked
completion” state)
start
end end
Similar to hardware Each TSK has its own stack,

interrupt, but triggered by which allows them to pause
SWI_post() function call Usually implemented as loop
All SWI's share system Executed conditionally
software stack (along with based on a semaphore
HWI's) (condition, flag)
SEM_post function call set’s
flag to trigger execution

TSK Preemption Example

return return post
post swi1 post swi2 sem2 return
HWI
return
SWI 2
return
SWI 1 pend pend

sem2 sem2
interrupt
TSK 2 pend
sem1
TSK 1
interrupt interrupt
main()
return
IDL
How do you set priorities ...
To: Management & Marketing

From: Engineering
Re: Design You Requested
Your DSP system with Filter and
DTMF functions is done - under
budget, and ahead of time. How
did I do it? I’ll never tell...
6 - 10 C6000 One-Day Workshop - Introduction to DSP/BIOS

Real-Time Analysis
Real-Time Analysis
Background
Why is printf() used?
printf
printf (“
(“I'mm aa wasteful
I' wasteful function
function == %%
d\n”
d\ ,i+
n” ++
,i+);
);
printf is widely used for logical debug (checking your answer)
What’s wrong with printf?

30,000+ cycles to perform printf
Requires extensive prog & data memory
DSP has to format the text string
Worse yet, it's Non-Deterministic
The DSP must stop and wait for MS Windows to send
string back to debugger (is Windows real-time?)
Bottom Line
Not Deterministic
Why waste DSP's MIPS and Mbytes
Real-time code can fail due to printf
DSP/BIOS: Real-Time Instrumentation
DSP Host (CCS)

Æ
Real-
Real-Time Capture Analysis & Display
Two main printf real-time issues are …

1. Not Deterministic
2. Why waste DSP's MIPS and Mbytes
If captured in real-time, how is debug data transferred?
C6000 One-Day Workshop - Introduction to DSP/BIOS 6 - 11

Real-Time Analysis
RTDX: Real-Time Data Exchange

TMS320 DSP PC
Display
USER CODE
EMU H/W
IEEE
RTDX
User
JTAG
CCS TI
3rd Party
MS
Third COM
Party
Display
RTDX enables non-obtrusive two-way communication between the

host PC and the DSP (during IDL)
Since it runs in IDL (by default), it runs lower priority than your
real-time code
RTDX is used by DSP/BIOS RTA, but it is also available directly to
DSP programmer (useful for testing or if end-equipment is PC
resident)
Transfer speed limited by:
JTAG connection type (parallel, PCI, etc.)
DSP activity level
How does LOG_printf work? Where's the buffer for captured data?
LOG_printf (LOG)
LOG_printf
LOG_printf is answer to real-time issues

Data is captured to a buffer on the DSP
Data is transferred to buffer in background (IDL)
How is LOG_printf used in code?

Real-Time Analysis
Call LOG_printf
#include External reference
#include <<
std.h>
std.h> to LOG object
#include <log.h>
#include <log.h> defined using the
configuration tool
extern
extern far
far LOG_Obj
LOG_Obj myLog;
myLog;
Call the function
LOG_printf(&myLog,
LOG_printf(&myLog,“New
“Newload
load==%d000
%d000instructions”,
instructions”,loadVal);
loadVal);
Run-time display of
user-defined LOG
Statistics (STS)
Built-in Statistics Tools
Execution Graph is useful for visualization of thread scheduling
Statistics give you finer detail to profile thread execution
Is the thread meeting its real-time deadline?
Max and Average number of

The number of times
instructions from SWI_post to
the SWI has run
completion (can also display as
milliseconds or microseconds)

Real-Time Analysis
Create & Name the STS Object
STS objects buffer statistics data accesses by STS functions
User-Defined STS example
Insert STS object in

configuration tool,
rename to “myStat”
#include
#include <<
std.h>
std.h> Reference the STS
#include
#include <<
sts.h>
sts.h> object
extern
extern far
far STS_Obj
STS_Obj myStat;
myStat;
Monitor the variable
STS_add(&myStat,
STS_add(&myStat, your_variable);
your_variable); “amplitude”
How do we profile code execution time?

We need two values: a beginning and ending timestamp
Profiling with User-Defined STS

#include
#include <<
std.h>
std.h> Reference the STS
#include object
#include <<
sts.h>
sts.h>
extern
extern far
far STS_Obj
STS_Obj audioSts;
audioSts;
STS_set saves
beginning timestamp in
“prev” history field
STS_set(&
STS_set(& audioSts,
audioSts, CLK_gethtime());
CLK_gethtime());
;; processBuffer
processBuffer function
function
STS_delta(&
STS_delta(&audioSts,
audioSts, CLK
CLK_gethtime());
_gethtime()); STS_delta records
current timestamp
minus previous
timestamp
Run-time display of
user-defined LOG

Real-Time Analysis
RTA – Low Overhead

Low Instrumentation Overhead
LOG, STS, and TRC module operations are very fast and
execute in a consistent time, as shown in the following list:
LOG_printf: approximately 32 cycles

STS_add: approximately 18 cycles
STS_delta: approximately 21 cycles
TRC_enable & _disable: approximately 6 cycles
* (exact timing depends upon processor type)
STS and LOG - low overhead

Each STS object uses only four words of data memory. Therefore, only four
words need to be uploaded from a statistics object
LOG functions only need to capture 4 words per invocation
What does deterministic, low-overhead RTA mean to you?

You can leave RTA in your code and get:
1. What you test is "exactly" what you ship
2. When (if) field problems arise, debug instrumentation is
already in place!
Visual Instrumentation
Viewing System Events
System Log is an Event “Logic Analyzer”

The HWI and SWI routines are on the left axis,
and the bottom axis are event ticks
… This makes it easy to follow the action

Real-Time Analysis
Viewing System Events
PRD_Ticks
PRD_Ticksis
isbased
basedon
on aa
‘C6211
‘C6211timer.
timer.
(hence
(henceit’s
it’stime
timebased)
based)
Each
Each tick
tick represents
representsan
an
event
event has
has occurred.
occurred.
(not
(nottime
timebased)
based)
CPU Load Meter
CPU load meter acts like a MIPs calculator

Basically, it keeps track of the IDLE time
DSP/BIOS - API Modules

Comm/Synch between threads
Instrumentation/Real-Time Analysis
SEM Semaphores manager
LOG Message Log manger MBX Mailboxes manager
STS Statistics accumulator manager LCK Resource lock manager
TRC Trace manager
Input/Output
RTDX Real-Time Data Exchange manager
PIP Data pipe manager
Thread Types
HST Host input/output manager
HWI Hardware interrupt manager SIO Stream I/O manager
SWI Software interrupt manager DEV Device driver interface
TSK Multitasking manager
Memory and Low-level Primitives
IDL Idle function & processing loop manager
MEM Memory manager
Clock and Periodic Functions
SYS System services manager
CLK System clock manager QUE Queue manager
PRD Periodic function manger ATM Atomic functions
GBL Global setting manager

Real-Time Analysis
DSP/BIOS Feature Summary
Features Benefits
Small Footprint (<2Kw) Easily fits in limited memory systems
Fast Execution Ideal for real time systems
Real-Time Analysis View system parameters
while system is executing without
breakpoints and without additional
overhead - “Test what you fly and fly
what you test”
Set of Library Functions Use only what you need to minimize
footprint
Extensible Full featured kernel allows additional
OS functions in future

Lab 6
Lab 6
This exercise adds a SWI to the results of Lab 4. This involves creating a SWI object using the
Configuration Tool, referencing it at the beginning of Lab 6, then posting the SWI in the McBSP
hardware interrupt service routine.
Lab 6
lab6.c #include’s sine_float.c sineGen( )
extern far SWI_Obj
global variables
main( ) {
CSL_Init(); lab6.cdb HWI
BSL_init(); 9: _XINT0_HWI
codec_init();
init_HWI(); SWI
AD535_write(hAD535, 0); codec_swi: _codec_out
return;
}
// HWI routines
init_HWI();
XINT0_HWI;
You get to
// Codec Routines
complete these
codec_init();
codec_out();
A second exercise, Lab 6a, uses LOG_printf to output the sine values to CCS in real-time.

Lab 6
lab6.c
/**************************************************************\
* This file contains the main function for Lab6. Most of it
* has already been written for you due to the limited time
* available in a one-day workshop.
*
* We have a few "???" places, though, where you must enter
\**************************************************************/
/**************************************************************\
* Prototypes
\**************************************************************/
void codec_out(void);
short sineGen(void);
/**************************************************************\
* Include files
\**************************************************************/


#include <std.h>
#include <log.h>
#include <???.h> /* What DSP/BIOS module are we using? */
extern far SWI_Obj ?????_swi;

extern far LOG_Obj myLog;
/**************************************************************\
* Global Variables
\**************************************************************/
/**********************************************************\
\**********************************************************/
AD535_MICGAIN_OFF,
AD535_GAIN_0DB,
AD535_GAIN_0DB
};
/**************************************************************\
* Main Routine
\**************************************************************/
void main()
{
emif_init(); // Dummy function - see note below
codec_init();
init_HWI();
// Write to AD535 to kickstart the McBSP transmit interrupts

AD535_write(hAD535, 0);

Lab 6
/**************************************************\
* Rather than creating an infinite loop in main,
* DSP/BIOS provides an infinite idle (IDL) loop.
* All you need to do is return from main.
*
* // while(1) {};
\**************************************************/
return;
}
/**************************************************************\
*
* the dsk6xinit.gel file for the CCS script that accomplishes
* this task.
\**************************************************************/
void emif_init(void)
{
}
/*************************************************************\
**************************************************************
*
*
\*************************************************************/
void init_HWI(void)
{
IRQ_globalEnable(); // Enable ints globally with BIOS function
IRQ_enable(IRQ_EVT_XINT0); // Enable McBSP0 using CSL function
}
/**************************************************************
* Interrupt service routine you need to reference in HWI
* module of CDB file
**************************************************************/
{
/**************************************************************
* In past labs we called codec_out() from this ISR function.
* (codec_out() creates sine sample for each XINT0 interrupt?
* Here we replace the codec_out() function call with a
* SWI post to the codec_out() function. The SWI object is
* (or, at least, should be) setup in the LAB6.CDB file.
* When posted and run, the SWI calls the codec_out() function.
**************************************************************/
SWI_????(&codec_swi); // What function triggers an SWI to run?
}
/**********************************************************\
* Codec Functions
\**********************************************************/
void codec_init()
{
/* Use the BSL routines to: Open, reset, & config the AD535 */
/* First, open AD535 and set hAD535 handle */
hAD535 = AD535_open(AD535_localId);

Lab 6
/* Reset AD535 */
AD535_reset(hAD535);
/* Configure AD535 */
AD535_config(hAD535, &my_AD535_Config);
}
/******************************************************\
\******************************************************/
{
}
Open the project file

1. Open LAB6.PJT within Code Composer Studio.
You’ll notice the required lab files have already been added to the project to save time:
lab6.c
lab6.cdb
lab6cfg.cmd
sine_float.c
Create SWI
As discussed in Chapter 6, rather than running the whole algorithm inside the HWI (interrupt
service routine), we’ll change the HWI to post a SWI. Before we modify the HWI, though, let’s
create the SWI with the Configuration Tool.
2. Open lab6.cdb, right-click on SchedulingoSWI – Software Interrupt Manager and select

Insert SWI. The SWI should be called SWI0.
3. Rename the SWI to codec_swi.

Lab 6
4. Now that you’ve created the SWI you need to change the function called by it. Right-click on
the new codec_swi and choose Properties. Change the function name to _codec_out.
5. Close the SWI properties dialog box. Save and close the CDB file.
Add reference to SWI to LAB6.C

For the SWI to be available within your C program you must first reference the SWI object. Also,
the SWI header file must be included.
6. Open LAB6.C and scroll down to the #include file references. Fill in the ???.
#include <std.h> /* DSP/BIOS headers */

#include <log.h>
#include <??? .h> /* What DSP/BIOS module are we using? */
extern far SWI_Obj ????? _swi;
Modify Hardware Interrupt Service Routine

7. Finally, scroll further down in the file to the hardware interrupt service routine.
{
SWI_????(&codec_swi); // What function triggers an SWI to run?

}
Again, replace the ??? so that the HWI routine post’s the SWI you made earlier.
Build and Run

8. Rebuild, load, and run the program.
Can you hear the tone?
Visualizing the program

When using DSP/BIOS, some of the instrumentation discussed in this chapter is automatically
available. Let’s look at two items in particular: CPU Load Graph and Execution Graph.
9. First, let’s open the CPU Load Graph.
Click the CPU Load Graph toolbar button.
or use the DSP/BIOS oCPU Load Graph menu selection

You should see it begin charting the C6000’s loading. The sine algorithm does not place a
large load on the ‘C6000.

Lab 6
10. Similar to the CPU Load Graph, open the DSP/BIOS, then Execution Graph. When it
appears, you can reposition, resize, and/or undock it as desired.
11. Before the Execution graph displays results, though, we must tell the processor to send CCS
real-time analysis data. This can be done using the RTA
control panel.
12. Once open, select enable SWI logging and global host
enable.
Once enabled, you should begin to see the Execution Graph
begin updating.
13. Halt the processor.
Continue with LAB6a …

Lab 6a – Using LOG_printf

Adding a LOG_printf is similar to adding the SWI object. First we need to create the LOG object
and modify it’s properties. Second, we must add the proper references to our file. Finally, we
need to add the LOG_printf itself.
For Lab 6a, it’s OK to continue using the same Lab 6 project files. (For easier reference, though,
we have created separate solution folders for each lab.)
Using standard printf

Before using the LOG_printf, let’s see what happens when using a standard printf.
sine_float.c
//#include <stdio.h>
float y[3] = {0,0.7071,0};

float A = 1.4142;
y[0] = y[1] * A - y[2];

y[2] = y[1];
y[1] = y[0];
y[0] = (short)(32000*y[0]);
// printf("Sine Output = %d\n", (int)*y);
return((short)y[0]);
}
14. Open sine_float.c and remove the comments (the // marks) from the two lines
associated with printf.
15. Rebuild, reload program, and run the program.
Do you hear anything? _______________________________________________________

You shouldn’t hear anything but a few clicking sounds. This is because the printf function
must wait for windows to accept the “printed” text before it can continue processing. In fact,
this delay is so long that a 150MHz processor (which is only ~2% loaded) cannot keep up
with an 8KHz sample rate.
Similar to the printf, other standard debugging features face these same limitations -
specifically, animating and profiling. These type of debugging capabilities can be performed
in real-time with DSP/BIOS. To learn more about these, refer to the DSP/BIOS users guides
or signup for one of the DSP/BIOS one or four day workshops.

Using LOG_prinf
With the real-time limitations of printf demonstrated, let’s replace it with the LOG_printf. First,
create the LOG object, then edit the sine_float.c.
16. Open LAB6.CDB (in the DSP/BIOS Config folder) and right-click
on LOG – Event Log Manager and choose Insert Log.
17. Rename the new LOG to sine_log.
18. Save and close the CDB file.
19. Next, we’ll edit sine_float.c. as shown:
sine_float.c
//#include <stdio.h>
/* DSP/BIOS headers */
#include <std.h>
#include <log.h>
extern far LOG_Obj sine_log;
float y[3] = {0,0.7071,0};

float A = 1.4142;
y[0] = y[1] * A - y[2];

y[2] = y[1];
y[1] = y[0];
y[0] = (short)(32000*y[0]);
// printf("Sine Output = %d\n", (int)*y);

LOG_printf(&sine_log, "Sine Output = %d ", (int)*y);
return((short)y[0]);
}
First of all, edit (back) out the printf statements:
// #include <stdio.h>
// printf("Sine Output = %f\n", y[0]);
Then add the LOG_printf statements and references. As shown above in bold, add these four
lines of code:
#include <std.h>
#include <log.h>
extern far LOG_Obj sine_log; */
LOG_printf(&sine_log, "Sine Output = %d ", (int)*y);
20. Rebuild and reload program.

21. Finally, let’s open and configure a Message Log window.
x When the Message Log window opens, select sine_log (if it’s not already showing).
Note: You can open the Message Log window before or after you have started the program
running.
22. Start running the program. In a few seconds you should see sine values displayed in the
Message Log window.
23. Halt the processor.
Continue with LAB6b …

Lab 6b – Adding a Second Load Thread

Continuing from LAB6a, we’ll add a second thread of code and see how it can affect our sine
wave.
24. Open the CDB file, right-click on PRD – Periodic Function Manager and choose Insert PRD.
25. Rename the new PRD to myPRD.
26. Right-click on myPRD and choose Properties.
Enter _myLoad in the Function textbox. This will be the function that is run when the
myPRD periodic event occurs.
Also, set the Period (ticks) to 1.
Close the dialog.
27. In the configuration tool, click on the SWI - Software Interrupt Manager. In the right-half
of the configuration tool, you should see a number of priority folders and your SWI objects.
Drag and drop the PRD_swi to a higher priority than codec_swi.
(Note, we may have already done this for you).
28. Save and close the CDB file.
29. Add the load.c file to your project. Open it to see the _myLoad function we have created.
30. Add the variable loadFactor to the Watch Window.

(Select the loadFactor variable in the code, then right-click and choose Add to Watch
Window.This will also open the Watch Window if it isn’t already open.)
31. Rebuild the project , Reload program, and Debug:Go Main.
32. Notice that loadFactor equals 15. This is a multiplier in our load.c program.
33. Run the project. Is the sound still OK? ___________________________________________

34. Examine the Execution Graph, can you spot the problem? The myLoad function should be
preempting the codec_out for so long that our audio is corrupted. (Note, make sure that the
RTA Control Panel is still enabled as discussed in step 11 on page 6-23.)
35. Try changing the load to a lower number, say 1.
(Double-click on loadFactor in the Watch Window and change the value in the popup dialog.)
36. Does that fix the problem? ____________________________________________________

When the load function is short enough, it doesn’t block the codec_out from occurring on-time.

Fix Preemption Problem

37. Open up the CDB file and drag and drop the codec_out to a higher priority than PRD_swi.
38. Rebuild, reload program, and run again. Does it sound OK? __________________________
Notice that now the Execution Graph shows the codec_out function preempting the
PRD_swi. (In our example, we have loadFactor = 25.)
39. When you’re finished experimenting, close Code Composer Studio and power-cycle your DSK.

Take Home Exercises
Take Home Exercises

We have included two take home exercises in Chapter 6. The first demonstrates the use of
statistics. The second uses RTDX to transfer coefficient data, as opposed to RTA data.
Lab 6c
1. Open Code Composer Studio, if it’s not already open.
2. Load the program LAB6C.OUT from C:\C60001day\labs\lab6c\Debug.
File:Load Program…
3. Open a workspace already configured for you.
File:Workspace:Load Workspace…
Navigate to C:\C60001day\labs\lab6c and open LAB6C.WKS.
The workspace loads the project and sets up the necessary RTA windows.
4. Make sure the RTA control panel is enabled correctly.

5. Run and watch the various windows.
6. Close CCS when you have finished.

Take Home Exercises
Lab 6d - Using RTDX

Take Home Lab - RTDX
Excel
RTDX transfer of filter
coefficients from Excel
spreadsheet to running
RTDXlab.xls ‘C6000 program
DSK
in C6000 out
buffer buffer
Install DTMF Plugin

1. It is best to close CCS before installing the plugin. So, make sure that all of your work is
saved and close CCS.
2. Now that you have the audio application setup to read a digit sent by RTDX, you need
something to write the digit. This is a perfect application for a CCS plugin which can easily
be written in any COM compliant language (Visual C++, Visual Basic, etc.). We have built a
plugin for you that will allow you to write a DTMF digit. All you need to do is install it.
Using Windows Explorer, navigate to the

C:\C60001day\ti\plugin\dtmf directory
3. Double-click on the setup.exe program.

4. When the following dialog box comes up, click OK.

Take Home Exercises
5. When the next dialog box comes up, change the install directory to C:\C60001day\keypad.
Ҏ
6. Click on the following icon to install the plugin.
Open the project

7. Open CCS and open the project C:\C60001day\labs\lab6d_rtdx\lab6d.pjt.
With CCS open, use the menu command Project:Open…
8. Load the program:
File:Load Program…
C:\C60001day\labs\lab6d_rtdx\Lab6d\lab6d.out
Opening the Plugin

9. Open the DTMF Keypad Plugin.
Tools:DTMF Keypad
Note: Your .out file needs to be loaded on the target before you open the plugin. Otherwise,
you will get an error.

Take Home Exercises
Setting Up RTA
10. Open a message log window to see the output of the logTrace buffer.
11. In addition to the LOG and STS information that you have seen so far, RTA also provides
some inherent or embedded information gathering that you can use to understand your
system. One of these capabilities calculates the load on the CPU, the CPU Load Graph.
DSP/BIOS menu and select the CPU Load Graph.
Running Code
12. Skip to the main function.
Debug:Go Main
13. Now, run your program.
Debug:Run -or- F5 -or– click

Ҏ If everything is running correctly, you should hear the CD. If you don’t, check to make sure
everything is setup correctly. If you need help, ask your instructor.
14. Use the DTMF Keypad to send digits. You should be able to hear them with the CD audio.
Note: It is nice to hear the digits, but it is hard for most people to tell if it is really the correct
digit, or just some random tones. You will be able to tell if the encoder is actually
working when we add a DTMF Decoder as well. I bet you can’t wait for that!
15. What is the load on the CPU while running the audio application with a DTMF Encoder?
___________________________________________________________________________
Setting Up RTDX
16. Now that we have everything setup and loaded onto the target, you need to enable the RTDX
server on the PC, inside CCS. Enable the RTDX server:
Tools:RTDX:Configuration Control
This should bring up the following dialog box:
17. Click the check box to enable RTDX.

Take Home Exercises
18. Open the channel configuration to to enable the input channel that you created.
Tools:RTDX:Channel Viewer Control

This should bring up the following dialog box:
19. Click in the checkbox next to ichan to enable the input channel.
Run the Code

20. Now that RTDX is setup, go ahead and run the code.
21. Now you need something to write the filter coefficients to the DSP. We have provided an
Excel application to do this for you. Use Windows Explorer to open RTDXlab.xls which is
located C:\C60001day\labs\lab6d_rtdx folder.
22. Click Enable Macros in the following dialog box when it comes up.
23. The spreadsheet that comes up has five columns of coefficients that you can send to the DSP
and an on/off switch for the filter. The yellow colum is the currently selected column. Try
clicking on the on/off switch to see what happens.
Do you hear anything different? ________________________
Notice that the currently selected column of coefficients is for an all pass filter, so you
shouldn't hear any difference. So, how do you know if RTDX is even working?
24. To truly test the application, try clicking on the High Pass column heading, which looks like a
grey button. After a slight delay while the data is being sent to the DSP, you should definitely
hear a difference in the music.

Take Home Exercises
25. Click on some of the other filter coefficients to hear the difference among them. Pretty cool,
huh!
26. If you still have some time left, you can take a look at the Visual Basic for Applications code
that is being run from Excel. In Excel, do the following to see the code.
Tools:Macro:Visual Basic Editor

If you don't see the code, try double clicking on Module 1 in the VBA Project view in the
upper left-hand corner of the window.
This application mainly uses the h_write() function.
Note: If you are still interested in more RTDX info, there is a great RTDX tutorial included in
CCS. Choose Tutorial under Help for more information.
Shut down
27. Close Excel and when prompted to save your changes, click No.
28. Close CCS.

Background Info
Background Info
RTDX - How It All Works
Real-Time Data Exchange (RTDXTM) is a standard, real-time data transfer technology that
provides continuous visibility into the way target applications operate. RTDX provides significant
benefits over alternative methods of system debugging by providing standard, open, real-time
communications, without consuming target system peripheral resources. Target and Host
Application Program Interfaces (APIs) provide a rich set of communication tools to enable
seamless bi-directional communications.
RTDX Lab Target

RTDX consists of both target and host components. A small RTDX software library runs on the
target DSP and the designer’s application makes function calls to this library’s API in order to
send and/or receive data. The library uses the on-chip emulation hardware to move data to or
from the host platform via an enhanced JTAG interface. This RTDX lab illustrates the simplicity
of sending data from the host to the target. Here are the steps that we took to build the lab:
First we include the RTDX library in the target application:
#include <rtdx.h>
Next we build the RTDX channel data structure by using the Create Input Channel Macro (in the
data declaration section of the application):
RTDX_CreateInputChannel(ichan);
We enable the channel as an input to the DSP from the host (from within main() ):
RTDX_enableInput(&ichan);
Finally, in the background task loop we read the input channel without blocking (waiting for the
result) and then we loop to see if the data has arrived, polling the RTDX interface, via
RTDX_Poll, in the interrupt service routine.
RTDX_readNB( &ichan, &rtdx_msg, sizeof(rtdx_msg) );
while ( RTDX_channelBusy(&ichan) )
{ /* interrupt polls RTDX here */}
For a more detailed discussion of the RTDX Target API, see Help Æ Tools Æ RTDX from
within Code Composer Studio.
RTDX Lab Host

RTDX uses CCS as a server to communicate with the target system and to pass data to the target
from the host software client (Excel in this lab) via the COM interface. Code Composer Studio
permits you to log the data for future analysis in a log file or to continuously stream the data to

Background Info
and from a client program. The RTDX lab uses the continuous mode of operation to send data
from Excel, a host COM client application, to the target DSP.
To enable communications from within Code Composer Studio, you need to define the channel
and communications protocol via the RTDX plug-in as we did earlier in the lab instructions.
Excel Client
For this RTDX lab we have used Excel as a host client application. With the introduction of
Visual Basic for Applications (VBA) Microsoft has enabled all Microsoft Office applications
programmable and COM capable. Excel provides an excellent demonstration platform as we can
use the spreadsheet and graphics capabilities to view the frequency response of the FIR filter and
we can use the Macro (VBA) facilities to communicate with RTDX.
Excel stores applications as workbooks with individual worksheets available within the
workbooks. This example uses the RTDX lab worksheet to communicate with the RTDX target
application. Other worksheets are provided to graph the frequency responses of the filters. (Click
on the tabs in the lower left to navigate through the worksheets.)
The RTDX COM interface is handled via a VBA macro. To access the macro capability of Excel
select:
Tools Æ Macro Æ Macros
on the Excel menu bar.
This brings up a dialog box with the names of the macros associated with this workbook. To view
the RTDX communications macro, select the ‘host write’ (h_write) macro and click edit. [Note:
double clicking on the macro executes the macro.] This brings up the VBA project environment,
with the h_write macro in the editor.
VBA is an object oriented language and requires familiarity with Object Oriented Programming
practices. (See Visual Basic help for more information.)
To access RTDX with VBA we use the following process: first, we declare an RTDX input
channel object: (We are using rtdx_ichan as the name to help us remember the target channel
name and avoid confusion with other potential host RTDX channel input or output objects.)
Dim rtdx_ichan As Object
Next, we create the input channel rtdx_ichan. (Input is from the DSP’s perspective):
Set rtdx_ichan = CreateObject("RTDX")
We open the channel, ichan, for writing, W, and verify that we opened a valid channel
(VerifyStatus is another VBA macro used to check the status of RTDX return codes. You can
view the VerifyStatus macro by scrolling down in the editor as it is the next macro in the list):
status = rtdx_ichan.Open("ichan", "W")
Call VerifyStatus(status, "rtdx_ichan.Open()")

Background Info
We build the message here. (View the macro to see the data).
/* build your data here */
And, read the bufferstate to prepare for the write:
status = rtdx_ichan.StatusOfWrite(bufferstate)
Call VerifyStatus(status, "rtdx_ichan.StatusOfWrite()")
Then, we write the data to the target:
status = rtdx_ichan.Write(CVar(arrayI2), bufferstate)
Call VerifyStatus(status, "rtdx_ichan.Write()")
Finally, we close the channel and free the object:
status = rtdx_ichan.Close()
Call VerifyStatus(status, "rtdx_ichan.Close()")
Set rtdx_ichan = Nothing
For more information on VBA application development view Help Æ Tools Æ RTDX in
Code Composer Studio.
Excel Buttons
Excel provides the ability to create objects and connect these objects to Macros. The buttons in
the RTDX lab were created by right clicking on any of the tool bars, selecting ‘Forms’ and
clicking the ‘Button’ icon. A cross hair cursor lets you click and hold on the screen to start
drawing the button and then drag and release the box at the desired size The Macro list is then
displayed, where you can assign any available macro to the button.
Summary
RTDX provides a simple, proven, standard interface for sending data to and from the DSP
application, in real-time, without stopping the target. This capability is provided with Code
Composer Studio and requires no additional support.
As you can see, Excel, as one of many RTDX capable host side applications, provides a powerful
and flexible client application to develop RTDX clients quickly and easily.

Background Info

Visual Design
Today’s Agenda
Agenda
2. EDMA, Cache
VAB Visual Design
Epilogue What Next?
TMS320C6000 One-Day Workshop - Visual Design 7-1

Visual Application Builder
Module Topics
Visual Design.............................................................................................................................................. 7-1
Visual Application Builder ...................................................................................................................... 7-3

VAB Details ............................................................................................................................................. 7-5
Lab 7........................................................................................................................................................ 7-6
Build a Sine Output............................................................................................................................. 7-7
Open VAB to a new worksheet.................................................................................................. 7-7
Build Sine Wave......................................................................................................................... 7-9
Add a second tone .................................................................................................................... 7-11
Use the Knob............................................................................................................................ 7-11
Experiment with other examples .............................................................................................. 7-13
Take Home Exercise.............................................................................................................................. 7-14
7-2 TMS320C6000 One-Day Workshop - Visual Design

Build applications by selecting & connecting blocks (easy)

3rd party tool from Hyperception
Data and Control Paths
Sets Frequency
Both data and control connectors

connections

PC Blocks to Speed Design
Sets Frequency

PC
PC and
and DSP (Real-Time)
(Real-Time) component blocks
blocks
PC
PC (white)
(white)
DSP
DSP (yellow)
(yellow)

PC
PC blocks
blocks aid
aid in rapid
rapid system
system design
design

Current
Current value
value used
used when
when generating
generating .out
.out file
file
VAB Output Options

Build Program (.out)
VAB can create .OUT file which can be
loaded and run within CCS.
Relocatable Outject (library) File
Import your VAB creations into CCS.
VAB can create an object library and
header file which can be added to a CCS
project (.PJT) file.
Write Directly to FLASH
After your VAB program has been created
and tested, a simple menu selection allows
you to burn it into the DSK's FLASH
memory.
This allows the program to run stand-
alone, that is, without VAB (or CCS).

VAB Details
Other Features
Hierarchical
One worksheet can become a block in a second worksheet
Block Wizard
Create your own block, if you can’t find a pre-built one that
meets your needs
Creates C template for coding in CCS
Also creates PC icons for VAB
TI’s DSP Algorithm Standard

eXpressDSP Component Wizard allows you to quickly create
compliant algorithms
VAB can use eXpressDSP algorithms
Optional Feature:
If you want the PC components in your design, a stand-alone
(.EXE) application can be generated from Hyperception tools
VAB Details
VAB for ‘C6000
VAB for ‘C6000
$1495 US, P/N HSWN1060
VAB also available for other TI DSP families
Workshop CD-ROM contains VAB demo
Same version installed on workshop computers
Some capabilities have been disabled (incl Save/Print)
Purchase KEY to full version by phone
For Purchase or Information:

Hyperception, Inc.
Voice:
Voice: 214-343-8525 … Fax:
Fax: 214-343-2457
info@hyperception.com
www.hyperception.com

Lab 7
Lab 7
Lab 7
Build a simple sine output (5 mins)
Build a DTMF output (> 5 mins)
Examine included examples

Lab 7
Build a Sine Output

Similar to most of the workshop labs, we’ll once again build a sinewave and output it through the
DSK’s codec.
Open VAB to a new worksheet

1. Start VAB from the VAB icon on the Start Menu:Programs or the desktop icon. When
VAB starts, you should see a screen similar to this:
Go ahead and select OK. (Note, you cannot turn-off the tips with the demo version of VAB.)
Note: If you do not see the toolbars (as in the above figure) and/or the examples do not appear
in the dialog box (as in step 2), then the VAB installation is incomplete. This most often
occurs when VAB is installed by an administrator on a Windows NT machine. The
toolbars and example features are added to the administrators profile, by the user’s profile
is left unchanged.
If this has happened to your lab workstation, you can fix this quickly.
a. Close VAB.
b. Open c:\c60001day\labs\lab7 and double-click on VAB6000.reg.
(If it asks you if you really want to modify the registry, say OK. This file only adds the
necessary items to the Hyperception key. Nothing else is modified or deleted.)
c. Begin with step 1 of the lab, again.

Lab 7
2. Next you will see the Examples dialog. Select Cancel as shown below.
First we will build a simple example on our own. Afterwards, we will show you how to get
back to this dialog.
3. Now click the New Worksheet toolbar button.
New Worksheet

Lab 7
Build Sine Wave

4. While the toolbars are configurable, the icons we need are on the default toolbar to the right.
Click on the two icons we need to add them to the desktop.
5. It’s easiest if you arrange the two icons in left to right data-flow fashion.
6. Next choose the data connector.
Data Connector

Lab 7
Then click inside the middle of the Sine block …

… next inside the DSK D/A block. You should now have:
7. All that’s left is for you to click on GO.
Go Stop
8. You should hear the sinewave.
9. If not, the frequency may need changing. Right-click on the sine block to open it.
If the Frequency isn’t in the 500 to 3500 KHz range, try changing it to something like 1300
KHz as shown above.
You can even change frequencies on-the-fly – without stopping VAB.
7 - 10 TMS320C6000 One-Day Workshop - Visual Design

Lab 7
Add a second tone

10. Click on stop if you haven’t already done so.
11. Click again on the RT Sine toolbar icon to add a second sine block. Then right-click to
modify the frequency –pick something different than the first so you can hear the difference.
12. Select the ADD icon from the toolbar.
13. Next, using the connect tool, connect both SINE blocks (outputs) to the ADD block (inputs).
(Remember, you need to click in the middle of the block to make a connection.)
14. Then connect from the ADD to the DSK D/A block.
15. Hit GO again and you should hear a Dual Tone.
(We’ll look at a more advanced example of this in a minute.)
Use the Knob

16. Stop VAB and click on the KNOB icon to add it to the worksheet.
You may want to re-shape the KNOB block

17. Use the Control connector tool to connect the KNOB to one of the SINE blocks.
Control
Connector
Note, to connect to the KNOB block, click between the circle and outer box of the block.
TMS320C6000 One-Day Workshop - Visual Design 7 - 11

Lab 7
When you make the control connection, VAB asks which variable you want to control.
We want to connect-to frequency.

18. Once the connection is completed, click on GO and try spinning the knob.

Lab 7
Experiment with other examples

19. Of course, you can try replacing the KNOB with the RT SWEEP Generator as a means to
vary the frequency. You can try this later, though. Instead, let’s open the Examples Dialog.
Click on the Examples toolbar icon.
Open Example Dialog
Try out the Arbitrary Filter example.
TMS320C6000 One-Day Workshop - Visual Design 7 - 13

Take Home Exercise
This contains an Arbitrary Filter block that allows you to configure a filter clicking-and-dragging
the filter line with your mouse.
20. DTMF is another interesting example. You can find it under the DSP tab in the same dialog
where the arbitrary filter example was found.
21. When you are finished, you can close Visual Application Builder.
Take Home Exercise

At home you might want to try a heirarchical example. That is, build one worksheet, then include
it as one-of-the-blocks in another worksheet. In other words, build your own block graphically
within VAB.
The full version of VAB includes the ability to create your own blocks using Code Composer
Studio and either Hyperceptions Block Wizard or eXpressDSP Component Wizard.
Note: The VAB installation adds a convenient desktop toolbar. This is an easy way to start
VAB. If you find the toolbar in your way though, you can easily close it and/or remove it
from your startup folder by right-clicking on the toolbar and choosing the from the popup
menu.

Epilog - Where to go From Here
Introduction
Workshop Agenda

System McBSP, Ints, EDMA
VAB Visual Design
Epilogue What Next?
Learning Objectives
Outline
‘C6000 Family and New Devices
Imaging TDK
eXpress DSP Software Platform
Where to get more info
K-Base (FAQ), PIC
Workshops
DSP Village
Where to get printed literature
DSP textbooks
Wrap Up
TMS320C6000 One-Day Workshop - Epilog - Where to go From Here 8-1

‘C6000 Devices
Module Topics
Epilog - Where to go From Here .............................................................................................................. 8-1
‘C6000 Devices ....................................................................................................................................... 8-3

‘C6414 ................................................................................................................................................ 8-3
‘C6415 ................................................................................................................................................ 8-4
‘C6416 ................................................................................................................................................ 8-4
‘C6712 ................................................................................................................................................ 8-5
‘C33 .................................................................................................................................................... 8-5
Imaging TDK........................................................................................................................................... 8-6
eXpress DSP............................................................................................................................................ 8-7
TMS320 Algorithm Standard.............................................................................................................. 8-7
For More Info.......................................................................................................................................... 8-9
Workshops ........................................................................................................................................ 8-10
DSP Village ...................................................................................................................................... 8-11
TI ‘C6000 DSP Literature................................................................................................................. 8-11
DSP Textbooks ................................................................................................................................. 8-12
Wrap - Up ......................................................................................................................................... 8-13
8-2 TMS320C6000 One-Day Workshop - Epilog - Where to go From Here

‘C6000 Devices
‘C6000 Devices
‘C6000 Roadmap
Software Compatible
Floating
Floating Point
Point
Multi-core
Multi-core C64x™
C64x ™ DSP
DSP
1.1
1.1 GHz
GHz
Performance
2nd Generation
C64x™
C64x ™ DSP
DSP
General
Purpose C6414
C6414 C6415
C6415 C6416
C6416
t ce Media 3G Wireless
1st Generation es an Gateway Infrastructure
i gh orm
H rf
C6203 Pe
C6204 C62x™
C6202
C6201 C6205
C6211 C67x™
C6701 C6711 C6712
Time
‘C6414
TMS320C6414 DSP Sets

Industry Performance Standard
TMS320C6414 DSP 600 MHz DSP core
z Industry-leading
L1P Cache Direct Mapped performance in 0.12
16K Bytes Total micron copper process
EMIF 64
Multi-level memories
EMIF 16
C64xTM DSP Core z Fuel core performance
4 Banks/1M Bytes Total
Enhanced DMA Controller
McBSP 0 Instruction Fetch Control

L2 Cache/Memory
Registers 64-channel EDMA

Instruction Dispatch
Interrupt Control
McBSP 1 In-Circuit z Unmatched I/O

Instruction Decode Emulation
McBSP 2 Data Path 1 Data Path 2 efficiency
A Register File B Register File Two 133 MHz EMIFs
HPI32
z Superiorexternal
GPIO16 L1 S1 M1 D1 D2 M2 S2 L2
bandwidth
Three McBSPs
z Ease audio & telecom
L1D Cache 2-Way Set Associative interfacing
16K Bytes Total
32-bit HPI
z Simplifieshost
JTAG Power PLL Timer 0 Timer 1 Timer 2
Down connectivity
RTDX
Logic 23mm/532 BGA package
z Maximizes channel
density
Availability: Initial samples June 2001

‘C6000 Devices
‘C6415
TMS320C6415 Adds New Networking
Interfaces to the World’s Highest Perf. DSP
TMS320C6415 DSP
PCI Flexible PCI or HPI32
or host connection
L1P Cache Direct Mapped
HPI32 16K Bytes Total z 33 MHz/32-bit
GPIO8 connectivity for
Enhanced DMA Controller

control or
C64xTM DSP Core
4 Banks/1M Bytes Total

Utopia 2 Instruction Fetch Control
interprocessor
L2 Cache/Memory
or Instruction Dispatch
Registers communications
Interrupt Control
McBSP 2 In-Circuit
Data Path 1 Data Path 2
EMIF 64 Utopia 2 ATM
A Register File B Register File
connection
EMIF 16
L1 S1 M1 D1 D2 M2 S2 L2
z 50 MHz wide area
McBSP 0 network connectivity
McBSP 1
GPIO16 L1D Cache 2-Way Set Associative Pin compatible with
16K Bytes Total C6414 DSP
Timer 0 z Object code
Timer 1 compatible with all
JTAG Power PLL C6000TM DSPs
Timer 2 RTDX Down
Logic
‘C6416
TMS320C6416 DSP: Customized
For 3G Wireless Infrastructure
TMS320C6416 DSP Viterbi Coprocessor
(VCP)
VCP
L1P Cache Direct Mapped Supports >500 voice
16K Bytes Total channels at 8 kbps
Programmable
TCP decoder parameters
TM
C64x DSP Core include constraint
Instruction Fetch Control length, code rate, and
4 Banks/1M Byte Total
Registers
Enhanced
frame length
L2 Cache/Memory
Instruction Dispatch
Interrupt Control
PCI In-Circuit
or Turbo Coprocessor (TCP)
Enhanced
Data Path 1 Data Path 2

HPI32 Supports 35 data
DMA Controller
A Register File B Register File

GPIO8 channels at 384 kbps
L1 S1 M1 D1 D2 M2 S2 L2
3GPP/IS2000 Turbo
DMA Controller
coder
Utopia 2
or Minimal processor
McBSP 2 delay
L1D Cache 2-Way Set Associative Programmable
EMIF 64 16K Bytes Total parameters include
mode, rate and frame
EMIF 16 Power PLL length
Timer 0
Down
McBSP 0 JTAG Timer 1 Logic
RTDX Pin compatible with
McBSP 1 GPIO8 Timer 2 C6414/C6415 DSPs

‘C6000 Devices
‘C6712
TMS320C6712 DSP
600 MFLOPS/100 MHz for $9.95
(Volume)
External Level 1 Dual-level cache memory
Memory Program architecture (same as
Interface Cache C6711 DSP) enables systems
16
4K Bytes
savings
Enhanced DMA (EDMA) is
Enhanced optimized for efficiency in small
DMA RAM devices
(EDMA) Level 2 Cache/
Controller Memory C67xTM
64K Bytes DSP Core
Code compatibility with C6000TM
fixed and floating- point DSPs
speeds development
256-pin BGA allows easy
2 McBSPs
manufacturing and board design
Level 1
Data (same package as C6711)
2 32-Bit Cache
Timers 4K Bytes
TMS320C6712 Digital Signal Processor
‘C33
'C33: New $5 Chip Extends Industry’s
Most Popular Floating-Point DSP Family
120 MFLOPS/120 MHz

Program for $5
Cache Boot
(64 x 32)
RAM ROM 150 MFLOPS/150 MHz
(34K x 32)
for $8
1-Mbit on-chip SRAM
External reduces system cost
Memory Low 200 mW power
Interface JTAG/MPSD
dissipation (3.3 V I/O,
1.8 V core)
Same peripherals as
Timer 0 'C31 enables easy
'C3x DMA migration
CPU
Code compatibility with
Timer 1
popular 'C3x devices
reduces time to market
Serial Port TImeline™ technology
TMS320VC33 Digital Signal Processor improves price/
performance

Imaging TDK
Imaging TDK
Complete Imaging Developer’s Kit
DSP board
Hardware
TM
z 150 MHz C6000 DSP
z 16 MB on-board memory
z TI data converter and power
management solutions
Capture/display daughter-board
z Composite/S-Video I/O
z Monitor display
NTSC/PAL compatible camera
Software
Application Demos
z H.263 encoder+decoder
W z JPEG encoder+decoder
NE C6000 TM
DSP Platform z Wavelet, edge detection,
Imaging Developer’s Kit convolution..
Foundation software
z Chip support library
z Imaging source library
Order-Entry open NOW z DMA memory streaming utilities
Development tools software
Americas part number TMDX320026711 TM
z Code Composer Studio IDE
TM
z DSP/BIOS II RTOS
Europe part number TMDX320026711E
z Compiler,
assembler, linker
IDK Application Software Framework

Provides Rapid Prototyping
JPEG/JPEG2000 MPEG-2 Video
MPEG-4 H.263
Host Graphical User Interface

(Code Composer StudioTM Plug-Ins)
Application RTDXTM
Framework
eXpressDSPTM API Wrapper

Task & Channel Management
Algorithm
Image Processing Functions

Input/Output
Drivers Image Library/Custom Kernels
Algorithms
Image Data Manager
Chip Support Library (CSL) + DSP/BIOSTM RTOS
DSP Hardware

eXpress DSP
eXpress DSP
eXpressDSP
A premier, open
DSP software strategy
for TI’s Leadership
TMS320 DSP Family
eXpressDSP Components
CCS DSP/BIOS 320 Algo Std 3rd Parties
TMS320 Algorithm Standard

DSP Algorithm Standard
ALGORITHM TEXAS SYSTEM
PRODUCERS INSTRUMENTS INTEGRATORS
TMS320™ DSP
Algorithm
Standard
Algorithm Specification
Application
Rules & Guidelines

Programming rules
Algorithm packaging
Write once, Ease of
Algorithm performance
deploy widely integration
DSP platform
C5000™
C6000™

eXpress DSP
eXpressDSP
TI DSP Based System

DSP Software
DSP Algo
Framework DSP Algo
DSP Algo
DSP/BIOS
TI DSP

For More Info
For More Info

For More Information . . .
Internet
Website: www.ti.com
dspvillage.com
FTP: ftp://ftp.ti.com/pub/tms320bbs
FAQ: http://www-k.ext.ti.com/sc/technical_support/knowledgebase.htm
Device information TI & ME
Application notes News and events
Technical documentation Training
USA - Product Information Center ( PIC )

Phone: 972-644-5580
Email: sc-infomaster@ti.com
Information and support for all TI Semiconductor products/tools
Submit suggestions and errata for tools, silicon and documents
Other Resources
Software Registration/Upgrades: 972-293-5050
Hardware Repair/Upgrades: 281-274-2285
Enroll in Technical Training: www.ti.com/sc/training
(choose Design Workshops)
European Product Information Center (EPIC)

Web: http://www-k.ext.ti.com/sc/technical_support/pic/euro.htm
Phone: Language Number

Belgium (English) +32 (0) 27 45 55 32
France +33 (0) 1 30 70 11 64
Germany +49 (0) 8161 80 33 11
Israel (English) 1800 949 0107 (free phone)
Italy 800 79 11 37 (free phone)
Netherlands (English) +31 (0) 546 87 95 45
Spain +34 902 35 40 28
Sweden (English) +46 (0) 8587 555 22
United Kingdom +44 (0) 1604 66 33 99
Fax: All Languages +44 (0) 1604 66 33 34
Email: epic@ti.com
Literature Requests
SW registration/upgrades, HW repair/upgrades
Information and support for all TI Semiconductor products/tools
Submit suggestions and errata for tools, silicon and documents

For More Info
DSP Workshops Available from TI

Attend another workshop:
4-day C54x and C55x Design Workshops
4-day C6000 Design Workshop
4-day C2000 Design Workshop(s)
4-day DSP/BIOS Workshops
3-day Algo Standard Workshop
1-day versions of these workshops
Sign up at:
US: http://www.ti.com/sc/docs/training/usa/workshop/workshop.htm
Europe:http://www.ti.com/sc/docs/training/europe/workshop/workshop.htm
Workshops
What’s The Next Step ?
Complete the Compiler Tutorial
Download app notes from DSP Village
8 - 10 TMS320C6000 One-Day Workshop - Epilog - Where to go From Here

For More Info
DSP Village
DSP Village - Online Discussion Groups
TI ‘C6000 DSP Literature

‘C6000 Reference Guides
Hardware
SPRU189 - CPU and Instruction Set Ref. Guide
SPRU190 - Peripherals Ref. Guide
SPRU401 - Peripherals Chip Support Lib. Ref.
Software
SPRU198 - Programmer’s Guide
SPRU303 - C6000 DSP/BIOS User’s Guide
Code Generation
SPRU186 - Assembly Language Tools User’s Guide
SPRU187 - Optimizing C Compiler User’s Guide
revised 06/15/2001
Available by calling Product Information Center

(ask by name/number) or find them on TI’s website.
TMS320C6000 One-Day Workshop - Epilog - Where to go From Here 8 - 11

For More Info
DSP Textbooks
Looking for Literature on DSP?
“A Simple Approach to Digital Signal Processing”

by Craig Marven and Gillian Ewers; ISBN 0-4711-5243-9
“DSP Primer (Primer Series)”

by C. Britton Rorabaugh; ISBN 0-0705-4004-7
“A DSP Primer : With Applications to Digital Audio

and Computer Music” by Ken Steiglitz; ISBN 0-8053-1684-1
“DSP First : A Multimedia Approach”

James H. McClellan, Ronald W. Schafer, Mark A. Yoder;
ISBN 0-1324-3171-8
Looking for Literature on ‘C6000 DSP?
“Digital Signal Processing Implementation

using the TMS320C6000TM DSP Platform”
by Naim Dahnoun; ISBN 0201-61916-4
“C6x-Based Digital Signal Processing”

by Nasser Kehtarnavaz and Burc Simsek;
ISBN 0-13-088310-7

For More Info
Wrap - Up
Wrap -Up
Thanks for attending

Don’t forget to take your DSK, parallel
cable, power supply, etc. with you
Also, take both CD-ROMs with you
Leave the patch cords at your PC
Visit DSP Village at:
http://www.dspvillage.ti.com/
Have a safe trip home
TMS320C6000 One-Day Workshop - Epilog - Where to go From Here 8 - 13

For More Info

Appendix
Introduction
A1. DTMF tones
A2. Installations
• DSK
• CCS
• Acrobat
• Lab Exercises
• VAB
• Desktop Configuration
• CCS Test and Configuration
A3. Data-Converter Plug-in (DCP)
TMS320C6000 One-Day Workshop - Appendix A-1

A-2 TMS320C6000 One-Day Workshop - Appendix
Generating DTMF Tones
Rob Gillis, Texas Instruments
Generating Sine Wave Tones

The simplest way of generating a variable frequency is to use a ring oscillator. This is essentially
an IIR filter with a single pole located on the unit circle and has unity gain. This causes the IIR to
go into oscillations. When an impulse is introduced to it, it will continue oscillating. Rounding
errors are even cancelled out due to positive and negative cycles.
Here is the oscillator equation:
y[0] = ( A1 ) (y[1]) + (A2) ( y[2])
A1 = 2 * r * Cos x A1 = 2 * Cos x
A2 = -(r)^2 A2 = -1
r = filter gain = 1
x = phase angle between adjacent samples = ( (fg) / (fs) ) * 360°
fg = generated Sine tone frequency

fs = Sample frequency
y[0] = Next Sample output (init = 0)

y[1] = last output sample (init = y*Sin x) (y=required peak.)
y[2] = second last output sample (init = 0)
The initial conditions of y[0] = 0, y[1] = some value and y[2] = 0, represents the impulse. When
calculating the value used for y[1], you may want to consider the DSP itself. Taking this number
directly can cause an overflow condition. If you are generating a single tone. Taking 80% of this
number is safe to prevent overflow and still create a nice tone. Since DTMF tones are 2 tones
summed, we need to take <50% of that number. You will see this reflected in the coefficient and
initial condition table we’ve included below.
So, your “C” Code to implement this oscillator would look like this.
y[0] = ((((int)y[1]*(int)A))>>14) - y[2];

y[2] = y[1];
y[1] = y[0];
The last thing you need to consider is the actual numbers that the DSP can use. We are using
signed 16-bit fixed point numbers here. Therefore our number range from –32767 to +32768. To
create the coefficient and impulse numbers refer to this equations.
A1 = [cos ( ( (fg) / (fs) ) * 360° )] * 32768
y[1] = (scaling factor) * [sin ( ( (fg) / (fs) ) * 360° )] * 32768
'C6000 1-day Workshop - Generating DTMF Tones A1 - 1

Error! No text of specified style in document.
Generating DTMF from Sine Tones

To generate DTMF tones, you combine 2 pure sine tones from the Row and Column information
on the following chart:
Column 1 Column 2 Column 3 Column 4

1209 Hz 1336 Hz 1477 Hz 1633 Hz
Row 1 1 2 3 A
697 Hz
Row 2 4 5 6 B
770 Hz
Row 3 7 8 9 C
852 Hz
Row 4 * 0 # D
941 Hz
Based on an 8KHz Sample Rate, the below table gives you the A1 Coefficient and y[1] impulse.
You can modify these in the SineFilter lab to modify the tones generated.
Frequency A y[1]
697 Hz 27980 6774
770 Hz 26956 7399
852 Hz 25701 8073
941 Hz 24219 8766
1209 Hz 19073 13323
1336 Hz 16325 14206
1477 Hz 13085 15021
1633 Hz 9315 15708
References:
1. Email message from P. Dent.
2. Digital Signal Processing Applications with the TMS320 Family: Theory, Algorithms, and
Implementations, Volume 1. TI Literature number: SPRA012A.
Texas Instruments, Dallas, TX.
A1 - 2 'C6000 1-day Workshop - Generating DTMF Tones

'C6711 One-Day Workshop Installation
Workshop Supplies
‘C6711 One-Day Workshop Notes
‘C6711 DSK board and CCS v2.0 CDROM
Workshop Files Installation CD-ROM(s) with VAB Registration-Key sticker
Installation Checklist
Some workshops locations will require all the software to be installed
‘C6711 DSK Hardware
Code Composer Studio (version 2.0)
Acrobat 4.0 (or 5.0)
Workshop Files
Visual Application Builder (VAB)
Configure CCS Icon
Configure Windows Explorer
Test DSK Installation (Confidence Test, Run CCS)
2001 Texas Instruments, Inc. - 'C6711 One-Day Workshop Installation A2 - 1

Table of Contents
Table of Contents
'C6711 One-Day Workshop Installation.................................................................................................. 1-1
Workshop Supplies ............................................................................................................................. 1-1
Installation Checklist........................................................................................................................... 1-1
Table of Contents..................................................................................................................................... 1-2
Specifications........................................................................................................................................... 1-3
PC Requirements................................................................................................................................. 1-3
Install ‘C6711 DSK Hardware ................................................................................................................ 1-4
Preparing PC Parallel Port .................................................................................................................. 1-4
DSK Hardware and Workshop Supplies ............................................................................................. 1-5
Connecting the DSK to Your PC ........................................................................................................ 1-6
Install ‘C6711 DSK Software Tools (CCS) ............................................................................................. 1-7
Install Code Composer Studio............................................................................................................. 1-7
Install Acrobat Reader .......................................................................................................................... 1-12
Install ‘C6000 Workshop Files.............................................................................................................. 1-13
Install Workshop Files ...................................................................................................................... 1-14
Install VAB ....................................................................................................................................... 1-15
Desktop Configuration .......................................................................................................................... 1-17
Configure CCS Icon.......................................................................................................................... 1-17
Configure Windows Explorer ........................................................................................................... 1-18
Test ‘C6000 DSK Installation and Configure CCS ............................................................................... 1-20
DSK Confidence Test ....................................................................................................................... 1-20
Run/Configure Code Composer Studio............................................................................................. 1-21
Installation Appendix............................................................................................................................. 1-23
Configure Code Composer Studio .................................................................................................... 1-23
Note: In this table of contents, substitute “A2-” for “1- ”.
A2 - 2 2001 Texas Instruments, Inc. - 'C6711 One-Day Workshop Installation

Specifications
Specifications
PC Requirements
Hardware
• 17” Monitor (or better) set at 1024 x 768 resolution and 16-bit color
• Operating System: Windows 98, WinNT, or Windows 2000
(Windows ME is not supported)
• Pentium II 266 MHz (or better)
• 64MB RAM (or better)
• 600 megabytes of hard-disk space
• Read/Write access to C:\ drive
• 3.5” Floppy disk drive
• CD-ROM drive
• Open Parallel Port (EPP preferred)
• Amplified external mono speaker w/mini plug
• A/C power at each station – need A/C power for TI DSP board (DSK)
Software/Other
• Microsoft Excel 97 (or later)
• Audio source (PC sound card, portable audio player, etc.)
• Windows Media Player (or some other midi player)
• Internet access to each PC (for VAB installation)
• Internet Explorer 3.0 (or Netscape Navigator 3.0) or later
• Cables to connect to Speaker and Audio source

Install ‘C6711 DSK Hardware

The C6711 DSK should be connected prior to the installation of Code Composer Studio (CCS)
software in order for the parallel port to be configured properly.
Preparing PC Parallel Port

Before the installation of Code Composer Studio software, you may want to ensure that the PC
parallel (printer) port is configured for EPP mode of operation. This will provide better
performance when using Code Composer Studio.
1. To check parallel (printer) port configuration, using the following path:
Start menu → Settings → Control Panel

a. Display the window associated with the System icon.
b. View the Device Manager. On some Windows machines, you must select the Hardware
tab and click on the Device Manager… button.
c. Expand the Ports listing to see all the configured ports. If the enhanced EPP Printer Port
is displayed, your parallel (printer) port is configured correctly.
If EPP is not available, either ECP Printer Port or Standard (SPP) Printer Port will also
work, though EPP is preferred due to its greater bandwidth.
d. If a printer port is not displayed, you must restart your PC and follow the manufacturer’s
instructions for BIOS setup. This step can also be followed if EPP was not displayed in
the previous step, but you believe the computer is capable of EPP mode.
e. Once you confirm the parallel (printer) port is available, display the properties for that
port. Find the printer address setting and write it down below – it is normally 0x378.
Printer Address Setting: ___________________________

DSK Hardware and Workshop Supplies

2. Remove the ‘C6711 DSK board, parallel port cable, and power supply from the packaging:
3. Find, if necessary, the other workshop supplies. These are the additional items needed within
the workshop:
• Speaker
In most cases, you will use the external speakers already connected to the PC. These will
be disconnected and re-connected to the DSK audio output. If your PCs do not have
speakers, you will need to provide an external, powered speaker.
• Audio Input Cable
− TI or you should supply an audio input cable. This will be connected between the
audio source (usually the PC soundcard) to the DSK input.
− Again, this is not part of the DSK kit itself, rather, if supplied by TI it will be shipped
in along with the other supplies.
• Workshop CD-ROM
− This is separate from the CD-ROM shipped with the C6711 DSK.
− The workshop (2nd) CD-ROM will be used later for installing the lab exercises and
Visual Application Builder (VAB).

Connecting the DSK to Your PC
Parallel
Port I/F
TMS320C6711
TMS320C6711
Power
Jack
Power
LED
Reset Switches
Audio Out Audio In LEDs
4. While no switches or jumpers affect the operation of the board, the Power-On-Self-Test
(POST) routine does read switch 2 to decide if a short or long POST should be executed.
To this end, we suggest you set all the switches UP, indicating the long POST should be run.
5. Shut down and power off the PC.
6. Connect the supplied parallel port (printer) cable to the board. Connect the other end of the
cable to the parallel (printer) port of your PC.
7. Connect the speaker cable.
In most cases you will use the external speakers supplied with the classroom machines. Find
the cable that connects the external speakers to PC you’re using. Remove the speakers mini-
jack from the back of the computer and plug it into the AUDIO OUT connector on the DSK.
8. Install an audio cable from the PCs sound-card output to the DSK audio input.
You may or may not have audio input cables available. If you do, then connect it. During the
Power On Self-Test (POST) and board confidence test (run later) you will hear the audio
input passed through to the speaker if an audio input is connected.
9. Finally, plug the DSK power supply into the wall and the DSK.
When you connect the power, a 'Power-On-Self-Test' (POST) will boot-load from the DSK
flash memory and execute.
• The DSK LEDs will count as it sequences through the test.
• If audio is connected to the MIC input, audio pass-through should be heard first …
… followed by a tone.
• The test completes with all LEDs flashing, then all OFF.
• If the test sequence does not begin or complete successfully, try 'cycling' the power by
plugging and unplugging the power cord. (If this doesn’t work, then either the flash
memory must be reprogrammed or the DSK hardware is defective.)
10. Power up the PC.

Install ‘C6711 DSK Software Tools (CCS)

If you have a previous version of CCS installed, CCS version 2.0 installation will allow you to
either uninstall the previous version or install to a separate folder. For the ‘C6711 One-Day
Workshops, for simplicity sake it is suggested that you uninstall any previous version of Code
Composer Studio.
Note: If you have the full version of CCS version 2.x, you can install this rather than the limited
version of CCS version 2.x that comes with the C6711 DSK.
Install Code Composer Studio

11. Find the Code Composer Studio (version 2.x) software CD-ROM that ships with the DSK.
Note: a second ‘C6711 DSK Workshop CD-ROM has been provided for installing the other
software required by the workshop.
12. Insert the CCS CD-ROM into the computer.
We will use <CD-ROM path> to indicate the path where the CD-ROM resides.
13. Open Windows Explorer to the <CD-ROM path>.
14. Run Code Composer setup (SETUP.EXE). The path should be:
<CD-ROM path>\setup.exe
15. When the CCS Installation menu appears, select Code Composer Studio.

16. Once Code Composer Studio’s setup begins, you’ll have to respond to a number of questions.
You can choose the default response for most choices; we’ll indicate when you need to select
something different.
17. The next two dialogs deal with the End User License.
18. Again, take the default to install both CCS and the online PDF manuals.

19. Select New Installation.
Again, if a previous installation exists, we suggest you uninstall it.

20. Next you’ll run into the summary of current settings and installation plans. Go ahead and
click Next.
21. CCS setup program will remind you to connect the DSK. You should have already done this
as described on page A2-4. Go ahead and click OK.
22. You should see the installation progressing. At one point, a DOS window will open while the
parallel port is configured.
If a DSK was not connected, you will see the DOS window pause with a message indicating
how to configure the DSK once it is connected.

23. When installation is completed, you should see the following dialog.
We suggest you deselect both checkboxes.
24. If requested, go ahead and let the computer reboot. If a reboot is not required, the CCS
installation program won’t request it.
25. Upon completing CCS installation successfully, you should see the following window.
You have successfully installed Code Composer Studio.

Install Acrobat Reader
Install Acrobat Reader

If this PC already has Adobe Acrobat installed then these steps may be skipped.
Note: If you have a version of Acrobat prior to 4.0, we suggest you upgrade to version 4.0.
26. Similar to steps 13 – 14, open Windows Explorer to the <CD-ROM path> and run setup.
<CD-ROM path>\setup.exe
27. When the CCS Installation menu appears, select Adobe Acrobat Reader.
28. You can go ahead and accept all the defaults while installing Adobe Acrobat 4.0.

Install ‘C6000 Workshop Files

These steps install the lab exercises used in the ‘C6711 One-Day Workshop.
29. Verify that the folder C:\c60001day does NOT exist.
If it does, DELETE it.
30. Find the ‘C6711 DSK One-Day Workshop CD-ROM and place it in your CDROM drive
(similar to step 12).
31. After inserting the Workshop CD-ROM, if you have autoplay enabled on your PC you should
see the following screen appear.
This screen won’t appear automatically if you’re not installing from the computer’s CDROM
drive (such as when installing from the a networked CDROM or hard drive) or if autoplay is
disabled. In this case you need to navigate to the install file directly.
Using Run from the Start menu (Start > Run) and run the file:
<CD-ROM path> /CDBROWSE.exe

When it asks you for a file to run, select CDBROWSE.dbd (found in the same directory as
CDBROWSE.exe). The menu should now appear.

Install Workshop Files

32. Select Install Seminar Training Material.
33. When C60001day.exe runs it will open the following dialog box.
Use the default location ( C:\ ) and extract the files by clicking on the Unzip button.
34. When the file installation is complete, you’ll see the following notice. Click OK.
(Note, the number of files shown in the example above may be different from what you see.)
35. Now you can Close the C60001day.exe dialog.
36. Go ahead and hit the F5 key. This will force Windows Explorer to refresh its windows. After
refreshing, you should see the C:\c60001day subdirectory.

Install VAB
37. Choose the Launch VAB for C6000 Installation from the Workshop CD-ROM. (If this screen
doesn’t appear when you place the CD-ROM in your drive, see step 31.)
38. On the VAB installation screen, choose Install VAB.

39. Once VAB installation has begun, it will ask you for a KEY number.
This key should be located on the Workshop files CD-ROM (or CD-ROM jewel case). Each
CD-ROM should have its own KEY number. A couple of points about the VAB CD KEY:
• If you did not receive a KEY number or you cannot find it, please contact Hyperception
and they will provide one via the phone or email. They can be reached at:
Hyperception, Incorporated
Voice: 214-343-8525 … Fax: 214-343-2457
• Each user should have their own KEY number (unless you have purchased a site license
from Hyperception).
• A specific KEY is not tied to the installation CD, rather, once installed it’s tied to a
specific installation on a computer.
40. If you encounter any dialogs that VAB displays, take the default options.
− When asked if changes should be made to the autoexec.bat file, choose “yes”.
− Note, when installing the full version of VAB, you’ll want to choose the appropriate driver –
say ‘C6711 DSK. Using the demonstration version, you only have the choice of the DSK
driver.
41. When all the components of VAB have been installed you will be returned to the main
workshop files CDROM menu. You may now choose Exit.
42. After VAB installation has completed (and you have exited the main installation dialog),
run VAB from the Start menu.
43. When VAB is run for the first time you will be requested to authorize your installation.
• It’s easiest to choose the Authorize via Internet option. If your computer is connected to
the internet, just select the button on the dialog box that appears. This takes you to a
webpage for you to enter your name and address. Upon completion, the webpage
provides your copy of VAB with an authorization number.
• If you do not have internet access, when the authorization screen appears, please call (or
email) Hyperception at the number above. Using the ID number provided in the
Authorization Request dialog, Hyperception will provide you with an Authorization
number.
• Note, should you need to uninstall VAB, you may be asked to unauthorize the software.
This is particularly important if you have purchased the full version. This is easily
accomplished from the Help menu within VAB.
44. Once VAB is running, all workshop software installation has been completed.
Note: When installing VAB on a WinNT machine, only the user performing the install will have the proper setup
(specifically, the toolbars). Therefore, you must install VAB for each NT user to properly setup the registry.
This only presents a problem when an administrator sets up VAB for use by another WinNT user.
To solve this problem, double-click on the *.reg files located in the c:\c60001day\lab7 folder.

Desktop Configuration
Configure CCS Icon
45. Next, let’s modify the desktop icon.
Right-click on the CCS icon on the desktop
and choose Properties.
46. In the CCS icon properties, change the Run line to Maximized.

Configure Windows Explorer

47. Open Windows Explorer.
48. In Windows Explorer, we need to change a couple viewing options. Without this, it’s difficult
to decipher between lab files.
Select View:Folder Options…

On some Windows systems, you may find it at:
Tools:Folder Options…
49. Select the View tab in the Folder Options dialog box:
50. Check the Show all files radio button.

51. Then, uncheck the Hide file extensions for all known file types checkbox.

Test ‘C6000 DSK Installation and Configure CCS

Before you trying running these tests, has the parallel port been properly configured?
• If the DSK was attached to the PC when installing Code Composer Studio, the parallel
port should have been configured.
• If it wasn’t attached, please attach the DSK and configure the parallel port using the
instructions provided in the Appendix. Then come back to this step.
DSK Confidence Test

Here’s a couple notes before you begin the test:
52. Run Confidence Test from the PC Host.
For your convenience, we have created a conftest.bat file in the directory with the other
workshop lab files.
− Navigate to: c:\c60001day\labs\lab2
− Double-click on the batch file: ConfTest.bat
− Close the DOS window when the tests are completed
53. You should see something along these lines …
TMS320C6x11 DSK Confidence Test, Version 1.30, Oct 1999
Copyright (c) 1999 by Texas Instruments Incorporated.
All rights reserved.
Test Run Time: 09:39:39 PM Test Run Date: Dec 14, 1999
USER_SW3=0 USER_SW2=0 USER_SW1=0 Board Rev=1
Command=ISRAM...........................Result=> PASSED!
Command=SDRAM...........................Result=> PASSED!
Command=FLASH...........................Result=> PASSED!
Command=MCBSP...........................Result=> PASSED!
Command=TIMER...........................Result=> PASSED!
Command=QDMA............................Result=> PASSED!
Command=LEDS...Are They Flashing?.......Result=> PASSED!
Command=CODEC..Is Tone/Music Playing?...Result=> PASSED!
TMS320C6211 DSK Confidence Test PASSED!

... No test failures found!
Closing Log File: dsk6xtst.log
** TMS320C6x11 DSK Confidence Test Complete! **
• The SDRAM may take a while due to the large amount of SDRAM on the ‘C6711 DSK.
• The CODEC test performs two operations: 1KHz tone output, and an audio input-to-
output loopback. To hear these tests the speaker and audio source must be connected.
Note: If the DSK fails the Confidence Test, please assure that you have properly connected all wires and that
none of them are loose.
If the wiring is OK, did the POST run when power was applied? Try unplugging and plugging back in
the power jack to test this again?
If all else fails, please ask your TI contact for assistance.

Run/Configure Code Composer Studio

Finally, you need to confirm CCS runs and set/verify three option settings.
• Program load after build
• Choose text-based linker
• Disable debugger’s memory mapping
54. Run Code Composer Studio.
double-click on the CCS desktop icon
Note:
If you see the following dialog:
It usually means that a previous version of CCS wasn’t completely uninstalled. The CCS
uninstall does not always remove all the registry entries. This should only occur once.
Note:
If you see this dialog:
CCS is not able to connect to the DSK. In fact, the Confidence Test you ran earlier also
should have failed. If it did not fail, then either CCSetup needs to be run (see page A2-23), or
CCS must be reinstalled. If both the Confidence Test and CCS connection have failed, then
you most likely are encountering a physical and/or Windows parallel port driver connection
problem.

Set Program Load after Build

55. Open the CCS customize options dialog: Option:Customize…
56. Navigate to the Program Load Options tab and click Load Program After Build.
57. Click OK to save the change and close the Customize dialog.
Choose Text-Based Linker

58. Open the CCS linker selection dialog: Tools:Linker Configuration
59. Select Use the text linker and click OK (as shown below).
60. Close CCS.

Installation Appendix
Configure Code Composer Studio
Code Composer Studio (CCS) can be used with various TI processors – such as the C6000 and
C5000 families – and each of these has various target-boards (simulators, EVMs, DSKs, and
XDS emulators). Code Composer Studio must be properly configured using the CCS_Setup
application.
In this workshop, you should initially configure CCS to use the C6x11 DSK 378 EPP Mode.
Procedure
1. Start the CCS Setup utility using its desktop icon:
Note: Be aware there are two CCS icons, one for setup, the other to start the main CCS
application. You want the Setup CCS C6000 icon.
If you cannot find the desktop icon shortcut, try looking for it under the Windows START
menu (Start→Programs→Texas Instruments→Code Composer Studio 2 (‘C6000)→Setup
Code Composer Studio).
If all else fails, you should be able to find the program itself at: c:\ti\cc\bin\cc_setup.exe

2. When you open CC_Setup you should see a screen similar to this:
Note:If you don’t see the Import Configuration dialog box, you should open it from the menu
using FILE:IMPORT…
Once the Import Configuration dialog box is

open, you can change the CC_Setup default to
force this dialog to open every time you start
CC_Setup. Just check the box in the bottom of the import dialog.

3. Clear the previous configuration.

Before you select a new configuration you should delete the previous configuration. Click the
Clear System Configuration button. CC_Setup will ask if you really want to do this, choose
“Yes” to clear the configuration.
4. Select a new configuration from the list and click “Add to system configuration
button”.
Select the C6x11 DSK 378 EPP Mode configuration as shown below and click Import.
Port 378 is the most commonly used option. The port required will depend upon which port is
enabled and supported on your PC. Please refer to step 1 (page A2-2).
5. Save and Quit the Import Configuration dialog box.


Appendix 3 - Data Converter Plug-in
Introduction
This appendix chapter was added for those specific versions of the one-day workshop which have
analog plug-in cards available. For all others classes, this material provides an interesting follow-
up to earlier discussions.
Module Topics
Appendix 3 - Data Converter Plug-in ................................................................................................... A3-1
Motivation for Data Converter Plug-in.................................................................................................A3-2

How Does TI Help?...............................................................................................................................A3-3
Data Converter CCS Plug-in Tool ........................................................................................................A3-5
Summary..............................................................................................................................................A3-10
Lab.......................................................................................................................................................A3-12
TMS320C6000 One-Day Workshop - Appendix 3 - Data Converter Plug-in A3 - 1

Motivation for Data Converter Plug-in
Motivation for Data Converter Plug-in

Motivation
Remember that picture? Now, what’s needed to get the
values to/from the DSP
Amplitude (memory)?
Need to convert the samples
Data converter must be configured
and started
Need to transfer the samples (I/O)
Interface must be configured
Time (parallel or serial)
x4 x3 x2 x1 x0 Interrupts / DMA must be setup
ADC DAC
In I/O DSP I/O Out
Math
… And Here Are the Drawbacks:

Today's data converters are complex and
need configuration in software e.g. due to:
Selectable input channels (e.g. THS1206)
On-chip filters (e.g. TLV320AIC10)
Digital interface configuration (e.g. THS1206)
Integrated FIFO’s (e.g. THS14F03)
Adjustable gain (e.g. THS1408)
Offset cancellation (e.g. THS1206)
Need to explore the device characteristics
before starting the actual design.
But: most designers need to concentrate on
the algorithms and not on the data converters.
A3 - 2 TMS320C6000 One-Day Workshop - Appendix 3 - Data Converter Plug-in

How Does TI Help?
How Does TI Help?

How Does TI Help You?
TI provides you with a variety of
development support for analog parts:
Data converter evaluation modules
Data converter plug-in (DCP)
Example code
Application reports
Data Converter Evaluation Modules

For most new data converters, TI has
EVMs available at low cost.
Most DAQ EVMs can be plugged
directly on top of the DSP DSKs for
easy use (using the common daughter
board connector).
These modules let you explore the
characteristics of the data converter and
all the options in detail without the need
to build your own hardware.

How Does TI Help?
Data Converter EVM Availability

A to D Converter:
THS1408EVM 14-bit, 8 MSPS ADC Common Connector
THS1206EVM 12-bit, 6-MSPS, 4 S/H, FIFO Common Connector
THS1060EVM 10-bit, 60 MSPS ADC
THS1031EVM 10-bit, 30 MSPS ADC with PGA & clamp
THS0842EVM Dual, 8-bit, 40 MSPS ADC
TLC876EVM 10-bit, 20-MSPS ADC
TLC/TLV5510EVM 8-bit, 20-MSPS ADC
TLC5540EVM 8-bit, 40-MSPS ADC
TLV5535EVM 8-bit, 35-MSPS ADC
TLV5580EVM 8-bit, 80-MSPS ADC
TLC/TLV2543EVM 5V/3V, 12-bit ADC
TLV1544EVM 10-bit ADC with serial control, 4/8 inputs @
TLV1562EVM Programmable Resolution ADC @
TLV1578EVM 10-bit, 8-channels, 1.25-MSPS, parallel ADC Common Connector
TLV1572EVM 10-bit, 1.25-MSPS, 2.7-5.5 V serial ADC
TLV1571EVM 10-bit, 1.25-MSPS, 2.7-5.5 V parallel ADC Common Connector
TLV1570EVM 10-bit, 1.25-MSPS, 2.7-5.5 V serial ADC
TLV571EVM 8-bit, parallel ADC Common Connector
TLV2544EVM 12-bit, 200-KSPS ADC @
TLV2548EVM 12-bit, 200-KSPS ADC @
TLC2558EVM 12-bit, 400-KSPS ADC
Common Connector: EVM plugs directly on the ‘C6711 DSK

@ EVM plugs on the ‘C6711 DSK using an adaptor board
Data Converter EVM Availability

D to A Converter:
THS5671EVM 14-bit,125 MSPS Communication DAC
THS8133EVM Triple, 10-bit, 80 MSPS Video DAC
THS8134EVM Triple, 8-bit, 80 MSPS Video DAC
Codecs:
Codecs:
TLV320AIC10EVM 16-bit, 22 kSPS low-power DSPcodec Common Connector
TLV320AIC27EVM 18-bit, AC97 compliant AudioCodec Common Connector
Special Functions:
MULTI-CNVTR-EVM TLV254x/TLC255x ADC & TLV56xx DAC
Common Connector: EVM plugs directly on the ‘C6711 DSK
@ EVM plugs on the ‘C6711 DSK using an adaptor board

Data Converter CCS Plug-in Tool

Data Converter Support Tool
The data converter support tool is a plug-in in Code
Composer Studio, which lets you configure all the
options of a data converter by a few mouse-clicks:
Automatic creation of C language support
functions for:
Reset of data converter
Initialization (configuration)
Read / write of sample values (single and block)
Special purpose functions (like power-down)
Ease of use through device independent API
Includes full on-line help for reduced
datasheet reading
User Interface: The Converter List
• Lists all supported data

converters
• Shows a short
description of each data
converter
• Lets you add any number
and any combination of
data converters to your
system

User Interface: DSP Tab
• Lets you set the DSP

type
• Lets you set the DSP
speed
• Default values are
derived from the CCS
setup file
• Lists all available DSP
peripherals
User Interface: Converter Tab

• Lets you configure all
converter parameters
• Lets you select the
serial port (if the
converter is a serial
one)
• This McBSP will be
automatically
configured to work with
the converter
• Help is available for
every parameter (no
datasheet reading!)
• Parameter are grouped
logically (and not by
registers)
• No invalid bit
combinations possible!

User Interface: Files Tab
• Lets you set the

directory for the code
• Clicking the “Write
Files” button will
generate the C source
and header files for all
selected data
converters
Created Files
The data converter plug-in will create
the following files and add it to the
project:
One C source file for each type of data
converter (several converters of the same type
will use the same file)
One header file for each data converter
dc_conf.h: Initialization values
tidc_api.c: Common API file for all
converters
tidc_api.h: Header file for tidc_api.c

Data Converter API Overview

The DC API predefines 6 functions:
DC configuration:
TIDCSTATUS dc_configure(void *pDC);
DC power-down/-up:
void dc_power(void *pDC, int bDown);
DC read single word:
long dc_read(void *pDC);
DC write single word:
void dc_write(void *pDC, long lData);
DC read block of words:
void dc_rblock(void *pDC, unsigned int uiAddress, unsigned
long ulCount, void (*callback) (void *);
DC write block of words:
void dc_wblock(void *pDC, unsigned int uiAddress, unsigned
long ulCount, void (*callback) (void *);
Data Converter Object Overview

… and it defines the DC object:
TAIC10 Aic10_1 =
{ &aic1x2x_configure, /* address of configuration function */
&aic1x2x_power, /* address of powerdown function */
&aic1x2x_read, /* address of read function */
&aic1x2x_write, /* address of write function */
&aic1x2x_rblock, /* address of read block function */
&aic1x2x_wblock, /* address of write block function */
0, 0, 0, 0, /* reserved for future use */
&serial0, /* address of the serial port object */
1, /* number of codecs in chain */
ADC1_ID, /* ADC ID */
ADC1_CR1_VALUE, /* values for control registers 1-4 */
ADC1_CR2_VALUE, /* these values are based on the */
ADC1_CR3_VALUE, /* user settings in the plug-in */
ADC1_CR4_VALUE /* and calculated by the tool */
};

Use of the Data Converter Software

The use of the generated software
consists of two simple steps:
First step:
Include the header file for the used data
converter in your source code. E.g. if you use
the TLV320AIC10 (as we will in the lab):
#include "taic10_fn.h“
Second step:
Call the configuration function and pass the
data converter object:
dc_configure (&Aic10_1);
If the data converter is connected to the DSP
using the serial port, the McBSP is
automatically configured to work with the DC.
and you are done

Summary
Summary
Advantages
Ease of use
No need to read software library documentation
Standard graphical user interface (GUI)
Automatic code and data generation
Full on-line help (containing details on the
converters, software and the plug-in)
Ease of learning
Quick way to explore data converter options

Less data sheet reading
Generated software driver fully tested
Source code may be optimized or enhanced
This all leaves more time for the designer to work on his
algorithms instead of poking around with the data
converter
Supported Converters
ADC: DAC
THS1206 TLC5617/18
TLV5617/18
THS10064/12082/
10082 TLV5623/24/25/26
THS14F01/03 TLV5636/37/38
THS1401/03/08 TLV5606/16
TLV1504/08
TLV1514/18 CODECs
TLV320AIC10
TLV2544/48
TLV320AIC11
TLV320AIC27

Summary
Example Code
For all data converters supported by the
data converter plug-in, sample code is
available from the WWW
URL: http://www.ti.com/sc/dcplug-in
You can also download DCP updates

(data converter plug-in updates)

Lab
Lab
This optional lab requires an extra DSK hardware plug-in board which is not part of the standard
C6000 One-Day Workshop.
Lab: Data Converter Plug-In

Application: audio pass through
What you will learn: TLV320AIC10 features, data
converter plug-in, data converter object and API
TLV320AIC10 C6711 DSK

EVM McBSP1
ADC REVT1 dc_read()
midi DRR0
voice
DXR0
DAC XEVT1 dc_write()
Lab: Data Converter Plug-In

Software Flow:
main
Configure AIC10 and McBSP1
Forever Loop
Read data from AIC10
Wait for interrupt
Store it in variable voice
Write data to AIC10

Wait for interrupt
Write contents of voice to McBSP1

TMS320C6000 One-Day Workshop

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TMS320C6000 One-Day Workshop

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TMS320C6000 One-Day Workshop

TMS320C6000 One-Day Workshop

Workshop Materials Include

TMS320C6000 One-Day Workshop - Introduction 1-1

Course Outline ........................................................................................................................................ 1-1

1-2 TMS320C6000 One-Day Workshop - Introduction

8:30 - 9:15 Intro, TI DSP, ‘C6000 Overview

9:15 - 9:45 Tour of the ‘C6711 DSK

9:45 - 10:00 Break

10:00 - 11:30 Using C code with the ‘C6000

11:30 - 12:00 Lunch

12:00 - 1:30 Building a System – Using McBSP, Interrupts

1:30 - 3:00 Building a System – Using EDMA, Cache

3:00 - 3:15 Break

3:15 - 4:30 DSP/BIOS – Real-Time Scheduling and Analysis Tools

4:30 - 4:50 Visualizing your Application (with lab)

4:50 - 5:15 Epilog -- Where to go next?

TMS320C6000 One-Day Workshop - Introduction 1-3

Applications and System Needs

Wireless / Cellular HDD

Ease-of Use Integration

1-4 TMS320C6000 One-Day Workshop - Introduction

Different Needs? Multiple Families!

C5000 ‘C3x ‘C4x ‘C8x

TMS320C6000 One-Day Workshop - Introduction 1-5

What Problem Are We Trying To Solve?

Digital sampling of Most DSP algorithms can be

for (i = 1; i < count; i++){

What does it take to do this fast … and easy?

1-6 TMS320C6000 One-Day Workshop - Introduction

Fast MAC using only C

for (i = 0; i < count; i++){

 Fastest Execution of MACs

How does the ‘C6000 achieve such performance from C?

Sample Compiler Benchmarks

How does the ‘C6000 achieve such performance from C?

TMS320C6000 One-Day Workshop - Introduction 1-7

‘C6000 CPU Architecture Overview

'C6000 Architecture: Built for Speed

A15 B15  Instruction set and CPU

Fastest MAC using Natural C

A0 B0 for (i=0; i < count; i++) {

1-8 TMS320C6000 One-Day Workshop - Introduction

‘C6000 CPU Internal Data Buses

‘C6000 Internal Buses

External Data Addr - T2 x32 B

DMA Addr - Read

Here’s a summary of the families internal data buses:

Device Data Bus Width

TMS320C6000 One-Day Workshop - Introduction 1-9

1 - 10 TMS320C6000 One-Day Workshop - Introduction

‘C6711 Cache Details

‘C6711 Cache Logic

Send Data Copy Data

TMS320C6000 One-Day Workshop - Introduction 1 - 11

External Internal Buses

External Memory Interface (EMIF)

Parallel Peripheral Interface

1 - 12 TMS320C6000 One-Day Workshop - Introduction

General Purpose Input/Output (GPIO)

Multi-Channel Buffered Serial Port (McBSP)

Direct Memory Access (DMA / EDMA)

Turbo Coprocessor (TCP)

Fastest Execution of MACs

A15 B15 Instruction set and CPU

Stored in FLASH memory

1. Unload dsk6xinit.gel Run from CCS GEL menu