Lecture - Synchronous Moore Machine. Transient and Output Functions

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Sequential finite state machine

Synchronous Moore machine.


Transient and output functions.

Ing. Michal Lucki, PhD.


Czech Technical University in Prague
Faculty of Electrical Engineering
Department of Telecommunication

Ing. Michal Lucki, PhD. 1


Sequential finite state machine
• In combinational logics, a current state of outputs depends only on current values at the inputs
• In sequential logics, different output values can be assigned for the same inputs. This is because a
current state of outputs depends not only on current inputs, but also on the past value or on the
sequence of past input values.
• a finite number of states is determined by a current internal state and values at the inputs, is
known as Mealy machine
• In a finite state Moore machine, inputs are used to update the internal state and output are
determined based on the updated internal state.
• Combinational logic circuit
Output = f (inputs)
• Sequential Moore machine
Output = f (internal memory)
Internal memory = f (inputs)
• Sequential Mealy machine
Output = f(internal memory, inputs)
Internal memory = f (inputs)
Ing. Michal Lucki, PhD. 2
The following practical design is a synchronous,
sequential finite-state Moore machine

Ing. Michal Lucki, PhD. 3


Case study 1 - design of a Moore machine
Design a synchronous sequential machine for a door lock (Fig.
1.), which unlocks it by using two buttons: a and b. When a
button is pressed or hold, a variable associated with it is logical
1. Revealed button means logical 0.
• The right sequence to open the lock is 00, 10, 11.The
unlocking takes place while pressing last right combination
(not after it so it doesn’t wait for revealing the buttons).
• The wrong combination pressed at the keyboard starts an
alert and the lock remains locked.
• Once it is opened, any combination of buttons does not
affect the lock, it remains unlocked (for simplicity and good
readability of solution).

A door lock with two keys a and b to


unlock and clr to clear
Ing. Michal Lucki, PhD. 4
Case study 1 - design of a Moore machine
There are two input variables a and b corresponding to
two buttons at the keyboard.
Internal state: A
The transitions A→A’ required to unlock: 00,10,11.
The outputs are Y1 and Y2:
1, 𝑢𝑛𝑙𝑜𝑐𝑘 𝑖𝑡
𝑌1 = ቊ
0, 𝑙𝑜𝑐𝑘𝑒𝑑
1, 𝑎𝑙𝑒𝑟𝑡
𝑌2 = ቊ
0, 𝑛𝑜 𝑎𝑙𝑒𝑟𝑡

Commercially available locks have more keys and require longer sequences, our goal here is to
display the general procedure, avoid huge number of tables and obtain a readable scheme.
Ing. Michal Lucki, PhD. 5
State diagram
There are two input variables a and b corresponding to
two buttons at the keyboard.
Internal state: A
The transitions A→A’ required to unlock: 00,10,11.
The outputs are Y1 and Y2:
1, 𝑢𝑛𝑙𝑜𝑐𝑘 𝑖𝑡
𝑌1 = ቊ
0, 𝑙𝑜𝑐𝑘𝑒𝑑
1, 𝑎𝑙𝑒𝑟𝑡
𝑌2 = ቊ
0, 𝑛𝑜 𝑎𝑙𝑒𝑟𝑡

State diagram of a Moore machine, where outputs are the


functions of internal state.
Ing. Michal Lucki, PhD. 6
Transition table
ab
A 00 01 11 10 Y1Y2

1 1 4 4 2 00

2 4 4 3 2 00

3 3 3 3 3 10

4 4 4 4 4 01

A’
Transition table of a Moore machine containing
information on internal states and the outputs

Ing. Michal Lucki, PhD. 7


Finding redundant states (optional)
ab
A 00 01 11 10 Y1Y2
1,4
1 1 4 4 2 00 2
3,4

2 4 4 3 2 00 3 X X

3 3 3 3 3 10 4 X X X

4 4 4 4 4 01 1 2 3

A’
Triangle table showing that there
are no non-contradicting states.

There were no redundant states in this particular design


Ing. Michal Lucki, PhD. 8
Encoding Encoded transition table containing information
about Q1→Q1’ and Q2→Q2’ transitions.
ab
A 00 01 11 10 Y1Y2 ab
Q1Q2 00 01 11 10 Y1Y2
1 1 4 4 2 00 00 00 10 10 01 00
1 → 00
2 4 4 3 2 00
2 → 01 01 10 10 11 01 00

3 3 3 3 3 10 3 → 11
11 11 11 11 11 10
4 → 10
4 4 4 4 4 01 10 10 10 10 10 01
A’ Q1’Q2’
Note that it is not the conversion from decimal to binary values. One can name the states using any symbols instead
of decimal numbers, and assign them any binary string. However, to make further processing easier, it is
recommended to assign code words of a Gray code to avoid swapping rows in future Karnaugh maps. Then, the
particular rows in a transition table will become neighbor rows in Karnaugh maps.
Ing. Michal Lucki, PhD. 9
Selection of HW components: D-type flip-flops
We will use two D-type flip-flops, i.e. we can use 7474 TTL components.

Transitions of a D-type
flip-flop (general).

Ing. Michal Lucki, PhD. 10


Selection of HW components: D-type flip-flops
What value must be sent to D so that transition from Q to Q’ is observed?
ab ab ab
00 01 11 10 Y1Y2 Q1Q2 00 01 11 10
Q1Q2 Q1Q2 00 01 11 10
00 00 10 10 01 00 00 0 1 1 0 00 0 0 0 1

01 10 10 11 01 00 01 1 1 1 0 01 0 0 1 1

11 11 11 11 11 10
11 1 1 1 1 11 1 1 1 1

10 1 1 1 1 10 0 0 0 0
10 10 10 10 10 01
D1 D2
Q1’Q2’ D1 D2 𝐷1 = 𝑏 ∣ 𝑄1 ∣ 𝑎ത 𝑄2 ത
𝐷2 = 𝑄1 𝑄2 ∣ 𝑎 𝑄2 ∣ 𝑎 𝑏𝑄1
Note that for a D-type flip-flop, D is
Karnaugh maps for D1 and D2 function
identical to Q’ value.
implemented by two flip-flops.
Ing. Michal Lucki, PhD. 11
Outputs
In synchronous designs, outputs depend only on the memory, not inputs.
Inputs go first to the memory and then at the next clock, the output is updated
based on the memory (flip-flops).
ab
Q1Q2 00 01 11 10 Y1Y2
Q1 Q1
Q2 0 1 0 1
00 00 10 10 01 00 Q2
0 0 0 0 0 1
Outputs do not
01 10 10 11 01 00
depend on a , b
1 0 1 1 0 0
11 11 11 11 11 10
Y1 Y2
10 10 10 10 10 01
𝑌1 = 𝑄1 𝑄2 𝑌2 = 𝑄1 𝑄2
Q1’Q2’
Note that outputs are functions of Functions of outputs of the lock.
internal memory ONLY (not the
function of inputs) Ing. Michal Lucki, PhD. 12
Final scheme of a machine
a b CLK CLR

CLR

& CLK Q1

D1 Q1 y1
&

CLR
y2
& &
CLK Q2

& D2 Q2

&

Synchronous sequential logical circuit for the designed finite state machine
Ing. Michal Lucki, PhD. 13
Case study 2 - design of a Moore machine
• Verbal description

Three containers C1, C2, and C3, as displayed in the following figure,
must be supplemented by some material. The containers are equipped
with sensors x1, x2, x3, indicating the level of material in particular
containers. Logical “1” signalizes the low amount of material and the
demand for service. Design a circuit controlling the trolley distributing
material to the boxes
Ing. Michal Lucki, PhD. 14
State diagram

Ing. Michal Lucki, PhD. 15


Transition table (sequences)

Ing. Michal Lucki, PhD. 16


Encoding
0 →00, 1→10, 2→01, 3→11

Ing. Michal Lucki, PhD. 17


Selection of HW components: D-type flip-flops
What value must be sent to D so that transition from Q to Q’ is observed?

𝐷1 = 𝑋2𝑋3 ∣ 𝑄1𝑄2𝑋3 ∣ 𝑄2𝑋1 ∣ 𝑄1𝑋1 ∣ 𝑋1𝑋2

Ing. Michal Lucki, PhD. 18


Selection of HW components: D-type flip-flops
What value must be sent to D so that transition from Q to Q’ is observed?

𝐷2 = 𝑄1𝑄2𝑋2𝑋3 ∣ 𝑄1𝑄2𝑋3 ∣ 𝑄1𝑄2𝑋2 ∣ 𝑋1𝑋3 ∣ 𝑋1𝑋2

Ing. Michal Lucki, PhD. 19


Outputs

𝑌1 = 𝑄1𝑄2
𝑌2 = 𝑄1𝑄2
𝑌3 = 𝑄1𝑄2

Ing. Michal Lucki, PhD. 20


Sample implementation

Ing. Michal Lucki, PhD. 21


Solution with JK flip-flop

𝐽1 = 𝑄2𝑋3 ∣ 𝑋2𝑋3 ∣ 𝑋1

𝐾1 = 𝑋1𝑋3 ∣ 𝑄2𝑋2 ∣ 𝑋1𝑋2


Ing. Michal Lucki, PhD. 22
Solution with JK flip-flop

𝐽2 = 𝑄1𝑋3 ∣ 𝑄1𝑋2 ∣ 𝑋1𝑋3 ∣ 𝑋1𝑋2

𝐾2 = 𝑋2𝑋3 ∣ 𝑋1𝑋3 ∣ 𝑄1𝑋1 ∣ 𝑋1𝑋2


The outputs Y1, Y2, and Y3 are obviously the same, since they do not depend on D, J, K, but on Qs
Ing. Michal Lucki, PhD. 23
Thank you for your attention

Ing. Michal Lucki, PhD. 24

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