Computer Organization and

Architecture
(INSY2041)

Chapter 5
Interfacing and communication

Compiled by Fasil Y.
 Contents
5.1 I/O fundamentals: handshaking, buffering, programmed I/O,
interrupt-driven I/O
5.2 Interrupt structures: vectored and prioritized, interrupt
acknowledgment
5.3 External storage, physical organization, and drives
5.4 Buses: bus protocols, arbitration, direct-memory access (DMA)
5.5 RAID architectures
I/O Fundamentals

• When processing time exceeds user “think time,” users will complain
that the computer is “slow.” Sometimes this slowness can have a
substantial productivity impact, measured in hard currency.
• More often than not, the root cause of the problem is not in the
processor or the memory but in how the system processes its input
and output (I/O).
I/O Structures
• I/O structure is a subsystem of components that moves coded data
between external devices and a host system, consisting of a CPU and
main memory.
• I/O subsystems include, but are not limited to:
• Blocks of main memory that are devoted to I/O functions
• Buses that provide the means of moving data into and out of the system
• Control modules in the host and in peripheral devices
• Interfaces to external components such as keyboards and disks
• Cabling or communications links between the host system and its peripherals
A Model Input Output Configuration
Handshaking
• The exact form and meaning of the signals exchanged between a
sender and a receiver is called a protocol. Protocols comprise
command signals, such as “Printer reset”; status signals, such as
“Tape ready”; or data-passing signals, such as “Here are the bytes you
requested.” In most data-exchanging protocols, the receiver must
acknowledge the commands and data sent to it or indicate that it is
ready to receive data. This type of protocol exchange is called a
handshake.
Buffering
• The process of temporarily storing data that is passing between a
processor and a peripheral. The usual purpose is to smooth out the
difference in rates at which the two devices can handle data.
• Typically, the data is stored in a buffer as it is retrieved from an input
device (such as a microphone) or just before it is sent to an output
device (such as speakers). However, a buffer may be used when
moving data between processes within a computer.
 Input Output control methods
• Computer systems employ any of four general I/O control methods.
These methods are programmed I/O, interrupt-driven I/O, direct
memory access, and channel-attached I/O.
• Although one method isn’t necessarily better than another, the
manner in which a computer controls its I/O greatly influences overall
system design and performance.
• The objective is to know when the I/O method employed by a
particular computer architecture is appropriate to how the system
will be used.
 Programmed I/O
• Systems using programmed I/O devote at least one register for the
exclusive use of each I/O device. The CPU continually monitors each
register, waiting for data to arrive. This is called polling.
• Thus, programmed I/O is sometimes referred to as polled I/O. Once
the CPU detects a “data ready” condition, it acts according to
instructions programmed for that particular register.
• The benefit of using this approach is that we have programmatic
control over the behavior of each device.
• It doesn’t do any useful work until there is I/O to process. Owing to
these limitations, programmed I/O is best suited for special-purpose
systems such as automated teller machines and systems that control
or monitor environmental events.
 Interrupt-driven I/O
• Interrupt-driven I/O can be thought of as the converse of
programmed I/O. Instead of the CPU continually asking its attached
devices whether they have any input, the devices tell the CPU when
they have data to send.
• The CPU proceeds with other tasks until a device requesting service
interrupts it. Interrupts are usually signaled with a bit in the CPU flags
register called an interrupt flag.
• Once the interrupt flag is set, the operating system interrupts
whatever program is currently executing, saving that program’s state
and variable information. The system then fetches the address vector
that points to the address of the I/O service routine.
• After the CPU has completed servicing the I/O, it restores the
information it saved from the program that was running when the
interrupt occurred, and the program execution resumes.
 Interrupt structures: vectored and prioritized

• While the CPU is executing a program, an interrupt breaks the normal

sequence of execution of instructions, diverts its execution to some
other program called “Interrupt Service Routine (ISR)”.
• Interrupt structure refers to the precedence of interrupts. Hardware
events that cause interrupts are assigned CPU interrupt levels.
• The CPU can disable interrupts of a certain level and below, thus
allowing an important interrupt to preempt an interrupt of lower
priority, but not vice-versa.
 Vectored and Prioritized
• A vectored interrupt system employs separate connections for each
device so that the computer can give automatic resolution. You can
recognize a vectored system because each device has a separate
interrupt vector address.
• In the prioritized interrupt system register stores priorities and
prevents interrupts with lower priority interrupts, but allows higher
priority interrupts.
External storage, physical organization, and drives
• Computers have a set of internal memory mechanisms
• Registers, RAM, etc
• Computers also need to interact with peripherals
• Some of these are storage devices;
• A.k.a external memory.

• How does such an external memory work?

• How is such an external memory organized?
 External memory
• Some examples of external memory include:
• Magnetic disks;
• Redundant Array of Independent Disks (RAID);
• Solid State Drives (SSD);
• Optical Memory;
• Magnetic tapes.
• Lets take a closer look at some of these.

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Magnetic Hard Disks

Source: PC Guide <http://www.pcguide.com/ref/hdd/op/index-c.html>

 Magnetic Disk storage technology
◼ Disks are used to store data, applications software and operating systems
software.
• Data represented as magnetic spots
• Magnetized spot = 1
• Absence of a magnetized spot = 0
• Read
• Converts the magnetized data to electrical impulses
• Write
• Converts electrical impulses to magnetized spots on disk

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Magnetic Disk storage technology

◼ Disk storage systems work on magnetic principles.

◼ In magnetism, there are two opposing polarities called poles, the north and
the South pole. Opposite polarity attracts, whilst like polarity repels.
◼ In computers, data is represented in binary format.
◼ Binary data has two states, a 1 or a 0. It just so happens that magnetism also
has two states, north and south, so in effect, magnetism is a good way of
storing data also
◼ A rotating disk is coated with very fine ferrous oxide particles, each of which act and behave like
little magnets
◼ All that is required now is a mechanism of converting the digital data of 0's and 1's into magnetic
states of north and south poles.
◼ In a storage disk drive, the mechanism which performs the function of converting the digital 0's
and 1's into magnetic states which can magnetize the surface areas of the disk is called the write
head. A similar head, called the read head, is used to detect the magnetic states on the surface
of the disk and convert them back into digital states

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Computing Disk Capacity
◼ Capacity = (# bytes/sector) x (avg. # sectors/track) x (# tracks/surface) x (# surfaces/platter)
x (# platters/disk)
◼ Example:
◼ 512 bytes/sector
◼ 300 sectors/track (on average)
◼ 20,000 tracks/surface
◼ 2 surfaces/platter
◼ 5 platters/disk

◼ Capacity = 512 x 300 x 20000 x 2 x 5

= 30,720,000,000
= 30.72 GB

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Disk Operation (Single-Platter View)

The disk surface

spins at a fixed The read/write head
rotational is attached to the end
◼ rate of the arm and flies over
the disk surface on
a thin cushion of air.

spindle
spindle
spindle
spindle

By moving radially, the arm

can position the read/write
head over any track.

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Optical Disks
• Optical disks
• CD ROM = Compact Disk Read Only Memory, is an
• ideal device for storing large quantities of data and information such
as large software packages.
• The CD drive uses laser technology to read the disk contents and
therefore both access and transfer are extremely fast.
• With a typical capacity of 600 Mb they are used for software supply,
reference material such as Encyclopaedias and games.

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Optical disks
• CD ROM as the name suggests is Read Only
• Writable CDs allow for large amounts of data to be
• written to a CD as well as read from it. They are
• sometimes know as CD-RW.
• For these, a CD drive is needed which includes write heads as well as
read heads

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Optical disks
• DVD or Digital Versatile Disk is a higher capacity version of a CD and
DVD drives have a higher transfer rate.
• DVD disks typically holds 4.7 Gbytes of data
• DVD ROM
• Digital Video Disk which is read only.
• DVD-R
• Digital Video Disk which can be written to one time. It then becomes read
only.
• DVD-RW
• Digital Video Disk which can be rewritten to.

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Solid State Drives (SSD)
• SSD Is a solid-state storage device that uses integrated
circuit assemblies as memory to store data persistently.
• SSD is made with solid state components:
• Use of flash memory (instead of magnetic disk option)
• In recent years the cost and performance of flash memory has evolved.
• Increased use of solid state drives (SSDs) to complement or even
replace hard disk drives (HDDs);
SSD Vs HDD
• SSDs have the following advantages over HDDs (1/2):
• Lower access times and latency rates. Why?
• Due to having no mechanical parts;
• High-performance input/output operations per second. Why?
• Significantly increases performance I/O subsystems.
• Again due to having no mechanical parts;
• Durability. Why?
• Less susceptible to physical shock and vibration;
• Again due to having no mechanical parts;
• Disadvantage of SSD
• Cost per bit is high
• Capacity is low
Buses: bus protocols, arbitration, direct-memory access (DMA)
• A bus is a communication pathway connecting two or more devices. A
key characteristic of a bus is that it is a shared transmission medium.
• If two devices transmit during the same time period, their signals will
overlap and become garbled, Thus access to this shared resource
must be controlled.
• Typically, a bus consists of multiple communication pathways, or
lines. Each line is capable of transmitting signals representing binary 1
and binary 0. Over time, a sequence of binary digits can be
transmitted across a single line. Taken together, several lines of a bus
can be used to transmit binary digits simultaneously (in parallel). For
example, an 8-bit unit of data can be transmitted over eight bus lines.
System Bus
• Computer systems contain a number of different buses that provide
pathways between components at various levels of the computer
system hierarchy.
• A bus that connects major computer components (processor,
memory, I/O) is called a system bus.
• A system bus consists, typically, of from about fifty to hundreds of
separate lines. Each line is assigned a particular meaning or function.
Although there are many different bus designs, on any bus the lines
can be classified into three functional groups data, address, and
control lines. In addition, there may be power distribution lines that
supply power to the attached modules.
High-Level View of a System Bus
Data Bus

• Carries data
• Remember that there is no difference between “data” and “instruction” at
this level
• Width is a key determinant of performance
• 8, 16, 32, 64 bit
• What if the data bus is 8 bits wide but instructions are 16 bits long?
• What if the data bus is 64 bits wide but instructions are 16 bits long?
Address bus
• Identify the source or destination of data
• In general, the address specifies a specific memory address or a specific I/O port
• e.g. CPU needs to read an instruction (data) from a given location in memory
• Bus width determines maximum memory capacity of system
• 8086 has 20 bit address bus but 16 bit word size for 64k directly addressable address space
• But it could address up to 1MB using a segmented memory model
• RAM: 0 – BFFFF, ROM: C0000 - FFFFF
• DOS only allowed first 640K to be used, remaining memory for BIOS, hardware controllers.
Needed High-Memory Manager to “break the 640K barrier”
 Example
• Assume we have 1024 locations and 8 bits per location
• Address Lines: Assuming that number of address lines (address bits) is n,
how can we find n? If n=1, you can only address 2 locations (0 and 1). If
n=2, you can address 4 locations (0, 1, 2, and 3). As you can see, number of
addressable locations = 2^n.
Given that number of addressable locations = 1024, then 1024=2^n
This means that n=log(1024) to the base 2.
Thus, n=10.
• Data Lines: You have 8 bits for every location, therefore your memory
needs a data bus with 8 lines. Every time you read a location (by loading its
address on the address bus), the 8 bits that are stored at that location are
loaded (by the memory chip) on the 8-line data bus.
• Memory size: As obvious, your memory has 1024*8 bits (8192 bits). Or
simply, 1024 bytes
Control Bus
❑Control and timing information
• Determines what modules can use the data and address lines
• If a module wants to send data, it must (1) obtain permission to use the bus, and (2) transfer
data – which might be a request for another module to send data
❑Typical control lines
• Memory read
• Memory write
• I/O read
• I/O write
• Interrupt request
• Interrupt ACK
• Bus Request
• Bus Grant
• Clock signals
Direct Memory Access
• Direct memory access (DMA) is a feature of computer systems that
allows certain hardware subsystems to access main system
memory(random-access memory), independent of the central
processing unit (CPU).
• Without DMA, when the CPU is using programmed input/output, it is
typically fully occupied for the entire duration of the read or write
operation, and is thus unavailable to perform other work.
• With DMA, the CPU first initiates the transfer, then it does other
operations while the transfer is in progress, and it finally receives
an interrupt from the DMA controller when the operation is done.
Direct Memory Access
Bus Arbitration
❑More than one module may want to control the bus
• e.g. I/O module may need to send data to memory and to the CPU
❑But only one module may control bus at one time
• Arbitration decides who gets to use the bus
• Arbitration must be fast or I/O devices might lose data
❑Arbitration may be centralized or distributed
Arbitration Types
• Centralized Arbitration
• Single hardware device is responsible for allocating bus access
• Bus Controller
• Arbiter
• May be part of CPU or separate
• Distributed Arbitration
• No single arbiter
• Each module may claim the bus
• Proper control logic on all modules so they behave to share the bus
 RAID

• Redundant Array of Inexpensive Disks

• Basic idea is to connect multiple disks together to provide
• large storage capacity
• faster access to reading data
• redundant data
• Many different levels of RAID systems
• differing levels of redundancy, error checking, capacity, and cost
 Instruction pipelining
• Instruction pipelining is a technique used in the design of
modern microprocessors, microcontrollers and CPUs to increase
their instruction throughput (the number of instructions that can be
executed in a unit of time).
• The main idea is to divide (termed "split") the processing of
a CPU instruction, as defined by the instruction microcode, into a
series of independent steps of micro-operations (also called
"microinstructions", "micro-op" or "µop"), with storage at the end of
each step.
• This allows the CPUs control logic to handle instructions at the
processing rate of the slowest step, which is much faster than the
time needed to process the instruction as a single step.
 Instruction pipelining
• Pipelining does not completely remove idle time in a pipelined CPU,
but making CPU modules work in parallel increases instruction
throughput.
 Introduction to instruction-level parallelism
• Instruction-level parallelism (ILP) is a measure of how many of
the instructions in a computer program can be executed
simultaneously.
• There are two approaches to instruction level parallelism:
• Hardware
• Software
• Hardware level works upon dynamic parallelism, whereas the
software level works on static parallelism.
• Dynamic parallelism means the processor decides at run time which
instructions to execute in parallel, whereas static parallelism means
the compiler decides which instructions to execute in parallel.
• The Pentium processor works on the dynamic sequence of parallel
execution, but the Itanium processor works on the static level
parallelism.