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PLC Logic Devices
PLC Logic Devices
PLC Logic Devices
AND gate
Select or drag and drop the AND block from the bit logic operations then write the input
address
.
Select the OR block from the bit logic operations then write the input address
It is just a SR flip flop where the Set and Reset blocks are integrated in the same block.
The dominant signal will be the reset signal.
S R Output
0 0 0
1 0 1
0 0 1
0 1 0
0 0 0
1 1 0
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It is the same function like the SR block except in the case where both signals are 1, the
dominant is the set signal.
R S Output
0 0 0
1 0 0
0 0 0
0 1 1
0 0 1
1 1 1
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When the input signal value becomes 1 it sets the value signal of the output becomes 1,
and remains 1 until it is reset.
Input (I) Output (Q)
0 0
1 1
0 0
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When the input signal becomes 1, the output signal value will be 0.
Assume that the output signal value is 1.
Input (I) Output (Q)
0 1
1 0
0 0
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When there is a positive edge at the input signal, the timer output delays for a
predefined value then it will copy the remaining input signal.
The on delay timer can be selected from Timer operations folder (Sematic Timers) [SD
timer]
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When there is a positive edge at the input signal, the timer output will be one, after the
negative edge of the input signal; the output will remain one for a predefined signal.
The OFF delay timer can be selected from Timer operations folder (Simatic Timers) [SF
timer]
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It is the same as the on delay timer except that it needs a separate reset signal.
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It is used to compare between 2 values; the first one will be the counter value which is
saved in memory word MWn, the second one is the integer value to be compared with.
Depending on the condition the output will be either zero or one.
Select the required condition for comparison and the type of the variable for
example “integer number” as shown below.
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Symbol Condition
> Greater than
== Equal
<> Not Equal
< Less than
>= Greater than or equal
<= Less than or equal
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The same concept as the count up except that it increment down by 1, the least value
for the counter is 0. So the counter value will need to be initiated by a number to start
counting down from it.
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The counter up down, is counting up and down at the same time depending on the
signals CU & CD.
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When there is a positive edge at the input signal, the output signal will be 1 for a
predefined time value.
The extended timer can be selected from Timer operations folder (Simatic Timers) [SE
timer]
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