Contents

Table of Figure ........................................................................................................................................ 3

TASK_01: ................................................................................................................................................. 4
a. Target DC operating point (all voltages and currents) .................................................................... 4
b. Device widths and lengths .............................................................................................................. 5
c. Rz and Cc values for compensation................................................................................................. 9
d. DC gain from small signal parameters ............................................................................................ 9
e. Approximate position of poles from small signal parameters ...................................................... 10
TASK_02: ............................................................................................................................................... 10
a. DC operating point (annotated schematic showing voltages and currents) ................................ 10
b. Final device widths, lengths, Rz and Cc values ............................................................................. 11
Test bench for AC Simulations: ......................................................................................................... 12
c. Gain and Phase vs frequency ........................................................................................................ 12
Test bench for Transient Simulations: .............................................................................................. 13
Output Swing .................................................................................................................................... 13
TASK_03: ............................................................................................................................................... 14
TASK_04: ............................................................................................................................................... 14
Table of Figure
Figure 1: DC operating point (annotated schematic showing voltages and currents) ......................... 10
Figure 2: DC operating point (annotated schematic showing gm ) ...................................................... 11
Figure 3:Final device widths, lengths, Rz and Cc values ....................................................................... 11
Figure 4:Test bench for AC Simulations: ............................................................................................... 12
Figure 5:Gain and Phase vs frequency .................................................................................................. 12
Figure 6:Test bench for Transient Simulations ..................................................................................... 13
Figure 7:Maximum output swing .......................................................................................................... 13
Figure 8:100 Ohm resistor in parallel with load capacitance both connected to 1.25V ...................... 14
Figure 9: Gain and Phase vs Frequency ................................................................................................ 14
TASK_01:
Deliverables: 1. Complete hand calculations showing

a. Target DC operating point (all voltages and currents)

b. Device widths and lengths
c. Rz and Cc values for compensation
d. DC gain from small signal parameters
e. Approximate position of poles from small signal parameters

Sizing of M16:
Rz> =10 KΩ
𝐼𝑑
𝑟𝑑𝑠 =
𝑉𝑑𝑠
𝐼𝑑
𝑟𝑑𝑠 =
𝐾 ′ (𝑉𝑔𝑠 − 𝑉𝑡ℎ)2
𝑊
𝐾 ′ = 𝑢𝑝 𝐶𝑜𝑥 ( )
𝐿
From above formula
𝑊 6𝑢
=( )
𝐿 600𝑛

TASK_02:
2. For your optimized design show Spectre (Spice) plots of

a. DC operating point (annotated schematic showing voltages and currents)

Figure 1: DC operating point (annotated schematic showing voltages and currents)

 Figure 2: DC operating point (annotated schematic showing gm )

b. Final device widths, lengths, Rz and Cc values

Figure 3:Final device widths, lengths, Rz and Cc values

Test bench for AC Simulations:

Figure 4:Test bench for AC Simulations:

c. Gain and Phase vs frequency

Figure 5:Gain and Phase vs frequency

From the graph you can see that,

𝑃ℎ𝑎𝑠𝑒 𝑀𝑎𝑟𝑔𝑖𝑛 => 60𝑜

𝐺𝑎𝑖𝑛 𝑀𝑎𝑟𝑔𝑖𝑛 = 76.026 𝑑𝐵
Test bench for Transient Simulations:

Figure 6:Test bench for Transient Simulations

Output Swing

Figure 7:Maximum output swing

TASK_03:
3. Discuss how your final design differed from your initial hand calculations. That is, what did you
change to achieve better performance?

Ans: In our hand calculations we always try to cater first order dependencies. And in most of the
cases we ignore second order dependencies while calculating the mathematical derivations. And
modeling of transistors by foundry in PDK matter. Mature foundries have accurate devices models.

TASK_04:
4. Finally, try driving a 100 Ohm resistor in parallel with your load capacitance both connected to
1.25V. Plot gain and phase vs. frequency and comment.

Figure 8:100 Ohm resistor in parallel with load capacitance both connected to 1.25V

Figure 9: Gain and Phase vs Frequency

While connecting the low resistance path in parallel with load capacitance. Current will divide in two
paths. And gain of the second stage will decrease as current following through resistive path is higher.
That’s why gain is less. If we want to achieve high gain resistive load should be of large value.