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DFT 3
DFT 3
rated value. An improperly configured overclocking can mess up with timing metrics
and cause instability. Prolonged overclocking would overheat and stress out your
system to shorten the lifespan of your computer. This may cause intermittent faults
in the chip and random crashes in the future. Adding to this, it may void your
warranty too. This example is just one high-level explanation of how a fault may
occur in real life.
The point is, you can even generate a fault on your own. A chip can’t ever be made
resistant to faults; they are always bound to occur. So, what are we trying to
achieve? Testing a device increases our confidence. By testing a chip, vendors try
to minimize the possibility of future errors and failures.
To ensure the highest quality of chips, there is also an auxiliary process involved
in the chip-design process called Verification.
Verification vs Testing
What is the difference between Verification and Testing?
Verification proves the correctness and logical functionality of the design pre-
fabrication. The process is done after the RTL (Register Transfer Logic) design is
coded with hardware description languages like VHDL or Verilog. It is done using a
testbench in a high-level language. This is performed only once before the actual
manufacturing of chip. In industry, this is done using formal verification
processes like UVM (Universal Verification Methodology) using System Verilog.
Verification is a vast topic on its own and we will cover it in this VLSI track and
link it here soon.