This article has been accepted for publication in a future issue of this journal, but has not been
fully edited. Content may change prior to final publication. Citation information: DOI 10.1109/TIE.2018.2860550, IEEE
Transactions on Industrial Electronics
IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS
A Single Switch Quadratic Boost High Step up
DC-DC Converter
Yijie Wang, Senior Member, Yuping Qiu, Qing Bian, Student Member, IEEE, Yueshi Guan,
Student Member, IEEE，Dianguo Xu, Fellow, IEEE
Abstract—In this paper, a high step up converter
consisting of an integrated quadratic-boost converter and
a voltage doubler is proposed. The integration of the
quadratic-boost converter makes the system easier to lift
up its voltage gain through slightly increasing the duty
ratio of the single switch. The voltage doubler further
increases the voltage gain of the system as the turn ratio
rises. The voltage stresses on the switch and the diodes
are decreased for such cascaded topology. Different
operation modes are analyzed and mathematical analysis
of the converter is presented in detail. The leakage
inductance contributes to realizing zero current switching
(ZCS) of the diodes in the second boost stage and the
doubler and the energy can be recycled to the load. A 38W
prototype is built to work as a vehicle LED driver.
Experiments are conducted to verify the advantages of the
proposed converter and the efficiency is 90% at the
nominal operating point.
Index Terms—high voltage gain, integrated
quadratic-boost converter, single switch, voltage doubler,
low stresses, zero current switching (ZCS)
I. INTRODUCTION
I n recent years, high voltage gain DC-DC converters have
attracted much attention for their applications in renewable
and clean energy resources such as PV modules[1] - [6], wind
power as well as other fields like rechargeable batteries [7] -
[10], uninterruptible power supply system, vehicle power
supply and fuel cells [11] - [20]. In practical applications, the
former stage of PV inverter and LEDs of automotive headlight
both need high output voltage [21] - [27]. These applications
enable the utilization of the energy stored in such low voltage
micro-sources.
Although conventional boost converters can easily step up
Manuscript received Jan. 30, 2018; revised May 11, 2018 and Jun.
12, 2018; accepted Jul. 14, 2018. This research was supported in part
by the National Natural Science Foundation of China under Grant
51777038, in part by the National Key R&D Program of China under
Grant 2016YFE0102800, in part by the Natural Science Foundation of
Heilongjiang Province under Grant E2015009, and in part by the Lite-On
Power Electronics Technology Research Fund.
Yijie Wang,Yuping Qiu, Qing Bian, Yueshi Guan and Dianguo Xu are
with school of electrical engineering and automation, Harbin Institute of
Technology, Harbin, China. (e-mail: wangyijie@hit.edu.cn,
810799671@qq.com, 959411403@qq.com, hitguanyueshi@sina.com,
xudiang@hit.edu.cn).
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voltage through increasing the duty ratio of the switch, they can
only fulfill the requirements basically due to their high voltage
stress and high conduction losses. In order to alleviate these
problems, many new topologies derived from conventional
boost converters introduce transformers or coupled inductors to
further improve the voltage gain without operating at extremely
high duty ratio [7] - [14]. In these converters, increasing the
turn ratio of the transformer or coupled inductors can further
step up the voltage gain. Since the energy stores in the primary
leakage inductance cannot be transformed to the secondary side
of the transformer, it needs to be released by the semiconductor
devices, causing undesirable voltage spikes. To solve this
problem, clamp circuits are usually inserted to suppress the
spikes at different positions according to the requirement. And
the clamp circuits can be combined with the voltage lift circuits
to further increase the gain [7] - [13]. Some active clamp
circuits may contribute to realizing the zero voltage switching
(ZVS) of the main switch, but at the same time they will add
another auxiliary switch to the topology [7] - [10]. These
topologies inserting clamp circuits may have disadvantages like
high cost, large circulating current or even impaired system
efficiency. Besides voltage spikes, the leakage inductance of
the transformer may even induce energy losses and then
decrease the system efficiency. In [15], a simple and compact
coupled-inductor boost converter combining the flyback
converter is proposed. The main advantage of the circuit is that
the leakage energy can be recycled to the output. For such
flyback converter as well as most of the converters utilizing
clamp circuits, the voltage gain increment brought by adding
the turn ratio of the transformer is achieved at a discount of duty
cycle. Improvements on such boost-flyback converters focus
on the secondary winding of the transformer, in which case
full-bridge rectifier or half-wave voltage multiplier as well as
other multipliers are applied to further increase the voltage gain
of the converters [16] - [19]. For high voltage gain converters,
multiple winding coupled inductors or transformers are also
introduced to realize the high voltage conversion ratio. These
converters feature low distributed voltage stresses and low
input current ripples as well as high efficiency. Some may even
double the switching frequency and then decrease the size of
the passive components if two converters are interleaved in
parallel. To reduce the utilized components count, clamp
circuits or voltage multipliers are usually shared in such
converters [20] - [24]. Generally speaking, such converters are
more complex and the volume of the magnetic cores are larger.
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Besides boost converters, sepic converters are also introduced DO2

Lin
to be combined with boost converters to increase the voltage D1 1:n iDO2
+
CO2 VCO2
conversion ratio in [25] and [26]. + VLin - iLm
ip - IO
iD1
The high step up converters derive from the iin iC1 Lm
+
conventional boost converter, which represent a + DO3 +
R
C1 VC1 iDO3 CO3 VCO3 VO
promising candidate for these applications, due to the Vin
- Lk1
- -
D2 iLk1 DO1
advantages of simple structure, high-voltage gain, low
iCO1
switch voltage stress, alleviated reverse-recovery iD2 iDO1 +
S iS CO1 VCO1
problems of the output diodes, and so on [28]. A converter -
through combining a voltage doubler and an integrated
Fig. 2 The equivalent diagram of the proposed converter.
quadratic-boost converter which utilizes one single switch is
To simplify the analysis of the circuit, the following
proposed in this paper. The circuit diagram is depicted in Fig.
assumptions are introduced:
1[29]. Through slightly increasing the duty ratio or the turn
(1) The parasitic capacitances of the switch S and all the
ratio of the transformer, the voltage gain can be lifted up
diodes are neglected. The forward voltage drop of the diodes is
greatly. The leakage inductance of the transformer contributes
ignored.
to achieving the ZCS of diodes in the second boost stage and
(2) All the capacitances are large enough so that the
the voltage doubler. And the energy in it is recycled to the load
voltages of all the capacitors are considered to be constant
finally. The cascaded prototype is capable of realizing a high
during one switching period.
voltage gain while maintaining low voltage stresses of all the
(3) The turn ratio of the transformer n is defined as N2/N1.
semiconductor components.
A. Conduction Modes of the Converter at CCM
DO2 Operation
CO2
T1 Voltage The waveform diagram of the converter at CCM steady state
N2 doubler operation during one switching period is depicted in Fig. 3
Lin D1
N1 based on the aforementioned assumptions. The CCM operation
DO3 R
C1
CO3 can be divided into five modes during one switching period and
Vin D2 the flow paths of currents in each mode are shown in Fig. 4 (a) –
First
(e).
DO1
boost stage S Second CO1 VGS
boost stage

Fig. 1 Circuit diagram of the proposed converter. Iin

(vLin) Vin
This paper is organized as follows: Section II analyzes the
-DVin/(1-D)
operation modes of the proposed converter including
iD1
continuous operation mode (CCM), discontinuous operation (iD2)
mode (DCM) and boundary operation mode (BCM). Section III
presents a mathematical analysis and design of the proposed iLm
converter. The experimental results of the prototype are given (vLm) kVin/(1-D)

and discussed in section IV. Section V concludes the paper.

-kDVin/(1-D)2
iC1
II. OPERATION OF THE PROPOSED CONVERTER
The equivalent circuit of the proposed converter is shown as
Fig. 2, where the transformer is modeled as an ideal transformer
iLk1 (1-D+KD)Vin/(1-D)2
with a turn ratio of n and a magnetizing inductor Lm as well as (vLk1) (1-k)Vin/(1-D)
the primary leakage inductor Lk1. The current of the input -(1-k)DVin/(1-D)2
inductor Lin is referred as iin and satisfies iin ≥ 0 in each iDO1 (kD-K-D)Vin/(1-D)2

switching period after the converter already operates in steady

state. If the current of the magnetizing inductor Lm is also
continuous, the operation mode is called CCM operation, iCO1

otherwise the operation mode is called DCM operation. The

boundary operation mode (BCM) represents the critical
iDO2
conduction of the currents in both Lin and Lm. (iDO3)

DTS DaTS
t0 t1 t2 t3 t4 t5 (t0)
Fig. 3 Waveform diagram of the main devices at CCM operation.

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This article has been accepted for publication in a future issue of this journal, but has not been fully edited. Content may change prior to final publication. Citation information: DOI 10.1109/TIE.2018.2860550, IEEE
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Mode 1 (t0 – t1): The currents in DO2 and DO3 are zero while
Lin DO2
the switch S is already on at t = t0. Diodes D2 and DO3 are in D1 1:n
CO2
+
VCO2
conduction while D1, DO1 and DO2 remain off. The current paths iD1 iLm - IO

are shown as Fig. 4 (a). The source Vin charges the inductor Lin iin iC1 Lm
+ +
through D2, so the current iin equals to iD2 and both increase C1
+
VC1
DO3 CO3 VCO3 R VO
Vin - -
linearly. Lm and Lk1 are in series with capacitor C1 where VC1 D2
- i Lk1
Lk1
DO1
works as a voltage source and charges the inductors. At the iCO1
same time, C1 also transfers its energy to the secondary iD2
S iS
iDO1 +
VCO1
CO1
winding, which charges the capacitor CO3 through diode DO3. -
Thus the current iLm, iLk1, ip and iDO3 are increased while iC1 is
(b)
decreased. Here ip represents the current flowing through the
primary winding. The output capacitors CO1, CO2 and CO3 Lin DO2
D1 1:n +
constantly discharge their energies to the load. This mode ends CO2 VCO2
- IO
when the switch turns off at t = t1. iD1 iLm
iin iC1 Lm
Mode 2 (t1 – t2): In this interval, diode D2 and the switch S are + +
+
off. The currents of Lin and Lk1 flow through D1 and DO1 Vin C1 VC1
DO3 CO3 VCO3 R VO
- -
respectively. The voltage across Lin is negative, thus the current D2
- iLk1 Lk1
DO1
of Lin decreases linearly. The polarity of the voltage across Lk1 iCO1
+
also gets reverse while DO3 is still conductive and the current iD2
S iS
iDO1
CO1 VCO1
iLm keeps increasing. Accordingly, the current of the primary -
winding ip along with iDO3 drops for iLk1 decreases. The energy
(c)
of the load is supplied by the output capacitors. The paths of the
currents are shown in Fig. 4 (b). This mode ends when iDO3 and Lin D1
DO2
+
1:n
ip drop to zero. CO2 VCO2
- IO
Mode 3 (t2 – t3): While ip crosses zero, this mode starts. DO1 iD1 iLm
iin iC1
and D1 remain in conduction. During this interval, DO3 turns off Lm
+ +
+ DO3 CO3
naturally and diode DO2 gets forward biased. The polarity of Vin C1 VC1
VCO3 R VO
-
-
VLm gets reverse, which results in the rapid decrement of iLk1. Lm - Lk1
D2 iLk1 DO1
delivers its energy to CO2 through DO2 thus the current iLm iCO1
iD2 iDO1 +
decreases and iDO2 rises. Besides, the primary leakage inductor S iS CO1 VCO1
Lk1 is serially connected to C1 as well as Lm and then they -

deliver their energies to charge CO1. The current iD1 and iin
(d)
decrease linearly for the voltage across Lin equals to VC1 – Vin.
The energies stored in the output capacitors are delivered to the Lin D1 1:n
DO2
+
load. This mode ends at t = t3 when iDO1 along with iLk1 crosses CO2 VCO2
IO
iLm -
iD1
zero. iin iC1 Lm
Mode 4 (t3 – t4): The paths of the currents are depicted in Fig. + DO3 CO3
+ +
VCO3 R VO
4 (d). Diode DO1 realizes zero current soft switching (ZCS) off Vin C1 VC1
- iLk1 Lk1
- -
at t = t3. D2, DO3 and S are off while D1 and DO2 remain in D2 DO1

conduction. For the transformer, the voltage across Lm is still iD2 iDO1
iCO1
+
iS
clamped to –VCO2 /n. The current of Lm is decreased and iDO2 S CO1 VCO1
-
decreases as well. iin keeps on decreasing as Mode 3. The
output capacitors are connected in series to charge the load. (e)
This mode finishes when the switch turns on at t = t4. Fig. 4 Different modes of the proposed converter during one switching period at
CCM operation.
Lin D1 1:n
DO2
+ Mode 5 (t4 – t5): During this interval, the switch S and diode
iLm
CO2 VCO2
- IO
D2 turn on at t = t4. Vin charges Lin and the current iin increases
iD1
iin iC1 Lm
again. The current of the magnetizing inductor is still above
+ DO3 CO3
+
R
+ zero at the beginning of this mode. The voltage across Lk1
C1 VCO3 VO
Vin VC1
- i Lk1
- - makes iLk1 increases rapidly while iLm keeps decreasing. Thus
D2 Lk1
DO1 the current through the primary winding rises and the current
iD2 iDO1
iCO1
+ through DO2 drops accordingly. The output capacitors
S iS CO1 VCO1
-
continuously deliver their energies to the load. This mode ends
when iDO2 drops to zero at t = t5, which also corresponds to the
(a) beginning of a new switching period. Afterwards, the operation
modes repeat.

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This article has been accepted for publication in a future issue of this journal, but has not been fully edited. Content may change prior to final publication. Citation information: DOI 10.1109/TIE.2018.2860550, IEEE
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B. Conduction Modes of the Converter at DCM

Lin DO2
Operation D1 1:n +
CO2 VCO2
IO
While iin is continuous and iLm is discontinuous, the converter iD1 iLm
-

operation is defined as DCM mode. In one switching period, iin iC1 Lm

+ +
+
the switch turns on at t = t0 with the currents of DO2 and DO3 Vin C1 VC1
DO3 CO3 VCO3 R VO
- -
already back to zero. Thus the modes during one switching D2
- Lk1
iLk1 DO1
period can be divided into five parts. And the waveform iCO1
diagram is shown in Fig. 5. As a result, the first three modes of iD2
S iS
iDO1
CO1
+
VCO1
the DCM operation are almost the same as those in CCM -

operation which are shown in Fig. 4 (a) – (c). The last two
(a)
modes are different from those in CCM operation and will be
analyzed in detail in the following. Lin D1 1:n
DO2
+
Mode 4 (t3 – t4): This mode starts when iLk1 and iDO1 drop to CO2 VCO2
IO
-
zero and DO1 turns off with ZCS. The switch S, D2 and DO3 iD1 iLm
iin iC1 Lm
remain off while D1 and DO2 are still in conduction. iin keeps on + +
+ DO3 CO3 R VO
decreasing as a result of the negative voltage Vin – VC1 across it. Vin C1 VC1
VCO3
- -
- Lk1
The energies stored in the output capacitors are delivered to the D2 iLk1 DO1
load continuously. iLm and iDO2 drop until they cross zero at t = t4. iCO1
iD2 iDO1 +
The difference of this mode from that at CCM operation lies in S iS CO1 VCO1
the final state of the iLm. -

Mode 5 (t4 – t5): During this interval, only D1 is in conduction

(b)
and D2, DO1, DO2, DO3 as well as the switch S are all off as Fig. 6 Special Modes of the proposed converter during one switching period at
shown in Fig. 6 (b). iD1 keeps on decreasing at a rate of (VC1 – DCM operation.
Vin)/Lin. The energy of the load is supplied by the output
capacitors CO1, CO2 and CO3. This interval lasts until the driving III. ANALYSIS AND DESIGN OF THE CONVERTER
signal of the switch S becomes high level again. Afterwards the A. Voltage Gain of the Converter at CCM Operation
operation modes repeat again.
While analyzing the steady state of the converter at CCM
VGS operation, the transition modes including
Mode 2 and Mode 5 are ignored and only Mode 1, Mode 3
and Mode 4 are considered. To simplify the analysis, the
iin
(vLin) Vin voltages of the capacitors are supposed to be constant during
-DVin/(1-D) each switching period. And the coupling coefficient of the
iD1
transformer is approximated to be Lm / (Lm+Lk1), which is
(iD2) referred as variable k in the following analysis. Based on the
voltage-second balance principle of the inductor, the voltage
iLm
gain of the converter at CCM operation can be derived.
(vLm) kVin/(1-D) For the input inductor Lin, the voltage across it in Mode 1 is
-kDVin/(1-D)2 Vin. When (1 – D) TS < t < TS, no matter the diode DO1 is on or
iC1 off, the voltage of Lin is (Vin – VC1). Thus (1) can be obtained.
Vin DTS + (Vin − VC1 )(1 − D) TS = 0 (1)
Then VC1 can be calculated as follows.
iLk1 1
(vLk1) (1-k)V /(1-D) VC1 = Vin (2)
in
1− D
-(1-k)DVin/(1-D)2 Defining the voltage across the magnetizing inductor while 0
(kD-K-D)Vin/(1-D)2
iDO1 1
< t < DTS to be VLm , then the relationship between the
magnetizing inductor voltage and the voltages across C1 and
iCO1 CO3 are obtained.
Lm
VLm1 = VC1 =kVC1 (3)
Lk + Lm
iDO2
1
(iDO3) VCO 3 = nVLm (4)
2
DbTS DcTS DdTS Define the voltage VLm to be V while DTS < t < Da TS, where
Lm
DTS
t0 t1 t2 t3 t4 t5 (t0) Da is the duration of the current of DO1 from peak value ramped
Fig. 5 Waveform diagram of the main devices at DCM operation. down to zero. Here durations of D and Da are shown in Fig. 3.

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During this interval, the secondary winding of the transformer, 30

proposed converter
DO2 and CO2 constitute a rectifier loop. Thus the voltage across referrence[30]
25 referrence[31]
the magnetic inductor satisfies (5) – (6).
Lm 20
2
VLm =− (VCO1 − VC 1 ) = − k (VCO1 − VC 1 ) (5)
Lm + Lk

Turn ratio(n)
2
15
nVLm = −VCO 2 (6)
Define VLm to be VLm 3
during Mode 4 and the lasting time of 10

this interval can be approximately expressed as (1 –D – Da) TS. 5

Then the following relationship can be obtained.
3 0
nVLm = −VCO 2 (7)
Applying the voltage-second principle to the magnetizing -5
0.3 0.35 0.4 0.45 0.5 0.55 0.6 0.65 0.7
inductor, (8) is obtained. Duty tatio
VLm1 DTS +VLm
2 3
DaTS + VLm (1 − D − Da ) TS = 0 (8) Fig. 8 Comparison of the proposed converter with that in reference [30] and [31]
under CCM operation while the voltage gain is constant.
And according to (2) – (8), the following equations can be Fig. 8 depicts the choices of the turn ratio and duty cycle in
derived. the proposed converter and converters presented in reference
1 V [30] and [31] while they are supposed to realize the same
VCO1 = V = O (9)
(1 − D )
2 in
1+nk voltage conversion ratio. It reveals that the proposed converter
can achieve the same voltage gain at lower duty ratio and turn
nk nkD ratio comparing with the reference [31], and the converter of
VCO2 = DVin = VO (10)
(1− D)
2
1+nk reference [30] has the similar characteristic with the proposed
converter.
nk nk (1 − D )
VCO 3 =
Vin = VO (11) Then, the other comparisons is shown in table I., it can be
1− D 1 + nk seen that the voltage stress of the switch is equal under same
In the meantime, the output voltage is finally derived as voltage gain. Although the components number in the reference
follows. [31] is less than the proposed converter, the voltage gain is also
1+ nk lower. When the three converters realize the same voltage gain,
VO = VCO1 + VCO 2 + VCO 3 = Vin (12)
(1 − D )
2
the output capacitors of the proposed converter can withstand
24 lower voltage and the output diodes can withstand the lower
22 voltage and current.
k=1 TABLE I Comparisons of the proposed converter with reference [30] and [31]
20 k=0.9
k=0.8 Proposed
18 Topology Reference [30] Reference [31]
converter
Voltage gain

16 1+n 2+n 1+Dn

14
(1 − D )
2
Voltage gain M (CCM)
(1 − D ) (1 − D )
2 2
12
10 Components number 12 12 10
8
Voltage stress of VO VO VO
6 switch 1+n 2+n 1+ nD
4 Voltage stress of output
0.3 0.35 0.4 0.45 0.5 0.55 0.6 0.65 0.7 Lower Higher Higher
capacitors
Duty ratio Voltage and Current
Fig. 7 The relationship between voltage gain, duty ratio and coupling Lower Higher Higher
stress of output diodes
coefficient
Fig. 7 shows the effect of the coupling coefficient on the The system losses can be mainly divided into switch losses,
voltage gain, where the turn ratio is set as 1.2. It is shown that diode losses, inductor and transformer losses. The switch losses
the overall voltage gain of the proposed converter can be consist of turn-on loss, conduction loss, turn-off loss and loss in
treated as unaffected by the coupling coefficient with the turn the body diode.
ratio and duty ratio in moderate range. Thus, the coupling The switch conduction loss can be obtained by the following
coefficient is regarded as unit to simplify the calculation and the expression [32].
design of the proposed converter. Then the voltage gain of the Pcond = I s2 Rdson (14)
proposed converter operating at CCM condition is finally Where Rdson is the on-state resistance of switch, and the value
expressed as (13). of experimental component is 0.086Ω, which can be obtained
VO 1+ n from the datasheet. Is represents the RMS value of the current
M= = (13)
Vin (1 − D )2 flowing through switch.
The turn-on and turn-off loss are related to their current and
voltage in switches. It can be estimated by [33].

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Vds I onton Vds I off toff diode than the reference [31], the loss of this diode is small due
Pon + Poff = + (15) to ZCS. And the voltage and current stress are lower than the
6Ts 6Ts
other two topologies. So the proposed system has the least
Where ton represents the time of the turn-on transition and toff losses.
represents the time of the turn-off transition, the given values Referring to the aforementioned description of the converter,
are 16ns and 25ns. Vds represents the voltage across the switch. the voltage stresses and current stresses of the semiconductor
And Ion is the value of turn-on current, Ioff is the value of components are listed in table Ⅱ when the proposed converter is
turn-off current. operated under CCM condition. The types of the components
The loss in the body diode can be calculated as [34]. will be chosen based on these calculations.
Pdiode = U D 0 I D (16) TABLE Ⅱ Normalized Stresses of the Converter
Where UD0 is the threshold voltage of diode. And ID denotes Component Voltage stress (/VO) Current stress
S 1 /(1+n) ID1_pk+IDO1_pk
the current flowing through diode. The method of calculating
D1 (1–D) /(1+n) Iin + IO D(1–D)2 /(2(1+n)τLin)
loss in diodes is similar, the threshold voltage of the D1, D2 is
D2 D /(1+n) Iin + IO D(1–D)2 /(2(1+n)τLin)
0.32V and the voltage of output diodes DO1, DO2 and DO3is DO1 1 /(1+n) IO D(1–D) /((1+n)τLm)
0.57V. DO2 n /(1+n) 2IO /(1–D)
The losses in inductor and transformer can be divided into DO3 n /(1+n) IO (1–D)2 /((1+n)2τLm)
core loss and copper loss. For the core loss, (17) can be adopted TABLE Ⅲ Capacitances selection of the converter
to calculate [35]. Capacitance Voltage(/VO) Minimum value
β C1 (1–D) /(1+n) Iin D /(fS ΔVC1)
 Vave 
Pcore = K Fe   Ae lm (17) CO1 1 /(1+n) IO (1+nD) /((1+n)fS ΔVCO1)
 8 f s N L Ae  CO2 D /(1+n) IO D /(fS ΔVCO2)
Where KFe and β denote constant values related to losses, CO3 n /(1+n) IO (1–D) /(fS ΔVCO3)
which are determined by the core model and material. NL is the The output capacitors and the capacitor C1 are supposed to be
number of turns in inductor winding, Vave denotes the average selected properly to suppress the ripples of the dc voltage and
voltage across the winding in the positive half cycle. And Ae not to burden the volume of the system at the same time. The
and lm are the effective core-sectional area and the magnetic design of the output capacitances mainly depends on the
path length of the core, respectively. The copper loss can be selection of the voltage ripple according to the principle of
calculated using the following equation: charge conservation. Based on the analysis of the operation
2
Pcopper = I rms Reff (18) modes, the minimum capacitances of the converter under CCM
operation can be calculated through table Ⅲ.
Where Reff is the equivalent value of copper resistance and
Usually the voltage ripple of the capacitance is chosen to be
Irms is the current flowing through the winding. In the system,
1% of its output voltage. The energy in C1 is middle transition
litz wire is used; thus, the skin effect and proximity effect are
power, so its voltage ripple are allowed to be a bit larger. And
improved.
5
the output voltage ripple shall be limited by the ripples of all the
Calcula ted losses of system in Paper [30] output capacitors. Proper margins should be considered during
4 Calcula ted losses of system in Paper [31] all the capacitances selection.
Calcula ted losses of propose d topology
B. Voltage Gain of the Converter at DCM Operation
3
P/W

During DCM operation, the output voltage of the capacitors

2 are all supposed to be constant. The primary leakage inductance
1 simplify the calculation, Mode 2 is ignored as the transition
0
Magnetic
MOSFET loss component loss Diodes loss
Fig. 9 The losses comparison between the proposed converter with the
reference [30] and [31].
Then, the system losses can be calculated by bringing in the
corresponding experimental parameters to equations (14) – (18).
Fig. 9 depicts the losses of the proposed converter and the
references [30] and [31], which work under the same voltage
gain. With same voltage and current stress, the losses of the
switch are equal to each other. The related current and voltage
of the magnetic components are similar with each other. So the
loss in the inductor is same. And the main difference is from the
turn ratio of transformer, but this value has less influence on the
loss analysis. Thus the overall difference in magnetic
components losses is small. The main different losses are from
the diodes. Although the proposed converter has one more
is neglected during the following analysis. What’s more, to
time of this period is quite short and only Mode 1 and Mode 3 –
5 are considered. Defining D, Db, Dc and Dd as Fig. 5 shows,
Total losses
which respectively stand for the duration of Mode 1 and Mode
3 – 5 when the converter is in DCM operation.
By means of applying the voltage-second balance law to the
input inductor Lin, the value of VC1 is still the same as (2).
Similarly, through applying the voltage-second law to the
magnetizing inductor Lm, the output voltage can be expressed as
follows.
VO =VCO1 + VCO 2 + VCO 3
=
(1 + n )(1 − Dd ) V = (1 + n )( D + Db + Dc ) V (19)
(1 − D )(1 − D − Dd ) in (1 − D )( Db + Dc ) in
The maximum current through DO1 equals to that through Lm
as shown in (20). Applying the ampere-second balance law to
CO1, the interval of mode 3 under DCM operation can be

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derived as (21) shows, where IO = VO /R. iLm ( t )

V iDO 2 p =
iDO1 p _ DCM = I Lmp _ DCM = C 1 DTS (20) n t =( D + D )TS
Lm
a
(31)
1 V D (1 − D − Da ) TS
2 DI O L V = (iLmp − CO 2 DaTS )= VO
Db = = 2 (1 − D ) m ⋅ O (21) n nLm n (1 + n ) Lm
I Lmp _ DCM RTS Vin
2 I DO 2
The average value of iDO2 equals to IO and the maximum iDO 2 p = (32)
value of iDO2 satisfies (22), thus the interval Dc can be derived.
(1 − D ) I DO 2 =I O

iDO 2 p _ DCM As (31) is equal to (32), the boundary normalized time

I O = I DO 2 = ( Db + Dc ) (22) constant of the magnetizing inductor can be expressed as
2 follows.
2n (1 − D ) Lm VO
Dc = ⋅ ⋅ (23) LmB D (1 − D )(1 − D − Da )
D RTS Vin τ LmB = = (33)
RTS 2 n (1 + n )
The normalized time constant of the magnetizing inductor is
Based on (29) and (33), the expression of Da and τLmB can be
defined as (24) and then introducing the equation (21), (23) and
finally obtained.
(24) into the equation (19), so as that the voltage gain of the
proposed converter under DCM operation is finally derived. 1− D
Da = (34)
L 1+n
τ Lm = m (24) D (1 − D )
2
RTS
τ LmB = (35)
2 (1 + n )
2
2D2
1+ 1+ As for the boundary normalized time constant of the input
VO ( n + D )(1 + n )τ Lm (25)
M DCM = = inductor τLinB, supposing that the power in the source is fully
Vin 2 (1 − D ) / (1 + n ) transited to the load, the average value of the input current is
expressed as Iin and satisfies (36). The boundary average
C. Boundary Conduction Modes of the Proposed
Converter current through the input inductor Lin under BCM operation
satisfies (37) and its boundary time constant can be derived.
To design the converter, the boundary conduction mode
V2
(BCM) of the proposed converter is analyzed in detail as I in = O (36)
follows, which means the currents through the magnetizing RVin
inductor Lm and the input inductor Lin are critically continuous. iinp DTS Vin
The maximum current values of the two major inductors I inB = = (37)
2 2 LinB
under BCM operation can be derived as (26) and (27) based on
D (1 − D )
4
the analysis above. L
τ LinB = inB = (38)
D (1 − D ) TS 2 (1 + n )
2
VC 1 RTS
iLmp = DTS = V (26)
Lm (1 + n ) Lm O 0.016

D (1 − D ) TS
2
Vin 0.014
Normalized time constant

iinp = DTS = V (27) τLmB

Lin (1 + n ) Lin O 0.012

Ignore the duration of Mode 2 and then the maximum current 0.010
τLi nB
of CO1 can be expressed as iCO1p which equals to iLmp – IO. 0.008
Afterwards apply the ampere-second balance law to the diode
0.006
CO1 as (28) does. Substituting (26) into (28), the boundary
normalized magnetizing inductor time constant τLmB can be 0.004
derived as follows. 0.002
1 0
− I O TS + iLmp Da TS = 0 (28) 0.3 0.4 0.5 0.6 0.7 0.8 0.9
0 0.1 0.2
2
Duty ratio (D)
LmB D (1 − D ) Da Fig. 10 The normalized boundary time constant of the inductors.
τ LmB = = (29)
RTS 2 (1 + n ) Fig. 10 shows the normalized boundary time constants of Lin
For DO2, the maximum value of iDO2 satisfies the following and Lm of the proposed converter while n = 1.2 with duty ratio
condition. D varies. While τLm is larger than the boundary value τLmB, the
ip (t ) current of the magnetic inductor is continuous during one
iDO 2 p = − (30) switching period, otherwise the current will be discontinuous. It
n t = ( D + D )T is the same case with the time constant of the input inductor Lin.
a S

Where ip (t) = – iLm while (D + Da)TS ≤ t < TS. Considering the As can be seen, for a given turn ratio, the increment of D above
continuity of the magnetizing inductor current, the maximum 0.4 usually results in lower time constant, which means for the
value of iDO2 can be calculated by (31) and it satisfies (32). selected Lm or Lin, increasing the duty ratio can maintain the

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CCM operation of the converter while the load is lighter. Driver circuit
In fact, the inductor of Lm is related to the current stresses of DO3 DO2
DO3 and DO1. The average value of iDO3 in one switching period
equals to that of iDO1 considering the ampere-second balance
law of CO1 and CO2. For iDO3 linearly increases when 0 < t < CO3 CO2 CO1 C1
DTS, thus the maximum current values of iDO3p and iDO1p under
CCM operation satisfy (39).

60mm
I DO1 p I DO3 p L1
S
Da = D (39) T1
2 2
Neglecting the interval of Mode 2, the peak currents through
DO1 and DO3 can be derived as follows based on (26). DO1 D1 D2
Combined with Fig. 10, it can be concluded that small LmB will
not only incur DCM operation of the converter, but will also 65mm
burden the current stresses in diode DO1 and DO3 as (40) and Fig. 11. Photo of the designed prototype.
(41) show. The experimental results are shown in Fig. 12 – 14 when the
D (1 − D ) TSVO D (1 − D ) input voltage is 12V. The current of Lin is continuous as shown
I DO1 p = = I (40) in Fig. 12 (a). The current iin is greater than zero in each
(1 + n) Lm (1 + n )τ Lm O switching period and the average of it is about 3.5A. The
(1 − D ) TS VO (1 − D )
2 2
drain-source voltage across the switch S is much lower than
I DO 3 p = = IO (41)
(1 + n ) Lm (1 + n ) τ Lm
2 2 other topologies and the value is approximately 0.45 times of
the output voltage. The output current and the voltage are about
As for Lin, it is also related to the current stresses of D1 and
0.33A and 115V respectively as shown in Fig. 12 (b), so the
D2. Based on the above analysis, smaller Lin incurs large current
output power is about 38W. As shown in Fig. 12 (c), the
stresses in D1 and D2 under the same specifications of
voltages across capacitor C1 and CO1 are about 25V and 52V.
converter. And it can even incur discontinuous input current,
The output capacitors provide voltages as expected.
which is not advisable in low voltage input sources. While with
optimally designed value of inductor Lin, the minimum value of iin
(5A/div)
iin in the proposed converter can become zero or relatively
small above zero, in which case diode D2 can achieve ZCS or
qusai-ZCS.

IV. EXPERIMENTAL RESULTS VLin

(10V/div)
To verify the performance of the proposed converter, a
prototype is implemented to work as a LED driver. And the
electrical specifications are: Vin = 9 – 16V, VO = 115V, fS =
40kHz, and PO = 38W. Based on the calculation, the turn ratio is VDS
selected to be 1.21. And the boundary magnetic inductor Lm and (25V/div)
input inductor Lin are obtained according to (35) and (38). To Time(10us/div)
make sure that the system is operated in continuous conduction
mode (CCM), the boundary condition is designed in the 9 –
(a)
115V conversion case. Table Ⅳ shows the adopted parameters
based on the mathematical calculation. The photo of the
VO
designed prototype is shown in Fig. 11. The AT90PWM216 is (25V/div)
chosen as the controller chip and the drive chip is Si8271.
TABLE Ⅳ Selected Parameters of the Converter
VCO1 +VCO3
Component Value Type (25V/div)
MOSFET -- FDS3590
D1, D2 -- V8PAL50-M3 IO
DO1, DO2, DO3 -- STPS10H100CH (100mA/div)
Lin 37.93uH RM6 (n = 17)
Lm (T1) 122.3uH EI28 (N2 /N1 = 17/14)
C1, CO1, CO2, CO3 100uF --

Time(20us/div)

(b)

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VC1
(10V/div)
VDS
(25V/div)

VCO1 iDO2
(25V/div) (500mA/div)

ZCS

VDO2
Time(10us/div) (50V/div) Time(10us/div)

(c) (a)
Fig. 12 Measured waveforms of input inductor Lin, load and capacitors.

VDS
VDS
(25V/div)
(25V/div)

iDO3
VD1 (500mA/div)
(25V/div) ZCS
iD1 VDO3
(5A/div) (50V/div)
Time(10us/div)
Time(10us/div)
(b)
(a)

iDO1
(2A/div)
iD2
(2A/div) ZCS

VDO1
(25V/div)
VD2
(10V/div)

VDS
(25V/div)
Time(10us/div)
(b)
Fig. 13 Measured waveforms of diodes D1 and D2.
From Fig. 13 (a) and (b), the conductions of the diodes D1
and D2 are right as analyzed. The diode D1 turned off at a low
current, which is beneficial to improving the efficiency of the
system. And the voltage across the diodes D1 and D2 are the
same according to the analysis results. DO1, DO2 and DO3
realized ZCS turn off as shown in Fig. 14 (a) – (c). Therefore,
the turn-off loss is particularly small, the system efficiency can
be further improved. It also can be seen from Fig. 14 that the
voltage across the output diodes and the current flowing
through them are very small, which is beneficial to reduce the
diode losses and the system cost.
VDS
(25V/div)
Time(10us/div)
(c)
Fig. 14 Measured waveforms of the output capacitors.
According to experimental results shown in Fig. 13, the
efficiency is about 90% at this operating point. Fig. 15 shows
the efficiency curve of the converter under different input
voltages. As input voltage increases, the input current would
decrease. The losses of the inductor, semiconductor device and
transformer becomes less. And the losses of the driver circuit
are constant. Thus, with the input increasing, the system
efficiency is improved. The relationship between the
efficiency and output power is shown in Fig. 16. As the
output power increases from 15W to 50W when the input
voltage is 16V, the efficiency of the system is always
higher than 90%.

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92 requiring high voltage gain," IEEE Trans. Ind. Electron., vol. 63, no. 5, pp.
2936-2944, May. 2016.
91 [7] T.-F. Wu, Y.-S. Lai, J.-C. Hung, and Y.-M. Chen, “Boost converter with
90 coupled inductors and buck–boost type of active clamp,” IEEE Trans. Ind.
Electron., vol. 55, no. 1, pp. 154–162, Jan. 2008.
Efficiency (%)

89
[8] J. I. Leon, S. Vazquez, and L. G. Franquelo, “Multilevel Converters: Control
88 and Modulation Techniques for Their Operation and Industrial Applications,”
87 IEEE Trans. Ind. Electron., vol. 105, no. 11, pp. 2066–2081, Nov. 2017.
[9] H.-W. Seong, H.-S. Kim, K.-B. Park, G.-W. Moon, and M.-J. Youn, “High
86 step-up DC-DC converters using zero-voltage switching boost integration
85 technique and light-load frequency modulation control,” IEEE Trans. Power
84 Electron., vol. 27, no. 3, pp. 1383–1400, Mar. 2012.
[10] Y. Zhao, W. Li, B. Yang, and X. He, “Active clamp boost converter with
83 switched capacitor and coupled inductor,” in Proc. IEEE Appl. Power Electron.
82 Conf. Expo., Feb. 2010, pp. 801–806.
9 10 11 12 13 14 15 16 [11] Q. Zhao and F. C. Lee, “High-efficiency, high step-up DC–DC
Input Voltage (V) converters,” IEEE Trans. Power Electron., vol. 18, no. 1, pp. 65–73, Jan. 2003.
Fig. 15. Efficiency of the proposed converter under different input voltages. [12] A. Marquez, J. I. Leon, S. Vazquez, R. Portillo, L. G. Franquelo, E.
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91
90.5
90 15
20 25 30 35 40 45
Output power（W）
Fig. 16. Efficiency of the proposed converter under different output power.
V. CONCLUSION
A novel high step up converter is proposed in this paper,
which consists of an integrated quadratic-boost converter and a
voltage doubler. The converter only has one single switch, but
the voltage gain is high and stresses of the semiconductor
components are low. The output diodes realize ZCS by taking
advantage of the leakage inductance, so the energy is recycled
to the load. A 38W prototype achieved upmost system
efficiency of 92% is present. In addition, this topology also can
be applied to other fields such as photovoltaic module and fuel
cells, in which case higher voltage conversion ratio can be
realized without adding the stresses and component count and
the system efficiency will be promising.
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Yijie Wang (S’09, M’15, SM'15) was born in
Heilongjiang Province, China, in 1982. He received
the B.S., M.S. and PH.D. degrees in electrical
engineering from Harbin Institute of Technology,
China, in 2005, 2007 and 2012, respectively. From
2012 to 2014, he was a lecturer with the Department
of Electrical and Electronics Engineering, Harbin
Institute of Technology. From 2014 to 2017, he was
an associate professor with the Department of
Electrical and Electronics Engineering, Harbin
Institute of Technology. Since 2017, he has been a
professor with the Department of Electrical and Electronics Engineering,
Harbin Institute of Technology. His interests include DC-DC converters,
soft-switching power converters, power factor correction circuits, digital
control electronic ballasts, LED lighting systems.
Dr. Wang is an Associate Editor of IEEE Transactions on Industrial
Electronics, IEEE Access, IET Power Electronics and Journal of Power
Electronics.
Yuping Qiu was born in Heilongjiang, China, in 1992.
She received the B.S. degrees in electrical engineering
from Harbin Institute of Technology, Harbin, China, in
2017. Where she is currently pursuing the M.S. degree
in electrical engineering.
Her current research interests include high
frequency DC-DC converters and LED lighting
systems.
0278-0046 (c) 2018 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission. See http://www.ieee.org/publications_standards/publications/rights/index.html for more information.
Qing Bian was born in Jiangsu Province, China, in
1993. She received the B.S. degree in electrical
engineering from Harbin Institute of Technology,
Harbin, China, in 2016, where she is currently
working toward the M.S. degree in electrical
engineering.
Her current research interests include high
frequency converters and high-step up dc/dc
converters.
Yueshi Guan (S’15) was born in Heilongjiang
Province, China, in 1990. He received the B.S. degree
and M.S. degrees in electrical engineering from
Harbin Institute of Technology, China, in 2013 and
2015, respectively. He is currently pursuing his PH.D.
degree in Harbin Institute of Technology, China. His
research interests are in the areas of high frequency
and very high frequency converters, single-stage
AC/DC converter, and LED lighting systems.
Dianguo Xu (M’97, SM’12, F’17) was born in
Heilongjiang, China, in 1960. He received the B.S.
degree in Control Engineering from Harbin
Engineering University, Harbin, China, in 1982, and
the M.S. and Ph.D. degrees in Electrical Engineering
from Harbin Institute of Technology (HIT), Harbin,
China, in 1984 and 1989, respectively. In 1984, he
joined the Department of Electrical Engineering, HIT
as an assistant professor. Since 1994, he has been a
professor in the Department of Electrical Engineering,
HIT. He was the Dean of School of Electrical Engineering and Automation,
HIT from 2000 to 2010. He is now the vice president of HIT. His research
interests include renewable energy generation technology, power quality
mitigation, sensor-less vector controlled motor drives, high performance servo
system. He published over 600 technical papers.
Dr. Xu is a fellow of IEEE, an Associate Editor of the IEEE Transactions on
Industrial Electronics, the IEEE Transactions on Power Electronics and the
IEEE Journal of Emerging and Selected Topics in Power Electronics. He serves
as Chairman of IEEE Harbin Section. Prof. Xu is the winner of 2018 IEEE
Industry Applications Society Outstanding Achievement Award.