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LM555N
LM555N
Features
■ Low turn-off time
■ Maximum operating frequency greater than
500 kHz
■ Timing from microseconds to hours N
■ Operates in both astable and monostable DIP8
modes (Plastic package)
■ Output can source or sink up to 200 mA
■ Adjustable duty cycle
■ TTL compatible
■ Temperature stability of 0.005% per °C D
SO8
(Plastic micropackage)
Description
The LM555 monolithic timing circuit is a highly
stable controller capable of producing accurate
Pin connections
time delays or oscillation. In the time delay mode
(top view)
of operation, the time is precisely controlled by
one external resistor and capacitor. For a stable
operation as an oscillator, the free running
1 8
frequency and the duty cycle are both accurately
controlled with two external resistors and one 2 7
capacitor.
The circuit may be triggered and reset on falling 3 6
waveforms, and the output structure can source
4 5
or sink up to 200 mA.
5kΩ
COMP
DISCHARGE
THRESHOLD
CONTROL VOLTAGE R
FLIP-FLOP
5kΩ Q
COMP OUT
TRIGGER
S
INHIBIT/
RESET
5kΩ
RESET S
S - 8086
VCC 5
R1 R2 R3 R4 R8 R12
4.7kW 830W 4.7kW 1kW 5kW 6.8kW
Q21
Q19
Q5 Q6 Q7 Q8 Q9 Q20 Q22
R13
3.9kW
R11
5kW
3
R17 D1
THRESHOLD Q1 Q4 4.7kW
Q23
Q2 Q3 R9 R14
5kW D2 220W
Q11 Q12
Q24
2 Q13
TRIGGER Q10
R16 R15
Q16 Q18 100W 4.7kW
4
RESET Q15
7 Q17
DISCHARGE
R5 R6 R7 R10
Q14 10kW 100kW 100kW 5kW
1
GND
Supply voltage
LM555 4.5 to 16 V
VCC
Vth, Vtrig,
Maximum input voltage VCC V
Vcl, Vreset
IOUT Output current (sink and source) ±200 mA
Operating free air temperature range
Toper 0 to 70 °C
LM555
Figure 5. Delay time versus temperature Figure 6. Low output voltage versus output
sink current
Figure 7. Low output voltage versus output Figure 8. Low output voltage versus output
sink current sink current
Figure 9. High output voltage drop versus Figure 10. Delay time versus supply voltage
output
4 Application information
VCC = 5 to 15V
Reset
R1
4 8
Trigger 2 7
LM555 6 C1
Control Voltage
Output 3 5
1 0.01μF
The circuit triggers on a negative-going input signal when the level reaches 1/3 VCC. Once
triggered, the circuit remains in this state until the set time has elapsed, even if it is triggered
again during this interval. The duration of the output HIGH state is given by t = 1.1 R1C1 and
is easily determined by Figure 14.
Note that because the charge rate and the threshold level of the comparator are both
directly proportional to supply voltage, the timing interval is independent of supply. Applying
a negative pulse simultaneously to the reset terminal (pin 4) and the trigger terminal (pin 2)
during the timing cycle discharges the external capacitor and causes the cycle to start over.
The timing cycle now starts on the positive edge of the reset pulse. During the time the reset
pulse is applied, the output is driven to its LOW state.
When a negative trigger pulse is applied to pin 2, the flip-flop is set, releasing the short-
circuit across the external capacitor and driving the output HIGH. The voltage across the
capacitor increases exponentially with the time constant t = R1C1. When the voltage across
the capacitor equals 2/3 VCC, the comparator resets the flip-flop which then discharges the
capacitor rapidly and drives the output to its LOW state.
Figure 13 shows the actual waveforms generated in this mode of operation.
When Reset is not used, it should be tied high to avoid any possibility of unwanted
triggering.
t = 0.1 ms / div
INPUT = 2.0V/div
C
(μF)
10
Ω
1k
1.0
1=
k
R
10
Ω
0k
10
0.1
1M
Ω
M
10
0.01
0.001
10 100 1.0 10 100 10 (t d )
μs μs ms ms ms s
VCC = 5 to 15V
R1
4 8
Output 3 7
LM555 R2
Control
Voltage
5 6
0.01μF
1 2 C1
C
(μF)
10 1k
10 Ω
1.0 kΩ
R 10
1 0k
+ 1M Ω
0.1 R2 Ω
=
10
M
0.01 Ω
0.001
0.1 1 10 100 1k 10k f o (Hz)
VCC
RA
4 8
Trigger 2 7
LM555 6
Modulation
Input
Output 3 5
C
1
VCC
RE R1
4 8
Trigger 2 7
2N4250
or equiv.
LM555 6
C
Output 3 5 R2
0.01μF
1
VCC = 5 V
Time: Top trace: input 3 V/DIV
20 µs/DIV Middle trace: output 5 V/DIV
R1 + 47 kΩ Bottom trace: output 5 V/DIV
R2 = 100 kΩ Bottom trace: capacitor voltage 1 V/DIV
RE = 2.7 kΩ
C = 0.01 µF
VCC
VCC
RA
51kΩ
4 8
RB
2 7
22kΩ
LM555 6
Out 3 5 0.01μF
C
1 0.01μF
Note that this circuit will not oscillate if RB is greater than 1/2 RA because the junction of RA
and RB cannot bring pin 2 down to 1/3 VCC and trigger the lower comparator.
Important statement: