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  • Dflipflops

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    Celine Fernandez Celocia
    21 views3 pages
    The document provides instructions to design a 3-bit up/down counter with direction using D flip-flops. It includes a state table that shows the present state, next state, and outputs for all possible combinations of inputs and states. Boolean equations and Verilog code are also provided to implement the counter logic.

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    Original Title

    Dflipflops (1)

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    The document provides instructions to design a 3-bit up/down counter with direction using D flip-flops. It includes a state table that shows the present state, next state, and outputs for all possible combinations of inputs and states. Boolean equations and Verilog code are also provided to implement the counter logic.

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    © All Rights Reserved
    Download as DOCX, PDF, TXT or read online from Scribd
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    21 views3 pages

    Dflipflops

    Uploaded by

    Celine Fernandez Celocia
    The document provides instructions to design a 3-bit up/down counter with direction using D flip-flops. It includes a state table that shows the present state, next state, and outputs for all possible combinations of inputs and states. Boolean equations and Verilog code are also provided to implement the counter logic.

    Copyright:

    © All Rights Reserved
    Download as DOCX, PDF, TXT or read online from Scribd
    Flag for inappropriate content
    Download as docx, pdf, or txt
    of 3

    PRINCE COLIN JADE CALLORA

    Design a 3bit up/down counter with direction using D fllipflop.

    Upload the following:

    1. State table

    Direction Present State Next State Output

    0 = U; 1 = D

    M Q2 Q1 Q0 Q2 Q1 Q0 D2 D1 D0

    0 0 0 0 0 0 1 0 0 1

    0 0 0 1 0 1 0 0 1 0

    0 0 1 0 0 1 1 0 1 1

    0 0 1 1 1 0 0 1 0 0

    0 1 0 0 1 0 1 1 0 1

    0 1 0 1 1 1 0 1 1 0

    0 1 1 0 1 1 1 1 1 1

    0 1 1 1 0 0 0 0 0 0

    1 0 0 0 1 1 1 1 1 1

    1 0 0 1 0 0 0 0 0 0

    1 0 1 0 0 0 1 0 0 1

    1 0 1 1 0 1 0 0 1 0

    1 1 0 0 0 1 1 0 1 1

    1 1 0 1 1 0 0 1 0 0

    1 1 1 0 1 0 1 1 0 1

    1 1 1 1 1 1 0 1 1 0
    2. Boolean Equations

    Q1Q0

    MQ2 00 01 11 10

    00 0 0 1 0

    01 1 1 0 1

    11 0 1 1 1

    10 1 0 0 0

    D2 = M’Q2’Q1Q0 + MQ2’Q1’ + Q2Q1Q0’ + MQ2Q0 + MQ2’Q1’Q0’

    Q1Q0

    MQ2 00 01 11 10

    00 0 1 0 1

    01 0 1 0 1

    11 1 0 1 0

    10 1 0 1 0

    D1 = M’Q1’Q0 + M’Q1Q0’ + MQ1’Q0’ + MQ1Q0

    Q1Q0

    MQ2 00 01 11 10

    00 1 0 0 1

    01 1 0 0 1

    11 1 0 0 1

    10 1 0 0 1
    D0 = Q0’

    3. Verilog Code

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