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A B C D E

Cover Sheet 1
Block Diagram
VIA C7 Processor
2
3-5
MS-7199 Version 2.2
01/24/2008
4 4
NORTH BRIDGE(CN700) 6-9
SOUTH BRIDGE(VT8237R+) 10-12
CPU:
Clock SYNTHESIZER(ICS952911+ICS9P936) 13 VIA C7 Processor
DDRII DIMM SLOT 14
System Chipset:
DDR PWR and TERMINATIONS 15
VIA CN700(North bridge)
IDE CONNECTORS&BIOS 16
VIA VT8237R+(South bridge)
PCI SLOT 17
3
LPC SUPER IO(W83627EHG) 18 On Board Chipset: 3

LPT/COM1&2,FIR 19 Clock Generator --ICS952911


Clock Buffer --ICS9P936
AC'97 CODEC(VT1618) 20
LPC Super I/O -- W83627EHG
LAN-RTL8110SC 21 AC'97 Codec--VT1618
TV-OUT(VT1622A) 22 LAN -- RTL 8110SC
DVI -- VIA VT1632A(option)
DVI(VT1632A) 23
TV_OUT--VT1622A(option)
VGA,FAN 24
BIOS -- LPC EEPROM
2
CORE VOLTAGE( ISL9501) 25 2

Main Memory:
ATX POWER CONNECTOR 26
DDR 2 * 1 (Max 1GB)
OTHERS DC-DC CONVERTERS 27
On Board Slots:
KB/MS,FPNL,USB 28
PCI2.3 SLOT * 1
USB CONNECTORS 29
V-core PWM:
MANUAL PARTS 30
IMVP-4 Controller: ISL9501
CLOCK MAP 31 V_DIMM PWM:
1 1

PWM IC: ISL6532CR


GPIO&JIMP SETTING 32
MICRO-START INT'L CO.,LTD.
Title
Cover Sheet
Size Document Number Rev
MS-7199 2.2
Date: Friday, February 22, 2008 Sheet 1 of 32
A B C D E
A B C D E

DMX-7199 Block Diagram


Revision : 2.2 VIA C7 IMVP4
Processor ISL9501
4 4

EBGA

400/533MHz
FSB
VIA TVOUT
VT1622A(option) MEMORY BUS DDR400 SLOT
CN700 100 ~ 200 MHz

CRT
3 3

V-LINK 66 MHz
VIA DVI
VT1632A(option)

LAN
RTL-8110SC
IDE IDE BUS

VT8237R+ PCI BUS 33MHZ PCI SLOT

USB PORTS USB


2 2

BUS
LPC BUS

BIOS

LPC
AC97 AC 97
VT1618

SATA KB&MS
SUPER I/O
COM1/2
W83627EHG

1 1

MICRO-START INT'L CO.,LTD.


..... ..... Title
.... .....
..... .... Line_In BLOCK DIAGRAM
..
Line-Out Size Document Number Rev
.... .... .....
.. .. MIC
MS-7199 2.2
....
Date: Friday, February 22, 2008 Sheet 2 of 32
A B C D E
A B C D E

CPU_INIT# C3 X_C33P50N
U1A
Host_A#3 F3 B9 CPU_A20M# CPU_SLP# C4 X_C33P50N
6 Host_A#[3:16] A3# A20M# CPU_A20M# 12
Host_A#4 H3 A8 CPU_FERR#
A4# FERR# CPU_FERR# 12
Host_A#5 J1 A10 CPU_INIT# CPU_RST# C5 X_C33P50N
A5# INIT# CPU_INIT# 12
Host_A#6 F2 B8 CPU_INTR
A6# INTR CPU_INTR 12
Host_A#7 J2 C9 CPU_NMI PWRGD_CPU C6 X_C33P50N
A7# NMI CPU_NMI 12
Host_A#8 K1 D9 CPU_IGNNE#
A8# IGNNE# CPU_IGNNE# 12
Host_A#9 G3 C10 CPU_SMI#
A9# SMI# CPU_SMI# 12
Host_A#10 K3 A11 CPU_SLP#
A10# SLP# CPU_SLP# 12
4 Host_A#11 L2 B10 CPU_STPCLK# 4
A11# STPCLK# CPU_STPCLK# 12
Host_A#12 L3 A18 +VCCP
A12# DPWR# CPU_DPWR# 6
Host_A#13 J3 B1
A13# ADS# CPU_ADS# 6
Host_A#14 M3 D3
A14# BNR# CPU_BNR# 6
Host_A#15 L1 A1 CPU_BREQ#0 R231 220R
A15# DBSY# CPU_DBSY# 6
Host_A#16 M1 A2 CPU_BREQ#1 R232 220R
A16# DEFER# CPU_DEFER# 6
N2 A4 CPU_BREQ#2 R261 220R
A17# DRDY# CPU_DRDY# 6
N3 B3 CPU_BREQ#3 R262 220R
A18# HIT# Host_HIT# 6
Host_A#30 N1 C3
6 Host_A#30 A30# HITM# Host_ITM# 6
TRDY# B2 Host_TRDY# 6
C4 CPU_PSI# R69 51R1%
BPRI# CPU_BPRI# 6
C1 CPU_BREQ#0
BREQ0# CPU_BREQ#0 6
U1 CPU_BREQ#1 CPU_STPCLK# R70 150R
BREQ1# CPU_BREQ#2 CPU_INTR R72 150R
BREQ2# C5
D5 CPU_BREQ#3 CPU_IGNNE# R73 150R
BREQ3# CPU_A20M# R74 150R
LOCK# D4 Host_LOCK# 6
D1 CPU_SMI# R75 150R
REQ0# Host_REQ#0 6
D2 CPU_SLP# R76 150R
REQ1# Host_REQ#1 6
F1 CPU_INIT# R77 150R
REQ2# Host_REQ#2 6
CPU_NMI R78 150R

CPU_DPSLP# R79 150R


Host_0_D#0 A20 B4
6 Host_0_D#[0:15] D0# RS0# CPU_RS#0 6
Host_0_D#1 F18 A3 CPU_FERR# R80 51R1%
D1# RS1# CPU_RS#1 6
Host_0_D#2 D18 E3
D2# RS2# CPU_RS#2 6
Host_0_D#3 C19 THRMTRIP R81 51R1%
Host_0_D#4 D3#
E18 D4# ASTBN0# G1 Host_A_STB0#N 6
3 Host_0_D#5 H20 G2 PWRGD_CPU R82 51R1% 3
D5# ASTBP0# Host_A_STB0#P 6
Host_0_D#6 C20 CPU_RST# R83 X_51R1%
Host_0_D#7 D6#
C18 D7#
Host_0_D#8 B19 E19 PROCHOT R71 200R
D8# DSTBP0# Host_0_D_STBP#0 6
Host_0_D#9 E20 F19 CPU_TDI R84 150R
D9# DSTBN0# Host_0_D_STBN#0 6
Host_0_D#10 G20 U20 CPU_TDO R85 150R
D10# DSTBP1# Host_0_D_STBP#1 6
Host_0_D#11 G18 T20 CPU_TMS R90 47R
D11# DSTBN1# Host_0_D_STBN#1 6
Host_0_D#12 J18 W15
D12# DSTBP2# Host_0_D_STBP#2 6
Host_0_D#13 D20 V15 CPU_BEVO0 R86 200R
D13# DSTBN2# Host_0_D_STBN#2 6 4 CPU_BEVO0
Host_0_D#14 F20 Y6 CPU_BEVO1 R87 200R
D14# DSTBP3# Host_0_D_STBP#3 6 4 CPU_BEVO1
Host_0_D#15 H18 Y5 CPU_BEVO2 R88 200R
D15# DSTBN3# Host_0_D_STBN#3 6 4 CPU_BEVO2
Host_1_D#16 L19 CPU_BEVO3 R91 0R
6 Host_1_D#[16:31] D16# 4 CPU_BEVO3
Host_1_D#17 L18 A14
D17# BCLK CPU_CLK 13
Host_1_D#18 U19 A13
D18# BCLK# CPU_CLK# 13
Host_1_D#19 V19
Host_1_D#20 D19# BSEL0
M20 D20# BSEL0 C14
Host_1_D#21 K19 D14 BSEL1 CPU_TCK R92 47R
Host_1_D#22 D21# BSEL1 CPU_TRST# R109 680R
K20 D22#
Host_1_D#23 N20 C13 MPI R112 54.9R1%
D23# RESET# CPU_RST# 6
Host_1_D#24 R19 C8 PWRGD_CPU
D24# PWRGD PWRGD_CPU 26
Host_1_D#25 P19
Host_1_D#26 D25#
P18 D26#
Host_1_D#27 U18 CPU_COMP0 R118 27.4R1%
Host_1_D#28 D27#
W20 D28#
Host_1_D#29 M19 C7 CPU_PSI# CPU_COMP2 R119 27.4R1%
Host_1_D#30 D29# PSI#
T18 D30#
Host_1_D#31 R20 H17 CPU_COMP0
Host_2_D#32 D31# COMP0
6 Host_2_D#[32:47] Y12 D32# NEED CLOSES TO CPU
Host_2_D#33 V13 T3 CPU_COMP2
2 D33# COMP2 2
Host_2_D#34 Y17 U5 MPI
Host_2_D#35 D34# MPI
W17 D35#
Change Thermtrip part
Host_2_D#36 V16 C17 DTD+ +3.3V Ver:2.1
D36# THERMDA DTD+ 18
Host_2_D#37 Y19 A17 DTD-
D37# THERMDC DTD- 18
Host_2_D#38 W18 A16 THRMTRIP
Host_2_D#39 D38# THERMTRIP# PROCHOT R182
V18 D39# PROCHOT# B18
Host_2_D#40 W12 1.3KR +3.3V
Host_2_D#41 D40# DPB0 TP19 U7
Y14 D41# DP0# J20
Host_2_D#42 Y13 R18 DPB1 TP20 1 8 C232 +3.3V
Host_2_D#43 D42# DP1# DPB2 TP21 CK VCC C0.1u25Y
Y16 V11 2 7

C
Host_2_D#44 D43# DP2# DPB3 TP22 D PR R100 10KR0402
W14 D44# DP3# Y10 3 Q CLR 6
Host_2_D#45 Y11 THRMTRIP R235 B 4 5
Host_2_D#46 D45# CPU_DPSLP# 1KR0402 GND Q C81 C4.7U10Y0805
V12 D46# DPSLP# B11 CPU_DPSLP# 12
Host_2_D#47 V14 _7SZ74K8X_US8 R177 0R0402

C
RSMRST# 12

E
Host_3_D#48 D47# CPU_TDI Q11 Q12
6 Host_3_D#[48:63] W10 D48# TDI C15
Host_3_D#49 Y8 A15 CPU_TDO N-MMBT3904_NL_SOT23 R236 1KR0402 B
Host_3_D#50 D49# TDO CPU_TMS N-MMBT3904_NL_SOT23
V10 D50# TMS B15
Host_3_D#51 W4 B16 CPU_TRST#

E
Host_3_D#52 D51# TRST# CPU_TCK
W7 D52# TCK C16
Host_3_D#53 Y9
Host_3_D#54 D53#
W8 D54# VID0 B7 CPU_VID0 25 shut down solution
Host_3_D#55 W5 C6
D55# VID1 CPU_VID1 25
Host_3_D#56 V6 A7
D56# VID2 CPU_VID2 25 8,10,22 CHIP_RESET#
Host_3_D#57 V9 B6
D57# VID3 CPU_VID3 25
Host_3_D#58 V3 A6
D58# VID4 CPU_VID4 25
Host_3_D#59 Y3 A5
D59# VID5 CPU_VID5 25
Host_3_D#60 Y4
Host_3_D#61 D60# Host_DBI#3
V7 D61# DINV3# V5
1 Host_3_D#62 Host_DBI#2 1
V4 D62# DINV2# V17
Host_3_D#63 V8 N18 Host_DBI#1
D63# DINV1# Host_DBI#0
DINV0# H19

Host_DBI#[0:3] 6
MICRO-START INT'L CO.,LTD.
nano BGA2 Title
PRIMARY PROCSSOR(PART1)
Size Document Number Rev
MS-7199 2.2
Date: Friday, February 22, 2008 Sheet 3 of 32
A B C D E
1
2
3
4

W13
W16

T14
T16

P12
K12
B14

H12
R13
N13
J13
E13
P14
K14
P16
K16

D15
H14
U15
R15
N15
J15
E15
U16
H16

L13
G13
L15
G15

M12
F12
M14
F14
M16
F16

Y15

GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
U1B
T12 GND
U12 GND VCC_CORE1 G16
B13 GND VCC_CORE2 J16
D13 GND VCC_CORE3 L16

A
A

E11 GND VCC_CORE4 N16


G11 R16

nano BGA2
GND VCC_CORE5
J11 GND VCC_CORE6 F15
L11 GND VCC_CORE7 H15
N11 GND VCC_CORE8 K15
R11 GND VCC_CORE9 M15
W11 GND VCC_CORE10 P15
A12 GND VCC_CORE11 T15
F10 GND VCC_CORE12 E14
H10 GND VCC_CORE13 G14
K10 GND VCC_CORE14 J14

+VCCP
M10 GND VCC_CORE15 L14

C12
C9
C8
C7
P10 GND VCC_CORE16 N14

C11
C10
T10 GND VCC_CORE17 R14
U10 GND VCC_CORE18 F13
VCORE

E9 GND VCC_CORE19 H13


G9 GND VCC_CORE20 K13
J9 GND VCC_CORE21 M13
L9 GND VCC_CORE22 P13
N9 GND VCC_CORE23 T13
R9 GND VCC_CORE24 G12
W9 GND VCC_CORE25 J12

C0.1u16X0402
C0.1u16X0402
C0.1u16X0402
C0.1u16X0402
C0.1u16X0402
D10 L12

C10U6.3X50805
GND VCC_CORE26
F8 GND VCC_CORE27 N12
H8 GND VCC_CORE28 R12
K8 GND VCC_CORE29 F11
M8 GND VCC_CORE30 H11
P8 GND VCC_CORE31 K11
T8 GND VCC_CORE32 M11
E7 GND VCC_CORE33 P11
G7 T11

B
B

GND VCC_CORE34
J7 GND VCC_CORE35 E10
L7 GND VCC_CORE36 G10
N7 GND VCC_CORE37 J10
R7 GND VCC_CORE38 L10
U7 GND VCC_CORE39 N10
Y7 GND VCC_CORE40 R10

VCORE
F6 GND VCC_CORE41 F9
H6 GND VCC_CORE42 H9
K6 GND VCC_CORE43 K9

C42
C35
C34
C33
C32
M6 GND VCC_CORE44 M9
P6 GND VCC_CORE45 P9
T6 GND VCC_CORE46 T9
U6 GND VCC_CORE47 G8
W6 GND VCC_CORE48 J8
E5 GND VCC_CORE49 L8
G5 GND VCC_CORE50 N8
J5 R8

C0.01u16X0402
C0.01u16X0402
C0.01u16X0402
C0.01u16X0402
C0.01u16X0402
GND VCC_CORE51
L5 GND VCC_CORE52 F7
N5 GND VCC_CORE53 H7
R5 GND VCC_CORE54 K7
D7 GND VCC_CORE55 M7

Ver:2.1
E4 GND VCC_CORE56 P7
F4 GND VCC_CORE57 T7
H4 GND VCC_CORE58 E6
J4 GND VCC_CORE59 G6
K4 GND VCC_CORE60 J6
M4 GND VCC_CORE61 L6
T4 GND VCC_CORE62 N6
M2 GND VCC_CORE63 R6
D6 GND VCC_CORE64 H5
Change cpu power cap

C
C

W3 GND VCC_CORE65 K5

VCORE
K2 GND VCC_CORE66 T5
H2 GND
E2 GND VCCP1 M5

C231
C263
C259
C253
C240
C2 GND VCCP2 F5
H1 GND VCCP3 E16
Y2 V1

10uf for C7
22uf for C7
GND VCCP4
B20 GND VCCP5 V2
L20 GND VCCP6 E8
P20 GND VCCP7 W2
V20 GND VCCP8 G17
D19 L17

2.0G
C22U6.3X50805
C22U6.3X50805
C22U6.3X50805
C22U6.3X50805
C22U6.3X50805

GND VCCP9
G19 GND VCCP10 R17
+VCCP

J19 GND VCCP11 U17


N19 GND VCCP12 E12
T19 GND VCCP13 U14

1.0G &1.5G
W19 GND VCCP14 U11
K18 GND VCCP15 U8
M18 GND VCCP16 G4
Y18 GND VCCP17 L4
A19 GND VCCP18 R4
D17 GND VCCP19 P5
E17 GND VCCP20 K17
J17 GND VCCP21 D8
M17 GND VCCP22 D12
N17 GND VCCP23 D16
P17 GND VCCP24 U13
T17 GND VCCP25 U9

D
D

CF8
CF7
CF6
CF5
CF4
CF3
CF2
CF1
CF0

RSVD8
RSVD7
RSVD6
RSVD5
RSVD4
RSVD3
RSVD2
RSVD1
VCCA1
VCCA0
BEVO3
BEVO2
BEVO1
BEVO0

VSSSENSE
VCCSENSE
T2
T1

Y1
B5
E1
A9
P4
P3
P2
P1

U2
N4
U4
U3
R3
R2
R1

W1
F17

Y20
B17
B12

D11
C11
C12

VCCA

RSVD9
VCCA0
RSVD7
RSVD4
RSVD1
RSVD6
RSVD3
RSVD2
RSVD8
RSVD5

RSVD16
RSVD15
RSVD14
RSVD13
RSVD12
RSVD11
RSVD10

VSS_SENSE
CPU_BEVO3
CPU_BEVO2
CPU_BEVO1
CPU_BEVO0

Title

Size

Date:
VCORE_SENSE

C0.1u25Y

C29
C28

C0.1u25Y
R224
R222
R221
R220
R219
R217
R198
R195
R189

TP12
TP13
TP14
TP23
TP24
TP25
TP26
TP27

VCCA
VCCA0
X_0R
X_0R
X_0R
X_0R
X_0R
X_0R
X_0R
X_0R
X_0R

CPU_BEVO3
CPU_BEVO2
CPU_BEVO1
CPU_BEVO0

3
3
3
3

Document Number
MS-7199
L43
L42

C271
C266
VSS_SENSE1

Friday, February 22, 2008


VCORE_SENSE1

C10U6.3X50805
C10U6.3X50805

E
E

60L900m_100_0805
60L900m_100_0805

Sheet
PRIMARY PROCESSOR(PART2)
R226 1R0805
R225 1R0805

4
+1.8VA
+1.8VA

of
1206(10U/10V) Change to 0805(10U/6.3V)

32
2.2
Rev
MICRO-START INT'L CO.,LTD.
1
2
3
4
5 4 3 2 1

D D

+5V NEED CLOSEST CPU

C401
C1u10X50402
+VCCP
+VDIMM

6
U19

VCNTL
R314 5
VIN
10KR0402
VIN#9 9
+VCCP C400 U68 RT9193-18PB_SOT25-5-RH +1.8VA
25 VCCP_PG 7 POK C10U6.3X50805 +3.3V 1 VIN VOUT 5
2 GND
4 C316 3 4 C331
R299 1KR0402 VOUT C1u10Y EN BP
+5V 8 EN C1u10Y
3 C332
VOUT#3

+1
R2 C0.022U16X
C 1KR1%0402 EC44 C
2 CD1000U16EL20-1

2
FB
GND

C14
C0.033U10X0402
NEED CLOSEST CPU
1

APL5913KAC-TRL_SOP8-RH

R297
2KR1%0402

FSB Vccp
C7 CPU Source 2 /FSB 800 with CN700 800 1.2
VCCP should be adjusted from1.05V to 1.2 V 400 1.05
according to VIA suggestion MHz V
But for C7 1.0G, it should be 1.05V VOUT=0.8*(1+R2/R297)
2007.0720 2007.0720

B B

A A

MICRO-START INT'L CO.,LTD.


Title
PRIMARY PROCESSOR(PART3)
Size Document Number Rev
MS-7199 2.2
Date: Friday, February 22, 2008 Sheet 5 of 32
5 4 3 2 1
A B C D E

+VCCP

M19
U19

R19

N19
P19
T19

L19
L18
L17
L16
L15
U2A
D27 Host_0_D#0

VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
HD0 Host_0_D#[0:15] 3
Host_A#3 Y29 D26 Host_0_D#1
3 Host_A#[3:16] HA3 HD1
4 Host_A#4 V27 A29 Host_0_D#2 4
Host_A#5 HA4 HD2 Host_0_D#3 +VCCP +VCCP
AA29 HA5 HD3 C26
Host_A#6 Y27 C28 Host_0_D#4
Host_A#7 HA6 HD4 Host_0_D#5 C323 C22U6.3X50805 C306 C0.01u50X
Y26 HA7 HD5 D28
Host_A#8 AC27 A27 Host_0_D#6 C308 C0.01u50X C307 C0.01u50X
Host_A#9 HA8 HD6 Host_0_D#7 C309 C0.01u50X
AA28 HA9 HD7 B29
Host_A#10 AB27 A26 Host_0_D#8 C310 C0.01u50X
Host_A#11 HA10 HD8 Host_0_D#9 C311 C0.1u25Y
AA27 HA11 HD9 B26
Host_A#12 AC29 D25 Host_0_D#10 C312 C0.1u25Y C320 C10U6.3X50805
Host_A#13 HA12 HD10 Host_0_D#11 C313 C0.1u25Y
AB29 HA13 HD11 E24
Host_A#14 AB28 A25 Host_0_D#12 C314 C0.1u25Y
Host_A#15 HA14 HD12 Host_0_D#13 C315 C0.1u25Y
AC26 HA15 HD13 A28
Host_A#16 AD29 D24 Host_0_D#14
HA16 HD14 Host_0_D#15
T28 HA17 HD15 C25
R28 K28 Host_1_D#16 1206(10U/10V) Change to 0805(10U/6.3V)
HA18 HD16 Host_1_D#[16:31] 3
N29 K29 Host_1_D#17
HA19 HD17 Host_1_D#18
N28 HA20 HD18 J28
P29 K27 Host_1_D#19
HA21 HD19 Host_1_D#20
P27 HA22 HD20 J26
R27 J29 Host_1_D#21 +VCCP
HA23 HD21 Host_1_D#22
N26 HA24 HD22 J25
T26 J27 Host_1_D#23 EC8 C22U6.3X50805
HA25 HD23 Host_1_D#24
P26 HA26 HD24 F28
R25 G29 Host_1_D#25 EC9 C22U6.3X50805
HA27 HD25 Host_1_D#26
N27 HA28 HD26 G27
N25 D29 Host_1_D#27
Host_A#30 HA29 HD27 Host_1_D#28 NEED CLOSEST N.B
3 Host_A#30 R29 HA30 HD28 E27
T27 F27 Host_1_D#29
HA31 HD29 Host_1_D#30
3 U26 HA32 HD30 E28 3
T25 F29 Host_1_D#31 1206(22U/10V) Change to 0805(22U/6.3V)
HA33 HD31 Host_2_D#32
HD32 E23 Host_2_D#[32:47] 3
W28 B24 Host_2_D#33
3 Host_A_STB0#P HADSTB0 HD33
R26 C24 Host_2_D#34
TP28 HADSTB1 HD34 Host_2_D#35
HD35 A24
M29 A23 Host_2_D#36
3 CPU_ADS# ADS HD36
M28 B23 Host_2_D#37
3 CPU_BNR# BNR HD37
T29 A22 Host_2_D#38
3 CPU_BPRI# BPRI HD38
K26 C23 Host_2_D#39
3 CPU_BREQ#0 BREQ HD39
M25 F21 Host_2_D#40
3 CPU_DBSY# DBSY HD40
U27 C22 Host_2_D#41
3 CPU_DEFER# DEFER HD41
M26 E21 Host_2_D#42
3 CPU_DRDY# DRDY HD42
L27 C21 Host_2_D#43
3 Host_HIT# HIT HD43
U29 D20 Host_2_D#44
3 Host_ITM# HITM HD44
L29 D21 Host_2_D#45
3 Host_LOCK# HLOCK HD45
M24 F20 Host_2_D#46
3 Host_TRDY# HTRDY HD46
E20 Host_2_D#47
HD47 Host_3_D#48
3 Host_REQ#0 W27 HREQ0 HD48 B19 Host_3_D#[48:63] 3
V28 C19 Host_3_D#49
3 Host_REQ#1 HREQ1 HD49
V26 B20 Host_3_D#50
3 Host_REQ#2 HREQ2 HD50
W29 B18 Host_3_D#51
TP29 HREQ3 HD51 Host_3_D#52
V29 HREQ4 HD52 C20
TP30 L26 A20 Host_3_D#53 R52 49.9R1% GTLVREF_NB1
3 CPU_RS#0 RS0 HD53 +VCCP
M27 C18 Host_3_D#54
3 CPU_RS#1 RS1 HD54
K25 B17 Host_3_D#55 R630
3 CPU_RS#2 RS2 HD55
B16 Host_3_D#56 100R1%
Host_DBI#0 HD56 Host_3_D#57
C29 HDBI0 HD57 A17
Host_DBI#1 H27 C14 Host_3_D#58
2 HDBI1 HD58 2
Host_DBI#2 B21 C15 Host_3_D#59
Host_DBI#3 HDBI2 HD59 Host_3_D#60
3 Host_DBI#[0:3] A21 HDBI3 HD60 A18
B15 Host_3_D#61
HD61 Host_3_D#62 R53 49.9R1% GTLVREF_NB
3 CPU_RST# D14 CPURST HD62 B14 +VCCP
A15 Host_3_D#63
HD63 R629
13 HCLK Y23 HCLK+
13 HCLK# W23 HCLK- HDSTB0P B27 Host_0_D_STBP#0 3 100R1%
HDSTB0N C27 Host_0_D_STBN#0 3
GTLVREF_NB R24 H28
HAVREF0 HDSTB1P Host_0_D_STBP#1 3
V24 HAVREF1 HDSTB1N G28 Host_0_D_STBN#1 3
2

C299 C301 C302


C0.01u50Y C0.01u50Y C0.01u50Y F22 D23 R625 100R1% HCOMPVREF
HDVREF0 HDSTB2P Host_0_D_STBP#2 3 +VCCP
G24 D22 Host_0_D_STBN#2 3
1

GTLVREF_NB1 HDVREF1 HDSTB2N R54


F19 HDVREF2
F16 HDVREF3 HDSTB3P C17 Host_0_D_STBP#3 3 49.9R1%
C291 C295 C297 C298 C16
HDSTB3N Host_0_D_STBN#3 3
C0.01u50X L24
TP31 GTLVREF
C0.01u50X C0.01u50X C0.01u50X N24 HAP0 R626
3 Host_A_STB0#N W26 HAP1
HRCOMP G25 HRCOMP
HCOMPVREF G26 HRCOMP
C303 C0.01u50X HCOMPVREF 20.5R1%
3 CPU_DPWR# K24 DPWR
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

1 1
A16
A19
B22
B25
B28
D15
D16
D19
E22
E25
E26
E29
H26
H29
L25
L28
P25
P28
U25
U28
Y25
Y28
M18
N18
P18
R18
V18
U18
T18
AC28

VIA-CN700-RH

+3.3V VCORE

C304
C305
C0.1u25Y
C0.1u25Y MICRO-START INT'L CO.,LTD.
Title
NORTH BRIDGE(PART1)
For EMI Size Document Number Rev
MS-7199 2.2
Date: Friday, February 22, 2008 Sheet 6 of 32
A B C D E
A B C D E

+VDIMM

+VDIMM
R260
10KR
R234
+VDIMM M_MEMDET 150R1%

M_MVREF_NB
R632
X_10KR R240
150R1% CB62 C499 C501 C508 C509 C514

W11
W12
W13
W14
W15
W16
W17
W18
W19
V11

V19
4 C0.1u25Y C1000p50X C1000p50X C1000p50X C1000p50X C1000p50X 4
U2B
M_0_D0 AD28 AF13 M_MA0

VCC18MEM
VCC18MEM
VCC18MEM
VCC18MEM
VCC18MEM
VCC18MEM
VCC18MEM
VCC18MEM
VCC18MEM
VCC18MEM
VCC18MEM
14 M_0_D[0:7] MD0 MA0 M_MA[0:13] 14,15
M_0_D1 AE27 AD15 M_MA1
M_0_D2 MD1 MA1 M_MA2
AF27 MD2 MA2 AJ15
M_0_D3 AG28 AJ16 M_MA3
M_0_D4 MD3 MA3 M_MA4 +VDIMM
AD27 MD4 MA4 AJ17
M_0_D5 AE29 AF16 M_MA5
M_0_D6 MD5 MA5 M_MA6
AG27 MD6 MA6 AG15
M_0_D7 AG29 AE18 M_MA7
M_1_D8 MD7 MA7 M_MA8
14 M_1_D[8:15] AH29 MD8 MA8 AF17
M_1_D9 AJ29 AE19 M_MA9 CB63 CB68
M_1_D10 MD9 MA9 M_MA10 C0.1u25Y C1u10Y
AG25 MD10 MA10 AJ14
M_1_D11 AJ25 AF20 M_MA11
M_1_D12 MD11 MA11 M_MA12
AJ28 MD12 MA12 AE21
M_1_D13 AH27 AD7 M_MA13
M_1_D14 MD13 MA13
AH26 MD14
M_1_D15 AJ26
M_2_D16 MD15 M_MA0 C515 C33P50N0402
14 M_2_D[16:23] AJ24 MD16 BA0 AF12 M_BA0 14,15
M_2_D17 AG24 AJ13
MD17 BA1 M_BA1 14,15
M_2_D18 AJ22 M_MA1 C535 C33P50N0402
M_2_D19 MD18
AG21 MD19
M_2_D20 AH24 M_MA2 C536 C33P50N0402
M_2_D21 MD20
AG23 MD21
M_2_D22 AG22 M_MA3 C537 C33P50N0402
M_2_D23 MD22 R644 301R1%
AJ21 MD23 DMCOMP AE5
M_3_D24 AH21 M_MA4 C538 C33P50N0402
14 M_3_D[24:31] MD24
M_3_D25 AJ20 AE24 M_MEMDET
M_3_D26 MD25 MEMDET M_MA5 C539 C33P50N0402
3 AG18 MD26 3
M_3_D27 AH18
M_3_D28 MD27 M_MA6 C540 C33P50N0402
AG20 MD28
M_3_D29 AH19 AE9
MD29 ODT0 M_ODT0 14,15
M_3_D30 AJ18 AE10 M_MA7 C541 C33P50N0402
MD30 ODT1 M_ODT1 14,15
M_3_D31 AG17 AF6
M_4_D32 MD31 ODT2 M_MA8 C542 C33P50N0402
14 M_4_D[32:39] AJ12 MD32 ODT3 AD6
M_4_D33 AG12
M_4_D34 MD33 M_MA9 C543 C33P50N0402
AJ10 MD34
M_4_D35 AJ9
M_4_D36 MD35 M_MA10 C544 C33P50N0402
AH12 MD36 SRAS AE12 M_SRAS# 14,15
M_4_D37 AJ11
M_4_D38 MD37 M_MA11 C545 C33P50N0402
AG10 MD38 SCAS AF9 M_SCAS# 14,15
M_4_D39 AH9
M_5_D40 MD39 M_MA12 C546 C33P50N0402
14 M_5_D[40:47] AG8 MD40 SWE AF11 M_SWE# 14,15
M_5_D41 AJ7
M_5_D42 MD41 M_MA13 C547 C33P50N0402
AJ6 MD42
M_5_D43 AH6 AD9
MD43 CS0 M_CS0# 14,15
M_5_D44 AG9 AF8 M_BA0 C548 C33P50N0402
MD44 CS1 M_CS1# 14,15
M_5_D45 AJ8 AG7
M_5_D46 MD45 CS2 M_BA1 C549 C33P50N0402
AG5 MD46 CS3 AF7
M_5_D47 AJ5
M_6_D48 MD47
14 M_6_D[48:55] AH4 MD48
M_6_D49 AJ4 M_SRAS# C550 C33P50N0402
M_6_D50 MD49
AJ2 MD50
M_6_D51 AH1 M_SCAS# C551 C33P50N0402
M_6_D52 MD51
AG4 MD52 DQS0 AF29 M_DQS#0 14
M_6_D53 AF4 AG26 M_SWE# C552 C33P50N0402
MD53 DQS1 M_DQS#1 14
M_6_D54 AG3 AH22
2 MD54 DQS2 M_DQS#2 14 2
M_6_D55 AJ1 AG19
MD55 DQS3 M_DQS#3 14
M_7_D56 AG1 AH10 Near NB 1.5" ~ 2"
14 M_7_D[56:63] MD56 DQS4 M_DQS#4 14
M_7_D57 AF2 AG6
MD57 DQS5 M_DQS#5 14
M_7_D58 AD3 AH3
MD58 DQS6 M_DQS#6 14
M_7_D59 AD1 AE3
MD59 DQS7 M_DQS#7 14
M_7_D60 AG2
M_7_D61 MD60
AF3 MD61 MCLKO as short as passable
M_7_D62 AE1 AD26 M_MCLKI
MD62 MCLKIA M_MCLKI 13
M_7_D63 AD2 AE26 M_R_MCLKO- R135 22R
MD63 MCLKO- MCLKO- 13
AF26 M_R_MCLKO+ R179 22R
MCLKO+ MCLKO+ 13
M_CKE0 AF21
14,15 M_CKE0 CKE0
M_CKE1 AF23 AD23 M_MVREF_NB
14,15 M_CKE1 CKE1 MEMVREF1
AE22 CKE2 MEMVREF2 AD17 DCLKI = DCLKx + 2 "
AF24 CKE3 MEMVREF3 AD11
MEMVREF4 AD8

GND M16
GND N16
14 M_DQM#0 AF28 DQM0 GND P16
AJ27 R16 R223 36R M_MCLKI
14 M_DQM#1 DQM1 GND
14 M_DQM#2 AJ23 DQM2 GND T16
14 M_DQM#3 AJ19 DQM3 GND U16
AG11 V16 C498
14 M_DQM#4 DQM4 GND
14 M_DQM#5 AH7 DQM5 GND M15 C10p50N
14 M_DQM#6 AJ3 DQM6 GND N15
14 M_DQM#7 AF1 DQM7 GND P15
Near to NB chip
1 1
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

MICRO-START INT'L CO.,LTD.


AE2
AE8
AE11
AE14
AE16
AE17
AE20
AE23
AE25
AE28
AH2
AH5
AH8
AH11
AH14
AH17
AH20
AH23
AH25
AH28
AF5
M17
N17
P17
R17
T17
U17
V17
V15
U15
T15
R15

VIA-CN700-RH
Title
NORTH BRIDGE(PART2)
Size Document Number Rev
MS-7199 2.2
Date: Friday, February 22, 2008 Sheet 7 of 32
A B C D E
A B C D E

+1.5VDD

M11
N11

R11
P11

T11
U2C
4 P3 4

VCC15AGP
VCC15AGP
VCC15AGP
VCC15AGP
VCC15AGP
VLAD0 GD0/FPD10
12 VLINK_AD0 V1 VD0 GD1/FPD11 P4
VLAD1 U2 R3
12 VLINK_AD1 VD1 GD2/FP1CLK
VLAD2 Y2 R4
12 VLINK_AD2 VD2 GD3/FPD09
VLAD3 Y3 R1
12 VLINK_AD3 VD3 GD4/FPD08
VLAD4 T2 N2
12 VLINK_AD4 VD4 GD5/FPD07
VLAD5 T3 P1
12 VLINK_AD5 VD5 GD6/FPD06
VLAD6 AA2 R2
12 VLINK_AD6 VD6 GD7FPD05
VLAD7 AA1 M3
12 VLINK_AD7 VD7 GD8/FP1DET
VBE0 U3 M1
12 VLINK_VBE0 VBE GD9/FP1HS
VLINK_UPSTB W2 N4 +3.3V
12 VLINK_UPSTB UPSTB+ GD10/FPD01
VLINK_UPSTB# W1 L3
12 VLINK_UPSTB# UPSTB- GD11/FPD23

2
VLINK_DNSTB V2 L1
12 VLINK_DNSTB DNSTB+ GD12/FPD00
VLINK_DNSTB# V3 N5 L29
12 VLINK_DNSTB# DNSTB- GD13/FPD22
UPCMD AA3 K2 60L900m_100_0805
12 VLINK_UPCMD UPCMD GD14/FPD21
DNCMD W3 R6
12 VLINK_DNCMD

1
DNCMD GD15/FPD20 AVDD1
GD16/FPD18 J2
LVREF_NB V4 H3
VLVREF GD17/FPD17 C333 CB122
GD18/FPD16 H1
R638 402R1% LCOMPP T4 K4 C1000p50X C1u10Y
VLCOMPP GD19/FPDE
GD20/FPD14 G1
U11 VCC15VL GD21/FPCLK G2
U10 VCC15VL GD22/FPD13 K5
V10 VCC15VL GD23/FPD15 G3
J6 DVI_P1D09
GD24/GDVP1D09 DVI_P1D09 23
GD25 K6
J4 DVI_P1D10 +3.3V
GD26/GDVP1D10 DVI_P1D10 23
K10 F2 DVI_P1D04
VCC15 GD27/GDVP1D04 DVI_P1D04 23

2
3 K11 J5 DVI_P1D07 3
VCC15 GD28/GDVP1D07 DVI_P1D07 23
+1.5VDD K12 F3 DVI_P1D06 L30
VCC15 GD29/GDVP1D06 DVI_P1D06 23
K13 H4 DVI_P1D08 60L900m_100_0805
VCC15 GD30/GDVP1D08 DVI_P1D08 23
K15 E1

1
VCC15 GD31/GDVP1DET AVDD2
K17 VCC15
K19 M2 C334
VCC15 GC#BE0/FPD03 DVI_SB_DA CB123
K20 VCC15 GC#BE1/SBPLDAT K1 DVI_SB_DA 23
Y10 J1 C1000p50X C1u10Y
VCC15 GC#BE2/FPD19 DVI_P1D11
Y12 VCC15 GC#BE3/GDVP1D11 L6 DVI_P1D11 23
Y14 VCC15
Y16 VCC15 GFRAME/FPHS L4
Y18 M5 DVI_SB_CK
VCC15 GIRDY/SBPLCLK DVI_SB_CK 23
Y20 VCC15 GTRDY K3
L10 VCC15 GDEVSEL/FPVS J3
N10 VCC15 GSTOP/FP1CLK M4
R10 VCC15 GPAR/FP1VS P6
W10 VCC15 GDBIH G5
M20 F4 +1.5VDD
VCC15 GRBF
P20 VCC15 GWBF/FPCLK B3
T20 D5 +VDIMM
VCC15 GREQ/SBDDCCLK C330 C0.01u50X TESTIN_NB R1003 4.7KR
V20 VCC15 GGNT/SBDDCDAT C4
GSERR/FP1DE M6
H6 +1.5VDD C324 C0.1u25Y
GDBIL R242 4.7KR
AGP8XDET C5
C325 C0.1u25Y

E4 C326 C0.1u25Y +1.5VDD


GST0/ENAVEE
GST1/ENAVDD E3
F5 C22 C10U6.3X50805
2 GST2/ENABLT 2
CB137 CB138
C1 DVI_P1D01 C327 C0.1u25Y C0.1u25Y C0.1u25Y
GSBSTBF/GDVP1D01 DVI_P1D01 23
C2 DVI_P1D02
GSBSTBS/GDVP1D02 DVI_P1D02 23
C328 C0.1u25Y Decoupling capacitors
GADSTBF0/FPD04 N1
GADSTBS0/FPD02 N3

GADSTBF1/FPD12 G4
GADSTBS1/FPDET F1
+1.5VDD +1.5VDD
+1.5VSUSNB A1 DVI_P1VS
GSBA0/GDVP1VS DVI_P1VS 23
AC25 A2 DVI_P1DE
VSUS15 GSBA1/GDVP1DE DVI_P1DE 23
AB1 B1 DVI_P1D00 R642 R126
VSUS15 GSBA2/GDVP1D00 DVI_P1D00 23
C3 DVI_P1HS 1.4KR1% 100KR1%
GSBA3/GDVP1HS DVI_P1HS 23
D1 DVI_P1D05
GSBA4/GDVP1D05 DVI_P1D05 23
AB3 D4 DVI_P1D03 LVREF_NB AGPVREF
11 SUSST# SUSST GSBA5/GDVP1D03 DVI_P1D03 23
TESTIN_NB AF25 D2 R766 22R0402
TESTIN GSBA6/GDVP1CLK DVI_P1CLK 23
AC1 D3 R241 X_22R0402 R20 R129
3,10,22 CHIP_RESET# RESET GSBA7/GDVP1CLK DVI_P1CLK_N 23
AB2 1KR1% CB136 100KR1% CB135 CB139
11 NB_PWROK# PWROK
N6 DVI_P1CLK_N removed C0.1u25Y C0.1u25Y C0.1u25Y
AGPVREF1 AGPVREF
AGPVREF2 G6 as EMI requested。2008.2.18
AVDD1 AA25 LVREF_NB => 0.625 AGPVREF => 1.5V/2=0.75
AVDD2 VCCA33HCK
AD25 VCCA33MCK GCLK R5 NB_GCLK 13
+1.5VDD
A4 AGPCOMPN R639 60.4R1%
AGPCOMPN AGPCOMPP R640 60.4R1%
AGPCOMPP A3
AA26 GNDAHCK
AD24 GNDAMCK AGPBUSY T1 AGPBZ# 12
1 1
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
M12
M13
M14
N12
N13
N14
P12
P13
P14
R12
R13
R14
T12
T13
T14
U12
U13
U14
V12
V13
V14

VIA-CN700-RH

Strapping For NB_TEST Mode MICRO-START INT'L CO.,LTD.


Title
TESTIN RBF WBF
1 x x Disable all TEST mode NORTH BRIDGE(PART3)
Size Document Number Rev
MS-7199 2.2
Date: Friday, February 22, 2008 Sheet 8 of 32
A B C D E
A B C D E

VCCPLL1
VCCPLL2
4 4
VCCDAC1

VCCDAC2 +3.3V
+3.3V
CB3 C0.1u25Y +1.5VDD
CB5 C0.1u25Y +3.3V

C341 C342 C344 C340 C0.1u16Y0402

L12
L13
L14
D8
C7

D7
C0.1u25Y C0.1u25Y C1000p50X C343 C0.1u16Y0402

E7
U2D
Decoupling capacitors

VCC33GFX
VCC33GFX
VCC33GFX
VCCA33PLL1
VCCA33PLL2

VCCA33DAC1
VCCA33DAC2
TV_D0 C13 B6 VGA_AR
22 TV_D0 DVP0D00/TVD00 AR VGA_AR 24
TV_D1 B13 A5 VGA_AG
22 TV_D1 DVP0D01/TVD01 AG VGA_AG 24
TV_D2 A13 B5 VGA_AB
22 TV_D2 DVP0D02/TVD02 AB VGA_AB 24
TV_D3 D13
22 TV_D3 DVP0D03/TVD03
TV_D4 E13 A6 RSET R648 80.6R1%
22 TV_D4 DVP0D04/TVD04 RSET
TV_D5 D12 B8
22 TV_D5 DVP0D05/TVD05 HSYNC VGA_HSYNC 24
TV_D6 C12 A8
22 TV_D6 DVP0D06/TVD06 VSYNC VGA_VSYNC 24
TV_D7 A12
22 TV_D7 DVP0D07/TVD07
TV_D8 B12 A7 GUICLK
22 TV_D8 DVP0D08/TVD08 XIN GUICLK 13
TV_D9 E12
22 TV_D9 DVP0D09/TVD09 +1.5VDD
TV_D10 B11 A9
22 TV_D10 DVP0D10/TVD10 INTA PCI_INTR#A 10,17
TV_D11 A11 C346 C0.01u50Y
22 TV_D11 DVP0D11/TVD11 +VDIMM
TP32 TV_GPO_0 E11 D9
GPO0 SPCLK1 TV_SBCK 22
TP33 TV_GPOUT C11 E9 C347 C0.01u50Y C348 C0.01u50Y
GPOUT SPCLK2 VGA_SPCLK2 24
C349 C0.01u50Y
3 TV_CLKR A10 D10 C351 C1u10Y C350 C0.01u50Y 3
22 TV_CLKR TVCLKR SPD1 TV_SBDA 22
B10 DVP0DE/TVDE SPD2 E8 VGA_SPD2 24
C352 C1u10Y C354 C1u10Y
E10 C8 DISPCLKI C365 C10U6.3X50805
22 TV_HS DVP0HS/TVHS DISPCLKI
C10 C9 DISPCLKO R188 22R C355 C4.7u16Y1206
22 TV_VS DVP0VS/TVVS DISPCLKO
R1092 33R0402 D11
22 TV_CLK DVP0CLK/TVCLK 1206(10U/10V) Change to 0805(10U/6.3V)
B9 DVP0DET GNDAPLL1 B7
GNDAPLL2 C6

GNDADAC2 D6
GNDADAC1 E6
TV_CLKR
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
R1093 GND
X_0R +3.3V +3.3V
A14
B2
B4
E2
E5
H2
H5
L2
L5
P2
P5
U1
U4
Y1

VIA-CN700-RH

2
C5205 L31 L32
X_C5p50N0402 60L900m_100_0805 60L900m_100_0805

1
VCCDAC1 VCCPLL1

C336 CB118 C337 CB119


C1000p50X C1u10Y C1000p50X C1u10Y

2 2
+3.3V 2
4
6
8 RN173
8P4R-1KR
1
3
5
7

GFX power up strapping setting:


+3.3V
RN136
TVD4/DVP0D4 =>AGP Port Muxing +3.3V

2
0: Two 12-bit DVI interface TV_D8 1 2 R1157 X_0R

2
1: One 24-bit Panel interface TV_D6 3 4 R1158 0R L33
TVD5/DVP0D5 =>Dedicated DVI Port Configuration TV_D5 5 6 R1156 X_0R 60L900m_100_0805 L41
0: TMDS TV_D4 7 8 R1154 0R 60L900m_100_0805

1
1: TV Encoder VCCDAC2

1
TVD6/DVP0D6 =>Dedicated DVI Port Selection VCCPLL2
0: Disable 8P4R-10KR C338 CB121 C339
1: Enable C1000p50X C1u10Y CB120
TVD8/DVP0D8 =>External AGP Function Enable C1000p50X C1u10Y
0: External
1: Internal
TVD9/DVP0D9 =>PCI Signal Test Output Enable
0: Disable
1: Enable
TVD10/DVP0D10 =>CPUCK/MCK Clock Select TV_D9 R168 4.7KR
0: From NB TV_D7 R169 4.7KR
1: From External TV_D10 R178 4.7KR
TVD7/DVP0D7 =>GFX Clock Select(VCK/LCDCK/ECK)
0: Refer Internal PLL
1 1: From External 1

MICRO-START INT'L CO.,LTD.


DISPCLKI C5252 X_C10p50N0402 Title
NORTH BRIDGE(PART4)
Size Document Number Rev
MS-7199 2.2
Date: Friday, February 22, 2008 Sheet 9 of 32
A B C D E
A B C D E

+3.3V

+3.3V
C706 C4.7U10Y0805
C700 C0.1u25Y

W10
W11
W17
W18
W19
W21
H10
H11
H12

R19

U19

V19
V21

Y21
T19

W9

W8
M8
H9

N8

R8

U8
+3.3VSUSUSB C701 C0.1u25Y

K8

P8

V8
T8
L8
J8
4 U3A C702 C0.1u25Y +3.3VSUSUSB +3.3VDUAL 4
PCI_A_D0 G2 C703 C0.1u25Y FB50

VCC33
VCC33
VCC33
VCC33
VCC33
VCC33
VCC33
VCC33
VCC33
VCC33
VCC33
VCC33
VCC33
VCC33
VCC33
VCC33
VCC33
VCC33
VCC33
VCC33
VCC33
VCC33
VCC33
VCC33
VCC33
VCC33
VCC33
VCC33
17,21 PCI_A_D0 AD0
PCI_A_D1 J4 A22 C704 C0.1u25Y +3.3VSUSUSB
17,21 PCI_A_D1 AD1 USBVDD
PCI_A_D2 J3 B22 C705 C0.1u25Y 60L1_100_1206
17,21 PCI_A_D2 AD2 USBVDD
PCI_A_D3 H3 C22 C709 X_C0.1u25Y
17,21 PCI_A_D3 AD3 USBVDD
PCI_A_D4 F1 D22 C611 C608 C610 C609
17,21 PCI_A_D4 AD4 USBVDD
PCI_A_D5 G1 E22 C4.7U10Y0805 C0.1u25Y C10U6.3X50805 C0.1u25Y
17,21 PCI_A_D5 AD5 USBVDD
PCI_A_D6 H4 F22
17,21 PCI_A_D6 AD6 USBVDD
PCI_A_D7 F2 J13
17,21 PCI_A_D7 AD7 USBVDD
PCI_A_D8 E1 J14
17,21 PCI_A_D8 AD8 USBVDD
PCI_A_D9 G3 J15
17,21 PCI_A_D9 AD9 USBVDD
PCI_A_D10 E3 J16
17,21 PCI_A_D10 AD10 USBVDD
PCI_A_D11 D1 J17
17,21 PCI_A_D11 AD11 USBVDD
PCI_A_D12 G4 J18
17,21 PCI_A_D12 AD12 USBVDD
PCI_A_D13 D2
17,21 PCI_A_D13 AD13
PCI_A_D14 D3 +2.5VDUAL USB_P0+
17,21 PCI_A_D14 AD14 USB_DT0+ 28
PCI_A_D15 F3 USB_P0-
17,21 PCI_A_D15 AD15 USB_DT0- 28
PCI_A_D16 K3 C604 USB_P1+
17,21 PCI_A_D16 AD16 USB_DT1+ 28
PCI_A_D17 L3 C24 C0.1u25Y +2.5V USB_P1-
17,21 PCI_A_D17 AD17 USBSUS25 near SB USB_DT1- 28
PCI_A_D18 K2 USB_P2+
17,21 PCI_A_D18 AD18 USB_DT2+ 29
PCI_A_D19 K1 USB_P2-
17,21 PCI_A_D19 AD19 USB_DT2- 29
PCI_A_D20 M4 A23 USBVCCA FB46 60L1000m_100_0805-1 USB_P3+
17,21 PCI_A_D20 AD20 PLLVDDA USB_DT3+ 29
PCI_A_D21 L2 B23 C606 C605 C607 USB_P3-
17,21 PCI_A_D21 AD21 PLLVDDA USB_DT3- 29
PCI_A_D22 N4 C0.1u25Y C10U6.3X50805 C0.1u25Y USB_P4+
17,21 PCI_A_D22 AD22 USB_DT4+ 29
PCI_A_D23 L1 D23 USBGNDA USB_P4-
17,21 PCI_A_D23 AD23 PLLGNDA USB_DT4- 29
PCI_A_D24 M2 C23 L34 60L500m_100 USB_P5+
17,21 PCI_A_D24 AD24 PLLGNDA USB_DT5+ 29
PCI_A_D25 M1 USB_P5-
17,21 PCI_A_D25 AD25 USB_DT5- 29
PCI_A_D26 P4 E20 USB_P0+ USB_P6+
17,21 PCI_A_D26 AD26 USBP0+ USB_DT6+ 29
3 PCI_A_D27 N3 D20 USB_P0- USB_P6- 3
17,21 PCI_A_D27 AD27 USBP0- USB_DT6- 29
PCI_A_D28 N2 A20 USB_P1+ USB_P7+
17,21 PCI_A_D28 AD28 USBP1+ USB_DT7+ 29
PCI_A_D29 N1 B20 USB_P1- USB_P7-
17,21 PCI_A_D29 AD29 USBP1- USB_DT7- 29
PCI_A_D30 P1 E18 USB_P2+
17,21 PCI_A_D30 AD30 USBP2+
PCI_A_D31 P2 D18 USB_P2-
17,21 PCI_A_D31 AD31 USBP2-
A18 USB_P3+
USBP3+

2
4
6
8

2
4
6
8

2
4
6
8

2
4
6
8
PCI_CBE#0 E2 B18 USB_P3-
17,21 PCI_CBE#0 CBE0 USBP3-
PCI_CBE#1 C1 D16 USB_P4+
17,21 PCI_CBE#1 CBE1 USBP4+
PCI_CBE#2 L4 E16 USB_P4-
17,21 PCI_CBE#2 CBE2 USBP4-
PCI_CBE#3 M3 A16 USB_P5+
17,21 PCI_CBE#3

1
3
5
7

1
3
5
7

1
3
5
7

1
3
5
7
CBE3 USBP5+ USB_P5-
USBP5- B16
PCI_FRAME# J1 D14 USB_P6+
17,21 PCI_FRAME# FRAME USBP6+_NC
PCI_DEVSEL# H2 E14 USB_P6-
17,21 PCI_DEVSEL# DEVSEL USBP6-_NC
PCI_IRDY# J2 A14 USB_P7+ RN63 RN64 RN66 RN67
17,21 PCI_IRDY# IRDY USBP7+_NC
PCI_TRDY# H1 B14 USB_P7- 8P4R-15KR0402-LF X_8P4R-15KR0402-LF
17,21 PCI_TRDY# TRDY USBP7-_NC
PCI_STOP# K4 8P4R-15KR0402-LF X_8P4R-15KR0402-LF
17,21 PCI_STOP# STOP
PCI_SERR# C2
17,21 PCI_SERR# SERR
PCI_PAR
17,21 PCI_PAR
PCI_PERR
F4
C3
PAR USBOC0 C26
D24
USB_OC#0 28 USB 5/6 & 7/8 removed for BB.2007.1120
17,21 PCI_PERR# PERR USBOC1 USB_OC#2
PCI_RST# R1 B26
PCIRST USBOC2 USB_OC#2 29
USBOC3 C25
PCI_INTR#A A4 B24
9,17 PCI_INTR#A INTA USBOC4 USB_OC#4 29
PCI_INTR#B B4 A24
17 PCI_INTR#B INTB USBOC5 USB_OC#6
PCI_INTR#C B5 A26
17,21 PCI_INTR#C INTC USBOC6_NC USB_OC#6 29
PCI_INTR#D C4 A25
17 PCI_INTR#D INTD USBOC7_NC
GPO12 D4 +5V
GPO13 INTE/GPIO12 USB_CLK
E4 INTF/GPIO13 USBCLK E23 USB_CLK 13 Add Q20,R509,R510 on ver:2.2
GPO14 A3 R102 X_0R C603 X_C5p50N0402 2008'0124
GPO15 INTG/GPIO14
2 B3 INTH/GPIO15 USB REXT B25 USBREXT R768 5.11KR1% R510
2
1KR
PCI_REQ#0 A5 D26 UDPWR R335 10KR0402
17 PCI_REQ#0 REQ0 UDPWR/GPI9_NC
PCI_REQ#1 B6 D25

C
21 PCI_REQ#1 REQ1 UDPWREN/GPO9_NC IDE_RST#1 16
PCI_REQ#2 C5
PCI_REQ#3 REQ2 R509 1KR
D5 REQ3 B
+3.3V PCI_REQ#4 P3 W3 PS2_KB_CLK Q20
REQ4 KBCK/KA20G PS2_KB_CLK 28
R267 2.2KRPCI_REQ#5 R3 V1 PS2_KB_DATA N-MMBT3904_NL_SOT23
PS2_KB_DATA 28

E
REQ5/GPI7 KBDT/KBRC PS2_MS_CLK
MSCK/IRQ1 W1 PS2_MS_CLK 28
PCI_GNT#0 A6 W2 PS2_MS_DATA
17 PCI_GNT#0 GNT0 MSDT/IRQ12 PS2_MS_DATA 28
PCI_GNT#1 D6 +3.3V
21 PCI_GNT#1 GNT1
PCI_GNT#2 C6 +3.3V +3.3V
PCI_GNT#3 GNT2 U49
E5 GNT3
+3.3V PCI_GNT#4 PCI_RST# U37C U37D

14

14
R4 1 5
USBGND
USBGND
USBGND
USBGND
USBGND
USBGND
USBGND
USBGND
USBGND
USBGND
USBGND
USBGND
USBGND
USBGND
USBGND
USBGND
USBGND
USBGND
USBGND
USBGND
USBGND
USBGND
USBGND
USBGND
USBGND
USBGND
USBGND
USBGND
USBGND
USBGND
USBGND
USBGND
USBGND
USBGND
USBGND

R268 2.2KRPCI_GNT#5 GNT4


R2 GNT5/GPO7 12,26 PWRGD_SB 2
3 4 PCI_U_RST# 5 6 9 8 R138 22R
GND
GND
GND
GND
GND
GND
GND
GND
GND

CHIP_RESET# 3,8,22
NC7SZ08M5X_SOT23-5 HC14_SOIC14 HC14_SOIC14

7
VIA-VT8237RPLUS
A1
A2
B1
B2
E8
F25
H23
J21
J25

A13
A15
A17
A19
A21
B13
B15
B17
B19
B21
C13
C14
C15
C16
C17
C18
C19
C20
C21
D13
D15
D17
D19
D21
E13
E15
E17
E19
E21
H13
H14
H15
H16
H17
H18

+3.3V +3.3V
+3.3V
U37E U37F

14

14
C612 11 10 13 12 R218 22R
PCI_RSTX# 17,18,21,26
C0.1u25Y

7
+3.3V +3.3V
RN110 RN113 RN114 HC14_SOIC14 HC14_SOIC14
1 GPO14 PCI_REQ#4 PCI_GNT#4 1
2 1 1 2 1 2
4 3 GPO15 PCI_REQ#2 3 4 PCI_GNT#1 3 4
+3.3V 6 5 GPO12 PCI_REQ#3 5 6 PCI_GNT#2 5 6
8 7 GPO13 PCI_GNT#3 7 8 PCI_REQ#1 7 8
8P4R-4.7KR 8P4R-2.2KR 8P4R-2.2KR
MICRO-START INT'L CO.,LTD.
Title
SOUTH BRIDGE(PART1)
Size Document Number Rev
MS-7199 2.2
Date: Friday, February 22, 2008 Sheet 10 of 32
A B C D E
A B C D E

GPIOC Host Clock


0 200Mhz
+2.5V +3.3VDUAL +2.5VDUAL 1 Auto Mode

GPIOD GTL pullup


C712 0 Enable

M18

AA4
AB4
AB5
AB6
N18

R18

U18
P18

V10
V11
V12
V13
V14
V15
V16
V17
V18
T18
L18
J10
J11
J12

M9

N9

R9

U9

U4
U3B 1 Disable

K9

P9

V9
T9

T4
L9
J9
X_C0.1u25Y
IDE_PCS#3 +3.3V
AA22 GPIOB IOQ Depth RN128 RN130

VSUS33
VSUS33
VSUS33
VSUS33

VSUS25
VSUS25
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
16 IDE_PD_0 PDD0
Y24 0 12 Level IDE_PD_A1 1 2 1 2
16 IDE_PD_1 PDD1
AA26 R774 0R0402 C627 C5p50N0402 1 1 Level 3 4 PCS_3_R# 3 4
16 IDE_PD_2 PDD2
AA25 IDE_PD_A2 0/1=P4/V4 5 6 PD_A1_R 5 6
16 IDE_PD_3 PDD3 Vlink auto comp.
AB26 T1 AC_BIT_CLK GPIOA 7 8 PD_A2_R 7 8
16 IDE_PD_4 PDD4 ACBITCLK AC_BIT_CLK 20 Auto mode
4 AC26 U3 AC_SDIN0 0 IDE_PD_A0 PD_A0_R 4
16 IDE_PD_5 PDD5 ACSDIN0 AC_SDIN0 20 Manual mode
AC23 V2 AC_SDIN1 1 8P4R-2.2KR 8P4R-4.7KR
16 IDE_PD_6 PDD6 ACSDIN1
AD25 U1 AC_SDIN2
16 IDE_PD_7 PDD7 ACSDIN2/GPIO20/PCS0
AD26 V3 AC_SDIN3 -PCS_3 VREF at 4X
16 IDE_PD_8 PDD8 ACSDIN3/SLP_BTN/GPIO21/PCS1
AC24 T2 AC_R_SYNC R822 22R AC_SYNC 0 0.75V
16 IDE_PD_9 PDD9 ACSYNC[ ] AC_SYNC 20
AC25 U2 AC_R_SDOUT R823 22R AC_SDOUT 1 0.9V R146 X_0R
16 IDE_PD_10 PDD10 ACSDO[SOE] AC_SDOUT 20
AB24 T3 AC_R_RST# R824 22R AC_RST# R150 0R
16 IDE_PD_11 PDD11 ACRST AC_RST# 20
AB23 R147 X_0R
16 IDE_PD_12 PDD12
AA24 R148 0R
16 IDE_PD_13 PDD13
Y26 W4 PCI_PME#
16 IDE_PD_14 PDD14 PME PCI_PME# 17,21
AA23 V4 BATLOW#
16 IDE_PD_15 PDD15 BATLOW/GPI5
Y1 CPUMISS
CPUMISS/GPI17 RING#
16 IDE_PDREQ Y23 PDDREQ RING/GPI3 Y2 RING# 19
V24 Y3 SUSST# AC_R_SYNC R272 4.7KR
16 IDE_PDACK# PDDACK[ ] SUSST1/GPO3 SUSST# 8 +3.3V
W26 Y4 THRM# RN134
16 IDE_PIOR# PDIOR AOLGPI/GPI18/THRM THRM# 18
Y25 AA1 EXTSMI# R295 X_4.7KR GPIOB 1 2 R151 0R
16 IDE_PIOW# PDIOW EXTSMI/GPI2
Y22 AB1 SMBALT# GPIOA 3 4 R152 X_0R
16 IDE_PDRDY PDRDY SMBALRT 0/1:Enable/disable LPC FWH command
V22 AC1 P_ATA66 GPIOC 5 6 R158 X_0R
16 IDE_PCS#1 PDCS1[ ] LID/GPI4 P_ATA66 16
V23 AD2 PWRBTN# GPIOD 7 8 R159 0R
16 IDE_PCS#3 PDCS3[SDCS3] PWRBTN
W23 AF1 NB_PWROK#
16 IDE_PD_A0 PDA0[SDA0] PWROK NB_PWROK# 8
V25 AB7 CLKRUN# 8P4R-2.2KR
16 IDE_PD_A1 PDA1[SDA1] CLKRUN
W24 AC7 SLEEPLED# +3.3V
16 IDE_PD_A2 PDA2[SDA2] CPUSTP/GPO5
AD24 AD6 BIOSWE AC_R_SDOUT R309 4.7KR RN129
16 IDE_IRQ14 IRQ14 PCISTP/GPO6 +3.3V
1 2
AC20 AE1 INTRUDER R339 X_4.7KR 3 4
SDD0/TBC1_SDD0 INTRUDER/GPI16 INTRUDER 19
AB20 SDD1/VALID_SDD1 5 6
AC21 AB3 SUS_CLK 0/1:Enable/disable auto reboot 7 8
SDD2 SUSCLK/GPO4
AE18 SDD3/RXD2_SDD3
3 AF18 AC4 SM_BCK 8P4R-4.7KR 3
SDD4/RXD3_SDD4 SMBCK1 SM_BCK 13,14,21
AD18 AB2 SM_BDT
SDD5/RXD4_SDD5 SMBDT1 SM_BDT 13,14,21
AD19 SPK R347 4.7KR
SDD6/RBC0_SDD6 28 SPK +3.3V
R281 10KR AF19 AC3 SM_BCK2 IDE_PCS#1 R368 2.2KR
SDD7/RBC1_SDD7 SMBCK2/GPIO27 SM_BDT2 R341 X_1KR +3.3V
AE20 SDD8/RXD5_SDD8 SMBDT2/GPIO26 AD1
AF20 R362 X_2.2KR
SDD9/RXD6_SDD9 SUSA# 0/1:Enable/disable CPU FREQ strapping
AD20 SDD10/RXD7_SDD10 SUSA/GPO2_GPO1 AA2
AE21 AD3 SUSB# 0/1:Enable/disable SATA Master/Slave mode
SDD11/RXD8_SDD11 SUSB/NC_GPO2 SUSB# 15,18,26
AF21 AF2 SUSC#
SDD12/RXD9_SDD12 SUSC SUSC# 15,28
AD21 SDD13/TXD0_SDD13
AD22 AE2 GPI0 IDE_PDACK# R348 2.2KR BIOSWE R208 4.7KR
SDD14/TXD1_SDD14 GPI0 +3.3V +3.3V
AF22 SDD15/TXD2_SDD15 GPI1 AC2
AA3 PLED#0 R351 X_2.2KR R371 X_4.7KR
GPO0 PLED#0 28
R388 5.6KR AD17 AE3 PLED#1
SDDRQ/RXD1_SDDRQ GPO1_NC PLED#1 28 0/1:Enable/disable External SATA PHY 0/1:Enable/disable 100MHz VLink clock
AD23 AE5 GPIOA
SDDACK/TBC0_SDDACK GPIOA/GPIO24[SA17]_GPO17[SA17] GPIOB
AF23 SDIOR/TXD4_SDIOR GPIOB/GPIO25[SA18]_GPO18[SA18] AD5
+5V AE23 AF5 GPIOC
R450 4.7KR SDIOW/TXD3_SDIOW GPIOC/GPIO30[SA16]_GPO16[SA16] GPIOD +3.3VDUAL
AF17 SDRDY/RXD0_SDRDY GPIOD/GPIO31[SA19]_GPO19[SA19] AC6
AF25 +3.3V SUSA# 1 2
SDCS1/TXD8_SDCS1[ ] SERIRQ EXTSMI# RN131
AF26 SDCS3/TXD9_SDCS3[ ] SERIRQ AD9 SERIRQ 18 3 4
AF24 AF8 SPK CLKRUN# 4.7KR R352 CPUMISS 5 6 8P4R-10KR
SDA0/TXD6_SDA0[ ] SPKR[ ] SB_OSC SLEEPLED# 4.7KR R363
AC22 SDA1/TXD5_SDA1[ ] OSC AB8 SB_OSC 13 7 8
+5V AE24 BATLOW# 1 2
R280 10KR SDA2/TXD7_SDA2[ ] TPO THRM# 4.7KR R367 PCI_PME# RN132
AE26 IRQ15 TPO AF9 3 4
AE9 TEST TPO X_4.7KR R353 SUSST# 5 6 8P4R-10KR
TEST SM_BCK 4.7KR R366 RING#
AC19 SVREF_NC 7 8
AC10 VDDA0 +2.5V SM_BDT 4.7KR R365 1 2
VDDA0_NC C293 C0.01u50X SM_BCK2 4.7KR R360 RN133
AB21 SCOMPP_NC 3 4
AB10 GNDA0 C626 C0.1u25Y SM_BDT2 4.7KR R184 SUS_CLK 5 6 8P4R-10KR
2 GNDA0_NC 2
SATA_TXP_1 C288 C0.01u50X SATA_C_TXP_1 AB13 C294 C0.01u50X SERIRQ 4.7KR R156 SMBALT# 7 8
SATA_TXN_1 C287 C0.01u50X SATA_C_TXN_1AC13 STXP1_NC SREXT C625 C0.1u25Y
STXN1_NC SREXT_NC AD11
C624 C0.1u25Y AC_SDIN1 4.7KR R149 PLED#0 R377 4.7KR
SATA_RXN_1 C186 C1200p50X SATA_C_RXN_1AF13 AE10 SATA_CLKO C623 C0.1u25Y AC_SDIN2 4.7KR R145 PLED#1 R379 4.7KR
SATA_RXP_1 C187 C1200p50X SATA_C_RXP_1AE13 SRXN1_NC SXO_NC[SOE] C617 C4.7U10Y0805 AC_SDIN3 4.7KR R140 NB_PWROK# R378 10KR
SRXP1_NC SATA_CLKI C618 C0.1u25Y SUSB# 4.7KR R139
SXI_NC[ROMCS] AF10
SATA_TXP_2 C292 C0.01u50X SATA_C_TXP_2 AB15 C619 C0.1u25Y TEST 4.7KR R136 GPI0 R372 1MR +3.3VBAT
SATA_TXN_2 C289 C0.01u50X SATA_C_TXN_2AC15 STXP2_NC VDDA33 INTRUDER R376 1MR
STXN2_NC VDDA33_NC AE11
C621 C0.1u25Y SREXT 7.15KR1% R364
SATA_RXN_2 C191 C1200p50X SATA_C_RXN_2AF15 AF11 GNDA33 C622 C0.1u25Y
SATA_RXP_2 C192 C1200p50X SATA_C_RXP_2AE15 SRXN2_NC GNDA33_NC C710 X_C0.1u25Y
SRXP2_NC C711 X_C0.1u25Y
GND W5
W12 VDDATS_NC GND V5
W13 VDDATS_NC GND M16
W14 N11 SATA1 SATA2
VDDATS_NC GND R1105 0R
W15 VDDATS_NC GND N12 SATA_CLKR 13 1 GND 1 GND
W16 N13 SATA_TXP_1 2 SATA_TXP_2 2
VDDATS_NC GND SATA_CLKO SATA_TXN_1 HT+ SATA_TXN_2 HT+
GND N14 3 HT- 3 HT-
GNDATS_NC
GNDATS_NC
GNDATS_NC
GNDATS_NC
GNDATS_NC
GNDATS_NC
GNDATS_NC
GNDATS_NC
GNDATS_NC
GNDATS_NC
GNDATS_NC
GNDATS_NC
GNDATS_NC

AC17 N15 4 4
GNDAS_NC
GNDAS_NC
GNDAS_NC
GNDAS_NC

VDDAS_NC GND SATA_CLKI X8 SATA_RXN_1 GND SATA_RXN_2 GND


AC11 VDDAS_NC GND N16 5 HR- 5 HR-
AB17 1 2 X_25MHZ20P_S-2 SATA_RXP_1 6 SATA_RXP_2 6
+2.5VSATA VDDAS_NC HR+ HR+
AB11 7 7
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

VDDAS_NC GND GND


CONN-SATA1P_orange CONN-SATA1P_orange
C407 C523 VIA-VT8237RPLUS C616 C615
AB14
AC14
AD12
AD13
AD14
AD15
AD16
AE12
AE14
AE16
AF12
AF14
AF16
AC16
AC12
AB16
AB12

F6
F7
J5
K5
P5
R5
L11
L12
L13
L14
L15
L16
M11
M12
M13
M14
M15
K18

C1u10Y C4.7U10Y0805 X_C15p50N X_C15p50N

near chipset
1 GNDSATA 1
+3.3VDUAL

+3.3V
VDDA33 FB60 60L1000m_100_0805-1 +2.5V FB47 +2.5V R165

C524
VDDA0 FB61 60L1000m_100_0805-1 +2.5VSATA
60L1_100_1206 PWRBTN#
4.7KR
R820 68R MICRO-START INT'L CO.,LTD.
PW_BN 28
C0.1u25Y C525 Title
C0.1u25Y C526 SOUTH BRIDGE(PART2)
C0.1u25Y C614
C0.1u25Y Size Document Number Rev
MS-7199 2.2
Date: Friday, February 22, 2008 Sheet 11 of 32
A B C D E
A B C D E

+2.5V

M21
M22
M23
M24
M25

M19
N21
N22
N23
N24
N25
N26

N19

D12
K21

P22
P23
P24
P25
P26

P19

E12

E10
E11
L23

L21

L19

D9
E9
U3C
4 VLAD0 H25 4

VCCVK
VCCVK
VCCVK
VCCVK
VCCVK
VCCVK
VCCVK
VCCVK
VCCVK
VCCVK
VCCVK
VCCVK
VCCVK
VCCVK
VCCVK
VCCVK
VCCVK
VCCVK
VCCVK
VCCVK
VCCVK
VCCVK
VCCVK

MIISUS25
MIISUS25

MIIVCC
MIIVCC
MIIVCC
MIIVCC
8 VLINK_AD0 VD0
VLAD1 G26 A11
8 VLINK_AD1 VD1 MCRS
VLAD2 K26 B11
8 VLINK_AD2 VD2 MCOL
VLAD3 J23
8 VLINK_AD3 VD3
VLAD4 F26 C11
8 VLINK_AD4 VD4 MTXENA
VLAD5 G25 A10
8 VLINK_AD5 VD5 MTXD0
VLAD6 K22 B10
8 VLINK_AD6 VD6 MTXD1
VLAD7 K24 B9
8 VLINK_AD7 VD7 MTXD2
E24 A9 +3.3V
VD8_NC MTXD3
G23 VD9_NC MTXCLK C10
L26 VD10_NC
L25 D10 APICD0 R290 1KR
VD11_NC MRXER
E26 VD12_NC MRXCLK C9
E25 D8 APICD1 R291 1KR
VD13_NC MRXDV
L24 VD14_NC MRXD0 C8 Eliminate LAN EEPROM
M26 VD15_NC MRXD1 B8
MRXD2 A8
VBE0 G24 C7
8 VLINK_VBE0 VBE MRXD3 +3.3V 0:Disable
UPCMD K23 A7
8 VLINK_UPCMD UPCMD MDCK
DNCMD K25 B7 R137 X_4.7KR0402
8 VLINK_DNCMD DNCMD MDIO
1:Enalble
VLINK_UPSTB J26 D7
8 VLINK_UPSTB UPSTB PHYRST_NC
VLINK_UPSTB# J24 R190 4.7KR0402 VCOMPP R357 360R1%
8 VLINK_UPSTB# UPSTB
EECS D11
VLINK_DNSTB H26 B12
8 VLINK_DNSTB DNSTB EEDO
VLINK_DNSTB# H24 A12 MII EEDI
8 VLINK_DNSTB# DNSTB EEDI[SDCS1] +3.3V
EECK C12
3 +2.5V +2.5V 3
R1149 4.7KR VPAR F24 E7 +2.5VRAM R780 2R PWRGD_SB R300 4.7KR
VPAR RAMVCC VGATE R312 4.7KR
LVREF_SB H22 C632 OVDDR26V R340 4.7KR
VLREF GND_RAM C0.1u25Y CPU_DPSLP# R356 X_4.7KR
RAMGND E6
VCOMPP J22
VLINK_CLK VCOMPP CPU_FERR#
13 VLINK_CLK FERR U24 CPU_FERR# 3
R3 10R0402 L22 U26 CPU_A20M#
VCLK A20M CPU_A20M# 3
T24 CPU_IGNNE#
IGNNE CPU_IGNNE# 3
R26 CPU_INIT#
INIT CPU_INIT# 3
C64 F23 T25 CPU_INTR
VIOUT_NC INTR CPU_INTR 3
C6p50N0402 T26 CPU_NMI L35 +2.5VSBPLL
NMI CPU_NMI 3 +2.5V
G22 U25 CPU_SMI# 60L500m_100
VIIN_NC SMI CPU_SMI# 3
R24 CPU_STPCLK# C633
STPCLK CPU_STPCLK# 3
V26 CPU_SLP# C0.1u25Y
SLP CPU_SLP# 3
LPC_AD0 AD8 R22 OVDDR26V
17,18 LPC_AD0 LAD0 GHI/GPIO22
LPC_AD1 AF7 P21 CPU_DPSLP# L36 GND_SBPLL
17,18 LPC_AD1 LAD1 DPSLP/GPIO23 CPU_DPSLP# 3
LPC_AD2 AE7 60L500m_100
17,18 LPC_AD2 LAD2
LPC_AD3 AD7 AC9 VGATE
17,18 LPC_AD3 LAD3 VGATE/GPIO8_NC
AC8 SATA_LED
VIDSEL/GPIO28 SATA_LED 16
AB9 VRDSLP
VRDSLP/GPIO29 AGPBZ#
AGPBZ/GPI6 AD10 AGPBZ# 8
LPC_FRAME# AF6 RSMRST# R361 10KR
17,18 LPC_FRAME# LFRM +3.3VDUAL
LPC_DRQ# AE6
18 LPC_DRQ# LREQ0
R345 4.7KR AE8
+3.3V LREQ1_NC SB_PCLK C412
PCICLK R23 SB_PCLK 13
C1u10Y
PWRGD_SB AC5 U23 SB_APICCLK
10,26 PWRGD_SB PWRGD APICCLK/GPI19_NC SB_APICCLK 13
2 2
RSMRST# AD4 R25 APICD0
3 RSMRST# RSMRST APICD0/GPIO10_NC
T23 APICD1
APICD1/GPIO11_NC +2.5V
+3.3VBAT AF4 T22 +2.5VSBPLL
VBAT PLLVCC
X1 AE4 U22 GND_SBPLL R370
RTCX1 PLLGND
3KR1%
AF3
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

Y1 RTCX2
X2 SB_PCLK R157 X_0R C631 X_C5p50N0402 LVREF_SB

VIA-VT8237RPLUS R354 C634


P11
P12
P13
P14
P15
P16
R11
R12
R13
R14
R15
R16
R21
T11
T12
T13
T14
T15
T16
W22
W25
AA21
AB19
AB22
AB25
AC18
AE17
AE19
AE22
AE25
AA9
AB18
T21
AA10
K19

32.768KHZ12.5P_D 412R1% C0.1u25Y

C193 C185
C10p50N C10p50N

+3.3VDUAL LVREF_SB=0.3 volt


2

SATA_LED R338 X_4.7KR JBAT1


AGPBZ# R374 4.7KR +3.3V
3 1
VRDSLP R373 4.7KR D8 2 +3.3VBAT +3.3VBAT
S-BAT54C_SOT23 3
1

R380 C629
C630 1KR C0.1u25Y
1 C10U6.3X50805 1
R381
1KR

BAT1 MICRO-START INT'L CO.,LTD.


Title
SOUTH BRIDGE(PART3)
Size Document Number Rev
MS-7199 2.2
Date: Friday, February 22, 2008 Sheet 12 of 32
A B C D E
A B C D E

ICS952911
U69 +3.3V CPU_CLK C832 X_C15p50N0402
+3.3V 1 5
OE VCC CPU_CLK# C831 X_C15p50N0402
2 A
4 3 4 R31 22R0402 4
GND Y GUICLK 9
HCLK# C811 X_C15p50N0402
C795 C790 C830 C828 C827 C825 U6 NC7SZ125M5X_NL_SOT23-5-LF
L73 60L500m_100 C4.7U10Y0805 C0.01u50Y C0.1u25Y C0.1u25YC0.1u25Y C0.1u25Y +3.3V_CLK4 1 FS1 HCLK C810 X_C15p50N0402
VCCREF REF0/FS1

2
C782 11 2 FS0 R32 22R0402
VCCPCI REF1/FS0 SB_OSC 11
18 23 FS3 R33 22R0402 CPU_CLK R164 51R
VCCPCI 48MHZ/FS3 USB_CLK 10
C1u10Y 24 R34 22R0402
LPC_SIO 18

1
C784 C789 C829 C826 C824 24_48MHZ CPU_CLK# R1097 51R
26 VCC48
C1u10Y C0.01u50Y C0.1u25Y C0.1u25Y C0.1u25Y 28 37 HCLK# R1098 51R
VCC3V66 25MHZ R1099 22R0402 HCLK R1100 51R
41 VCCCPU 25MHZ 36 SATA_CLKR 11
48 VCCA
+2.5V L75 300L500m_250 +2.5V_CLK 35 31 R38 22R0402 NB_GCLK C798 C15p50N0402
VCC25 AGP0 VLINK_CLK 12

2
7 30 VLINK_CLK C799 C15p50N0402
C783 C794 C793 C823 GNDREF AGP1 R39 22R0402 USB_CLK C803 C15p50N0402
12 GND48 AGP2 27 NB_GCLK 8
C1u10Y C4.7U10Y0805 C0.01u50Y C0.1u25Y 19

1
GNDPCI FS2 R40 22R0402 M_DCLK0 C804 X_C10p50N0402
PCI_F/FS2 8 SB_PCLK 12
25 9 FS4 R42 22R0402 M_DCLK#0 C805 X_C10p50N0402
GNDAGP PCI_F1/FS4 LPC_CLK 18
29 GNDCPU PCI_F2 10
38 13 R382 10KR M_DCLK1 C806 X_C10p50N0402
GNDCPU MODE/PCI0 LAN R57 22R0402 M_DCLK#1 C807 X_C10p50N0402
44 GNDAPIC PCI1 14 LAN_CLK 21
47 15 R35 22R0402
GND PCI2 SB_APICCLK 12
5 16 PCI3 R43 22R0402 PCI_CLK0 17 M_DCLK2 C808 X_C10p50N0402
X1 PCI3 PCI4 R44 22R0402 M_DCLK#2 C809 X_C10p50N0402
6 X2 PCI4 17 ROM_LCLK 17
PCI_STP/PCI5 20
Y2
11,14,21 SM_BDT 33 SDATA CPUSTP/PCI6 21
1 2 32 SB_APICCLK C669 X_C5p50N0402
11,14,21 SM_BCK SCLK
C797 14.31818MHZ20P_S-2 C796 +3.3V_CLK R121 4.7KR0402 45 40 R98 22R0402 LPC_SIO C672 X_C5p50N0402
RST CPU1 CPU_CLK 3
3 C10p50N C10p50N 3 39 R117 22R0402 3
REF CPU1 CPU_CLK# 3
R128 +3.3V_CLK 22 LPC_CLK C713 X_C5p50N0402
X_1KR0402 Turbo R46 22R0402
HCLK 43 HCLK 6
34 42 R47 22R0402 HCLK# 6 GUICLK C715 X_C5p50N0402
25,26 PWRGD_PWM VTT_PWRGD/PD# HCLK
R237 0R0402 46 IREF SB_OSC C716 X_C5p50N0402
Change to PWRGD_PWM ICS952911BFLF_SSOP48-RH
Ver:2.1 PCI_CLK0 C717 X_C5p50N0402
ROM_LCLK C718 X_C5p50N0402
R130
475R1%0402
M_MCLKI C720 X_C5p50N0402

SB_PCLK C721 X_C5p50N0402

SATA_CLKR C723 X_C5p50N0402

+VDIMM
L76 60L500m_100 LAN_CLK C724 X_C5p50N0402
U22
10 5 M_R_DCLK2 R170 22R
VDD2.5/1.8-0 DDRT0 M_DCLK2 14
C1u10X0805 C818 C819 C816 21 6 M_R_DCLK#2 R171 22R
VDD2.5/1.8-1 DDRC0 M_DCLK#2 14
C817 C4.7U10Y0805 C4.7U10Y0805 C1u10X0805 27 VDD2.5/1.8-2 M_R_DCLK0 R174 22R
DDRT1 7 M_DCLK0 14
9 8 M_R_DCLK#0 R175 22R M_DCLK#0 14
GND DDRC1
22 GND
C822 C821 C814 28 13 M_R_DCLK1 R172 22R M_DCLK1 14
C0.1u25Y C0.1u25Y C0.1u25Y GND DDRT2 M_R_DCLK#1 R173 22R +3.3V
DDRC2 14 M_DCLK#1 14
+2.5V
2 2
L84 60L500m_100 1 18
AVDD2.5-0 DDRT3
26 AVDD2.5-1 DDRC3 17
C812 C813 C815 2 20 R180 R245
C0.1u25Y C0.1u25Y C0.1u25Y AGND DDRT4 8.2KR0402 X_8.2KR0402
25 AGND DDRC4 19

11,14,21 SM_BDT 16 SDATA DDRT5 24


11,14,21 SM_BCK 15 SCLK DDRC5 23
FS0 R166 10KR0402
3 11 R176 22R M_MCLKI 7 FS1 R163 10KR0402
7 MCLKO+ BUF_INT FB_OUTT
7 MCLKO- 4 BUF_INC FB_OUTC 12

ICS9P936AFLF_SSOP28-LF
R115 R120
X_0R 0R

+VDIMM

1
FS3 FS2 FS1 FS0 CPU

+
EC59
2 .CD1000U6.3EL11.5-RH 0 0 0 0 100
0 0 1 0 133*
0 0 1 1 166
0 0 0 1 200
1 1

MICRO-START INT'L CO.,LTD.


Title
CLOCK SYNTHESIZERS
Size Document Number Rev
MS-7199 2.2
Date: Friday, February 22, 2008 Sheet 13 of 32
A B C D E
A B C D E

+VDIMM

170
175
181
191
194

172
178
184
187
189
197
51
56
62
72
75
78

53
59
64
67
69
DIMM1
M_MA0 188

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
7,15 M_MA[0:13] A0
M_MA1 183
M_MA2 A1 M_0_D4
63 A2 D0 3 M_0_D[0:7] 7
M_MA3 182 4 M_0_D1
M_MA4 A3 D1 M_0_D2
61 A4 D2 9
4 M_MA5 60 10 M_0_D3 4
M_MA6 A5 D3 M_0_D0
180 A6 D4 122
M_MA7 58 123 M_0_D5
M_MA8 A7 D5 M_0_D6
179 A8 D6 128
M_MA9 177 129 M_0_D7
M_MA10 A9 D7 M_1_D8
70 A10/AP D8 12 M_1_D[8:15] 7
M_MA11 57 13 M_1_D9
M_MA12 A11 D9 M_1_D10
176 A12 D10 21
M_MA13 196 22 M_1_D11
A13 D11 M_1_D12
174 A14 D12 131
173 132 M_1_D13
A15 D13 M_1_D14
D14 140
71 141 M_1_D15
7,15 M_BA0 BA0 D15
190 24 M_2_D16
7,15 M_BA1 BA1 D16 M_2_D[16:23] 7
54 25 M_2_D17
BA2/A16 D17 M_2_D18
D18 30
193 31 M_2_D19
7,15 M_CS0# CS0 D19
76 143 M_2_D20
7,15 M_CS1# CS1 D20
144 M_2_D21
D21 M_2_D22
7 M_DQM#0 125 DQM0/DQS9 D22 149
134 150 M_2_D23
7 M_DQM#1 DQM1/DQS10 D23
146 33 M_3_D24
7 M_DQM#2 DQM2/DQS11 D24 M_3_D[24:31] 7
155 34 M_3_D25
7 M_DQM#3 DQM3/DQS12 D25
202 39 M_3_D26
7 M_DQM#4 DQM4/DQS13 D26
211 40 M_3_D27
7 M_DQM#5 DQM5/DQS14 D27
223 152 M_3_D28
7 M_DQM#6 DQM6/DQS15 D28
232 153 M_3_D29
7 M_DQM#7 DQM7/DQS16 D29
164 158 M_3_D30
DQM8/DQS17 D30 M_3_D31
3
D31 159 3
80 M_4_D32
D32 M_4_D[32:39] 7
81 M_4_D33
D33 M_4_D34
7,15 M_SWE# 73 WE D34 86
74 87 M_4_D35
7,15 M_SCAS# CAS D35
192 199 M_4_D36
7,15 M_SRAS# RAS D36
200 M_4_D37
D37 M_4_D38
7,15 M_CKE0 52 CKE0 D38 205
171 206 M_4_D39
7,15 M_CKE1 CKE1 D39
89 M_5_D40
D40 M_5_D[40:47] 7
185 90 M_5_D41
13 M_DCLK0 CK0 D41
186 95 M_5_D42
13 M_DCLK#0 CK0 D42
137 96 M_5_D43
13 M_DCLK1 CK1 D43
138 208 M_5_D44
13 M_DCLK#1 CK1 D44
220 209 M_5_D45
13 M_DCLK2 CK2 D45
221 214 M_5_D46
13 M_DCLK#2 CK2 D46
215 M_5_D47
D47 M_6_D48
7 M_DQS#0 7 DQS0 D48 98 M_6_D[48:55] 7
6 99 M_6_D49
DQS0 D49 M_6_D50
7 M_DQS#1 16 DQS1 D50 107
15 108 M_6_D51
DQS1 D51 M_6_D52
7 M_DQS#2 28 DQS2 D52 217
27 218 M_6_D53
DQS2 D53 M_6_D54 +VDIMM
7 M_DQS#3 37 DQS3 D54 226
36 227 M_6_D55
DQS3 D55 M_7_D56
7 M_DQS#4 84 DQS4 D56 110 M_7_D[56:63] 7
83 111 M_7_D57
DQS4 D57 M_7_D58 C5230 C0.01u50X
7 M_DQS#5 93 DQS5 D58 116
92 117 M_7_D59
2 DQS5 D59 2
105 229 M_7_D60 C5231 C0.01u50X
7 M_DQS#6 DQS6 D60
104 230 M_7_D61
DQS6 D61 M_7_D62 C5228 C10U6.3X50805
7 M_DQS#7 114 DQS7 D62 235
113 236 M_7_D63
DQS7 D63
46 DQS8
45 DQS8 CB0 42 Chage from 1206 to 0805
CB1 43
7,15 M_ODT0 195 ODT0 CB2 48
7,15 M_ODT1 77 ODT1 CB3 49
CB4 161
CB5 162
167 +VDIMM
CB6
11,13,21 SM_BDT 119 SDA CB7 168
11,13,21 SM_BCK 120 SCL
239 SA0 NC/DQS9 126
240 135 R11
SA1 NC/DQS10 1KR1%
101 SA2 NC/DQS11 147
NC/DQS12 156
MVREF_DIM 1 203 MVREF_DIM
VREF NC/DQS13
+VDIMM 238 VDDSPD NC/DQS14 212
NC/DQS15 224
19 233 R14 C15 C335
NC NC/DQS16 1KR1% C1u10Y C1000p50X
55 NC/ERR_OUT NC/DQS17 165
68 NC/PAR_IN
102 DDRII-240_BLACK-RH
NC/TEST

26 RESET_DDR 18 RESET GND 225


1 1
GND 228
GND 231
234
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

GND
GND 237

MICRO-START INT'L CO.,LTD.


2
5
8
11
14
17
20
23
26
29
32
35
38
41
44
47
50
65
66
79
82
85
88
91
94
97
100
103
106
109
112
115
118
121
124
127
130
133
136
139
142
145
148
151
154
157
160
163
166
169
198
201
204
207
210
213
216
219
222

Title
DDR MODULE
Size Document Number Rev
MS-7199 2.2
Date: Friday, February 22, 2008 Sheet 14 of 32
A B C D E
A B C D E

VTT_MEM Decoupling Caps

VTT_MEM Decoupling Caps: 1000uF x 1, 1uF x 55, 0.1uF x 12


VTT_MEM
M_MA3 1 2
M_MA7 3 4 RN1 M_MA[0:13]
7,14 M_MA[0:13]
M_MA4 5 6 8P4R-33R0402
M_MA0 7 8
7,14 M_CKE1 1 2
4 3 4 RN10 VTT_MEM VTT_MEM 4
7,14 M_CKE0
M_MA9 5 6 8P4R-33R0402
M_MA12 7 8 C136 C0.1u16Y0402
M_MA11 1 2 C90 C1u6.3Y0402
M_MA8 3 4 RN12 VTT_MEM C143 C1u6.3Y0402
M_MA1 5 6 8P4R-33R0402
M_MA6 7 8 R228 33R0402 C144 C1u6.3Y0402 C79 C0.1u16Y0402
7,14 M_ODT1
M_MA2 1 2 1 2
7,14 M_CS0#
M_MA5 3 4 RN13 3 4 RN15 C137 C0.1u16Y0402
7,14 M_SRAS#
M_BA1 5 6 8P4R-33R0402 5 6 8P4R-33R0402 C98 C1u6.3Y0402
7,14 M_BA1 7,14 M_BA0
M_MA10 7 8 7 8
7,14 M_ODT0
7,14 M_SWE# 1 2
M_MA13 3 4 RN14 VTT_MEM
5 6 8P4R-33R0402
7,14 M_SCAS#
7 8 C163 C1u6.3Y0402
7,14 M_CS1#
C164 C1u6.3Y0402

VTT_MEM

3
Power for DRAM & VTT_MEM +VDIMM 3
C155 C1u6.3Y0402
Suspend Power for DDR SLOT
C158 C1u6.3Y0402 C156 C1u6.3Y0402

C146 C1u6.3Y0402 C161 C1u6.3Y0402

C147 C1u6.3Y0402 C162 C1u6.3Y0402

C148 C1u6.3Y0402

+5VDUAL

C95 C1u6.3Y0402

1
C167 C1u6.3Y0402

+
EC30 EC31 EC29
.CD1000U6.3EL11.5-RH
.CD1000U6.3EL11.5-RH
.CD1000U6.3EL11.5-RH C170 C1u6.3Y0402

2
Q62
+12V N-IPD09N03LA_TO252-LF

D
R167 4.99KR1% G
R55 0R0805 +VDIMM
CHOKE4 CH-1.2U18A-LF

S
C76 1 2
C1u10Y DIMM Module Decoupling Cap.

+1

+1
Q63
2 EC41 EC43 2
+12V N-IPD09N03LA_TO252-LF C820 +VDIMM
D

C1u10X0805 .CD1500U6.3EL20
.CD1500U6.3EL20 +2.5VDIMM Decoupling Caps: 1000uF x 3, 1uF x 13, .1uF x 4

2
G C171 C1u10Y
R56 0R0805 R111
C67 U66 C172 C1u10Y
2KR1%0402
S

C0.1u25Y 18 15
P12V NCH
+5VSUS 20
R22 0R0805 UGATE C175 C1u10Y
1 5VSBY
19 NEAR DIMM
C358 C357 LGATE C176 C1u10Y
C4.7u16Y1206 C4.7u16Y1206 11
FB C177 C1u10Y
8 P5VSBY
+5V 14 C196 C10p50N
PGOOD C178 C1u10Y
9 12 C210 C0.01u50X R131
R252 R248 VREF_OUT COMP R1111 20KR +VDIMM
1.62KR1%
X_10KR X_10KR 10 5 +VDIMM
VREF_IN VDDQ1 C182 C1u10Y C639 C0.1u25Y
VDDQ2 6
R106 0R 16
11,18,26 SUSB# S3
R107 0R 17 3 VTT_MEM C183 C1u10Y C642 C0.1u25Y
11,28 SUSC# S5 VTT1
VTT2 4
2 C184 C1u10Y
C203 GND
13 GND
1

C1u10X0805 C360 C359 EC64 C188 C1u10Y


+

21 PADGND VTTSNS 7
R1117 0R C4.7u16Y1206 C4.7u16Y1206 .CD1000U6.3EL11.5-RH
ISL6532CRZ_QFN20-RH C189 C1u10Y
2

1 1

MICRO-START INT'L CO.,LTD.


Title
DDR DAMPING RESISTORS
Size Document Number Rev
MS-7199 2.2
Date: Friday, February 22, 2008 Sheet 15 of 32
A B C D E
A B C D E

IDE Connector

IDE

IDE1
R818 33R 1 2
10 IDE_RST#1
4 IDE_R_PDD7 3 4 IDE_R_PDD8 4
IDE_R_PDD6 5 6 IDE_R_PDD9
IDE_R_PDD5 7 8 IDE_R_PDD10
IDE_R_PDD4 9 10 IDE_R_PDD11
IDE_R_PDD3 11 12 IDE_R_PDD12
IDE_R_PDD2 13 14 IDE_R_PDD13
IDE_R_PDD1 15 16 IDE_R_PDD14
IDE_R_PDD0 17 18 IDE_R_PDD15 +3.3VDUAL
19
IDE_R_PDDREQ 21 22
IDE_R_PDIOW# 23 24
IDE_R_PDIOR# 25 26
IDE_R_PHDRDY 27 28 R244 470R
IDE_R_PDDACK# 29 30 R1530
IDE_R_IRQ14 31 32 10KR1%0402
IDE_R_PDA1 33 34 P_ATA66
P_ATA66 11
IDE_R_PDA0 35 36 IDE_R_PDA2
IDE_R_PCS#1 37 38 IDE_R_PCS#3 R1531
IDE_LED#1 39 40 C643 10KR1%0402
X_C0.01u50X
BH2X20[20]_blue

3 3

1 2 IDE_R_PDD2 RN50
11 IDE_PD_2
3 4 IDE_R_PDD13
11 IDE_PD_13
5 6 IDE_R_PDD1 8P4R-33R0402
11 IDE_PD_1
7 8 IDE_R_PDD14
11 IDE_PD_14
1 2
3 4 IDE_R_PDD7 RN51
11 IDE_PD_7
5 6 IDE_R_PDD8 8P4R-33R0402
11 IDE_PD_8
7 8 IDE_R_PDD0
11 IDE_PD_0

1 2 IDE_R_PDD6
11 IDE_PD_6
3 4 IDE_R_PDD9 RN52 +5V
11 IDE_PD_9
5 6 IDE_R_PDD5 8P4R-33R0402
11 IDE_PD_5
7 8 IDE_R_PDD10 IDE_R_PDD7 R279 10KR IDE_R_PHDRDY R346 4.7KR
11 IDE_PD_10
1 2 IDE_R_PDD12
11 IDE_PD_12
3 4 IDE_R_PDD11 RN53 IDE_R_PDDREQ R387 5.6KR IDE_R_IRQ14 R449 4.7KR
11 IDE_PD_11
5 6 IDE_R_PDD3 8P4R-33R0402
11 IDE_PD_3
7 8 IDE_R_PDD4
11 IDE_PD_4

2 2

+5V +5V
+1

1 2 IDE_R_PDA1
11 IDE_PD_A1
3 4 IDE_R_IRQ14 RN54 EC40 C628
11 IDE_IRQ14
5 6 IDE_R_PHDRDY 8P4R-33R0402 CD100u16EL11-RH-1 C0.1u25Y
11 IDE_PDRDY
2

7 8 IDE_R_PDDACK# +5V
11 IDE_PDACK#
1 2 IDE_R_PDD15 +5V
11 IDE_PD_15
3 4 IDE_R_PDIOR# RN55
11 IDE_PIOR#
5 6 IDE_R_PDIOW# 8P4R-33R0402
11 IDE_PIOW#
7 8 IDE_R_PDDREQ R447 R448
11 IDE_PDREQ
4.7KR 4.7KR

IDE_LED#1 D19 BAS32L_LL34


HD_LED 28

1 2 IDE_R_PCS#3 D24 BAS32L_LL34


11 IDE_PCS#3 12 SATA_LED
3 4 IDE_R_PCS#1 RN56
11 IDE_PCS#1
5 6 IDE_R_PDA2
11 IDE_PD_A2
7 8 IDE_R_PDA0 8P4R-33R0402
11 IDE_PD_A0

CLOSE TO VT8237R+

1 1

MICRO-START INT'L CO.,LTD.


Title
IDE CONNECTORS
Size Document Number Rev
MS-7199 2.2
Date: Friday, February 22, 2008 Sheet 16 of 32
A B C D E
A B C D E

PCI SLOT
+5V +5V
+3.3V -12V +12V +3.3V
LPC FLASH ROM PCI1
B1 -12V TRST A1
+3.3V B2 A2
TCK +12V
B3 GND TMS A3
4 B4 A4 4
TDO TDI
B5 +5V +5V A5
B6 +5V INTA A6 PCI_INTR#B 10
10,21 PCI_INTR#C B7 INTB INTC A7 PCI_INTR#D 10
9,10 PCI_INTR#A B8 INTD +5V A8
+3.3V B9 A9
U16 PRSNT1 RESERVED3
B10 RESERVED1 +5V A10
32 13 R1193 R1190 R1191 R1192 R1194 B11 A11
VDD LAD0 LPC_AD0 12,18 PRSNT2 RESERVED4
25 14 X_10KR0402 X_10KR0402 X_10KR0402 10KR0402 X_10KR0402 B12 A12 +3.3VDUAL
VDD LAD1 LPC_AD1 12,18 GND GND
LAD2 15 LPC_AD2 12,18 B13 GND GND A13
23 17 C285 X_C5p50N R451 X_22R B14 A14
12,18 LPC_FRAME# WE/LFRAM LAD3 LPC_AD3 12,18 RESERVED2 3.3V_AUX
21 DQ7 B15 GND RST A15 PCI_RSTX# 10,18,21,26
20 30 ROM_GPI4 R1186 10KR0402 B16 A16
DQ6 A10/GPI4 13 PCI_CLK0 CLK +5V
19 3 ROM_GPI3 R1187 10KR0402 B17 A17
DQ5 A9/GPI3 GND GNT PCI_GNT#0 10
18 4 ROM_GPI2 R1188 10KR0402 B18 A18
DQ4 A8/GPI2 10 PCI_REQ#0 REQ GND
5 ROM_GPI1 R1189 10KR0402 B19 A19
A7/GPI1 +5V PME PCI_PME# 11,21
31 6 ROM_GPI0 R1185 X_10KR0402 B20 A20
13 ROM_LCLK CLK A6/GPI0 10,21 PCI_A_D31 AD31 AD30 PCI_A_D30 10,21
2 7 ROM_A5 R114 1KR B21 A21
10,18,21,26 PCI_RSTX# RESET A5/WP 10,21 PCI_A_D29 AD29 +3.3V
ROM_OE 24 8 ROM_A4 R113 10KR B22 A22
OE/INIT A4/TBL +3.3V GND AD28 PCI_A_D28 10,21
29 MODE A3/ID3 9 10,21 PCI_A_D27 B23 AD27 AD26 A23 PCI_A_D26 10,21
28 GND A2/ID2 10 10,21 PCI_A_D25 B24 AD25 GND A24
R491 16 11 R103 0R B25 A25
GND A1/ID1 WP_BIOS# 18 +3.3V AD24 PCI_A_D24 10,21
4.7KR 12 B26 A26 PCI_A_D31
A0/ID0 10,21 PCI_CBE#3 C/BE3 IDSEL
10,21 PCI_A_D23 B27 AD23 +3.3V A27
W39V040BPZ-RH B28 GND AD22 A28 PCI_A_D22 10,21
+3.3V B29 A29
10,21 PCI_A_D21 AD21 AD20 PCI_A_D20 10,21
10,21 PCI_A_D19 B30 AD19 GND A30
B31 +3.3V AD18 A31 PCI_A_D18 10,21
3 BIOS CNN removed, and added the bios compenent directly for BB.2007.1120 10,21 PCI_A_D17 B32
B33
AD17 AD16 A32
A33
PCI_A_D16 10,21 3
10,21 PCI_CBE#2 C/BE2 +3.3V
B34 GND FRAME A34 PCI_FRAME# 10,21
NOTE: CLOSE TO LPC ROM 10,21 PCI_IRDY# B35 IRDY GND A35
B36 +3.3V TRDY A36 PCI_TRDY# 10,21
ROM_LCLK R122 X_10R ROM_CLK C296 X_C22P50N
BIOS Rev 2.2 10,21 PCI_DEVSEL# B37
B38
DEVSEL GND A37
A38
GND STOP PCI_STOP# 10,21
PCI_PLOCK# B39 A39
LOCK +3.3V
10,21 PCI_PERR# B40 PERR SDONE A40
ROM_GPI0 H B41
B42
+3.3V SBO A41
A42
10,21 PCI_SERR# SERR GND
B43 +3.3V PAR A43 PCI_PAR 10,21
ROM_GPI1 L 10,21 PCI_CBE#1 B44
B45
C/BE1 AD15 A44
A45
PCI_A_D15 10,21
10,21 PCI_A_D14 AD14 +3.3V
B46 GND AD13 A46 PCI_A_D13 10,21
ROM_GPI2 L 10,21 PCI_A_D12 B47
B48
AD12 AD11 A47
A48
PCI_A_D11 10,21
10,21 PCI_A_D10 AD10 GND
B49 GND AD9 A49 PCI_A_D9 10,21
ROM_GPI3 L
10,21 PCI_A_D8 B52 AD8 C/BE0 A52 PCI_CBE#0 10,21
ROM_GPI4 L 10,21 PCI_A_D7 B53
B54
AD7 +3.3V A53
A54
+3.3V AD6 PCI_A_D6 10,21
10,21 PCI_A_D5 B55 AD5 AD4 A55 PCI_A_D4 10,21
10,21 PCI_A_D3 B56 AD3 GND A56
B57 GND AD2 A57 PCI_A_D2 10,21
10,21 PCI_A_D1 B58 AD1 AD0 A58 PCI_A_D0 10,21
B59 +5V +5V A59
PCI_P1ACK#64 B60 A60 PCI_P1REQ#64
2 ACK64 REQ64 2
B61 +5V +5V A61
B62 +5V +5V A62
SLOT-PCI120_white-RH
IDSEL=AD31
MASTER=PCI_REQ#0
PCI_INTR#B

+5V

EC38 1+ 2.CD1000U6.3EL11.5-RH
+5V +5V +5V
C39 C10U6.3X50805
PCI_FRAME# RN65A 1 2 8P4R-4.7KR PCI_INTR#A R192 4.7KR PCI_P1REQ#64 R214 2.2KR
C223 C10U6.3X50805
PCI_TRDY# RN65B 3 4 8P4R-4.7KR PCI_INTR#B R193 4.7KR PCI_P1ACK#64 R213 2.2KR

PCI_SERR# RN85A 1 2 8P4R-4.7KR PCI_INTR#C R199 4.7KR


+3.3V
PCI_PLOCK# RN85B 3 4 8P4R-4.7KR PCI_INTR#D R203 4.7KR +5V C25 C10U6.3X50805

PCI_STOP# RN85C 5 6 8P4R-4.7KR PCI_REQ#0 R212 2.2KR C26 C10U6.3X50805


1 1
PCI_IRDY# RN65C 5 6 8P4R-4.7KR +3.3V

PCI_DEVSEL# RN85D 7 8 8P4R-4.7KR PCI_GNT#0 R205 2.2KR +12V


C37 C10u16Y1206
PCI_PERR# RN65D 7 8 8P4R-4.7KR
-12V
MICRO-START INT'L CO.,LTD.
C38 C10u16Y1206 Title
PCI SLOT
Size Document Number Rev
MS-7199 2.2
Date: Friday, February 22, 2008 Sheet 17 of 32
A B C D E
A B C D E

Voltage Sense
W83627EHF LPC_IO
+1.5VDD VCORE +5VSUS +5V +12V -12V
COM_RI#2 19
Add Q34 on ver:2.2 COM_DCD#2 19
2008'0124 COM_TD2 19
COM_RD2 19
+5VSUS_IN R125 R124 R133 R141 R333 R160
COM_DTR#2 19 10KR 10KR 15KR1% 15KR1% 56KR 232KR1%
4 Q34 COM_RTS#2 19 +1.5V_IN 4
D COM_DSR#2 19
+5V -12V_IN
G
COM_CTS#2 19
VCORE_IN
S
WDTO# 28
N-2N7002_SOT23 +5VSUS_IN
CASEOPEN# 19
-12V_IN +5V_IN
WP_BIOS# 17
+5V_IN +12V_IN
+1.5V_IN +3.3VBAT
+12V_IN
VCORE_IN C516 C0.1u25Y
SIO_VREF C646 R142 R143 R144 R153
SUSB# 11,15,26
10KR1% 10KR1% 10KR1% 10KR1%
C510 C470P50X
C0.1u25Y

102
101
100
U12 HWMGND

99
98
97
96
95
94
93
92
91
90
89
88
87
86
85
84
83
82
81
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
C647 C648 C649 C650 C651
C470P50X C470P50X C470P50X SIO_VREF

CPUVCORE

RSTOUT3#/GP33/SDA

GP42/IRTX/SOUTB
GP43/IRRX/SINB

GP54/PWROK

GP25/MCLK
VREF

VBAT

GP24/MDAT
AUXTIN0

VIN0
VIN1
VIN2
VIN3
VIN4
RSTOUT0#
RSTOUT1#
GP30
GP31
RSTOUT2#/GP32/SCL

RSTOUT4#/GP34
GP35
PME#
GP40/RIB#
GP41/DCDB#

GP44/DTRB#
GP45/RTSB#
GP46/DSRB#
GP47/CTSB#

CASEOPEN#
GP51/RSMRST#

GP52/SUSB#
GP53/PSON#

SUSLED/GP55
GP36
WDTO#/GP50(EN_VRM10)

GP56/PSIN
GP57/PSOUT#
C470P50X C470P50X

DTD+ 103 64
SYSTIN CPUTIN GP37
104 SYSTIN GP26/KDAT 63 Detect CPU temperature differential signals
105 VID5 GP27/KCLK 62
106 VID4 3VSB 61 +3.3VDUAL
107 VID3 KBRST 60
108 59 C517
VID2 GA20M C0.1u25Y SIO_VREF R161 10KR1% RT1 10KRT1%0805 HWMGND
3 109 VID1 AUXFANIN1/SO 58 3
110 VID0 GP60/RIA# 57 COM_RI#1 19
111 56 SYSTIN
AUXFANIN0 GP61/DCDA# COM_DCD#1 19
24 CPU_FAN 112 CPUFANIN0 VSS_2 55
113 SYSFANIN GP62/SOUTA(PENKBC) 54 COM_TD1 19
HWMVCC 114 53 SIO_VREF R162 15KR1% DTD+
AVCC GP63/SINA COM_RD1 19 DTD+ 3
115 W83627EHG-H-RH 52 C530
24 CPUFAN_PWM CPUFANOUT0 GP64/DTRA#(PENROM) COM_DTR#1 19
116 51 C2200P50N
SYSFANOUT GP65/RTSA#(HEFRAS) COM_RTS#1 19
HWMGND 117 50 HWMGND
AGND GP66/DSRA# COM_DSR#1 19 DTD- 3
28 BEEP 118 BEEP/SI GP67/CTSA# 49 COM_CTS#1 19
119 MSI/CPUFANIN1/GP21 3VCC_3 48 +3.3VSIO
120 MSO/CPUFANOUT1/GP20 STB# 47
121 46 +3.3VSIO
GPSA2/GP17 AFD# HWMVCC L39 300L500m_250
122 GPSB2/GP16 ERR# 45
123 GPY1/GP15 INIT# 44
124 43 C518 C531
GPY2/GP14 SLIN# C0.1u25Y C1u10Y
125 GPX2/GP13 PD0 42
126 GPX1/GP12 PD1 41
127 40 HWMGND L40 300L500m_250
GPSB1/GP11 PD2
128 GPSA1/GP10 PD3 39
OVT#/HM_SMI#

AUXFANOUT

SCE#/GP22
SCK/GP23

DSKCHG#

C522 C0.1u25Y
DRVDEN0

LFRAME#
LRESET#

+3.3VSIO
RDATA#

SERIRQ
3VCC_1

3VCC_2
TRAK0#

PCICLK
INDEX#

LDRQ#
HEAD#
STEP#

VSS_1
IOCLK
MOA#

BUSY
DSA#

ACK# C527 C0.1u25Y


SLCT
LAD3
LAD2
LAD1
LAD0
DIR#

WD#
WE#

WP#

PD7
PD6
PD5
PD4
PE

C528 C0.1u25Y
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
C529 C0.1u25Y
2 2

1 + 2
THRM# EC39 CD100u16EL11-RH-1
11 THRM#
+3.3VSIO
W83627EHF Decoupling Caps.

LPC I/O STRAPPING RESISTOR


COM_TD1 L: Disable KBC H: Enable KBC
LPC_SIO GP50 L: TTL LEVEL H: VRM10 LEVEL
13 LPC_SIO
LPC_CLK COM_RTS#1 L: CFAD=2E H: CFAD=4E
13 LPC_CLK +3.3VSIO
COM_DTR#1 L: PNP Default H: PNP no Default
12 LPC_DRQ#
11 SERIRQ
+3.3VBAT R207 1KR COM_TD1 R185 X_4.7KR
CASEOPEN# R181 1MR
12,17 LPC_AD3
12,17 LPC_AD2
R181 POP on ver:2.2 R186 1KR COM_RTS#1 R200 X_4.7KR
12,17 LPC_AD1
12,17 LPC_AD0 2008'0124
12,17 LPC_FRAME#
R187 1KR COM_DTR#1 R204 X_4.7K
10,17,21,26 PCI_RSTX#

LPC_DRQ# R359 4.7KR R116 X_1KR WDTO# R206 X_4.7K +3.3VDUAL


1 +3.3VSIO 1

C644 X_C5p50N R95 X_0R LPC_SIO


+3.3VSIO +3.3V
C645 X_C5p50N R96 X_0R LPC_CLK MICRO-START INT'L CO.,LTD.
L38 300L500m_250 Title
LPC SUPER IO&LPC FLASH ROM
Size Document Number Rev
MS-7199 2.2
Date: Friday, February 22, 2008 Sheet 18 of 32
A B C D E
A B C D E

D10 BAS32L_LL34 +12V


+5V

U_1
COM1 C59 C60

COM_NDCD1

COM_NDSR1
COM_NDTR1
C0.1u25Y U29

COM_NRTS1
COM_NCTS1
C0.1u25Y

COM_NRD1
COM_NTD1

COM_NRI1
20 VCC V+ 1
19 2 COM_NDCD1
18 COM_DCD#1 ROUT1 RIN1
18 3 COM_NDSR1
18 COM_DSR#1 ROUT2 RIN2
17 4 COM_NRD1
18 COM_RD1 ROUT3 RIN3
16 5 COM_NRTS1
18 COM_RTS#1 DIN1 DOUT1
4 15 6 COM_NTD1 4
18 COM_TD1 DIN2 DOUT2
14 7 COM_NCTS1
18 COM_CTS#1 ROUT4 RIN4
13 8 COM_NDTR1
18 COM_DTR#1 DIN3 DOUT3
12 9 COM_NRI1
18 COM_RI#1 ROUT5 RIN5 CONN9

1
2
3
4
5
6
7
8
9
11 10 U_2 D11 -12V
GND V-
GD75232_SSOP20 C61 BAS32L_LL34

2
4
6
8

2
4
6
8
C0.1u25Y
CN4 CN5
8P4C-220P50N 8P4C-220P50N

1
3
5
7

1
3
5
7
10 21
11 22

+5V

COM2 C62
C0.1u25Y U31 U_1 C63 C0.1u25Y
20 VCC V+ 1
19 2 COM_NDCD2
18 COM_DCD#2 ROUT1 RIN1
18 3 COM_NDSR2
18 COM_DSR#2 ROUT2 RIN2
17 4 COM_NRD2
18 COM_RD2 ROUT3 RIN3
3 16 5 COM_NRTS2 3
18 COM_RTS#2 DIN1 DOUT1
15 6 COM_NTD2
18 COM_TD2 DIN2 DOUT2
14 7 COM_NCTS2
18 COM_CTS#2 ROUT4 RIN4
13 8 COM_NDTR2
18 COM_DTR#2 DIN3 DOUT3
12 9 COM_NRI2
18 COM_RI#2 ROUT5 RIN5
11 10 U_2
GND V-
GD75232_SSOP20 C71 CONN-COMX2_teal-20u-in-RH

12
13
14
15
16
17
18
19
20
C0.1u25Y
2
4
6
8

2
4
6
8
+5V CN6 CN7
8P4C-220P50N 8P4C-220P50N

COM_NDCD2

COM_NDTR2
RN32

COM_NDSR2
COM_NRTS2
COM_NCTS2
1
3
5
7

1
3
5
7

COM_NRD2
COM_NTD2

COM_NRI2
COM_DCD#2 1 2
COM_DSR#2 3 4 CP16
COM_CTS#2 5 6
COM_RI#2 7 8 X_Short PAD 0603

X_8P4R-4.7KR0402 CP15
X_Short PAD 0603

2 2

R104 X_0R JCI1


18 CASEOPEN#
R94 X_0R 1
11 INTRUDER
2 INTRUDER
X_BH1X2_white-3.5mm-RH

+5VDUAL

J9
11 RING#
1
C

Q3 R985
1
B
2
3
WAKE ON LAN 1

X_N-MMBT3904_NL_SOT23 X_10KR
E

X_BH1X3HP_white-2pitch-RH

MICRO-START INT'L CO.,LTD.


Title
JCI1 J9 removed for BB .2007.1120 COM/LPT&WAKE UP CIRCUIT
Size Document Number Rev
MS-7199 2.2
Date: Friday, February 22, 2008 Sheet 19 of 32
A B C D E
A B C D E

AC97_CODEC
VT1618
U18 AVDD5
L2 300L500m_250VDD3_AUDIO 1 25 L5 300L500m_250 Rear Audio Jack
+3.3V DVDD1 AVDD1 +5VAUDIO
9 DVDD2 AVDD2 38
C752 C753 C444 C754 C755 C447
C0.1u25Y C0.1u25Y C1u10Y C0.1u25Y C0.1u25Y C1u10Y
4 DVSS1 AVSS1 26
7 DVSS2 AVSS2 42 Add R336 MIC_2 pull high, enable this function.2008.0116
4 4
Reserve R1155 to short MIC_1 & MIC_2 on ver2.2 2008.0212
46 AGND AGND
ID1
11 AC_SYNC 10 SYNC ID0 45 L6、L9、L10、L11、L12、L13 changed from
R987 22R SD_IN0 8
11 AC_SDIN0
5
SDATA_IN
47
300L500m to 75ohm as EMI requested .2008.2.19
11 AC_SDOUT SDATA_OUT EAPD
11 AC_RST# 11 RESET
R988 22R BITCLK 6 EC60 CD100u16EL11-RH-1
11 AC_BIT_CLK BIT_CLK
LINE_OUT_L 35 LOUT_L 1+ 2 LINE_OUT_L VREFOUT
C446 C10p50N
LINE_OUT_R 36 LOUT_R 1+ 2 LINE_OUT_R
14 EC61 CD100u16EL11-RH-1 C707 C464
AUX_L C10p50N C1u10Y
15 AUX_R MONO_OUT 37
R334 R336
39 4.7KR 4.7KR AGND AGND
LNLVL_OUTL
16 VIDEO_L LNLVL_OUTR 41
17 VIDEO_R
28 VREFOUT C460 C1u10Y
VREFOUT C760 C0.1u25Y
CD_L C652 X_C1u10Y 18 27 AUD_VREF C761 C0.1u25Y MIC_2 R342 1KR R511 75R AUDIO1
CD_R C653 X_C1u10Y CD_L VREF C472 C1u10Y
20 CD_R 1
CD_GND C654 X_C1u10Y 19 31 C762 C0.1u25Y R1155 2
CD_GND NC CAP2 C473 C1u10Y 0R
CAP2 32 4
33 +5VAUDIO MIC_1 R343 1KR R516 75R 5
LINE_L C655 C2.2U16Y0805 LINE_IN_L NC C663 C4.7U10Y0805 AGND FRNMIC
23 LINE_IN_L NC 34 3
LINE_R C656 C2.2U16Y0805 LINE_IN_R 24 40 R358 C667 C668
LINE_IN_R NC R344 4.7KR C470P50X C470P50X
HPP 44
43 R330 4.7KR
PC_BEEP C657 X_C1u10Y BEEP_IN NC SPDIF X_10KR AGND
12 PC_BEEP SPDIF_OUT 48
3 MIC_1 C658 C4.7U10Y0805 MIC1 21 AGND AGND 3
MIC_2 C659 C4.7U10Y0805 MIC2 MIC1 AFLT1 C664 C270P50X AUD_VREF NEXT_R R416 1KR R517 75R LINEOUT_R
22 MIC2 AFILT1 29 6
C660 C1u10Y 13 30 AFLT2 C665 C270P50X C681 7
PHONE_IN AFILT2
X_C270P50X 8
2 3 R332 NEXT_L R384 1KR R518 75R LINEOUT_L 9
AGND XTL_IN XTL_OUT AGND X_12KR 17
C661 C22P50N CODEC_XIN
2

VT1618G-RH R436 R425 C680 C679


Y3 4.7KR 4.7KR C470P50X C470P50X AGND
C662 C22P50N 24.576MHZ16P_D-1 CODEC_XOUT AGND
1

AGND LINE_R R385 1KR R519 75R AGND 10


11
12
LINE_L R369 1KR R520 75R 13
14
15
R398 R413 C670 C671 16
4.7KR 4.7KR C470P50XC470P50X 18
+5VAUDIO
JACK-EARX3-13P-RH-4
SPEAK_IN
R423 AGND AGND
X_10KR AGND

8/6 Modify for PC beep PC_BEEP


noise issue
D

2 2
R457 C676
X_1KR X_C1000p50X +5VAUDIO
28 SPEAK G
Q21 F_AUDIO
X_N-2N7002_SOT23 R394 4.7KR
S

F_AUDIO CP1、CP2 changed to C763、C764 0.1uf as EMI requested .2008.2.19


AGND AGND AGND FRNMIC 1 2
MIC_BIAS 3 4 C300 C0.01u50X
LINE_OUT_R 5 6 NEXT_R
AGND
CD_IN LINE_OUT_L
7
9 10 NEXT_L

N31-2051411+N33-1020271-RH C756 C0.1u16X0402


CD5000 AGND
R458 X_330R CD_L AGND C757 C0.1u16X0402
1 C673 C674 C675 AGND
2 C470P50X C470P50X C470P50X C759 C0.1u16X0402
3 R459 X_330R CD_R AGND
4
X_AUDIO-CDIN1X4 C763 C0.1u16X0402
AGND AGND
R460 R461 C678 C764 C0.1u16X0402
X_100KR C677 X_100KR X_C2200P50X AGND

CD_GND
X_C2200P50X

1 1

CD_IN removed for BB.2007.1120


MICRO-START INT'L CO.,LTD.
Title
AC'97 CODE&AUDIO PORT
Size Document Number Rev
MS-7199 2.2
Date: Friday, February 22, 2008 Sheet 20 of 32
A B C D E
5 4 3 2 1

DVDD DVDDA AVDDL AVDDH V-12P VL1_8 VL1_5


+3.3VDUAL
8100C 2.5V 2.5V 3.3V X 2.5V 2.5V X
C5253 VL1_5_LAN1
VL1_8_LAN1
X_C0.1u16Y0402 L85
120L500m_350_0402
+3.3VDUAL L86 R1162 0R0402 C5254 C5255 C5256 8110SC 1.5V 1.5V 1.8V 3.3V 3.3V 1.8V 1.5V

LAN1_VDD
120L500m_350_0402 X_C0.1u16Y0402 C0.1u16Y0402

C5257 +3.3VDUAL
D R1165 0R0402 X_C0.1u16Y0402 C0.1u16Y0402 D

VDD Decoupled Capacitors


close Chip < 200mil

120

126

116
110

107
U70 +3.3VDUAL

11
12

10

99
78
64
54
45
32
24

94
84
71
56
41
26

20

16
7
3
RTL8110SC-GR-RH

VSS
AVDD33

AVDD33#120
AVDD33

AVDD15

VDD15
VDD15
VDD15
VDD15
VDD15
VDD15
VDD15
VDD15
VDD15

VDD33
VDD33
VDD33
VDD33
VDD33
VDD33
VDD33

AVDD18
AVDD18
AVDD18
AVDD18

3
VL1_5_LAN1
PCI_A_D0 104 1 LAN1MDI0+ LAN1_CTRL18 1 Q69
10,17 PCI_A_D0 PCIADPIN0 MDI[0]+ VL1_8_LAN1
PCI_A_D1 103 2 LAN1MDI0- P-PBSS5350Z_SOT223
10,17 PCI_A_D1 PCIADPIN1 MDI[0]-

LAN1_VDD
PCI_A_D2 102 5 LAN1MDI1+ VL1_8_LAN1
10,17 PCI_A_D2

2
4
PCI_A_D3 PCIADPIN2 MDI[1]+ LAN1MDI1-
10,17 PCI_A_D3 98 PCIADPIN3 MDI[1]- 6
PCI_A_D4 97 14 LAN1MDI2+
10,17 PCI_A_D4 PCIADPIN4 MDI[2]+
PCI_A_D5 96 15 LAN1MDI2- C5258
10,17 PCI_A_D5 PCIADPIN5 MDI[2]-
PCI_A_D6 95 18 LAN1MDI3+ C532 need to C5261 C5259 C0.1u16Y0402 C5260
10,17 PCI_A_D6 PCIADPIN6 MDI[3]+
PCI_A_D7 93 19 LAN1MDI3- C22U6.3X50805 C0.1u16Y0402 C5262 C0.1u16Y0402
10,17 PCI_A_D7 PCIADPIN7 MDI[3]-
10,17 PCI_A_D8
PCI_A_D8 90 PCIADPIN8
close Q21 C0.01u16X0402 C5263
PCI_A_D9 89 X_C0.01u16X0402
10,17 PCI_A_D9 PCIADPIN9
PCI_A_D10 87 105
10,17 PCI_A_D10 PCIADPIN10 LANWAKE
PCI_A_D11 86 117 LAN1_LINK_ACK
10,17 PCI_A_D11 PCIADPIN11 LED0 +3.3VDUAL
PCI_A_D12 85 115 LAN1_100_LED#
10,17 PCI_A_D12 PCIADPIN12 LED1 +3.3VDUAL
PCI_A_D13 83 114
10,17 PCI_A_D13 PCIADPIN13 LED2 VL1_5_LAN1
PCI_A_D14 82 113 LAN1_1000_LED#
10,17 PCI_A_D14 PCIADPIN14 LED3
PCI_A_D15 79 For RTL8110SC C5264
10,17 PCI_A_D15 PCIADPIN15

3
PCI_A_D16 C10U6.3X50805

LAN1_VDD
10,17 PCI_A_D16 59 PCIADPIN16
PCI_A_D17 58 LAN1_CTRL15 1 Q70 C5265
10,17 PCI_A_D17 PCIADPIN17 +3.3VDUAL
PCI_A_D18 57 U71 P-PBSS5350Z_SOT223 VL1_5_LAN1 C5266 C0.1u16Y0402
10,17 PCI_A_D18 PCIADPIN18
PCI_A_D19 55 106 1 8 C0.1u16Y0402 C5267
10,17 PCI_A_D19

2
4
PCI_A_D20 PCIADPIN19 EECS CS VCC C5268 C0.1u16Y0402
10,17 PCI_A_D20 53 PCIADPIN20 EESK 111 2 SK NC 7
PCI_A_D21 50 109 3 6 C5269 C0.01u16X0402 C5270
10,17 PCI_A_D21 PCIADPIN21 EEDI/AUX DI NC
C PCI_A_D22 49 108 4 5 C0.1u16Y0402 C5271 C0.1u16Y0402 C
10,17 PCI_A_D22 PCIADPIN22 EEDO DO GND
PCI_A_D23 47 C0.01u16X0402 C5272
10,17 PCI_A_D23 PCIADPIN23
PCI_A_D24 43 ATL-128x8-0.5us-SOIC8 C5273 C0.1u16Y0402
10,17 PCI_A_D24 PCIADPIN24 +3.3VDUAL
PCI_A_D25 42 C5275 C0.1u16Y0402 C5274
10,17 PCI_A_D25 PCIADPIN25 R1167 X_10KR0402
PCI_A_D26 40 C22U6.3X50805 C5276 C5277 C5278 C0.1u16Y0402
10,17 PCI_A_D26 PCIADPIN26
PCI_A_D27 39 C0.1u16Y0402 C0.1u16Y0402 C5279
10,17 PCI_A_D27 PCIADPIN27 R1168 3.6KR1%0402
PCI_A_D28 37 C1u6.3Y0402 C0.1u16Y0402
10,17 PCI_A_D28 PCIADPIN28
PCI_A_D29 36 C358 need to
10,17 PCI_A_D29 PCIADPIN29
PCI_A_D30 34 125 LAN1_CTRL15
10,17 PCI_A_D30 PCIADPIN30 CTRL15
10,17 PCI_A_D31
PCI_A_D31 33 PCIADPIN31
close Q16
8 LAN1_CTRL18
PCI_CBE#0 CTRL18
10,17 PCI_CBE#0 92 CBEBPIN0
PCI_CBE#1 77 121 C5280 C27P50N0402
10,17 PCI_CBE#1 CBEBPIN1 XTAL1
PCI_CBE#2 60
10,17 PCI_CBE#2 CBEBPIN2
PCI_CBE#3
10,17 PCI_CBE#3 44 CBEBPIN3 LAN1 CONNECTOR

2
PCI_FRAME# 61 X9
10,17 PCI_FRAME# FRAMEB
PCI_IRDY# 63
10,17 PCI_IRDY# IRDYB
PCI_TRDY# 67 25MHZ20P_S-2
10,17 PCI_TRDY#

1
PCI_DEVSEL# TRDYB CONN10B
10,17 PCI_DEVSEL# 68 DEVSELB
PCI_STOP# 69 R1170 200R0402 LAN1_ACTLED 19 21 LAN1_1000_LED1# R1171 0R0402 LAN1_1000_LED#
10,17 PCI_STOP# STOPB +3.3VDUAL GREEN GREEN
PCI_PAR 76 122 C5281 C27P50N0402
10,17 PCI_PAR PAR XTAL2
PCI_PERR# 70 LAN1_LINK_ACK 20 22 LAN1_LED_27 R1172 200R0402 LAN1_100_LED#
10,17 PCI_PERR# PERRB YELLOW
PCI_SERR# 75
10,17 PCI_SERR# SERRB
PCI_PME# 31 74 R1173 X_0R0402
11,17 PCI_PME# PMEB(PME#) NC#74 SM_BDT 11,13,14
PCI_INTR#C 25 72 R1174 X_0R0402
10,17 PCI_INTR#C INTAB NC SM_BCK 11,13,14 9 16
PCI_REQ#1 30
10 PCI_REQ#1 REQB
PCI_GNT#1 29 88 LAN1_SEL66_33# R1175 0R0402
10 PCI_GNT#1 GNTB M66EN
CLKRUNB 65
PCI_A_D21 R1176 100R0402 46 23 R1177 1KR1%0402
+5V
GND/VSSPST
GND/VSSPST
GND/VSSPST
GND/VSSPST
GND/VSSPST
GND/VSSPST

GND/VSSPST
GND/VSSPST
GND/VSSPST
GND/VSSPST

GND/VSSPST
GND/VSSPST
GND/VSSPST
GND/VSSPST
GND/VSSPST
GND/VSSPST
GND/VSSPST
GND/VSSPST

IDSEL ISOLATEB(ISOLATE#) R1178 15KR1%


10,17,18,26 PCI_RSTX# 27 PCIRSTB
B B
VSS#123
VSS#124

28 127 R1179 2.49KR1%0402


13 LAN_CLK

9
10
11
12
13
14
15
16
17
18
PCICLK RSET CONN-RJ45_USBX2_LEDX2_GT-RH
VSS
VSS

VSS

VSS
VSS

VL1_8_LAN1

R1180
2.49K close to Pin-127 LAN1MDI3-
22
48
62
73
112
118

35
52
80
100

4
17
123
124
128

9
13

21
38
51
66
81
91
101
119

LAN1MDI2-
IDSEL = PCI_A_D21

0R
LAN1MDI1- Giga-LAN
LAN1_ACTLED C5282 C0.1u16Y0402
R1520 LAN1MDI0-
MASTER = PCI_REQ#1 X_0R0402 N58-22F0221-S42
LAN1_LINK_ACK C5283 C0.1u16Y0402
PCI_INTR#C
LAN1_1000_LED1# C5284 C0.1u16Y0402 LAN1MDI3+ Link Green
C5500 LAN1MDI2+ Active Blinking
LAN1_LED_27 C5285 C0.1u16Y0402
X_C0.1u16Y0402 LAN1MDI1+ 1000 Yellow
LAN1MDI0+ 100 Green
10 None

19

20 Green

Yellow
21

A 22 Green A

MICRO-START INT'L CO.,LTD.


Title
LAN RTL8110SC
Size Document Number Rev
MS-7199 2.2
Date: Friday, February 22, 2008 Sheet 21 of 32
5 4 3 2 1
A B C D E

VT1622A
U8
TV-OUT
51 PD15 VSYNC 22 TV_VS 9
50 PD14 HSYNC 23 TV_HS 9
4 47 4
PD13
46 PD12
TV_D11 45 2 TV_XI
9 TV_D11 PD11 XI
TV_D10 44 3 TV_XO
9 TV_D10 TV_D9 PD10 XO Y6
9 TV_D9 43 PD9
TV_D8 42 61 TV_BCO 1 2
9 TV_D8 TV_D7 PD8 BCO
9 TV_D7 41 PD7
TV_D6 38 58 TV_CSO 14.31818MHZ20P_S-2
9 TV_D6 TV_D5 PD6 CSO/HSO TV_VSO
37 60
9
9
9
TV_D5
TV_D4
TV_D3
TV_D4
TV_D3
36
35
PD5
PD4
PD3
VSO

VCCPLL 64 VDDA1
C698
C27P50N
C699
C27P50N
S-Video
TV_D2 34 1
9 TV_D2 TV_D1 PD2 VCCOSC
9 TV_D1 31 PD1 VCCBGAP 5
TV_D0 30 9 C692 C22P50N
9 TV_D0 PD0 VCCDAC
VCCDAC 13 VDDA2
R959 X_0R DACC L51 LUMA
C5013 X_C5p50N 26 1.8U50m_1206
VCC33 +3.3V

3
25 40 VDDA2
9 TV_CLK XCLK VCC33
R925 33R 27 57 C130 C131 C141 1 2 C690 C688 R982
9 TV_CLKR PCLK VCC33 C0.1u25Y C330P50X
C270P50X X_75R1%
VCC25 18 D13
TV_SBCK 20 32
9 TV_SBCK SBC VCC25
TV_SBDA 21 48 C0.1u25Y C0.1u25Y S-BAT54S_SOT23
9 TV_SBDA SBD VCC25
VCC25 59 VDD S1
DACA 10 63 C121 C122 C123 C126 C693 C22P50N S-VIDEO
DACB DACA GNDPLL
12 4 CONN-MiniDIN4P-2.5pitch-RH
DACC DACB GNDOSC DACB L37 CHROMA
14 DACC GNDBGAP 8 3 4
3 DACD 16 11 1.8U50m_1206 3
DACD GNDDAC C0.1u25Y C0.1u25Y C0.1u25Y C0.1u25Y
GNDDAC 15 1 2

3
VDDA2 C691 C689 R983 7 5
24 1 2 C270P50X C330P50X X_75R1%
GND
3,8,10 CHIP_RESET# 19 39

6
RESET# GND
GND 56 D14
R989 4.64KR1% TV_RSET 7 CAP must between pin 5 &
RSET S-BAT54S_SOT23
GND 17 pin 6 with wide trace and
CONF_XLT 55 33 as close as possible to
ADDR CONF_XLT GND
53 ADDR GND 49 VT1622
GND 62
R468 10KR 29 DS
COMP 6 VDDA2
R469 10KR 54 C5007 C0.1u25Y
TESTMODE

NC1 28
NC2 52

_VT1622A-RH

change U25 orcad lib


2
VT1623 Chip Strapping Ver:2.1
2

+3.3V +3.3V VDD


U25
+3.3V
+5V 4 TV_SBCK R470 10KR
VOUT TV_SBDA R471 10KR
R475 R474 3
X_10KR IN
X_10KR
GND

OUT 2
ADDR CONF_XLT C145 C560
C0.1u25Y C10u6.3X51206 L1117G-2.5_SOT223-3-RH
1

C154 C559
R473 R472 C0.1u25Y C10u6.3X51206
10KR 10KR

VDD VDDA1
L57 60L500m_100

DACA R978 75R1%


C558 C159 C157
DACB R979 75R1% C10u6.3X51206 C0.1u25Y C0.1u25Y

DACC R980 75R1%


1 DACD R981 75R1% VDD VDDA2 1
L58 60L500m_100

C561 C180 C174 C166


TV_VSO C573 C10p50N C10u6.3X51206 C0.1u25Y C0.1u25Y C0.1u25Y
MICRO-START INT'L CO.,LTD.
TV_CSO C687 C10p50N Title

TV_BCO C684 C10p50N


TV-OUT VT1622
Size Document Number Rev
MS-7199 2.2
Date: Friday, February 22, 2008 Sheet 22 of 32
A B C D E
A B C D E
Not POP R514、R515、R512、R513、

DVI
Add R243、R211、R239、R233、 C613、C682、C641、C640 for EMI
R191 for VT1632A .2008.0116 requested.2008.0116
EC27 exchanged from C93-1001641-N07
DVI_P1CLK_N removed Place as close as possible to C11-1063034-W082008.0121
FB58
as EMI requested。2008.2.18 DVI_VCCA DVI_PLL1 DP1DET R498 X_0R 60L1_100_1206 to the DVI Connector.
R62 1KR
C695 X_C10p50N DVI_VCC DVI_PLL2 EDGE R499 0R
FB59

3
C694 X_C10p50N +2.5V C103 R891 60L1_100_1206 F10
U50 C1u10Y PVDD

12
33

23
29

18
49
1 2 100KR1% +5V

1
4 DVI_TXC+ C224 C683 F-MINISMDC150 4

VCCA
VCCA
VCC
VCC
VCC

VCCPLL
VCCPLL
R243 22R0402 DE R512 C613 X_C0.1u16Y0402 D27 C0.1u25Y C10U10Y0805
8 DVI_P1DE 2 DE TXC+ 22
R211 22R0402 CLK 57 21 X_300R0402 DVI_TXC- S-BAT54S_SOT23
8 DVI_P1CLK IDCK+ TXC-
R239 X_22R0402
CLK_N 56 DVI_TX0+
8 DVI_P1CLK_N IDCK-
R233 22R0402 DVI_P1HS 4 25 R513 C682 X_C0.1u16Y0402
8 DVI_P1HS HSYNC TX0+
R191 22R0402 DVI_P1VS 5 24 X_300R0402 DVI_TX0- DVI_FTX2- DVI_TX2-
8 DVI_P1VS VSYNC TX0-

MEC1

1
RN3 8P4R-22R-LF DVI_TX1+
2 D0 R514 C641 X_C0.1u16Y0402 DVI1

25
8 DVI_P1D00 1 63 D0 TX1+ 28
3 4 D1 62 27 X_300R0402 DVI_TX1- R58
8 DVI_P1D01 D1 TX1-
8 DVI_P1D02 5 6 D2 61 D2
DVI_TX2+ DVI_TX0- DVI_FTX0- 75R0402

3
8 DVI_P1D03 7 8 D3 60 D3 TX2+ 31 R515 C640 X_C0.1u16Y0402 13 1
8 DVI_P1D04 1 2 D4 59 30 X_300R0402 DVI_TX2- 14 2 DVI_FTX2+ DVI_TX2+

2
D4 TX2-
8 DVI_P1D05 3 4 D5 58 D5
R59 15 3 L44
R955 510R1% DVI_VCCA 75R0402 CMC-L12-9008014
8 DVI_P1D06 5 6 D6 55 D6 EXTSWING 19 16 4
8 DVI_P1D07 7 8 D7 54 D7 MSEN 11 R485 4.7KR +3.3V 17 5
1 2 D8 53 R486 X_0R DP1DET DVI_TX0+ DVI_FTX0+ 18 6 R430 0R SB_CLK
8 DVI_P1D08

4
D8 0R
8 DVI_P1D09 3 4 D9 52 D9 PD# 10 R484 4.7KR +3.3V L45 19 7 R487 SB_DAT
8 DVI_P1D10 5 6 D10 51 D10 NC 34 R483 C696 CMC-L12-9008014 20 8
7 8 D11 50 4.7KR C1000p50X 21 9 DVI_FTX1- DVI_TX1-
PNC
LEN
AA4
CR0
E 0

8 DVI_P1D11 D11

2
22 10
RN6 8P4R-22R-LF 47 9 EDGE R479 4.7KR DVI_TXC+ DVI_FTXC+ 23 11
D12 EDGE/HTPLG +3.3V

3
RN7 8P4R-22R-LF 46 13 ISEL R480 4.7KR 24 12 R60
D13 ISEL/RST# +3.3V
45 14 DSEL R481 0R SDA 75R0402
D14 DSEL/SDA BSEL R482 0R SCL R61
44 D15 BSEL/SCL 15
43 +3.3V 75R0402 C1 C3 DVI_FTX1+ DVI_TX1+

1
D16 DKEN R476 4.7KR L46
42 D17 DKEN 35 C5 C6
Near CHIP 41 DVI_TXC- DVI_FTXC- C2 C4 CMC-L12-9008014

4
D18 A3 R462 4.7KR L47
40 D19 CTL3/A3/DK3 6
3 +1.5VDD 39 7 A2 R477 4.7KR CMC-L12-9008014 3

26
MEC2
D20 CTL2/A2/DK2 A1 R478 4.7KR
38 D21 CTL1/A1/DK1 8
37 D22
R911 36 D23
GNDPLL

1KR1% CONN-DVI24P_white-RH-1
GNDA
GNDA
GNDA

0.75V DVI_VREF 3
GND
GND
GND

VREF
+3.3V R58,R59,R60,R61 changed from 120ohm to 75ohm as EMI requested. 2007.07.16
R926 C190
Add R430&R487 will close the DVI driver no display issue.2007.9.19
16
48
64

32
26
20

17

1KR1% C0.1u25Y _VT1632A-RH C463


C0.1u16X0402 L44、L45、L46、L47 changed from 180ohm to 90ohm as EMI requested .2008.2.19

C463 close to +3.3V of U50


Change to GND for EMI request ver:2.2
0128'2008 +3.3V +3.3V +3.3V +3.3V +3.3V
Add C463 for U50 2008.0116
C345 C353 C361 C356 C367
C0.1u16Y0402 C0.1u16Y0402 C0.1u16Y0402 C0.1u16Y0402 C0.1u16Y0402

DKEN R452 X_4.7KR


EDGE R453 X_4.7KR
DSEL R454 X_4.7KR +3.3V +3.3V +3.3V +3.3V +3.3V
BSEL R455 X_4.7KR
ISEL R456 X_4.7KR Remove R437、R442、R443 for simplify the circuit.2008.0116 C366 C362 C363 C364 C368
C0.1u16Y0402 C0.1u16Y0402 C0.1u16Y0402 C0.1u16Y0402 C0.1u16Y0402
2 2
R453 not to POP 2008.0116
ISEL DSEL BSEL
I2C mode: H H H EMI request ver:2.2
0125'2008
Output
EDGE EDGE / HTPLG BSEL/SCL MSEN When receiver is
ISEL DKEN CTL/A/DK[3:1] DSEL/SDA EDGE / HTPLG 0 Falling 0 12 bits 0 Not Detected
+1.5VDD +1.5VDD +3.3V +3.3V PVDD
0 0 CTL[3:1] default de-skew 0 Single Edge Mode (IDCK+/-) 1 Rising 1 24 bits 1 Detected
Q43

G
0 DK[3:1] de-skew by DK[3:1] Dual Edge Mode (IDCK+) Falling is Pri. R501 Q45 R497 R492
1 1 0 SCL 2.7KR 4.7KR 4.7KR
1 X A[3:1] de-skew by I2C 1 Rising is Pri. S D SCL S D SB_CLK
SDA Used as Hot Plug 12/24bits thru I2C Output thru I2C 8 DVI_SB_CK
N-FDN337N_SOT23-3-RH N-FDN337N_SOT23-3-RH

+1.5VDD +1.5VDD +3.3V +3.3V PVDD

Removed L74、L79 60_500mA 2008.0116 R496 R493

G
R500 Q46 4.7KR Q44 4.7KR
2.7KR
DVI_PLL1 L77 60L500m_100 S D SDA S D SB_DAT
+3.3V 8 DVI_SB_DA
C221 C219 C104 DVI_VCCA L52 60L500m_100 N-FDN337N_SOT23-3-RH N-FDN337N_SOT23-3-RH
+3.3V
C0.01u50X C0.1u25Y C1u10X0805
C197 C216 C217 C218 C94
C0.01u50X C0.1u25Y C0.1u25Y C0.1u25Y C1u10X0805
1 DVI_PLL2 L78 60L500m_100 1
+3.3V
C222 C181 C101
C0.01u50X C0.1u25Y C1u10X0805

DVI_VCC L53 60L500m_100


+3.3V MICRO-START INT'L CO.,LTD.
Removed CP21、CP22;Add C746、C747、C749、C758 C744 C745 C746 C747 C749 C758 Title

、L53; C0.1u25Y C0.1u25Y C0.1u25Y C0.1u25Y C0.1u25Y C0.1u25Y DVI(VT1632)


C197、C221、C222 0.1uf changed to 0.01uf; Size Document Number Rev
C94、C101、C104 10uf changed to 1uf 2008.0116 MS-7199 2.2
Date: Friday, February 22, 2008 Sheet 23 of 32
A B C D E
A B C D E

+5V

VGA Connector +3.3V F9


F-MINISMDC200

2
D17 D18 D23 L80
3 3 3 300L500m_250
4 S-BAT54S_SOT23 S-BAT54S_SOT23 C66 +5V 4
S-BAT54S_SOT23 C0.1u25Y

16
VGA1 R1002 R1001
6 4.7KR 4.7KR
L61 60L500m_100 R 1 11
9 VGA_AR
7
L62 60L500m_100 G 2 12
9 VGA_AG VGA_SPD2 9
8
L63 60L500m_100 B 3 13
9 VGA_AB
9
C108 C107 C105 C113 C114 4 14
R502 R503 R504 C10p50N C111 10
75R 75R 75R C10p50N C10p50N C10p50N 5 15 VGA_SPCLK2 9
C10p50N C10p50N

17
_CONN-D-SUB15F_blue-3.18mm
NOTE: R,G,B should be 12 mils width and no longer than 6".
GNDRGB should be at least 15 mils width.

3 3

VSYNC R89 22R1%


9 VGA_VSYNC
C2
C12p50N

HSYNC R29 22R1%


9 VGA_HSYNC
C19
C12p50N

Add cpu fan speed


FAN Connector
Ver:2.1
2
CPU FAN 2

+12V

D1 BAS32L_LL34

R63 4.7KR0402 R23 4.7KR0402 R24 27KR0402 CPU_FAN


CPU_FAN 18
+3.3V
S

CPUFAN
G Q24 R25
3 10KR0402
R992 2
P-AP2303GN_SOT23-3-RH 1
1KR0402
BH1X3BP_white-RH
C

B Q18
18 CPUFAN_PWM
R65 4.7KR0402 N-MMBT3904_NL_SOT23
D26 S-SM5817A[sn]_DO214AC
+5V
E

C195
1 X_C10u6.3X51206 1

MICRO-START INT'L CO.,LTD.


Title
VGA CONNECTOR
Size Document Number Rev
MS-7199 2.2
Date: Friday, February 22, 2008 Sheet 24 of 32
A B C D E
A B C D E

CPU VCORE PWM CIRCUIT


8P4R-0R0402
RN171
4
3 CPU_VID2 1 2 VID2 4

3 CPU_VID1 3 4 VID1
3 CPU_VID0 5 6 VID0
3 CPU_VID4 7 8 VID4 +12V
3 CPU_VID3 R1118 0R VID3
3 CPU_VID5 R1119 0R VID5
C20 +12V
R1120 C4.7U25X1206 From power team suggestion
+5V 0R0805 +5V
R4 change from 3.24KOhm,1% to 6.2k

+1
C5224
C0.1u25Y 07.7.11

2
CH-3.3U4A-LF

1
C5226 CHOKE1
R123 C0.1u25Y C48 EC65
C16 C1u25Y1206 CD1000U16EL20-1

2
100KR1% C1u10X50402

+1

+1
D32 EC67 EC66 C69 C70
R127 C1 S-RB751V-40_SOD323-RH C10u16Y1206 C10u16Y1206

2
1.05KR1% C0.027U50X Q59

D
R48 U67 N-IPD09N03LA_TO252-LF
243KR1% G CD1000U16EL20-1
CD1000U16EL20-1
1 38 R45 0R0805
R110 0R0402 VDD VBAT R4 6.2KR1%
2 37

S
VCCP_EN DACOUT ISEN1
3 DSV PHASE1 36
4 35 CHOKE2 CH-0.8U35A-RH
+3.3V 1KR R51 5 FSET UG1 R5 2R0805 C697 C0.22U50X_0805 CD820U2.5SO CD820U2.5SO VCORE
NC BOOT1 34
3 R105 X_4.7KR0402 6 33 3

D
+3.3V EN VSSP1 R1126
7 DRSEN LG1 32

+1

+1

+1

+1
R1127 4.7KR 8 31 G 2.2R1%0805
VID0 DSEN# VDDP Q60 C5229
9 VID0 NC 30
R1128 0R VID1 10 29 N-IPD06N03LA_TO252 D31 EC69 EC70 EC71 EC72 C10U6.3X50805

2
VID2 VID1 NC C620 X_S-B340LA_SMA
11 VID2 NC 28
VID3 12 27 C4.7U10Y0805 C21
VID4 VID3 NC C2200P50X0805 CD820U2.5SO
13 VID4 NC 26 +5V
VID5 14 25 R49 1KR X_CD820U2.5SO
PWRGD_PWM VID5 NC
13,26 PWRGD_PWM 15 PGOOD VSEN 24
16 EA+ DRSV 23
17 COMP STV 22 EC69 EC70 EC71 EC72 PN updated from C71-8210221-S03 to
18 FB OCSET 21 C71-8210241-N07 2007.0629
R134 19 20
SOFT VSS
2

16KR0402 C637
X_C1800P50X

R1143 R893 HS5 From power team suggestion


931R1%0402 ISL9501CVZA-T_TSSOP38-RH 54.9KR1%-1 HS-0500410-K08
EC70,EC71 change from 560u to 820u
1

+5V 07.4.23
C636 EC69 added on.
C2200P16X0402
07.7.11

2
R1132 X_0R R10
R1 45.3KR1%

2
C635 X_10KR1% C5235 C719 C5238
X_C0.1u25Y C1u10Y C560P50N C1800P50X
C638 C666
X_C1800P50X

C0.015u50X
From power team suggestion R990
2 R1143 change from 3.9KOhm,1% to 931R 75KR1% 2
R155
07.4.23 2KR1%0402 R154
R134 change from 10KR,1% to 16KR 1% for X_10KR0805
COMP better 07.7.11 VCORE

REMOTE SENSE at CPU side

Change VCCP_PG +3.3V


Ver:2.1

R247 R50
10KR0402 1KR0402

PWRGD_PWM
D

G C140
Q65 C0.1u16Y0402
N-2N7002_SOT23
S

C5240
C

N-MMBT3904_NL_SOT23 Q28 X_C0.022U16X


5 VCCP_PG B
R183 1KR0402
+3.3V
E

1 1
R238
1KR0402

VCCP_EN
MICRO-START INT'L CO.,LTD.
D

G Q66 Title
N-2N7002_SOT23 CPU VOLTAGE
S

Size Document Number Rev


MS-7199 2.2
Date: Friday, February 22, 2008 Sheet 25 of 32
A B C D E
A B C D E

4 4

ATX POWER +2.5V

R255 X_100R1% R256 X_510R1%

+3.3V R230
X_4.7KR
-12V +5V +5V +5VSUS +12V +5V

C
PWRGD_CPU 3

1
R505 1KR

+
B
+5VSUS EC47 C5011 C5012 R197 Q14
C5010 .CD1000U6.3EL11.5-RH
C0.1u25Y C0.1u25Y 4.7KR N-MMBT3904_NL_SOT23

E
2
C0.1u25Y
ATXPWR
R194 11 1 PWR_GD
3V3 3V3 PWR_GD 27
4.7KR 12 2
-12V 3V3
13 GND GND 3
PSON# 14 4
PS-ON 5V
15 GND GND 5
16 6
C

R196 Q13 GND 5V R250 100R +VDIMM


3 17 GND GND 7 3
B N-MMBT3904_NL_SOT23 18 8 PWRGD PWR_GD
11,15,18 SUSB# -5V PW-OK +5VDUAL
19 5V 5VSB 9
1KR 20 10
E

5V 12V C5018 R227


PWR-ATX20 C0.1u25Y C5020 4.7KR
C5014 U17 C0.1u25Y RESET_DDR 14

5
C0.1u25Y C5015 C5016 C5017

C
C0.1u25Y C0.1u25Y C0.1u25Y 2
4 POWER_GD R506 1KR RST_DDR B
1 Q15
N-MMBT3904_NL_SOT23

E
3
LVC1G00DBV_SOT23-5-RH
+5V
S1 S3 S5
SUSA# 0 0 0 +3.3VDUAL
SUSB# 1 0 0 R202
SUSC# 1 1 0 4.7KR
R251 22R
28 RST_SW
R508
1KR
C5019 C5023 PGDSB R257 22R
PWRGD_SB 10,12
C0.1u25Y X_C2.2u10Y

C
R507 1KR PGD_SB B C5021
Q19 C0.1u25Y
N-MMBT3904_NL_SOT23
13,25 PWRGD_PWM

E
2 2

R259 22R
POK 27
C5022
C0.1u25Y

1 1

MICRO-START INT'L CO.,LTD.


Title
ATX POWER
Size Document Number Rev
MS-7199 2.2
Date: Friday, February 22, 2008 Sheet 26 of 32
A B C D E
A B C D E

+5VDUAL GENERATE CIRCUIT

+3.3V +1.5VDD

N-APM2506N_TO252
+5VSUS +5VSUS +5VSUS +12V Q51
D S
4 4

1
C5036

1
C0.1u25Y R276 EC62 CB8 CB9 R246 EC63

+
1KR .CD1000U6.3EL11.5-RH C1u10Y C1u10Y 100R1% .CD1000U6.3EL11.5-RH

2
8
U26A U26B R277

2
8
POK 3 2.2KR
26 POK +
1 OUT_D1 5 +
R273 1KR 2 LM393DR2_SOIC8 7 OUT_D2
+5VSUS -
IN_D2 6 LM393DR2_SOIC8 +12V
-
U57
C5037 4 4 3

4
C0.1u25Y IN DRV

GND 2
CB10
C0.1u25Y 5 1
+5V EN SNS
+5VDUAL
R274 +5V SC1548CSK-1.5TRT_SOT23-5-RH
Q4
1KR
+5VSUS 1 8
2 7

1
+
3 6
1

EC50
+

4 5
EC51 CD100u16EL11-RH-1

2
CD100u16EL11-RH-1 NP-SI4501DY-T1-E3_SOIC8-RH
2

+1.5VDD
CB1 CB2 +1.5VDD
C5102 C0.01u50X
3 C5104 C0.01u50X 3
C5101
C1000p50X CB7 C1u10Y
C5107 C4.7U10Y0805
CLOSE TO THE ATX POWER CONNECTOR C0.1u25Y C0.1u25Y
Decoupling capacitors

+2.5V

Suspend Power for SB +1.5V SUSTAIN POWER +2.5V power for NB & SB
C5040 C5041
+5VDUAL change sch for +2.5v C0.1u25Y C0.1u25Y
+3.3VDUAL +1.5VSUSNB Ver:2.1
+5V
U53 EMI CAP
C5024 R266 R229 +2.5VDUAL 2 3
C5027 C0.1u25Y 220R VIN VOUT
2 220R 2
GND

C5035 C5031 C5034 C5043


C4.7U10Y0805 C1u10Y C4.7U10Y0805 C1u10Y C1u10X50402
1

C5028 C5025
1

2 C4.7U10Y0805 C0.1u25Y AME8800LEFTZ_SOT89-3-LF

6
U14 +3.3V
U41

VCNTL
3

APL431BAC_SOT23 5
VIN

VIN#9 9
CLOSE TO THE VT8237 +2.5V
7 C179
26 PWR_GD POK
C10U6.3X50805
VOUT 4
+5V 1KR0402 R8 8 EN
VOUT#3 3

1
R316

1
2.2KR1%0402 EC52 EC53

+
.CD1000U6.3EL11.5-RH .CD1000U6.3EL11.5-RH
Power for Audio Codec (VT1618) 2

2
FB

GND

2
+3.3VDUAL
+12V C5042 C0.033U10X0402

1
+5VAUDIO APL5913KAC-TRL_SOP8-RH
U46 Iout=53.3mA
+5VDUAL 3 2 R9
VIN VOUT 1.02KR1%0402
U42 C5032
ADJ

1 R275 C5033 1
3 VIN VOUT 2 +3.3VDUAL C0.1u16Y0402 C10U10Y0805
1
ADJ

C5029 LT1087S_SOT89 100R1%0402


+

C4.7U10Y0805 C5026
L1117LG-3.3_SOT223-3-LF C0.1u25Y AGND
1

C5030
C4.7U10Y0805 Vout=1.25*(1+R278/R275) R278 MICRO-START INT'L CO.,LTD.
EC48 Title
CD100u16EL11-RH-1 300R1%0402 OTHER DC-DC CONVERTERS
change R278 from 324ohm to
Size Document Number Rev
300ohm.2007.1217
AGND
MS-7199 2.2
Date: Friday, February 22, 2008 Sheet 27 of 32
A B C D E
A B C D E

+5VDUAL
PS2 Connector REAR USB
F7
VCCE F-MINISMDC200
RN8
PS2_KB_DT 1 2 CP17
PS2_MS_DT 3 4 X_Short PAD 0603 R26 470KR L72 80L5_20_0805-RH VUSB0
10 USB_OC#0
PS2_KB_CK 5 6

1
4 PS2_MS_CK 7 CP14 4

+
8
X_Short PAD 0603 C44 R17 C124 EC55 C736
8P4R-4.7KR0402 C1000p50X 560KR C1u10Y CD100u16EL11-RH-1 C0.1u25Y

2
F3 VCCE
VCC_KB L18 300L500m_250
+5VDUAL
F-SMD1812P110TF-RH CONN10A
VUSB0 5 23
C207 USBD_T1- 6 24
5
C0.1u25Y USBD_T1+ 7 25
8 UP 26
VUSB0 1 27
USBD_T0- 2 28
USBD_T0+ 1
3 29
JKBMS1
4 DOWN 30
PS2_MS_DATA L1 300L500m_250 PS2_MS_DT 7 10
10 PS2_MS_DATA
8
PS2_MS_CLK L3 300L500m_250 PS2_MS_CK 11
10 PS2_MS_CLK
12 9 CONN-RJ45_USBX2_LEDX2_GT-RH
MS RN174 changed from 0ohm to 90ohm
PS2_KB_DATA L4 300L500m_250 PS2_KB_DT 1 4
10 PS2_KB_DATA
2
comm choke as EMI required.2007.1203 VUSB0
PS2_KB_CLK L17 300L500m_250 PS2_KB_CK 5
10 PS2_KB_CLK
6 3 RN174

5
KB
C220P50N

C220P50N

C220P50N

C220P50N

1 2 USBD_T0-
10 USB_DT0-
CONN-MiniDIN2X12P-RH 3 4 USBD_T0+ USBD_T1- 6 4 USBD_T0-
10 USB_DT0+
3 5 6 USBD_T1+ 3
10 USB_DT1+
7 8 USBD_T1- USBD_T1+ 1 3 USBD_T0+
10 USB_DT1-
CMC-L12-900D017-RH D16
K/B & MS Connector

2
ESD-IP4220
C119 C120 C139 C152

Rear USB Connector

FRONT PANEL
PLED_0 PLED_1

C
Q26 Q17
R210 2.2KR B B R216 2.2KR
11 PLED#0 PLED#1 11
+5VDUAL +5VDUAL

E
N-MMBT3904_NL_SOT23 N-MMBT3904_NL_SOT23
R15 R16
JFP1 330R 330R
HDD+ PLED1 R12 330R HDD+ 1 2 PLED_0
HDD- PLED2 +5V HD_LED PLED_1
3 4

D
GND PWSW+ 16 HD_LED
5 6 PW_BN Q9
2
RESET PWSW- PW_BN 11 2
RST_SW 7 8 PWSW- R215 2.2KR G
RSVD CUT 26 RST_SW 11,15 SUSC#
9
C735 R13 N-2N7002_SOT23

S
R775 0R0402 C0.1u25Y H2X5[10]_yellow-RH 330R
18 WDTO#

Add watch dog


Ver:2.1
+5V

+5V
D9 need to POP to prevent over voltage
R209 Ver:2.1
R305 X_4.7KR
X_4.7KR SPEAK 20
C

Q22
R201 4.7KR B CM3
18 BEEP
C1u10Y R108 0R
N-MMBT3904_NL_SOT23
E

D9
+5V
R917 22R
R322 BAS32L_LL34
C

1 Q16 JFP2 68R 1


R318 4.7KR SPEAK BUZZ1
11 SPK B 1 2
PLED_1 3 4 1
N-MMBT3904_NL_SOT23 PLED_0 5 6 2
E

7 8
GND SPK- X_H2X4[7]_yellow-RH BUZZER-LF
MICRO-START INT'L CO.,LTD.
PLED2 BUZ+ Title
PLDE1 BUZ- KB/MS&USB CONNECTORS
CUT SPK+
BUZZER Size Document Number
MS-7199 2.2
Rev

Date: Friday, February 22, 2008 Sheet 28 of 32


A B C D E
5 4 3 2 1

USB 5/6 +5VDUAL

+5V +3.3V F2
C714 C0.1u25Y C742 C0.1u25Y +5V +3.3V X_F-MINISMDC200
C748 C0.1u25Y
C743 C0.1u25Y R27 X_470KR USB_R_OC#4
10 USB_OC#4
C737 C0.1u25Y

C151 R18 C150 L69


D C741 C100p50N X_C1000p50X X_560KR X_C1u10Y X_80L5_20_0805-RH D

C738 C0.1u25Y
VUSB4

C739 C0.1u25Y VUSB4


J3
+1.5VDD C750 C0.1u25Y +VDIMM 1 2
C740 C0.1u25Y USBD_T4- 3 4 USBD_T5-

5
USBD_T4+ 5 6 USBD_T5+
USBD_T5- 6 4 USBD_T4- 7 8
10
USBD_T5+ 1 3 USBD_T4+

1
X_H2X5[9]_yellow-2.6pitch

+
D21 C775 C776 EC56

2
X_ESD-IP4220 X_C0.1u25Y

2
+VDIMM
X_C0.1u25Y
C751 C100p50N
X_CD100u16EL11-RH-1
EMI SOLUTION C771 C100p50N

C772 C100p50N

C773 C100p50N
RN175
CP27 1 2 USBD_T4-
10 USB_DT4-
C X_Short PAD 0603 3 4 USBD_T4+ C
10 USB_DT4+
5 6 USBD_T5-
10 USB_DT5-
7 8 USBD_T5+
10 USB_DT5+
X_CMC-L12-900D017-RH

CP28
X_Short PAD 0603

USB 5/6 & 7/8 removed for BB.2007.1120

USB 7/8 +5VDUAL

USB 3/4 +5VDUAL


F5
X_F-MINISMDC200
F6
F-MINISMDC200 R28 X_470KR USB_R_OC#6
10 USB_OC#6
R30 470KR USB_R_OC#2
10 USB_OC#2
C153 R19 C160 L70
X_C1000p50X X_560KR X_C1u10Y X_80L5_20_0805-RH
B B
C168 R21 C169 L71
C1000p50X 560KR C1u10Y 80L5_20_0805-RH
VUSB6
VUSB6

VUSB1 J4

5
VUSB1 1 2
J5 USBD_T7- 6 4 USBD_T6- USBD_T6- 3 4 USBD_T7-
1 2 USBD_T6+ 5 6 USBD_T7+
USBD_T2- 3 4 USBD_T3- USBD_T7+ 1 3 USBD_T6+ 7 8
5

USBD_T2+ 5 6 USBD_T3+ 10
USBD_T3- 6 4 USBD_T2- 7 8 D22

1
X_ESD-IP4220 X_H2X5[9]_yellow-2.6pitch

+
10
USBD_T3+ 1 3 USBD_T2+ C778 C779 EC57
H2X5[9]_yellow-2.6pitch-RH-1 X_C0.1u25Y

2
1

D25 C780 C781 EC58


+
2

ESD-IP4220 C0.1u25Y X_C0.1u25Y


2

C0.1u25Y X_CD100u16EL11-RH-1

CD100u16EL11-RH-1
RN175 176 177 changed from 0ohm to 90ohm
comm choke as EMI required.2007.1203
RN176 RN177
1 2 USBD_T2- 1 2 USBD_T6-
A 10 USB_DT2- 10 USB_DT6- A
3 4 USBD_T2+ 3 4 USBD_T6+
10 USB_DT2+ 10 USB_DT6+
5 6 USBD_T3- 5 6 USBD_T7-
10 USB_DT3- 10 USB_DT7-
7 8 USBD_T3+ 7 8 USBD_T7+
10 USB_DT3+ 10 USB_DT7+
CMC-L12-900D017-RH X_CMC-L12-900D017-RH
MICRO-START INT'L CO.,LTD.
Title
MANUAL PARTS
Size Document Number Rev
MS-7199 2.2
Date: Friday, February 22, 2008 Sheet 29 of 32
5 4 3 2 1
5 4 3 2 1

BIOS CNN removed, and added


the bios compenent directly for BB.2007.1120
Optics Orientation Holes
BIOS1_S1
PCB1
D PCB Label3 D

W39V040BPZ-RH
VIA FM1 FM2 FM3

NBHS
C7
2GHz X X X
1 2 C7-2.0G label
1 2
BAT1_X1 JBAT1(1-2)
X_FM X_FM X_FM
+ JUMPER-1X2B_green-RH
HS-MS7199-2.2

FM5 FM6
FM4

+3.3V +3.3V
X X
U37A U37B X
14

14

1 2 3 4 X_FM X_FM
C X_FM C
HC14_SOIC14 HC14_SOIC14
7

U72 Pin1,2,3,4 pending on ver:2.2


2008'0124

TEST COUPON

MOUNTING HOLE
B X_J1 X_J2 X_J6 B

COUPON1 COUPON2 COUPON3

L3 60ohm L1 60ohm L6 60ohm

MH1
1 5 MH2
2 (NPTH) 6 1 5
3 7 2 6
3
(NPTH)
7
IMPEDENCE TESTING COUPON TRACE LENGTH 6000Mils
TRACE WIDTH IS 7 MILS , SPACE 13 MILS.
4
9
8

4
9
8

IMPEDENCE CONTROL WITHIN 50 OHMS +-15%


MH3
1 5 MH4
2 (NPTH) 6 1 5
3 7 2 (NPTH) 6
3 7
A A
4
9
8

4
9
8

MICRO-START INT'L CO.,LTD.


Title
MANUAL PARTS
Size Document Number Rev
MS-7199 2.2
Date: Wednesday, February 27, 2008 Sheet 30 of 32
5 4 3 2 1
5 4 3 2 1

MS-7199 CLOCK BLOCK DIAGRAM

CPU

D D

CPUCLK/CPUCLK# (400/533MHz)
HOST PAIR

DDR II DIMM
HCLK/HCLK#(400/533MHz)
HOST PAIR
MCLK0+/MCLK0- M_DCLK+/M_DCLK# Pairs
NB_GCLK CN700 CLOCK Buffer
AGP1 3
GUICLK
FS1(14.318)

VLINK_CLK
AGP0(66)
SB_OSC
FS0(14.318)
C C
SATA_CLKR
25MHz

32.768KHZ
USB_CLK
VT8237R+
48MHZ/FS3 Y1

Crystal
SB_PCLK
PCI_F/FS2
SB_APICCLK
PCI2 33MHZ
14.318MHZ
Crystal

Y2 25MHZ
Crystal
X8

LPC_SIO
24_48MHZ
LPC_CLK SIO
PCI_F1/FS4

AC97

24.576MHZ
B B
VT1618 Y3

LAN_CLK RTL-8110SC/8100C 25MHZ


PCI1 33MHz X9

TV_OUT

14.318MHZ
PCI_CLK0 VT1622A Y6
PCI3 33MHz PCI 32/33 SLOT

ROM_LCLK
PCI4 33MHz LPC FLASH

A A

MICRO-START INT'L CO.,LTD.


Title
CLOCK MAP
Size Document Number Rev
MS-7199 2.2
Date: Friday, February 22, 2008 Sheet 31 of 32
5 4 3 2 1
5 4 3 2 1

VT8237R+
GPIO Alt Func Pin I/O/NC Power Tol Default Rickles Signal Name LPC Note: LPC FLASH GPs should only be used for static
GPI [2] EXTSMI# AA1 I 3.3VDUAL 3.3 N/A EXTSMI# options,do not put dynamic nets on these
GPI [3] RING# Y2 I 3.3VDUAL 3.3 N/A RING# GPIO Pin# Power Tol Signal Name
GPI [5] BATLOW# V4 I 3.3VDUAL 3.3 N/A BATLOW# GPI0 6 Main 3.3 pull-down
D
GPI [6] AGPBZ# AD10 I 3.3VDUAL 3.3 N/A AGPBZ# GPI1 5 Main 3.3 pull-high D

GPI [7] REQ5 R3 I 3.3VDUAL 3.3 N/A PCI_REQ# GPI2 4 Main 3.3 pull-down
GPI [9] UDPWR D26 I 3.3VDUAL 3.3 N/A UDPWR GPI3 3 Main 3.3 pull-down
GPI [16] INTRUDER AE1 I VBAT 3 N/A INTRUDER GPI4 30 Main 3.3 pull-down
GPI [17]
GPI [18]
CPUMISS
THRM#
Y1
Y4
I
I
3.3VDUAL
+3.3V
3.3
3.3
N/A
N/A
CPUMISS
THRM#
PCI Config.
DEVICE MCP1 INT Pin REQ#/GNT# IDSEL CLOCK
GPI [19] APICCLK U23 I +3.3V 3.3 N/A SB_APICCLK PCI_REQ#0
GPIO[8] VGATE AC9 I +3.3V 3.3 N/A VGATE PCI Slot PCI_INTR#B
PCI_GNT#0 PCI_A_D31 PCI_CLK0
GPIO[10] APICD0 R25 O +3.3V 3.3 N/A APICD0
GPIO[11] APICD1 T23 O +3.3V 3.3 N/A APICD1 PCI_REQ#1
LAN PCI_INTR#C PCI_A_D21 LAN_CLK
GPIO[22] GHI R22 OD +3.3V 3.3 N/A OVDDR26V PCI_GNT#1
Controller
GPIO[23] DPSLP P21 OD +3.3V 3.3 N/A CPU_DPSLP#
GPIO[26] SMBDT2 AD1 IO +3.3V 3.3 N/A SM_BDT2
GPIO[27] SMBCK2 AC3 IO +3.3V 3.3 N/A SM_BCK2
GPIO[28] VIDSEL AC8 OD +3.3V 3.3 N/A SATA_LED
GPIO[29] VRDSLP AB9 OD +3.3V 3.3 N/A VRDSLP DDRII DIMM Config.
GPO [0] PLED#0 AA3 O 3.3VDUAL 3.3 N/A PLED#0
C GPO [1] PLED#1 AE3 O 3.3VDUAL 3.3 N/A PLED#1 DEVICE ADDRESS CLOCK
C

GPO [2] SUSA# AA2 O 3.3VDUAL 3.3 N/A SUSA# DIMM 1 (000) M_DCLK0/M_DCLk#0
GPO [3] SUSST1 Y3 O 3.3VDUAL 3.3 N/A SUSST# M_DCLK1/M_DCLK#1
GPO [4] SUSCLK AB3 O 3.3VDUAL 3.3 N/A SUS_CLK M_DCLK2/M_DCLK#2
GPO [5] CPUSTP AC7 O +3.3V 3.3 N/A SLEEPLED#
GPO [6] PCISTP AD6 O +3.3V 3.3 N/A BIOSWE
GPO [7] GNT5 R2 O +3.3V 3.3 N/A PCI_GNT#5 JUMPER SETTING
GPO [8] VGATE AC9 O +3.3V 3.3 N/A VGATE JBAT (2-3)CLEAR (1-2)NORMAL

PCI RESET

B
PCI Reset Device B

DEVICE

PCI_RST#
7SZ08M5X
(VT8237R+)
(U49)

PCI_U_RST# HC14_SOIC14
(7SZ08M5X) (U37)

IDE_RST#
IDE
(U37)

CHIP_RST# CN700
(U37) VT1622A

PCI_RSTX# LPC FLASH


(U37) LPC IO
PCI Slot
A A

MICRO-START INT'L CO.,LTD.


Title
GPIO & JUMPER SETTING
Size Document Number Rev
MS-7199 2.2
Date: Friday, February 22, 2008 Sheet 32 of 32
5 4 3 2 1

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