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27 DLD Lec 27 Combinational Design Dated 11 Nov 2022 Lecture Slides
27 DLD Lec 27 Combinational Design Dated 11 Nov 2022 Lecture Slides
By Nasir Mahmood
nasir.mahmood@seecs.edu.pk
nasirm15@gmail.com
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Today’s Lecture
Design Procedure
The Maps
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BCD to Excess-3 Code Converter
∗ The simplified functions
∗ z = D'
∗ y = CD +C'D‘
∗ x = B'C + B'D+BC'D'
∗ w = A+BC+BD
∗ A two-level logic diagram may be obtained directly from the
above Boolean expressions but there are various other
possibilities for logic diagram that implements this circuit
∗ Another implementation
∗ z = D'
∗ y = CD +C'D' = CD + (C+D)'
∗ x = B'C + B'D+BC'D' = B'(C+D) +B(C+D)'
∗ w = A+BC+BD
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Your Turn
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Design Examples
• Binary Adder-Subtractor
– Half Adder
– Full Adder
• Carry Lookahead Generator
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Binary Adder-Subtractor
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Half Adder
• Half adder adds two binary bits so it requires two inputs
and two outputs
– 0+0=0 ; 0+1=1 ; 1+0=1 ; 1+1=10
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Full Adder
• A full-adder is a combinational circuit that
forms the arithmetic sum of three bits (three
input bits).
– Two of the input variables x, y represents the two significant bits to be
added
– The third input z represents the carry bit from the previous lower significant
position
– Two output bits are necessary designated by the symbol S for sum and C
for carry
• When all input bits are 0, the output is 0
• The S output is equal to 1 when only one input
is equal to 1 or when all three inputs are equal
to 1
• The C output has a carry of 1 if two or three
inputs are equal to 1
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Simplified Expressions for Full Adder
• The simplified expressions for full adder are
– S = x' y' z + x' y z' + x y' z' + x y z
– C = xy + xz + yz
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The End
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