Professional Documents
Culture Documents
Solutions To Exercises To Lecture 17
Solutions To Exercises To Lecture 17
Solutions To Exercises To Lecture 17
Transistor
PMOS
Load Line Analysis NMOS
b) Boundery: 𝑖 𝐾𝑣 for 1 2 3 V 0,5 2 4,5mA
Triode: 𝑖 𝐾2 𝑉 𝑉 𝑣 𝑣
c) Load line 20 V bei I=0
10V 2 K 5mA
Small‐Signal Equivalent Circuit