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CS221 Lect6 Fall2020
CS221 Lect6 Fall2020
LOGIC DESIGN
Fall 2020
2
COMBINATIONAL CIRCUITS
3 Lecture 6
CS221 _Lec6_ Fall2020
REMEMBER
This chapter includes the most important
standard combinational circuits:
Adders, Subtractors, Comparators, Decoders,
Encoders, and Multiplexers
We will know their internal design and the
functionality of each.
But, remember our aim is to know how to
think to design a circuit
Remember
4
CS221 _Lec6_ Fall2020
2n outputs
n-inputs
nxm
...
DECODERS decoder
A Decoder:
Is a popular combinational logic building block
It converts input binary number to one high output
2‐input decoder
➔ Has four possible input binary numbers
➔ So, it has four outputs, one for each possible
input binary number
1 0 0 0
1 1 0 0 0 1 0 0
0 0 1 0
Section 4.9
1 0 1 0
0 0 0 1 5
CS221 _Lec6_ Fall2020
2n outputs
n-inputs
nxm
...
DECODERS decoder
Binary-to-octal conversion;
inputs : binary representation and
outputs : its correspondence in octal representation.
Section 4.9
6
CS221 _Lec6_ Fall2020
3-inputs D0
3x8
...
3-TO-8 LINE DECODER decoder
D7
3 input variables =? outputs
➔ 23=8 outputs
Section 4.9
D0= x’y’z’, D1=x’y’z, D2=x’yz’, D3=x’yz 7
D4= xy’z’ D5=xy’z D6= xyz’ D7=xyz
CS221 _Lec6_ Fall2020
DECODERS
Section 4.9
The output whose value is equal to 1 represents the minterm 8
equivalent of the binary number currently available in the input lines
CS221 _Lec6_ Fall2020
DECODER WITH ENABLE INPUT
Decoder with enable E
– if E=0, Outputs all 0 – if E=1, Regular behavior
E i0 i1 d0 d1 d2 d3
0 x x 0 0 0 0
1 0 0 1 0 0 0
Section 4.9
1 0 1 1
9
1 1 0 1
1 1 1 1
CS221 _Lec6_ Fall2020
How to use as a
block
Section 4.9
The top decoder outputs all
0’s and the bottom eight 12
outputs generate minterms
1000 to 1111
CS221 _Lec6_ Fall2020
How to use as a
block
Section 4.9
13
Section 4.9
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CS221 _Lec6_ Fall2020
ENCODERS
An encoder
It is a digital circuit that performs the inverse operation
of a decoder
It has 2n inputs lines and n output lines
Section 4.10
1 D0
0 D1 y 0
x 15
0 D2 0
0 D3
CS221 _Lec6_ Fall2020
OCTAL TO BINARY ENCODER
Section 4.10
z = D1 + D 3 + D5 + D7
y = D 2 + D3 + D6 + D 7
x = D 4 + D5 + D6 + D 7 16
But, it has some limitations
CS221 _Lec6_ Fall2020
OCTAL TO BINARY ENCODER:
LIMITATIONS
Section 4.10
whether at least one input is equal to 1.
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CS221 _Lec6_ Fall2020
How to design?
Know internal ?
PRIORITY ENCODER
A priority encoder is an encoder circuit that
overcomes the limitations of octal-to-binary encoder
previously implemented.
Section 4.10
18
CS221 _Lec6_ Fall2020
How to design?
Know internal ?
PRIORITY ENCODER(CONT.)
Section 4.10
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CS221 _Lec6_ Fall2020
MULTIPLEXERS
A multiplexer (MUX) is a combinational circuit that
selects binary information from one of many input lines
and
directs it to a single output line.
It is also called a
Data selector
There are:
2n input lines
Section 4.11
n selection lines whose bit combinations
determine which input is selected, and 20
Single output
CS221 _Lec6_ Fall2020
TWO-TO-ONE MULTIPLEXER
It has:
2 inputs, 1 selection and 1 output
S Y
0 I0
1 I1
Y= S’I0 + SI1
Section 4.11
How to design?
Know internal ? 21
CS221 _Lec6_ Fall2020
I0
I1 4x1 Y
I2 MUX
FOUR-TO-ONE MULTIPLEXER I3
It has:
4 inputs, 2 selection and 1 output
S1 S0
Section 4.11
Y= S1’S0’I0 + S1’S0I1 + S1S0’I2
+ S1S0I3 How to design?22
Know internal ?
CS221 _Lec6_ Fall2020
MULTIPLEXER WITH ENABLE INPUT
As decoder, multiplexer may have an enable input:
When E=0, the outputs are disabled
When E=1, normal multiplexer
E S1 S0 Y
0 x X All 0’s I0
I1 4x1 Y
1 0 0 I0 I2 MUX
1 0 1 I1 I3
1 1 0 I2
Section 4.11
1 1 1 I3 E S1 S0 23
CS221 _Lec6_ Fall2020
How to use as a
block
Section 4.11
24
CS221 _Lec6_ Fall2020
QUADRUPLE 2-TO-1 LINE MULTIPLEXER
(CONT.) A0 0 2x1
B0 1 MUX Y0
The unit is
enabled when E=0
If S=0, the four A
inputs have a path
A1 0 2x1
B1 1 MUX Y1
to the four outputs
If S=1, the four B
inputs have a path
to the four outputs
A2 0 2x1
When E=1, the B2 1 MUX Y2
outputs are all 0’s
regardless the
value of S
A3
Section 4.11
0 2x1
B3 1 MUX Y3
25
E S
CS221 _Lec6_ Fall2020
How to use as a
block
Section 4.11
26
The first n-1 variables are applied to selection inputs and we evaluate
the output as a function of the last variable
CS221 _Lec6_ Fall2020
How to use as a
BOOLEAN FUNCTION IMPLEMENTATION block
(CONT.)
Example2: F(A, B, C, D)=Σ(1,3,4,11,12,13,14,15)
Section 4.11
27
CS221 _Lec6_ Fall2020
MULTIPLEXER WITH A DECODER
A 2n-to-1 line multiplexer is constructed from:
An n-to-2n decoder
AND gate for each 2n input lines
An OR gate
Section 4.11
28
CS221 _Lec6_ Fall2020
DEMULTIPLEXER
0
Demultiplixer is
Fig: 4.19
A circuit that receives information from a single line
and directs it to one of 2n output lines.
The decoder with enable input can function as a
demultiplexer.
The decoder in fig. 4.9 can function D0 1
0
E D1 1
as 1-to-4 line demultiplexer, when:
D2 0
E is taken as data input D3
S1S0 1
A and B as selection inputs
Because decoder and demultiplexer operations 1 0
are obtained from the same circuit, a decoder
Section 4.9
with enable input is referred to as a decoder-
29
demultiplexer
THANKS
We covered from:
Ch.4 (sec. 4.9→4.11)
Skip: three- state gates in sec. 4.11
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