Binary Logic

Binary logic deals with binary variables, which take on

two discrete values, and with the operations of
mathematical logic applied to these variables.
Associated with the binary variables are three basic
logical operations called AND, OR, and NOT:

AND
Z = X • Y (X,Y,Z are binary variables equal 1 or 0)
This operation is represented by a dot or by the absence of an
operator. For example,
Z = X • Y or Z = XY is read "Z is equal to X AND Y." The
logical operation AND
is interpreted to mean that Z = 1 if and only if X = 1 and Y = 1;
otherwise Z = 0.
OR.

Z=X+Y
This operation is represented by a plus symbol. For example,
Z = X + Y is read "Z is equal to X OR Y" meaning that Z = 1 if
X = 1 or if Y = 1,
or if both X = 1 and Y = 1.
Z = 0 if and only if X = 0 and Y = 0.
NOT .

This operation is represented by a bar over the variable. For

example,

is read "Z is equal to NOT X," meaning that Z is

what X is not.

In other words, if X = 1, then Z = 0; but if X = 0, then Z = l.

The NOT operation is also referred to as the complement
operation, since it
changes a 1 to 0 and a 0 to 1.
NAND function
NOR function
Ex:1
Get the boolean algebra for the following circuit

Ex:2
Draw the logic circuit for the following function

EX:3
Draw start stop motor circuit using gates

Flip-flops
A flip-flop can assume 1 of 2 stable states (bistable), by way of
applying a suitable trigger or control, pulse: On or Off, “1” or
“0”. So, a flip-flop is able to store 1 bit.
All flip-flops have 2 outputs that provide complementary levels
(opposite polarity).By definition, identical output states must
never occur, even if this is possible.
RS Flip-flops using NOR -Gates
An RS flip-flop can be constructed with 2 NOR gates. In
section 3.2 it was shown that the output of a NOR gate
is “1” when a “0” signal is applied to both inputs. If a
1-signal is applied to at least one input, the output is at
a 0-state.
If this statement is now applied to an RS flip-flop with
NOR gates, then at S = 1 and R = 0, the outputs must be
Q1 = 0 and Q2 = 1. If now, S is set to 0, the output states
of Q1 and Q2 are retained since due to the
cross-coupled feedback on the upper NOR gate Q1 = 1 is
applied to one input.
Clock Level-triggered Flip-flops

In the circuit shown, the S input is used to Set, and the R

input is used to Reset the flip-flop. However, these input
signals are effective only when a 1-signal is present at
input C.
Level-triggered flip-flops exhibit the following problem:
The state of the flip-flop corresponds to the information
that was present at the end of the clock. An interference
(spurious) pulse on the input line can cause errors.
As an application for flip flops design a circuit for the
following

1- Start stop motor

2- Reverse motion for a motor (left and right)

3- Filling and draining a vessel

Shift register

A circuit that is able to store information and move the data

along the circuit, is known as a shift register. For storing (or
saving), information in a shift register, one J-K flip-flop is used
for each bit of the dataword. Fig. shows the basic circuit of a
4-bit shift register. All flip-flops are triggered with the same
clock pulse. The outputs of one flip-flop are connected to the
inputs of the next flip-flop.