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Industrial-Electronics-Report
Design
Group KurintEE:
Edward Bendaña
Ranjan Estrellado
Jeffrey Endraca
Miko Estonanto
Daryl Villaruel
Ronnie Boy David
John Dave Dacula
Introduction:
The DC regulatory application:
• So we cannot expect to set the duty cycle to a single value,
and obtain a given constant output voltage under all
conditions.
• Increasing the phase margin reduces the Q. Obtaining real poles, with no
overshoot and ringing, requires a large phase margin.