VISVESVARAYA TECHNOLOGICAL UNIVERSITY

JNANA SANGAMA, BELAGAVI -590 014

A Seminar Report on

“FREQUENCY DEVIDER”

Submitted by
SHRIRAM PRAKASH HEGDE :- 1AY20EC081
ROHAN S :- 1AY20EC072

Under the guidance of

Mrs. Kalpavi
Assistant Pofessor
Department of ECE,
Acharya institute of Technology, Banglore

2021-2022

DEPARTMENT OF ELECTRONICS & COMMUNICATION

ENGINEERING
Acharya Institute of Technology
Acharya Dr. Sarvepalli Radhadrishnan Road, Soladevanahalli, Bengaluru-560107
www.acharya.ac.in
 TABLE OF CONTENTS
Introduction

Problem statement

Explanation

Result

Learning outcome

References
Chapter 1
Introduction
Frequency Dividers are the circuits which divide the input frequency by n (any
integer number), means if we provide some signal of frequency ‘f’ then the output will be
the divided frequency ‘f/n’. Frequency dividers are very useful in analog as well as digital
applications. Here we are building the circuit to divide the frequency by 2 or 4.

Problem statement
Design frequency devider circuit in multisiim tool and simulate.

Explanation
This frequency divider circuit made by two sections one is input frequency generator and

another one is decade counter/divider circuit. IC 555 is configured as astable multivibrator,

timing resistor (R1, R2) and variable resistor VR1 are connected with timing capacitor C1,

discharge pin7 is connected between R1 and R2 then threshold pin6 and trigger pin2 are

connected between VR1 and C1. 5V vcc applied to the bias pin8 and reset pin4, here control

voltage pin5 is connected to ground through 0.1 uF C2 capacitor. Output pin 3 is connected

with clock pin of decade counter ic and LED1, this LED indicates the input frequency.

IC 4017 takes input clock at pin 14 and provides decade output from Q0 to Q9. To convert

this into frequency divider we have taken output from Pin 2 and connected with LED2

through R4, this will visually indicate the output frequency through blinking. Active low

enable pin 13 is grounded and Reset pin 15 is connected with three way switch towards Q2

for F/2 output selection, Q4 for F/4 output selection and Q6 for F/6 output selection. When

we use oscilloscope at output pin 2 we can obtain divided output frequency.

 Frequency devider ciruit

Multisim circuit

Multisim circuit

Setting made in frequency devider simulation to get the desired output

Setting configuration
Result
A frequency divider, also called a clock divider or scaler or prescaler, is a circuit that takes an
input signal of a frequency, fin, and generates an output signal of a frequency:

Fout = FIN / n

where n is an integer. Phase-locked loop frequency synthesizers make use of frequency dividers
to generate a frequency that is a multiple of a reference frequency. Frequency dividers can be
implemented for both analog and digital applications.

Frequency devider input and out waveform

Simulation output

Simulation output[]
Learning outcome
 1. Studied about frequency devider circuit
2. Learned about application of frequency devider

References
1. https://theorycircuit.com/frequency-divider-circuit/
 REFERENCES
1. International Journal of Science, Engineering and Technology (Journal).
AMBUlANCE EMERGENCY RESPONSE APPlICATION-MuhdZafeeruddin Bin
MohdSakriya.

2. International Journal of Scientific & Engineering Research, Volume 9, Feburary-20l2

ANDROID APPlICATION FOR EMERGENCY MEDICAl ASSISTANCE (DOCTORS
NEARBY) Dhanesh Sharma, PriyankaDubey, Navin Singh.

3. International Journal of Computer Applications (0975 – 8887) National Conference on

Advances in Computing, Communication and Networking (ACCNet – 20l6) 23. Smart
Ambulance System.

4. https://www.entrepreneur.com/article/300330

5. https://bohatala.com/ambulance-management-system/

6. https://en.wikipedia.org/wiki/Android

7. https://en.wikipedia.org/wiki/GPS
Note: Annexure can be added if required.