Design and Fabrication of Regulated DC Electronic

Load for Testing Power Supplies and Batteries

Swaroop R Sadarjoshi P Usha
Dept. of EEE Dayananda Sagar College of Engineering Dayananda Sagar College of Engineering
Bengaluru, India Bengaluru, India
Email: swaroopr92@gmail.com Email: pu1968@yahoo.co.in

choice for the electronic load design. Among different power

Abstract—A DC electronic load plays a vital electronic switches, MOSFET (Metal Oxide
role in determining operating characteristics of a Field Effect Transistor) offers low internal resistance in terms of
DC source. In this work a detailed design mΩ, high power dissipation, high switching frequency and
procedure for a regulated DC electronic load is
proposed, incorporating different test modes. The reliable gate control. The earlier work on electronic load is
designed electronic load can operate either in limited to open loop constant current electronic load [1].In this
constant current or power mode. The portable size of work, a regulated DC electronic load was designed and
the DC electronic load makes it suitable for testing fabricated with two different operating modes. The regu- lated
solar panels. The proposed design was employed to DC electronic load can operate either in constant current or
test different DC sources. Various characteristic plots
power mode. The topology consists of n parallel power-
of lead-acid battery, NiMH battery and a solar panel
were obtained. The characteristic plots of various DC MOSFETs driven by an operational amplifier in voltage buffer
sources validate satisfactory operation of the proposed configuration. The detailed design procedure is addressed
design. further.
Keywords: Constant Current, Constant Power, Electronic II. DESIGN
Load, Linear operation of MOSFETs, Power MOSFETs.
A. Linear Mode Operation and Safe Operating Area of Power-
I. I NTRODUCTION MOSFETs
Different DC sources are tested to determine their reliable Power MOSFETs are widely used in DC power supplies
operation, be it battery, power supply (Switch Mode Power and converters. When a MOSFET is employed as a switch in
Supply), solar panel a nd h yd r o g e n f u el ce ll s. A a converter or a power supply, the MOSFET is driven in the
n u mb e r of tests are performed on a DC source to ohmic region. The typical output characteristics of a power
determine its characteristics. For instance a battery is MOSFET is shown in Figure 1.
tested for constant loading to obtain its discharge curves.
Battery testing aids in estimating battery lifetimes. A DC
power supply is tested under full load condition in order to
determine its efficiency and reliability. Designers employ
constant current mode for testing voltage source and
constant power mode to determine power the curve.A DC
source can be tested with the help of with the help of a
high power resistive load. When a high power resistive load
is connected to a DC source, an estimated amount of
current is absorbed by the load. However the user doesn’t
have any control over the resistive load. In case of a battery
as it gets discharged, the terminal voltage drops leading to a
decrease in current absorbed by the resistive load. Limitation
of resistive load is that it operates in constant current only,
constant power mode cannot be performed using resistive
load.A DC electronic load can overcome the limitations of
Fig. 1. Operating regions of a power MOSFET [3].
resistive load. Power electronic switches offer high power
dissipation with low international resistance and high current
carrying capability. The MOSFET gate-source voltage VGS has to be greater
1
than the device gate-source threshold voltage VGSth. In order
The features of power electronic switches make the ideal to utilize MOSFET for an electronic load it is operated in the
linear region. Only in the linear region we can have the control
1
over the on-state resistance RDS(on) of the MOSFET [2].
978-1-4673-8962-4/16/$31.00 ©2016 IEEE

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 B. Requirements of Constant Current Mode
To sink the required amount of current, the electronic
load should offer very low resistance and should posses the
capability to withstand high power dissipation. The MOSFET
is made to operate as a current drain in the current-regulation
mode. An operational amplifier can be employed to sense the
current flowing through the MOSFET with the help of a
current shunt resistor. The gate voltage of the MOSFET is
regulated by comparing with a reference voltage. The
operational amplifier operates the MOSFET in linear region.
A basic constant current (CC) configuration is shown in
Figure 2.
Fig. 3. Requirement for optimum parallel operation of MOSFETs
Fig. 2. Constant Current Configuration
The non-inverting terminal of the operational amplifier is
fed from a reference voltage Vref which is in accordance with
the voltage drop across the shunt resistor Vshunt. The reference
voltage can be given from a voltage divider or a rheostat. In
this work a Digital to Analog Converter (DAC) is employed
for the same. The MOSFET drain current ID can be obtained
from equation (1).
The drain current ID can be set as per the test requirements
by adj usting the MOSFET gate voltage VGS where VDC
is the voltage of the DC source under test. In the constant
current mode a large amount of power is dissipated in the
MOSFET, care should be taken to operate the MOSFET
under its rated Safe Operating Area (SOA). It is feasible
to parallel MOSFETs in order to increase current handling
capability and limit power dissipation per device.
Although MOSFET have a positive temperature co-efficient
which makes them ideal for parallel operation, but parallel
operation increase the total gate charge of the set-up making
it prone to oscillations [4]. One way to make the parallel
MOSFETs oscillations free is to include a resistor between
the gate and the source terminals. The resistor RGS prevents
the charge build up in the gate capacitance and provides a
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safe passage for the charges to discharge. Another resistor
RG is added in the gate path in order to prevent clamping of
the gate voltage when n number of MOSFETs are in parallel.
The resistor Rshunt is the current shunt resistor. The invert-
ing terminal of the operational amplifier senses the current ID
in the form of voltage drop across the current shunt resistor
that is Vshunt. The shunt resistor further prevents unequal
current distribution in the initial stages of operation of parallel
MOSFETs [4]. The Figure 3 shows the placement of various
resistors for optimum performance in parallel configuration.
C. Requirements of Constant Power Mode
The constant power configuration, is similar to constant
current mode. In this mode both the DC source voltage and the
current absorbed by the load is monitored and is maintained at
the required set power level by varying the reference voltage
Vref . By monitoring the current and the terminal voltage of
the source the power absorbed by the load is determined from
equation (2).
Here the Pabsorbed is computed multiple times until set power
is achieved. The fraction Vshunt/Rshunt gives the current
absorbed by the load. In accordance with the set power,
the current absorbed by the load is modified by varying the
reference voltage Vref . A configuration is built, so as to
accommodate both constant current and power modes with the
help of a push button switch with the help of system controller.
D. Design Requirements
The design procedure is followed to accommodate the
following requirements. These specifications can be modified
for as per needs.
 1) Maximum and Minimum Voltage: The terminal
voltage of DC source under test has to be between
2V to 50V . Considering a convenient voltage range to
test a Lead-Acid battery of rated 12V, 1.2Ah, a Ni-MH
battery of rated 4.8V, 2000mAh, and a solar panel of Vpm
= 17.8V, Ipm = 1.70A and Pmax = 30W .
2) Maximum Load Current: The maximum load current
for the test should not exceed 2A. The maximum current
value determines the maximum power dissipation in the load.
Designing for low current will reduces heat-sink complexity.
3) Maximum Power: Considering 100W as maximum
power limit eliminates the need for dedicated air-forced cool-
ing and large heat-sinks.
E. Selection of power MOSFET
The MOSFET is the critical component. It should be able
to withstand high power dissipation and should have high
current carrying capability. Though specifically manufactured
MOSFETs for linear operation are available, in our design the
convenience and availability is a concern. The Safe Operating
Area of the MOSFET plays a key role in selection process. The
Safe Operating Area of IRFP250N, is as shown in Figure 4.
Fig. 4. Safe Operating Area of IRFP250N [5]
In IRFP250N, the drain current offered is ID = 30A, power
dissipation is PD = 214W , Static drain-to-source resistance
is RDS(on) = 75mΩ and drain to source breakdown voltage
is VDSS = 200V . It is available in TO-247AC package which
offers better heat dissipation than TO-220 [5]. Considering
the maximum voltage, current and power requirements all of
these lie within the permissible limit of SOA as shown in
Figure 4. In order to sink 2A of current a set of two branch
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of MOSFET is opted. The power dissipated in each MOSFET
assuming equal current sharing is given by (3):
2
PD = I max RDS(on) (3)
Where the maximum current through each MOSFET is
Imax = 1A and on state resistance of IRFP250N is RDS(on) =
75mΩ then the maximum power dissipated per MOSFET
is PD = 75mW which is within the SOA of the device.
Therefore natural cooling alone is sufficient. The two parallel
MOSFETs are referred to as Load Module in the block
diagram shown in Figure 5.
F. MOSFET Gate Charge Qg
The high power MOSFETs offer high gate charge Qg .
When n number of MOSFETs are in parallel, it leads to a
considerably high gate charge. For instance the gate charge
Qg of IRFP250N is 123nC, and when two MOSFETs are
in parallel this value will be close to 246nC which cannot be
ignored [6]. The high gate charge expects the gate drive circuit
to supply large current. In order to satisfy the requirement
of high gate current, a NPN BJT (Bi-Polar Transistor) is
employed to drive the parallel combination of MOSFETs [7].
G. Selection of Transistor
Since the parallel power MOSFETs have a considerably
large total gate-charge Qg it becomes essential for the drive
circuit to supply large current. For this purpose a NPN-BJT
in voltage divider bias configuration is employed to drive the
parallel MOSFETs. The base of the BJT is driven by the
operational amplifier output. The emitter terminal of the BJT
is given to gate terminal of parallel MOSFTs [7].
The NPN-BJT selected for this purpose is SL100. It of-
fers a maximum power dissipation of PD = 800mW @
TA = 25◦ C with a collector current rating of IC = 0.5A
with VCBO = 60V . All these specifications are sufficient for
the design requirements. The transistor circuitry is referred to
as Driver Circuit in the block diagram shown in Figure 5.
H. Selection of Operational Amplifier
The role of operational amplifier is essential in successful
operation of the design. The operational amplifier should
offer faster operation and single supply operation will reduce
overall design complications. For the said application, the
reliable industry op-amp LM324N is opted. If offers a drift of
7μV/◦C, and a non-zero offset in the order of mV , 0.7mA of
supply current, with slew rate of 0.3V μs which are sufficient
for our requirements [8].
I. Selection of Microcontroller
The microcontroller forms the backbone of the embedded
closed loop design. The microcontroller has to form an in-
terface with digital and analog elements. The role of micro
controller here is to co-ordinate between various elements
mainly, DAC, rotary encoder KY-040 and the LCD display.
The microcontroller opted for the control operation is Atmel’s
 ATmega328p. Its a 8-bit RISC based microcontroller and From equation (6), we obtain the control voltage range from
offers 32KB of flash memory, 1KB of EEPROM, 2KB of 0 − 660mV for the required drain current of 0 − 2A. This
SRAM, 23 general purpose I/O lines among other features gives us the voltage to current ratio for the reference voltage
[9]. All these specification are sufficient for the design require- Vref as 330mV /A.
ments. The microcontroller is referred as System Controller in L. Heat-sink Requirements
the block diagram shown in Figure 5.
The thermal stability of the proposed design can only be
J. Selection of Digital to Analog Converter confirmed if adequate cooling is provided [11]. For the purpose
A DAC is essential to bridge the gap of digital and analog of providing adequate cooling, an extruded aluminum heat
signals. In this design the DAC is employed to convert the sink is to selected. The junction temperature can be calculated
rotary encoder signals to analog signals in-order to perform as (7):
the closed loop operation. The analog output of the DAC is TJ = TA + (RT jc + RT cs + RT sa)Pav (7)
fed to the non-inverting terminal of the operational amplifier,
thereby giving freedom and range control over the set the DC where TA is the ambient temperature, RT jc is the junction-
electronic load for different test conditions. to-case thermal resistance, RT cs is the case-to-sink thermal
resistance for flat, greased surface. RT sa is the sink-to-
The Digital to Analog Converter opted is MCP4921. Its a ambient thermal resistance, and Pav is the average power
12-bit DAC which is sufficient for the required range. It offers dissipation.
a resolution of 4096 [10]. A rotary encoder is provided to set
the current or power mode and also to input test values. The Considering the design specification of 100W maximum
output voltage of the DC source is measured by employing a power. The data from device data sheet is RT jc = 0.7◦C/W ,
voltage divider configuration defined by the equation (4). RT cs = 0.24◦C/W , RT sa = 1.15◦ C/W and TA = 25◦ C,
VS (RA + RB ) i.e. room temperature, the junction temperature is found to be
VDC = (4)
RB TJ = 129.5◦C for 50W power dissipation of each MOSFET.
◦
It is below the specified maximum rating of 175 C of the
Here VS is sensed voltage, RA and RB are the voltage divider
device and can be tolerated by passive cooling by the heat-
network where as the VDC is the DC source voltage under test.
sink alone.
As per the requirement the values of voltage divider network
is taken as RA = 100kΩ and RB = 10kΩ. This combination M. Block Diagram
gives a maximum sensed voltage of VS = 4.54V for the
The block diagram for the DC electronic load is as shown
maximum allowable voltage of 50V which is safely read by
in Figure 5. A block diagram is essential in understanding
the microcontroller and displayed on the LCD panel.
K. Selection of Shunt Resistor
The maximum current of the load will flow through the
shunt resistor. Hence its selection is essential for the success
of the design. The important aspects of selection are power
rating and resistance value. Typical preferred resistance of
shunt element is less that 1Ω. The power dissipation in the
resistor is maximum, hence a high power rating resistor is
preferred. The design specific values are computed as per
equation (5).
ILOAD 2RShunt
PDRshunt = (5)
Number of parallel MOSFETs
From the equation (5) it is clear that a trade-off needs to
reached in order to select shunt resistor in terms of cost, size
and feasibility. It was decided to use a through hole resistor
with the rating, R = 0.33Ω ± 5%, PD = 5W and breakdown
voltage of VBD = 100V an axial leaded type. The opted power
rating and the voltage rating are sufficient considering a safety
factor of two. The shunt resistor is included as a part of Load
Module in the block diagram shown in Figure 5. The control
signal for the operational amplifier is governed by equation
(6) which is derived from Ohm’s Law.
∆VControl = ∆ILOADRShunt (6) Fig. 5. Block diagram of the DC Electronic Load

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 complex designs. The block diagram was prepared for the
DC electronic load in order to depict various important
components involved.
The DC electronic load requires a DC power supply of at
least 9V and maximum of 30V to power the control circuitry,
it also involves a LM7805 voltage regulator for regulating the
voltage. With the ability to operate with a 9V battery, it is
portable and suitable for testing solar panels alike.
III. S IMULATION RESULTS
Prior to hardware implementation, numerous simulation
tests were carried out in order to validate the design. The
design components were simulated before hardware imple-
mentation. The open loop simulation were carried out in
LTspice VI simulation package. The schematic is shown in
Figure 6.
Fig. 8. Regulated DC Electronic Load
Fig. 6. The Constant Current Simulation
Fig. 9. Constant Current operation.
Fig. 7. Key waveforms from simulation
The simulation for 2A constant current setting was carried
out. A reference voltage of Vref = 660mV was given. The
output waveforms obtained depict a gate voltage of VGS =
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5.069V . The obtained key waveforms at various nodes are as
shown in Figure 7.
IV. F ABRICATION AND T EST RESULTS
This chapter deals with the fabrication and test results. The
positive terminal connector for the DC source is directly bolted
on the heat-sink of the MOSFETs. A 16x2 LCD Display
is provided through which the set variables that is the set
current or power and the measured DC Source voltage is
simultaneously monitored. A separate power supply of 12V
was utilized to energize the system. The final schematic was
designed in DesignSpark PCB package for developing the
PCB for the regulated DC electronic load. The designed
and fabricated regulated DC Electronic Load is as shown in
Figure 8.
The electronic load was tested using three different DC
source under different test modes. A Lead-Acid battery of
rated 12V, 1.2Ah was tested to obtain its battery discharge
characteristics under two different set currents. A Ni-MH
battery of rated 4.8V, 2000mAh, was tested to obtain its
 battery discharge characteristics under two different set
currents. A solar panel of Vpm = 17V and Ipm = 1.70A and
Pmax = 30W was tested for constant power mode.
The lead-acid battery was tested for two different constant
current loads, that is for I1 = 0.6A and I2 = 1.2A. The
battery voltage was continuously monitored over a period of
time and the data was tabulated. The plot of tabulated data is
shown in Figure 10. The Ni-MH battery was tested for two
Fig. 12. Constant Power mode test of solar panel
Fig. 10. Lead-Acid battery discharge curve
different constant current loads for I1 = 1A and I2 = 2A.
The battery voltage was continuously monitored over a period
of time and the data was tabulated. The plot of tabulated data
is shown in Figure 11.
Fig. 11. Ni-MH battery discharge curve
From the Figure 10 and Figure 11 we can conclude that
the performance of Ni-MH battery considerably better than
lead-acid battery. A solar panel was tested under constant
power mode. The set power was increased gradually leading
to the maximum power rating of the solar panel. The voltage
and the current of was continuously monitored and tabulated.
The tabulated data was plotted as shown in Figure 12.
From the Figure 12 we can conclude that initially the current
drawn by the load is less for less power setting and as we
gradually move towards rated power, the current drawn by the
DC electronic load increases and attains the rated current of
the solar panel at rated power.
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V. C ONCLUSION
Electronic loads are essential in the growing market of
batteries and power supplies. In this work an attempt has
been made to design a reliable, cost effective and portable
DC electronic load. The DC electronic load was put to test
under different conditions and different DC sources were
tested. We obtained various characteristics plots of different
DC sources. From the above plots we can conclude that the
design for DC electronic load gives satisfactory results for
both constant current and constant power mode.
The future work that can be carried on the electronic load
would be to include more operating modes that is constant re-
sistance and voltage mode. The present set-up is not equipped
to handle any fault conditions, further work can be carried
to include different protection features like over current, over
voltage, reverse polarity, over temperature protection among
others.
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