VEERMATA JIJABAI TECHNOLOGICAL INSTITUTE (VJTI)

[Central Technological Institute, Maharashtra State]

Matunga, Mumbai-400 019

EXAMINATION MST - ODD Semester 2021 DATE 12/11/2021

OF
EXAM
SEMESTER & III & Second Year B Tech Information TIME 12:00 PM to 01:00 PM
PROGRAM Technology
TIME ALLOWED 1 Hrs MARKS 20
COURSE (Course Computer organization and Architecture (R4IT2004S)
Code)

Instructions: All questions are Compulsory

Q. Question Marks CO
No
Q.1 Describe in detail IEEE 754 floating point format and apply the IEEE 754 single 6 1
precision format on +105.7

Q.2 Design hardwired control unit for the GCD processor. Illustrate and implement the 6 2
state table for the control unit and classical method

Q.3 Consider a 16-bit processor in which the following appears in main memory, 8 1
starting at location 200:

The first part of the first word indicates that this instruction loads a value into an
accumulator. The Mode field specifies an addressing mode and, if appropriate,
indicates a source register; assume that when used, the source register is R1, which
has a value of 400. There is also a base register that contains the value 100. The
value of 500 in location 201 may be part of the address calculation. Assume that
location 399 contains the value 999, location 400 contains the value 1000, and so
on. Determine the effective address and the operand to be loaded for the following
address modes:
a. Direct d. PC relative g. Register indirect
b. Immediate e. Displacement h. Autoindexing with
c. Indirect f. Register increment, using R1