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DUKANE

Intelligent Assembly Solutions

Dukane EtherNet/IP to iQLinQ Converter

Document Overview
EtherNet/IP is an implementation of the CIP (Common Industrial Protocol) over Ethernet using a
TCP/IP network. EtherNet/IP (referred to here as EIP) is supported natively on many modern
Allen-Bradley PLCs. iQLinQ (referred to here as IQL) is a proprietary serial protocol developed
by Dukane I.A.S. for controlling the iQ series of ultrasonic generators. The EIP/IQL Converter
acts as a bridge between the two protocols and greatly decreases the programming effort
needed to control an iQ generator from a PLC. The programmer interacts with the iQ over
EtherNet/IP, needing no knowledge of the iQLinQ protocol details.

Some models of iQ Generators have built in EIP support, there is no need for the EIP/IQL
converter product. In these generators, the PLC interface is identical to the EIP/IQL converter.

This document will provide the controls engineer with a detailed description of the EIP/IQL
converter. It assumes the reader has a general understanding of TCP/IP networks and
PLC/PAC programming. Some basic EIP information is given throughout the document, consult
www.odva.org for more.

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Table of Contents
1. EIP/IQL Converter Overview .......................................................................................................4
1.1 Capabilities .............................................................................................................................. 4
1.2 Performance ............................................................................................................................ 5
1.3 Physical Properties .................................................................................................................. 5
Table1-1: EIP/IQL Converter Physical Interfaces ........................................................................... 5
2. Getting Started ...........................................................................................................................6
2.1 Setting up the AOI .................................................................................................................... 6
3. Configuring the EIP/IQL Converter...............................................................................................9
3.1 Command Line Interface ......................................................................................................... 9
Table 3-1: EIP/IQL Converter Configuration Commands ............................................................. 9
3.2 Configuration Options ........................................................................................................... 11
3.2.1 Network Settings ............................................................................................................ 11
3.2.2 iQLinQ Settings ............................................................................................................... 12
4. Configuring the iQ Generator .................................................................................................... 13
5. Configuring the PLC for Implicit (I/O) Messaging ........................................................................ 14
5.1 Implicit Message Assembly Definition ................................................................................... 15
Table 5-1: Probe Input Assembly Byte Map ............................................................................. 15
Table 5-2: Probe Input Assembly with MPC Byte Map ............................................................. 15
Table 5-3: System Status Output Bit Mask Definition ............................................................... 16
Table 5-4: Error Status Bit Mask Definition .............................................................................. 19
Table 5-5: Cycle Part Status Bit Mask Definition....................................................................... 21
Table 5-6: Generator State Index Definition ............................................................................ 21
Table 5-7: Probe Output Assembly Byte Map .......................................................................... 23
Table 5-8: Probe Output Assembly with MPC Byte Map .......................................................... 25
5.2 Configuring Allen Bradley PLCs for Implicit Messaging .......................................................... 28
5.3 Configuring Omron PLCs for Implicit Messaging .................................................................... 31

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6. Configuring the PLC to detect EIP connection events.................................................................. 42


Table 6-1: PLC-to-iQ connection ................................................................................................. 42
6.1 Configuring Allen Bradley PLCs to detect EIP connection events ........................................... 43
6.2 Configuring Omron PLCs to detect EIP connection events ..................................................... 44
7. Configuring the PLC for Explicit (Parameter) Messaging ............................................................. 45
7.1 Explicit Message Assembly Definitions .................................................................................. 46
Table 7-1: Probe Regulation Setup Assembly Map ................................................................... 46
Table 7-2: Probe Process Setup Assembly Map ........................................................................ 46
Table 7-3: Probe Process Limit Assembly Map ......................................................................... 46
Table 7-4: Probe Frequency Setup Assembly Map ................................................................... 47
Table 7-5: Probe Trigger-By-Power Assembly Map .................................................................. 47
Table 7-6: IO Control Assembly Map ....................................................................................... 48
Table 7-7: Advanced Frequency Control Assembly Map........................................................... 48
Table 7-8: Setup Save Assembly .............................................................................................. 50
Table 7-9: Setup Copy Assembly .............................................................................................. 50
Table 7-10: Test Scan Result Assembly ...................................................................................... 51
7.2 Configuring Allen Bradley PLCs for Explicit Messaging .......................................................... 51
7.3 Configuring Omron PLCs for Explicit Messaging .................................................................... 53
8. EIP/IQL Converter Firmware Update ......................................................................................... 54
8.1 Firmware Update Procedure: ................................................................................................ 55
9. Getting Help ............................................................................................................................. 56
DOCUMENT INFO: ............................................................................................................................ 57
REVISION INFO:................................................................................................................................ 57

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1. EIP/IQL Converter Overview

1.1 Capabilities
The EIP/IQL Converter provides for status and control of iQ Series Probe generators in an easy-to-
implement package for automation. Over the network, an EtherNet/IP master/scanner enabled PLC/PAC
(referred to as PLCs for the remainder of this document) can read various status bits and real time
operating values, start ultrasonic welding cycles, ultrasonic test cycles, and read and make changes to
process control parameters (if attached to a properly optioned iQ model).

The capabilities of the EIP/IQL converter are dependent upon the iQ model it is attached to. Other factors
like Mother Board (abbreviated to MB in this document) and Front Panel (abbreviated FP in this
document) firmware versions also affect the capabilities of the system. For example, the PLC will not be
able to use weld control parameters (weld time, weld energy) unless the iQ it is controlling has been
purchased with those options.

Select models also support local storage of process setup parameters and the ability to switch between
those stored setups via EIP. This removes the requirement for the PLC logic to push down new
parameters for each weld. These same models also support switching of probe selection via EIP when
paired with a Multi-Probe Controller (MPC) controller (if equipped).

Multi-Probe Controller (MPC) control over EIP is only supported by MB firmware versions v3.11.05 and
greater (this feature was added in v1.05 of the EIP/IQL converter). For generators with firmware versions
less than v3.11.05, hard digital I/O signals (available on the generators “System Status” connectors) must
be used to drive the Remote Setup Bits on the generator inputs and monitor status of the MPC system.
See the iQ generator user manual for details. Any generator with v3.00.00 or greater can be upgraded to
v3.11.05 (or greater).

Loading, storing, and switching setups is supported over EIP only in EIP/IQL v1.05 and greater when
paired with MB firmware v3.11.05 and greater. Using firmware versions earlier than that, the PLC must
store any settings and apply them when appropriate (for example, when switching MPC probes).

iQ Series Press generators are generally supported by the EIP/IQL converter box, this includes the iQ ES
Blank Front Panel, iQ ES Color LCD Front Panel, and the iQ LE Graphic Front Panel models (when
connected to a press). Please contact Dukane for information regarding limited press support.

The EIP/IQL converter requires the iQ generator to have MB firmware version of v2.62 or greater. iQ MB
firmware version v2.64 and greater support locking the Front Panel interface (if present) from making any
local changes. This feature is also generally available via a hard digital input on the System Inputs
connector (model dependent).

EIP/IQL converter firmware version v1.01 or greater is needed to support Omron PLCs and “auto stop”
functionality over the EIP Implicit Connection.

The EIP/IQL converter does NOT support the optional EtherNet/IP Address Conflict Detection (ACD),
QuickConnect, or SNMP features. The converter supports a single exclusive owner connection.

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1.2 Performance
The minimum supported RPI is 10ms, and can be increased from there in 10ms increments. Using the
largest RPI acceptable for your application is a good way to reduce EIP network congestion and ensure
reliable operation. The data throughput bottleneck in the system is the RS232/IQL side of the converter,
with a best case update time of about 15ms. Higher RPI times reduce the load on the PLC and increasing
the setting may allow more EIP devices to be controlled (in the case of bandwidth bound system) by the
PLC.

Given the two communication loops (EIP side and IQL side), worst case delay is 25ms. Worst case jitter
is also in the range of 25ms in this scenario.

An iQ LS generator with MB firmware v3.10.00 or greater, paired with an EIP/IQL converter with firmware
v1.01 or greater, will yield the best performance as the RS232 baud rate of 115,200 bps is supported.

iQ LS-E models yield even better performance due to a 250,000 bps internal serial connection to the MB.

iQ Auto Plus models yield the best performance, with zero serial communication overhead due to the EIP
feature being implemented directly on the MB itself.

Generators without Time or Energy options purchased will also have slightly poorer IQL loop time due to
some specific limitations in the IQL protocol. More IQL messages need to be exchanged than with “full
featured” models. iQ Auto Plus models would not suffer this degradation.

1.3 Physical Properties

Table1-1: EIP/IQL Converter Physical Interfaces


NAME DESCRIPTION
Requires +24V DC, input power is isolated on the EIP/IQL converter. A chassis
Power ground connection is also supplied and its use is highly recommended. The
current consumption is typically less than 100 mA.
Recessed Momentary reset switch, performs a “power on reset” without physically
Reset
removing the Power connection.
9 pin Male D Subminiature RS232 port used for configuring the settings of the
EIP/IQL Converter. This port connects a PC running a terminal console emulator
Config
via a straight through DB9F-DB9F cable (NOT a “null modem” cable), Dukane
P/N: 200-1126
9 Pin Male D-Subminiature RS232 port is used to communicate with an iQ series
ultrasonic generator using the iQLinQ protocol. A straight through DB9F-DB9F
iQLinQ
cable (NOT a “null modem” cable), Dukane P/N: 200-1126, is required between
this port and J4 “Configuration” port on the iQ generator.
RJ45 10/100 Mbps Ethernet connection. This must be connected to the network
using Cat5E cable. This port supports Auto-MDIX operation and Auto negotiation,
EtherNet/IP
this means both normal and crossover Ethernet cables will work. The LEDs
indicate activity and speed status.
Red Solid – unrecoverable fault
MOD Status Indicator LED

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Red Blinking – minor fault

Green Solid – device operational

Green Blinking – standby

Red Solid – Duplicate IP (not supported)

Red Blinking – Connection Timeout


NET Status Indicator LED
Green Solid – Connected

Green Blinking – No connections

Red Solid – The IQL connection has failed

OFF – The IQL connection is good


FAULT Status Indicator LED
Red Blinking – could be an intermittent IQL connection. A steady blink can be an
indication that the boot-loader is running.

2. Getting Started
The very first thing to do when setting up your PLC project is to determine if you application requires the
ability to set and read process control parameters. You will need this ability if you intend the generator
to control the duration of the weld, this is called “iQ System Control”. If you intend to control the
duration of the weld via your PLC logic itself, this is called “Automation Control”. Note that the lowest
tier of generator options does not support “iQ System Control” and require the PLC to control the
duration of the ultrasonic output. There is much less base logic setup needed for “Automation Control”,
and if you do not need “iQ System Control” it will save work. “Automation Control” only requires that
an Implicit Connection be setup, no Explicit Messaging is required, see Section 5 and the provided
“Automation Control” demo application.

If you do require Explicit Messaging for parameter exchange, the provided RsLogix 5000 “System
Control” demo application provides a good starting place, its use is HIGHLY recommended if you are
using an AB PLC. This recommendation is especially strong if you intend on controlling multiple
generators from the same logic program. The demo contains a UDT (User Defined Type) called
“IQ_PROBE_UDT” that represents all of the information that can be exchanged between the PLC and
generator. It also includes an AOI (Add-On Instruction) called “iQ_PROBE_MPC_AOI” that handles all of
the logic required for Explicit Messaging.

2.1 Setting up the AOI


The AOI has several required parameters: an Implicit Message Connection (follow Section 5), an instance
of the aforementioned “iQ_PROBE_UDT” UDT, and preconfigured MESSAGE tags for “set” and “get”
Explicit Messages (follow Section 7). The AOI is designed for MPC control but can also be used for Non-
MPC control by leaving the “Probe Selection” DINT at zero. Controlling multiple generator entails using

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multiple AOI calls, each configured with their own set of parameters (Implicit Message / IO Connection
Path, “iQ_PROBE_UDT” instance, MESSAGE tags, and the below described ancillary function calls. See
the demo for examples).

Other requirements to use the AOI are a GSV instruction to provide module status to the AOI and CPS
instructions to synchronously copy the UDT’s input and output memory to the Implicit Connection’s
input and output memory. The CPS instruction for the input must immediately precede the AOI in the
logic. The CPS for the output should happen only once per logic loop, after the AOI and any external
logic has updated its values. The members of the UDT and logic of the AOI are extensively commented,
please refer to them while reading the remainder of this document.

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The UDT parameter of the AOI provides the interface between the generator and your PLC logic. The
UDT contains several sub-UDT’s that represent the data sent and received in an Explicit Message (the
size and ordering of the members of the sub-UDT’s is critical and MUST match the ordering in the
Explicit Message themselves). There are also several DINT’s that provide message and connection
control and status.

The “connection ready” BOOL of the UDT indicates that the IQL connection to the generator is ready and
that the AOI has populated the UDT with parameter data from Explicit Message “gets”. The Implicit
connection is also usable in this state. The AOI will clear the memory used for the Output Assembly
when this bit is not set. This bit will clear while the AOI is performing a “get all” due to a “setup
refreshed” or change in setup number. The AOI uses the “Clear Setup Refreshed” bit of the Output
Assembly for the “setup refreshed” handshake mechanism. External logic should not overwrite this bit.

The “get_assembly_msk” member is a bit masked DINT, with a bit-per-assembly defined. A rising edge
on one of these bits will cause a “Get_Attribute_Single” message for that assembly to be sent. The
corresponding sub-UDT will be populated with the results if the corresponding bit in the
“get_done_msk” is set. If the corresponding bit in the “get_err_msk” is set, the message failed and the
contents of the sub-UDT are not updated. These “done” and “error” masks are cleared upon the start of
new Explicit Message.

Similarly, there is a “set_assembly_msk” member that does the same for “Set_Attribute_Single”
messages with corresponding “set_done_msk” and “set_err_msk”. Upon a failed “set”, the AOI will
automatically issue a “get” for that assembly, thereby repopulating the sub-UDT of concern. The AOI
will not issue any “set”s upon it own logic, all “set”s must originate from external logic.

The AOI will automatically retrieve the results of a Test Scan upon completion. The Test Scan Result is
cleared upon a rising edge of the “Run Test Scan” bit of the output assembly. Once the Test Scan is
completed, the AOI issues a “get” for the “Test Scan Result Assembly”, a non-zero value indicates
success and the optimal frequency to be used for the Free Run Frequency parameter. The AOI does NOT
automatically apply this setting, as it is typical to provide a human user with the option to apply the
result or not. This logic is left external to the AOI.

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3. Configuring the EIP/IQL Converter


Note that some iQ models (LS-E and Auto Plus) have EIP functionality built in to the unit itself, and
therefore do not require the EIP/IQL Converter covered in this section. For the LS-E, the Network
Settings covered in Section 3.2.1 are accessed via the “INFO” menu, and the Auto Plus PC based
configuration utility is used in the case of the Auto Plus generators.

3.1 Command Line Interface


The EIP/IQL converter is configured from a PC over a RS232 serial connection to the “Config” port. The
serial port setup is fixed at 57600 bps, 8 data bits, no parity bit, and 1 stop bit with no hardware or
software flow control.

The user interacts with the EIP/IQL converter via a command line interface (CLI) using a terminal
emulator program such as HyperTerminal or TeraTerm (recommended) over the serial port. Using the
CLI, the user can issue commands to the device, such as changing settings and displaying status
information, over a text console command prompt.

The Auto Plus, and other iQ models with built in Ethernet/IP, may also have a RS232 serial connection
that can be used to configure the settings pertinent to Ethernet/IP. These serial connections support both
IQL operation and the CLI, they operate at the same 57600 bps as the EIP/IQL converter. However,
these connections default to “IQL mode” and require the ESC key to be held in the terminal emulator in
order to activate the Command Line Interface. Alternatively, a convenient PC based application is
available to change these settings via the USB connection, contact your salesman for details.

Table 3-1: EIP/IQL Converter Configuration Commands


NAME DESCRIPTION
env Display and edit EIP/IQL converter configuration settings.
net Display the status and edit settings of the Ethernet Port
iql Display the status of the iQLinQ connection
eip Display the status of the EtherNet/IP connection
rtd Display the real time data of the iQ generator
cyc Display the cycle data from the iQ generator
test Run an Ultrasonic Test Cycle on the iQ generator
ping Added in v1.02, ping an IP address from the EIP/IQL converter box
help Display a list of available commands
exit Exit CLI mode and re-enter IQL mode (for units with built-in EIP support)

Commands are issued by typing the name of the command into the terminal emulator program and hitting
the “Enter” key. For example, to display a list of available commands, you would type “help” (without the
quotes), hit the enter key, and a screen similar to the following should be displayed.

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Figure 3-1: Terminal Emulator

The “EIP>” on the left side of the screen indicates that the module is ready to take a command. If the
prompt is not visible hit the Enter key without typing a command, this will elicit a blank prompt. If this does
not work, check your power and serial connections and the serial port configuration of your PC.

All commands are case sensitive and in lower case (“Help”, “HELP”, “HeLp” are not the same as “help”).
The up and down arrow keys will cycle through your command history. The left and right arrow keys will
move the edit position of your cursor. The “Backspace” key will remove characters (the “Delete” key is not
supported!). The “Enter” key submits the command to be processed.

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3.2 Configuration Options


The EIP/IQL converter has a set of Ethernet settings and a set of iQLinQ settings. The “net” command
without any parameters lists the current values of the configuration settings. EIP/IQL converters with
firmware older than v1.05 should use the “env” command.

Figure 3-2: Network Settings

A “1” in the “DHCP” row indicates that DHCP is enabled; a “0” would indicate that it is disabled.

These settings are changed by running the “net” command with a parameter of “edit”, by typing “net
edit” (“net” SPACE “edit” without quotes) and hitting Enter. This will display the list of settings, one line
at a time (one setting per line) with the ability to edit the values individually using the “Backspace” key to
delete characters, and the left/right arrow keys to navigate within the value. The “Enter” key accepts the
value and moves on to the next setting. Once a value is accepted there is no way to “backup”, you must
re-run the “net edit” command. Once all values are accepted, they will automatically be saved to non-
volatile memory in the EIP/IQL converter. The “net reset” command will restore all network settings to
their factory defaults.

3.2.1 Network Settings


The user must configure the Ethernet settings of the EIP/IQL converter. These settings include, enabling
DHCP (enabled by default), the EIP/IQL converter’s fixed/static IP, SubNetwork Mask, and Default
Gateway addresses (only significant when DHCP is disabled). By default, the converter will use DHCP to
configure its IP address, Network Mask, and Default Gateway.

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By default, DHCP is enabled and will acquire the IP address, network mask, and default gateway settings
from the DHCP server on the network every time it powers up. When DHCP support is enabled, the other
network settings listed by the “net” command are ignored. If a DHCP server cannot be contacted, the
EIP/IQL converter uses the AUTO-IP protocol to generate these settings (addresses in the range of
169.254.XXX.XXX indicate an AUTO-IP assigned address). The current network addresses can be
viewed by using the “net” command.

If the EIP/IQL converter acquires an IP address from DHCP, the converter (along with its IP address) will
be visible from a PC running RSLinx on the same network subnet. However, this IP address might be
different every time the EIP/IQL converter requests one from the DHCP server, so this address should not
be used as a hardcoded value in PLC program logic.

While convenient in a corporate network environment, DHCP is not practical for an EtherNet/IP network
unless the DHCP server is tightly controlled. Once the user disables DHCP, the EIP/IQL converter will
use the static addresses listed/edited with the “net” command. Please note these settings as they will be
required during the PLC configuration phase, with DHCP disabled, this static IP will be hardcoded into
PLC program logic and I/O configuration. Sections 4 and 6 will cover these settings.

3.2.2 iQLinQ Settings


iQ Auto Plus and iQ LS-E/LE generators have built in EIP functionality, they do not have any settings
pertinent to the iQLinQ connection.

The only settings pertinent to the iQLinQ interface concern the baud rate of the serial port, this is
accesses by using the “net edit” command. By default, iQ ultrasonic generators run their J4
“Configuration” serial port at 57600 bps. The EIP/IQL converter also uses 57600 bps by default on its “iQ
LinQ” port. The user should not have a reason to change the default baud rate unless there are problems
connecting to a generator (run the “iql” terminal command to get the IQL connection state).

EIP/IQL converter firmware v1.01 introduced an automatic baud rate upgrade mechanism when
connected to an iQ generator with MB firmware v3.10.00 or greater. The EIP/IQL converter will increase
the baud rate to 115200 bps from 57600 bps when connected to a qualifying unit only if the “IQL BAUD
RATE” setting is default (57600 bps) and the “BAUD UPDATE” setting is 1 (default). The user should only
disable the “BAUD UPDATE” setting (via the ‘env edit” command) if communication problems arise. If the
generator has MB firmware less than v3.10.00, the “BAUD UPDATE” setting is not significant. A reboot of
the EIP/IQL converter may be required to apply any changes to the baud rate settings.

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4. Configuring the iQ Generator


The EIP/IQL converter is only supported by certain iQ generators that implement the iQLinQ protocol. A
generator with a MB firmware version “v2.62” and greater is required. The MB firmware version is
available via the CLI from the “iql” command (note that the generator must be powered up and the 200-
1126 serial cable must be connected between the EIP/IQL converter and J4 of the iQ for this command to
return useful information). If the EIP/IQL board detects a MB firmware version below “v2.62”, it turns on
the “FAULT” LED and set the IQL_ERROR bit in the IO data of the EIP connection.

iQ LS character LCD front panel models (model numbers: XXHBXXX-XB, XXHBXXX-XE, XXVBXXX-XB,
and XXVBXXX-XE (‘X’ denotes any character)) must be placed into “External Control Mode” or “Serial
Control Mode” in order for the EIP/IQL converter to work properly. Under certain conditions, the EIP/IQL
converter can detect this condition and will turn on the “FAULT” LED and set the IQL_ERROR bit in the IO
data of the EIP connection, use the TUI “iql” command to get more information on the current IQL
connection.

The iQ LS-E models must have their network settings configured via the “INFO” -> “ADVANCED
SETTINGS” menu.

The Auto Plus models must have their network settings configured via the Auto Plus PC configuration
utility.

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5. Configuring the PLC for Implicit (I/O) Messaging


The EtherNet/IP protocol supports two distinctly different messaging types: implicit messages and explicit
messages. The EIP/IQL converter supports both message types, using implicit messaging to exchange
I/O data in real-time and explicit messages for parameter value exchange. An implicit message
connection is required, while the explicit messaging can be optionally implemented by the controls
engineer dependent upon his control requirements. Data contained in the implicit messages appear like
“local” I/O to the PLC program. No direct message handling by the logic is required, input and output
memory is updated each RPI automatically. The implicit messaging connection provides most of the
features that are available via the hard discrete “System Status” I/O available on the generator itself, with
the addition of real time parameter and error value reporting and the ability to change amplitude set point
percentage.

The EIP/IQL converter has a minimum RPI of 10ms. EIP networks with many nodes and low RPI’s should
consider using a managed switch with IGMP snooping, which lowers the networking burden of the
individual nodes as compared to a standard unmanaged “dumb” switch. The controls engineer should
consult the “EtherNet/IP Infrastructure Guidelines” document provided on the ODVA website before
choosing a network switch. As a rule of thumb, networks with 10 or more total nodes (including the PLC
and HMI) or control networks integrated into enterprise networks should use a managed switch with IGMP
snooping.

The input assembly represents the iQ generator’s outputs, these are read only values. The input
assembly is constructed from an array of DINTs (32 bit elements).

The output assembly represents the iQ generator’s inputs, these are write only values. The output
assembly is constructed from an array of DINTS. Zero’s should be written to all unspecified bits, future
firmware versions may use these bits and this will ensure backward compatibility to existing PLC logic.

The PLC must be configured to use a specific input assembly and a specific output assembly, different
input/output assembly pairs yield different features. For example, the weld process parameter setup
and MPC probe selection feature is enabled by selecting input/output assemblies that support those
features. These features are not available when a different input/output assembly pair is used when
configuring the connection.

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5.1 Implicit Message Assembly Definition

Table 5-1: Probe Input Assembly Byte Map


Assembly Instance Number 101 (0x65), Size 12 DINTs
DINT
NAME DESCRIPTION
INDEX

0 System Status Outputs See below for System Status Output Bit Mask Definition

1 System Error Status See below for Error Status Bit Mask Definition

Index representing the current state of the generator. See below for
Generator State Index Definition. Note that not all of these values
2 Generator State
are significant to every generator model; many are applicable to
Press Generators only. They are included here for completeness.

3 Real-Time Amplitude The current amplitude of the stack in units of 0.1%

4 Real-Time Frequency The current frequency of the stack in units of Hz

5 Real-Time Power The current driven power of the stack in units of 0.1 W

Count of total number of cycles since power up (not updated for a


6 Cycle Count
test cycle)

See below for Cycle Part Status Bit Mask Definition (not updated for
7 Cycle Part Status
a test cycle)

Total Weld Time of the last cycle, units of mS (not updated for a test
8 Cycle Weld Time
cycle or continuous cycles for MB versions less than v3.00)

Peak Weld Power of last cycle, units of 0.1W (not updated for a test
9 Cycle Weld Peak Power
cycle)

Total Weld Energy of last cycle, units of 0.1J (not updated for a test
10 Cycle Weld Energy
cycle)
11 RESERVED RESERVED, ignore.
Note that this assembly is only valid for an Implicit Connection when paired with the Probe Output
Assembly (instance number 102 / 0x66).

Table 5-2: Probe Input Assembly with MPC Byte Map


Assembly Instance Number 107 (0x6B), size 13 DINT’s
DINT
NAME DESCRIPTION
INDEX

0 System Status Outputs See below for System Status Output Bit Mask Definition

1 System Error Status See below for Error Status Bit Mask Definition

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Index representing the current state of the generator. See below for
Generator State Index Definition. Note that not all of these values
2 Generator State
are significant to every generator model; many are applicable to
Press Generators only. They are included here for completeness.

3 Real-Time Amplitude The current amplitude of the stack in units of 0.1%

4 Real-Time Frequency The current frequency of the stack in units of Hz

5 Real-Time Power The current driven power of the stack in units of 0.1 W

Count of total number of cycles since power up (not updated for a


6 Cycle Count
test cycle)

See below for Cycle Part Status Bit Mask Definition (not updated for
7 Cycle Part Status
a test cycle)

Total Weld Time of the last cycle, units of mS (not updated for a test
8 Cycle Weld Time
cycle or continuous cycles for MB versions less than v3.00)

Peak Weld Power of last cycle, units of 0.1W (not updated for a test
9 Cycle Weld Peak Power
cycle)

Total Weld Energy of last cycle, units of 0.1J (not updated for a test
10 Cycle Weld Energy
cycle)

Represents the weld process control setup that the iQ is currently


11 Current Setup
using, values range from 1 to 16.

Represents the MPC probe selection that the iQ is currently using,


12 Current Probe
values range from 1 to 16.
Note that this assembly is only valid for an Implicit Connection when paired with the Probe Output with
MPC Assembly (instance number 108 / 0x6C).

Input assembly Bit Mask definitions:


Note that not all of these bit definitions are applicable or pertinent to every generator model or mode of
operation. There is also some overlap in the definitions between the Status Outputs and Error Status
(same bits appearing in both). All unspecified bits should be ignored, future EIP/IQL firmware versions
may use these bits.

Table 5-3: System Status Output Bit Mask Definition


All unspecified bits should be ignored, future firmware versions may use these bits.

NAME / MASK DESCRIPTION

PROG_STATUS_1 Reflects the state of the generator’s Programmable Status Output 1, if equipped.
Input_Assembly[0].0 Added in EIP/IQL v1.05, available since initial release of iQ Auto Plus and iQ LS-E.
0x00000001 Available on all v3.00.00+ MB firmware.

PROG_STATUS_2 Reflects the state of the generator’s Programmable Status Output 1, if equipped.
Input_Assembly[0].1 Added in EIP/IQL v1.05, available since initial release of iQ Auto Plus and iQ LS-E.
0x00000002 Available on all v3.00.00+ MB firmware.

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GOOD_PART Part Status Output associated with Process Limits. When the cycle parameters
Input_Assembly[0].2 recorded during the previous welding cycle do not exceed the programmed suspect or
0x00000004 bad part limit, it is a GOOD PART.

BAD_PART Part Status Output associated with Process Limits. BAD PART occurs when the cycle
Input_Assembly[0].3 parameters recorded during the previous cycle are outside the programmed bad parts
0x00000008 limit

SUSPECT_PART Part Status Output associated with Process Limits. SUSPECT PART occurs when the
Input_Assembly[0].4 cycle parameters recorded during the previous cycle are outside the programmed
0x00000010 suspect part limits.

PROG_STATUS_3 / Programmable Status Output is only available on Servo Press Generators.


US_REGULATION
Input_Assembly[0].5 For all other models, this bit has a fixed meaning: Ultrasound voltage is actively being
0x00000020 produced and the actual amplitude is in +/- 1% of the amplitude setting.

TRIGGER_STATUS
The Trigger has been made (only significant for probe generators when using Trigger-
Input_Assembly[0].6
by-Power).
0x00000040

AVERAGE_OVERLOAD
Power from ultrasonic stack sent to the part exceeds the generator’s power rating for
Input_Assembly[0].7
the given amplitude.
0x00000080

PEAK_OVERLOAD
Currents internal to the generator exceeded a safe range. This usually indicates a bad
Input_Assembly[0].8
stack/transducer or abusive weld cycle conditions.
0x00000100

CURRENT_LOOP_FAULT
A remote analog input card is present and it is outside of its 4-20 mA current loop
Input_Assembly[0].9
range.
0x00000200

US_STATUS
Ultrasound voltage is actively being produced. The system is actively delivering
Input_Assembly[0].10
ultrasonic power to the attached load.
0x00000400

IN_HOLD
Input_Assembly[0].11 The generator is in the “Hold” phase of the cycle
0x00000800

POWER_OK
Input_Assembly[0].12 The AC power line voltage is within acceptable limits.
0x00001000

READY
The generator is able to start producing ultrasound voltage. Output signal will activate
Input_Assembly[0].13
only when the system is ready to activate ultrasound or begin a weld cycle.
0x00002000

There was a fault during the last cycle, this will self clear when another cycle starts.
ANYFAULT
Generator faults that will activate the Any Fault: Overload(Average, Peak or
Input_Assembly[0].14
Frequency), Over temperature fault, System Power Fault. Over temperature and
0x00004000
system power faults are not clearable user-clearable and reset themselves once the

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fault condition subsides. Anyfault will also be set when an analog remote control card
is present and enabled and the 4-20ma signal is out of range.

An overload activates whenever any overload condition is tripped. Activation of the


OVERLOAD
overload status output signal could be caused by an average overload, a peak
Input_Assembly[0].15
overload, or a frequency overload condition. It will remain in overload condition until
0x00008000
the next ultrasound cycle is activated or the error is cleared by the user.

The generator is ONLINE and can start a welding cycle and activate the ultrasound
ONLINE output when READY status is asserted. On iQ Auto and iQ Auto Plus model, this bit
Input_Assembly[0].16 reflects the state of the “Enable In” input. On other iQ models, ONLINE is controlled
0x00010000 via buttons on the unit’s Front Panel (and do not have an input on the System Status
Input connector).

TOP_OF_STROKE
(Press only) activates when the press/thruster head is at the top of its cycle stroke
Input_Assembly[0].17
position.
0x00020000

E-STOP_ACTIVE (v3.00.00 MB firmware and above, if equipped with proper hardware) The generator is
Input_Assembly[0].18 “E-Stopped”, E-Stop is available on press models and iQ LS and LS-E models
0x00040000 equipped with a Remote Amplitude Option card.

IN_CYCLE
Input_Assembly[0].19 The generator is not idle and is running a cycle.
0x00080000

IN_AFTER_BURST The generator is in the “After-Burst” phase of the cycle. In some applications the
Input_Assembly[0].20 welded part can stick to the horn as it is retracted from the work piece. Afterburst
0x00100000 prevents this by sending a short burst of ultrasound on the upstroke.

Input_Assembly[0].21
Reserved, ignore.
0x00200000

MPC_READY The MPC controller has finished switching probes and is ready to receive ultrasound
Input_Assembly[0].22 power. Added in EIP/IQL v1.05, available since initial release of iQ Auto Plus and iQ
0x00400000 LS-E. Available on all v3.00.00+ MB firmware.

SETUP_REFRESHED The EIP/IQL converter has finished it’s collection of process control parameters from
Input_Assembly[0].23 the EMB, “Get_Attribute_Single” explicit request will contain valid data. Added in
0x00800000 EIP/IQL v1.05, available since initial release of iQ Auto Plus and iQ LS-E.

UNRECOVERABLE_ERROR
A fault exists that cannot be cleared. Rebooting the generator may clear the fault, if
Input_Assembly[0].24
not please contact Dukane Customer Service.
0x01000000

Supported in iQ Auto Plus v4.01.00 firmware and greater. This indicates that the
CYCLE_START_REJECT
generator received a request to start a cycle, but rejected it for one reason or another.
Input_Assembly[0].25
Typically the reason can be deduced by looking at the Error Status or double checking
0x02000000
Weld Control parameter values.

If set, the EIP/IQL converter has established IQL communication with the generator.
IQL_READY
The data in the Input Assembly is now valid for consumption by the PLC, and the data
Input_Assembly[0].31
in the Output Assembly will now be consumed by the EIP/IQL converter. When this bit
0x80000000
is cleared, the “IQL FAULT” indicator LED will be lit.

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Table 5-4: Error Status Bit Mask Definition


All unspecified bits should be ignored, future firmware versions may use these bits.

NAME / MASK DESCRIPTION

Internal Error
An unrecoverable internal error has occurred. Any of these bits being set should be
Input_Assembly[1].0-3
considered a major alarm, sonics will not restart.
0x0000000F

Frequency Overload
(Frequency Lock Failed)
The generator was unable to lock on to the proper ultrasonic frequency of the stack.
Input_Assembly[1].4
0x00000010

Frequency Overload
(Frequency Lock Lost)
The generator was not able to maintain lock on the proper ultrasonic frequency.
Input_Assembly[1].5
0x00000020

Peak Overload (Positive) Currents internal to the generator exceeded a safe range. This usually indicates a bad
Input_Assembly[1].6 stack/transducer or abusive weld cycle conditions. There is no special significance to
0x00000040 “Positive” or “Negative”.

Peak Overload (Negative) Currents internal to the generator exceeded a safe range. This usually indicates a bad
Input_Assembly[1].7 stack/transducer or abusive weld cycle conditions. There is no special significance to
0x00000080 “Positive” or “Negative”.

Average Overload
The ultrasonic power output exceeded the generator’s power rating for the given
Input_Assembly[1].8
amplitude.
0x00000100

Current Loop
Input_Assembly[1].9 A remote analog input card is present and it is out of its 4-20 mA current loop range.
0x00000200

Power Not OK
The AC power line voltage is NOT within acceptable limits. This should be considered
Input_Assembly[1].10
a major alarm, sonics will not restart.
0x00000400

Over Temperature The internal temperatures of the generator are not within acceptable limits. This
Input_Assembly[1].11 should be considered a major alarm; sonics will not restart until the generator has
0x00000800 cooled down.

Over Amplitude Fault This bit will be set if the generator observes the Actual Amplitude to be over 100% in
Input_Assembly[1].12 any Fixed Pulse Width Operating mode. This bit was previously defined as “FORCED
0x00001000 SHUTDOWN” but was never used.

Trigger Failed
The last weld cycle timed-out before the trigger condition was reached. In the case of
Input_Assembly[1].13
a probe generator, only “Trigger-by-Power” is supported.
0x00002000

Trigger Lost Early (non-EPR Press only) The force sensitive trigger switch was made then lost within
Input_Assembly[1].14 100ms.

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0x00004000

Trigger Lost During Weld


(non-EPR Press only) The force sensitive trigger switch was made then lost during the
Input_Assembly[1].15
weld cycle.
0x00008000

Latched-On-Bad-Part
Input_Assembly[1].16 The “Latch On Bad Part” feature is enabled and active.
0x00010000

There is an error in IQL communication, either the iQ does not have the proper
firmware revision, it has not been placed in “external control” mode (if required,
IQL_ERROR
implementation is specific to front panel model specific), or there is some other
Input_Assembly[1].31
unrecoverable error. When this bit is set, the “IQL FAULT” indicator LED will be lit. If
0x80000000
both the IQL_READY and IQL_ERROR bits are set, the command line “iql” command
accessible via the EIP/IQL config port will provide more information.

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Table 5-5: Cycle Part Status Bit Mask Definition


MASK DESCRIPTION

GOOD Part
Input_Assembly[7].0 No Process Limits were violated during the last cycle.
0x00000001

BAD Part
Input_Assembly[7].1 A Bad Limit was violated during the last cycle
0x00000002

Suspect Part
Input_Assembly[7].2 A Suspect Limit was violated during the last cycle
0x00000004

Upper Time Limit


Input_Assembly[7].8 A Bad or Suspect Upper Time Process limit was exceeded during the last cycle
0x00000100

Lower Time Limit


Input_Assembly[7].9 A Bad or Suspect Lower Time Process limit was not met during the last cycle
0x00000200

Upper Peak Power Limit


Input_Assembly[7].10 A Bad or Suspect Upper Peak Power Process limit was exceeded during the last cycle
0x00000400

Lower Peak Power Limit


Input_Assembly[7].11 A Bad or Suspect Lower Peak Power Process limit was not met during the last cycle
0x00000800

Upper Energy Limit


Input_Assembly[7].16 A Bad or Suspect Upper Energy Process limit was exceeded during the last cycle
0x00001000

Lower Energy Limit


Input_Assembly[7].17 A Bad or Suspect Lower Energy Process limit was not met during the last cycle
0x00002000

Table 5-6: Generator State Index Definition


VALUE NAME DESCRIPTION

0 Idle The Generator is not running a cycle

1 Test The Generator is running a test cycle

The Generator is in cycle, waiting the configurable “Auto Start Delay”


2 Auto Start Delay
period before starting sonics.

The Generator is in cycle, waiting on the event that will trigger the start of
3 Pre-PreTrigger
sonics before starting the weld cycle. (Press Only).

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The Generator is in cycle and has possibly started sonics. It is waiting


4 PreTrigger on the event that will trigger the start of the weld cycle. (Press and
“Trigger By Power” for Probe).

The Generator is in cycle, has met the trigger condition and is waiting on
5 Trigger Delay the “Trigger Delay” condition to be met before starting sonics and the
weld cycle (Press Only, mutually exclusive to PreTrigger).

The Generator is in cycle and is running sonics during an “automation


6 Continuous
controlled” continuous weld.

The Generator is in cycle and is running sonics monitoring applicable


7 Weld 1
weld terminating conditions, an “iQ controlled” weld.

The Generator is in cycle and is running sonics monitoring applicable


8 Weld 2
weld terminating conditions (Dual Pressure Pneumatic Press Only).

The Generator is in cycle and is running sonics performing a scrub


9 Scrub
operation after weld cycle has completed (Press Only).

The Generator is in cycle, has shut down sonics and performing a hold
10 Dynamic Hold
operation after weld cycle has completed (Press Only).

The Generator is in cycle, has shut down sonics and performing a hold
11 Static Hold operation with no motion after weld cycle has completed (Servo Press
Only).

The Generator has completed the weld cycle and is wating a period of
12 AfterBurst Delay
time before the AfterBurst sonics activation occurs.

The Generator has completed the weld cycle and is running sonics for
13 AfterBurst Duration
the AfterBurst feature.

The Generator is running sonics and performing a stack scan, this is only
14 PreWeld Scan available in certain Frequency Control Mode settings. This is also the
state for a “Test Scan”.

(Servo Press Only) The generator cycle is completed. This is a transient


15 Done
condition, the generator will return to IDLE after its completion.

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Table 5-7: Probe Output Assembly Byte Map


Assembly Instance Number 102 (0x66), Size 2 DINT’s
DINT
NAME DESCRIPTION
INDEX
Bit Mask Definition:
Run Continuously 0x00000001
Run Weld 0x00000002
Run Test 0x00000004
Clear Error 0x00000008
On-The-Fly-Amp-En 0x00000010
Auto Stop* 0x00000020
0 EIP Status Inputs FP Lockout** 0x000000C0
Run Test Scan** 0x00000100
Clear Setup Refreshed** 0x80000000

(*available only in v1.01 or later EIP/IQL firmware)


(**available only in v1.05 or later EIP/IQL firmware and
iQ LS-E and iQ Auto Plus models)

The “on-the-fly” regulated amplitude setting in units of whole


percentages, only significant if the “on-the-fly-amplitude” bit is
1 Amplitude Setpoint set in the System Status Input Word, else this parameter is
ignored by the generator and the values stored with the explicit
messages are used.
Note that this assembly is only valid for an Implicit Connection when paired with the Probe Input Assembly
(instance number 101 / 0x65).

The “Clear Error”, “Auto Stop”, “Run Continuously”, and “Run Test” bits are “level triggered” or
“maintained” inputs. The “Run Weld” bit is a rising edge triggered (a “zero-to-one” transition) or
“momentary” input. The minimum duration of the bit assertions is two RPI periods; however, the proper
means of activating these inputs entails monitoring the Input Assembly for feedback indicating they can be
cleared. For example, it would be safe to deactivate the “Run Weld” bit once the Generator State DINT
leaves “IDLE” or an “In-Cycle” bit goes active.

The “Auto Stop” bit (added with EIP/IQL converter firmware v1.01) is useful to prematurely stop a
controlled weld started by either the “Run Weld” bit here, or the hard auto in signal of the System Inputs
found on J2.

All of the above mentioned bits are mutually exclusive, only one may be active at a time. The EIP/IQL
convert enforces a priority with these bits. “Clear Error” has the highest priority, and a ‘1’ there will cause
all other bits to be interpreted as ‘0’. If “Clear Error” is ‘0’, “Auto Stop” has the next highest priority. A
“Clear Error” or “Auto Stop” during a cycle will shut down ultrasound power. In this event, the rest of the
bits must be cleared to ‘0’ before setting to ‘1’ for them to be honored by the EIP/IQL converter. For the
example of using Auto Stop” while running a controlled cycle, a “0x02 to 0x20 to 0x02” sequence of
values will NOT restart sonics. A “0x02 to 0x20 to 0x00 to 0x02” sequence must be used (each value
must be held a minimum of 2 RPI periods).

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The “Run Weld” is only significant when the EIP/IQL converter is connected to an iQ generator with the
“iQ System Control” (weld by time and energy) options purchased and a weld controlling parameter has
been enabled. To use a controlled weld, at least “Weld Time” of the “Probe Process Setup Assembly”
must be non-zero. Therefore, using the “Run Weld” bit requires implementation of EIP Explicit Messages
outlined later in this document. The “Run Continuous” bit will only work when all weld controlling
parameters are not used. See the “Probe Process Setup Assembly” description for more details.

The “Front Panel Lock Out” feature was added in v1.05 of the EIP/IQL converter, and has been available
since initial release of the built in support for the iQ LS-E and iQ Auto Plus models. A value of “00” for
these bits will fall back to the “Front Panel Lock Out” support provided by the explicit IO Control Assembly.
When these bits are non-zero, the “Front Panel Lock Out” support in the IO Control Assembly is ignored.
A value of “01” will disable the feature completely, the FP will not be locked out over EIP or by the hard
System Status Inputs (if equipped). A value of “10” will allow the FP lockout to be controlled via the hard
System Status Inputs (if equipped). A value of “11” will force the FP lockout feature to be enabled.

The “Clear Setup Refreshed” bit was added in v1.05 of the EIP/IQL converter, and has been available
since initial release of the built in support for the iQ LS-E and iQ Auto Plus models. This bit is used in
conjunction with Input_Assembly[0].23 (“Setup_Refreshed”) status bit to form a handshake between the
EIP/IQL converter and the PLC. The a rising edge of the “Setup_Refreshed” status bit informs the PLC
that it should perform an explicit “get” on all pertinent assemblies because a value in one (or all) of them
has changed. This will keep the PLC’s version of the generator setup coherent with the generator.
Setting this “Clear Setup Refreshed” bit tells the EIP/IQL converter to clear the “Setup_Refreshed” bit so
that a subsequent rising edge can be detected and acted upon. THIS BIT MUST NOT BE ALTERED BY
EXTERNAL LOGIC!!!

The “Run Test Scan” bit will initiate a low amplitude scan of the ultrasonic stack. This procedure will
determine the best Free-Run Frequency setting for optimal start up of the stack. Once completed, the
scan result is available in the Test Scan Result Assembly. A non-zero value indicates a successful scan
and the optimal frequency to be used for the Free Run Frequency parameter. The RsLogix demo AOI
will automatically retrieve the test scan result at the end of the test scan.

The “On-The-Fly-Amplitude-Enable” bit is independent of the other bits and can be set or cleared at any
time. The generator has only one weld amplitude setpoint, the EIP/IQL converter exposes access to this
value here in the Output assembly and in the “Probe Regulation Setup Assembly”. Using both
simultaneously is discouraged and confusing. Note that if the “On-The-Fly-Amplitude-Enable” bit is
enabled then cleared, the generator will maintain the last “on the fly” value in the Input Assembly, it will
not automatically revert to the value in the “Probe Regulation Setup Assembly” explicit message. If
amplitude on-the-fly is enabled, the “Weld Amplitude” field of the “Probe Regulation Setup Assembly” is
ignored on a “Set Attribute Single” and is filled in with the on-the-fly value in the reply to “Get Attribute
Single” explicit message request. NOTE: A “Remote Amplitude” 4-20mA input card will dictate the
amplitude regardless of any settings from EIP if the generator is in “Remote Amplitude Mode” and not “iQ
System Amplitude Mode”, If you are having trouble with setting amplitude via EIP, and the generator has
this option card installed, please check these settings from the Front Panel interface. This setting is not
alterable over EIP.

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When changing Amplitude on-the-fly, note that the change is not instantaneous. The amplitude changes
at a rate equal to that used during Ramp Up at cycle start. The Ramp Up rate is calculated by dividing the
Weld Amplitude by the Ramp Up time.

For example, starting with 100% Weld Amplitude and a Ramp Up Time setting of 150ms, would yield a
rate of:

100%
RampRate   0.667 %
150ms ms

Changing from that starting 100% setpoint to 20% would therefore require:

(100%  20%)
RampTime   120ms
0.6667 % ms

Changing again from 20% to 60% will only take half as much time because the amplitude is only changing
half as much. The Ramp Rate does not change during a cycle. However, if the cycle were to start at 20%
then the change to 100% will take much longer:

(100%  20%)
RampTime   600ms
20% 150ms

If low starting amplitude with a quick on-the-fly response is required, try shortening the Ramp Up Time.
For example, say empirical testing has shown that a horn/stack handles a 100% 150ms Ramp Up nicely,
in order to have the same Ramp Rate with a 20% amplitude start, the Ramp Up Time would have to be
reduced to 30ms. WARNING: Using exceedingly low Ramp Up Times with high amplitude setpoints may
damage the horn/stack or the generator (particularly if the Free Run Frequency is set far from the
Operating Frequency).

Remember that the Ramp Rate is always re-calculated by the generator at cycle start and is not able to
change until the next cycle. This rate is used to change the amplitude setpoint on-the-fly at a known-safe
rate. If PLC logic varies the amplitude setpoint throughout a cycle, it must reset to the desired starting
amplitude every cycle to yield predictable on-the-fly rates of change.

Table 5-8: Probe Output Assembly with MPC Byte Map


Assembly Instance Number 108 (0x6C), Size 4 DINT’s
DINT
NAME DESCRIPTION
INDEX
Bit Mask Definition:
0 EIP Status Inputs Run Continuously 0x00000001
Run Weld 0x00000002
Run Test 0x00000004

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Clear Error 0x00000008


On-The-Fly-Amp-En 0x00000010
Auto Stop* 0x00000020
FP Lockout** 0x000000C0
Run Test Scan** 0x00000100
Clear Setup Refreshed** 0x80000000

(*available only in v1.01 or later EIP/IQL firmware)


(**available only in v1.05 or later EIP/IQL firmware and
iQ LS-E and iQ Auto Plus models)

The “on-the-fly” regulated amplitude setting in units of whole


percentages, only significant if the “on-the-fly-amplitude” bit is
1 Amplitude Setpoint set in the System Status Input Word, else this parameter is
ignored by the generator and the values stored with the explicit
messages are used.
Process control setup “slot” number to use on the next weld
2 Setup number
cycle.
3 Probe number MPC probe selection to use on the next weld cycle.
Note that this assembly is only valid for an Implicit Connection when paired with the Probe Input Assembly
with MPC (instance number 107 / 0x6B).

This assembly provides for setup and MPC probe switching. This assembly can be used to switch setups
even if the MPC controller option has not been purchased. Individual control of setups and probes is
provided for the most flexible configuration and eased setup maintenance when multiple probes are
intended to run identical setups.

See the Probe Output Assembly Byte Map for descriptions of the “EIP Status Inputs” and “Amplitude
Setpoint” fields, they have identical behavior in this assembly.

The “Setup Number” field is the tells the iQ which locally stored setup to use on the new weld cycle. This
feature is only functional when connected to a MB with firmware greater than v3.11.00. Acceptable
values are 1 to 16, values outside that range are ignored. For example, a switch from setup 12 to 0, will
result in setup 12 being used, no setup switch will occur. Probe_Input_with_MPC_Assembly[11] reflects
the currently active setup.

Switching setups causes the EIP/IQL converter to recollect (aka “refresh”) all process control parameters
from the generator, The SETUP_REFRESHED bit (Probe_Input_with_MPC_Assembly[11].23) reflects the
progress of this procedure, no Explicit “Get_Attribute_Single” messages should be sent until this bit is set,
else parameters from the previous setup will be in the response. The “refresh” procedure uses a fair
amount of serial throughput, and if done while a weld cycle is running, will affect the real time response of
changes to bits in the “EIP Input Status” field (and the entire Input Assembly).

From the factory all setups contain the default values and switching between them will not show any
difference in weld behavior. It only makes sense to switch setups with this field if non-default values have
been applied and saved via explicit messages, or a FP interface. See Section 6 on Explicit Messaging
(and specifically Table 6-8) for more details.

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The “Probe Number” field is used to select the MPC output to which ultrasonic power will be routed. This
feature is only functional when connected to a MB with firmware greater than v3.11.00, and optioned with
an MPC controller. Values of 1 to 16 are permitted, values outside of that range will be ignored. For
example, a switch from probe 4 to 24 will be ignored, and probe 4 will still be selected.
Probe_Input_with_MPC_Assembly[12] reflects the currently active probe. The “MPC_READY” bit in the
Input Assembly (reflects the ready status of the MPC controller itself, not the generator as a whole) must
be monitored before activating ultrasound after an MPC probe switch.

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5.2 Configuring Allen Bradley PLCs for Implicit Messaging


In your RSLogix 5000 project, insert your Ethernet/IP capable PLC/PAC. In its I/O Config tree, you need
to insert a “New Module”,

Figure 5-1: Project Tree Screen

Expand the “Communications” selection to see all the options,

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Figure 5-2: Module Selection Screen

Select “ETHERNET-MODULE” \ ”Generic Ethernet Module”:

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Figure 5-3: Module Selection Screen (Cont.)

Now you need to configure the new module using IP address you set in the EIP/IQL converter and the
following info:

Connection Parameters:

Probe without MPC or Setup Switching:

Input Assembly Instance: 101 Size: 12 DINTs (48 bytes total)


Output Assembly Instance: 102 Size: 2 DINTs (8 bytes total)
Configuration Assembly Instance: 103 Size: 0 (0 bytes total)

Probe with MPC or Setup Switching (available in v1.05 and above):

Input Assembly Instance: 107 Size: 13 DINTs (52 bytes total)


Output Assembly Instance: 108 Size: 4 DINTs (16 bytes total)
Configuration Assembly Instance: 103 Size: 0 (0 bytes total)

NOTE: Starting with EIP/IQL Converter firmware v1.02, the assembly number ranges have been changed
from the 300’s (found in v1.00 and v1.01), to the 100’s to be compatible with Schneider/Modicon PLCs.
Firmware v1.02 does still support the “legacy” 300’s range assembly numbers, so that it is compatible with
existing installations. However, all new installations should use the 100’s range, as found in the v1.02

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demo’s on the CD shipped with the EIP/IQL converter. The 300’s range should be considered
DEPRECATED.

Figure 5-4: Module Properties Screen

NOTE: EIP/IQL converter firmware version v1.00 has a bug that will not allow a proper connection if the
“Use Unicast Connection over EtherNet/IP” option is checked under the “Connection” tab of the above
screen shot. Firmware v1.01 corrects this issue. This checkbox is not present in RsLogix 5000 v17 and
older. It is checked by default in v18 and newer. If your EIP/IQL converter firmware is v1.00, either
contact Dukane for updated firmware (recommended) or uncheck this option. The “Use Unicast
Connection over EtherNet/IP” option can significantly reduce network loading in situations where there are
many EtherNet/IP devices, the devices are running on a non-segregated general purpose network (NOT
RECOMMENDED), or a hub/half duplex switch is used (also NOT RECOMMENDED). If multicast IO
connections must be used, consider using network switches specifically designed for industrial control
networks (IGMP snooping support).

5.3 Configuring Omron PLCs for Implicit Messaging


Configuring an Omron PLC (a CJ2M-31 is used in this example) to connect to an EIP adapter is a two
step process. First one must use the “Network Configurator” tool of the CX-One package. This
application allows you to setup and verify your EIP network (specify EIP devices, their IP addresses, and
data tags). Once everything is working, the configuration must be downloaded into (and stored in) the
PLC and the “Network Configurator” tool can be closed. Then, CX-Programmer can be used to test the
connection and continue system integration.

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Start the “Network Configurator” application. First, you must install the EDS file associated with the
EIP/IQL converter, see “110-4644_20130416a.eds” (at the time of this writing), by selecting the “EDS File”
menu and then the “Install…” submenu. Browse to the EDS file to install it. Select “No” if prompted to
install the associated icon file. Now the tools are ready to use the EIP/IQL converter, and an entry for it
should appear in the tree of device on the left side of the application under “EtherNet/IP
Hardware”/”Vendor”/”Dukane Corporation”/”EIP/IQL Converter”.

Figure 5-5: Project Tree Screen

Next add your PLC and an EIP/IQL converter by double clicking the devices in the tree, or drag-dropping
them to the “network” pane on the right.

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Figure 5-6: Network Configuration Screen

Now change the IP addresses for each device to match your network by right clicking on each icon and
selecting the “Change Node Address…” menu item. NOTE: This does not change the actual IP address of
the PLC or EIP/IQL converter (that is done in CX-Programmer and via the EIP/IQL converter’s “config”
port, see section 3 of this document), this only changes the address within the network setup, and they
must match the IP addresses of the devices themselves. It is helpful at this point to have the proper IP
addresses already programmed into the devices.

Next, the data tags for the implicit input and output assemblies must be created. This is done by double
clicking on the PLC icon in the right hand pane.

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Figure 5-7a:Device Parameters Screen

Click the “New…” button to create both input and output tags.

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Figure 5-7b: Device Parameters Screen (Cont.)

Note that the name given here is the same tag name your PLC logic must use to access the data. Click
the “Regist” button to accept the changes, then the “Close” button to complete (as the application expects
you to enter more than one tag). Repeat the same procedure for the output assembly data tag. If you are
connecting multiple EIP/IQL converter boxes to one network, you must create multiple input/output tag
pairs, one for each EIP/IQL converter box.

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Figure 5-7c: Device Parameters Screen (Cont.)

There should now be an entry in both the “In – Consume” and “Out – Produce” tabs of the “Tag Sets” tab,
you should now have a valid “Tag Set”. Now select the “Connections” tab, click stylized “down arrow”
button to register the EIP/IQL converter device. Your screen should now look like this:

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Figure 5-7d: Device Parameters Screen (Cont.)

Double click the IP address that represents the EIP/IQL converter, select the “iQ_Probe_Input” tag on the
input connection dropdown menu and the “iQ_Probe_Output” tag for the output. Ensure “Probe I/O” is
selected for the “Connection I/O Type:” field. If these are not available, the EDS file installation is not
correct. RPI can be set as low as 10ms.

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Figure 5-7e:Device Parameters Screen (Cont.)

Click “Regist” then click “Close”. The connection tab should now look like:

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Figure 5-7f: Device Parameters Screen (Cont.)

Click “OK”. You are now ready to connect and download the network configuration. Do this by selecting
the “Network” -> “Connect…” menu item, select the interface then the “network”, hit OK. Right click on the
PLC, and select “Synchronize Entity” from the context menu. Repeat for the EIP/IQL converter, if there
are no errors then everything is set up correctly. Now download the network configuration to the PLC by
selecting the “Network” -> “Download” menu item. If everything completes without error, you can close
“Network Configurator”.

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Start CX-Programmer. Open an existing project or start a new one (some familiarity with CX-Programmer
is implied here…). You need to create new global “Symbols” that correlate to the “Tag Set” created in
“Network Configurator”. The Symbols must have the same names as displayed in the “Network
Configurator”: iQ_Probe_Input and iQ_Probe_Output in our running example. You must check the “Net.
Variable” check box and select the appropriate input/output radio button. Select a DINT as the data type,
and click the “Advanced Settings…” button to make it an array of the correct size. Give the tags addresses
appropriate for your PLC (needs to be in the “Data Link Area”). Repeat this for both the input and output
assemblies.

Figure 5-8: New Symbol Screen

Once this is setup, you can go online and download the program to the PLC. Once the PLC is running,
open “Watch” window and add iQ_Probe_Input[4] and iQ_Probe_Output[0]. If all has gone well (and the
generator is connected, powered up, and configured correctly), changing the value of iQ_Probe_Output[0]
to 1 should start a continuous weld cycle and show a changing value for iQ_Probe_Input[4], “Real Time

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Operating Frequency”. PLC program logic can now directly access the implicit connection data as if it
was local I/O.

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6. Configuring the PLC to detect EIP connection events


It is critical that the PLC logic ensures the EIP Output Assembly set to a known safe state before an EIP
I/O connection to the EIP/IQL converter is made. This is true for initial power-on connections, re-
connections that result from a controller reset, or reconnections due to a network or power outage at the
EIP/IQL converter. Once a connection is made, the PLC logic should monitor the IQL_READY bit in the
System Status Output register of the Input Assembly. Once this bit is set, the EIP/IQL converter has
established communication with the iQ generator and is ready to consume the information in the Output
Assembly, this can be considered the “running” state.

The connection status should be monitored continually and unconditionally by the PLC logic. When the
module status is not “connected” the PLC logic should zero all data in both the Input and Output Assembly
memory locations. This ensures known safe output values when the EIP/IQL converter obtains a
connection from the PLC. It also ensures that a zero-to-one transition of the IQL_READY bit will not be
missed due to stagnant input data still present from a prior connection. The PLC logic needs to maintain
three states with respect to the end-to-end PLC-to-iQ connection: disconnected, not-ready, running.

Table 6-1: PLC-to-iQ connection


EIP/IQL State Action / PLC Logic responsibility

The PLC logic must monitor the module connection status. This “Disconnected” state should be
entered any time that the PLC indicates the EIP/IQL converter’s module status is not “connected”.
Disconnected In this state the PLC logic should zero both the Input and Output Assembly data. Once the PLC
indicates that the EIP/IQL converter’s module status is “connected”, the PLC logic should transition
to the “Not Ready” state outlined next.

In the “Not Ready” state, the EIP/IQL converter has accepted the controller’s EIP connection, but
has not yet made an IQL connection to the iQ generator. The data in the Input Assembly is not yet
valid (cleared/zero’d by the EIP/IQL converter until an IQL connection is made) and the data in the
Output Assembly has not been passed to the iQ generator (the PLC logic should ensure the Output
Assembly data is cleared/zero’d in this state). The logic should monitor the IQL_READY bit in the
System Status Output register of the Input Assembly. Once this bit is set, the PLC should
transition to the “Running” state outlined next. The module connection status also needs to be
Not Ready
continually and unconditionally monitored in this state, the logic should transition to the
“Disconnected” state outlined above if the module status is not “connected”.
NOTE: The IQL_READY bit may be set as soon as an EIP connection is established. This is the
case when the generator and EIP/IQL converter are powered on before the controller can make a
connection. Therefore, this “Not Ready” state may be very brief. Conversely, the “Not Ready”
state may exist for extended periods of time, for example in the case of an ESTOP circuit removing
AC power from the iQ generator or a RS232 cable failure.

In the “Running” state, the EIP/IQL converter has made connections to both the PLC and the iQ
generator. This is the state where normal operation takes place, I/O data is valid and Explicit
Messages will be processed. This is the only state where the Output Assembly data is permitted to
Running be non-zero. Both the PLC connection indication and IQL_READY bit must be continually and
unconditionally monitored in this state to ensure proper detection of connection loss. The PLC
logic is to transition to the “Disconnected” state outlined previously if the module status that is not
“connected”, the “Not Ready” state should be entered if the IQL_READY bit returns to zero.

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6.1 Configuring Allen Bradley PLCs to detect EIP connection events


The state of the EIP connection for Allen Bradley PLCs is obtained via a GSV Instruction in program logic.
The GSV instruction must be setup to access the “EntryStatus” Attribute of the “Module” Object (refer to
the demo applications for an example). Status values returned by this instruction are “connected”,
“connecting”, “fault”, and “disconnecting”.

Figure 6-1: RSLogic Help screen

Class name used in


GSV, refer to
example.

Attribute name
used in GSV, refer
to example.

Module status
codes are displayed
in HEX format.

Move masked instruction


is necessary, refer to
example.

PLC Logic example using the GSV Instruction from the demo application:

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Figure 6-2: Connection Status Screen

In this example the


EIP/IQL converter
module status is
“faulted”.

The provided demo PLC and HMI applications implement these concepts; please see their source code
for more details.

6.2 Configuring Omron PLCs to detect EIP connection events


The state of the EIP connection for Omron PLCs is obtained from preallocated memory mapped into the
CIO section. Assuming a node address of 0, the connection status for an CJ2M-31 is located at CIO1512,
this is the “Communications Status 1” register. The “All Tag Data Links Operating” and “Tag Data Links
Operating” bits must be set for the EIP/IQL converter to be considered “connected”. Any other value
should be considered “disconnected”. See section 4-2-2 of the Omron document “EtherNet/IP Units
Operational Manual” (document W465-E1) for more information.

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7. Configuring the PLC for Explicit (Parameter) Messaging


EtherNet/IP explicit messaging is much different than implicit messaging. Exchange of explicit messages
requires direct action from the PLC logic program, as opposed to the automatic background exchange
that happens with implicit messaging. PLEASE NOTE: Explicit messaging is not required to be
implemented to use the EIP/IQL converter! Using explicit messaging correctly is much more involved
than the I/O messaging. If your application only calls for remotely starting welds, setting amplitude and/or
reading power, there is no need to implement the explicit message features. However, changing weld
control, frequency control, or process limit parameters requires the use of explicit messaging. You only
need to implement the assemblies you need to satisfy your application requirements. Please review your
requirements before implementing any of the Explicit Message parameters outlined next.

EtherNet/IP explicit messaging is meant to transmit infrequent, non-realtime parameter data. The EIP/IQL
converter supports “Assemblies” to be written and read via explicit messaging. All values are written or
read at once, they are transferred as a complete block of data. Therefore the each parameter value within
the assembly data must be valid at the time of a explicit message write. Note that not every parameter
value needs to or will change with every message, only that they ALL must be valid. The initial values
used by the PLC/HMI program (upon power up or reconnection (transition from the “Not Ready” into the
“Connected” state), see Section 6 of this document) should be pulled from the generator with a series of
explicit message reads.

Explicit message “writes” are accomplished using “Set_Attribute_Single” service code, and “reads” are
done with “Get_Attribute_Single” service code. The format/data layout of each assembly is fixed and
identical whether writing or reading. The EIP/IQL converter will return an EIP level error to the PLC if a
parameter value written is not valid, however reads should always succeed. Reads should be serviced by
the EIP/IQL converter as soon as they receive the request, 1-2 ms turnaround. Writes must be passed
down to the MB over the serial port when they are received. This delays the turnaround time of write to
roughly 12-20 ms.

Changes to parameters made via Explicit Messages are not automatically saved. For generator firmware
versions less than v3.00, explicit messages are not permitted while sonics are running and will result in an
error at the EIP level. For firmware versions v3.00 and up, Explicit Messages are permitted during the
weld cycle; the new values are used upon the start of the next cycle.

Some Assemblies accessed via Explicit Messages are only significant when the EIP/IQL converter is
connected to an iQ generator with the “iQ System Control” (weld by time and energy) options purchased.
These include the Probe Process Setup, Probe Process Limit, and Probe Trigger-By-Power Assemblies.

For assemblies containing bit-masked values, all unspecified bits should be ignored on reads and written
zero on writes, future firmware versions may use these bits and this will ensure backward compatibility
to existing PLC logic.

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7.1 Explicit Message Assembly Definitions


Table 7-1: Probe Regulation Setup Assembly Map
Assembly Instance: 110 (0x6E) size: 12 bytes
Byte Offset Size Name Description

0 DINT Weld Amplitude Units of whole percentages, range 20-100%

Units of mS, range 20-32767mS. Values over 1000mS are


4 DINT Ramp Up Time
extreme.

Units of mS, range 0-32767mS. Values over zero mS are


8 DINT Ramp Down Time
extreme.

Table 7-2: Probe Process Setup Assembly Map


Assembly Instance: 111 (0x6F) size: 24 bytes
Byte Offset Size Name Description

0 DINT Weld Time Units of mS, range 0-65535 mS

4 DINT Weld Power Units of whole Watts, range 0-65535 W

8 DINT Weld Energy Units of whole Joules, range 0-65535 J

12 DINT Hold Time Units of mS, range 0-65535 mS

16 DINT AfterBurst Delay Units of mS, range 0-65535 mS

20 DINT AfterBurst Duration Units of mS, range 0-65535 mS

The Probe Process Setup Assembly is only to be used when the EIP/IQL converter is connected to an iQ
generator with the “iQ System Control” (weld by time and energy) options purchased, else any “set” of the
Probe Process Setup Assembly will fail resulting in error code 0x09 “Invalid Attribute Value”. A value of
zero in any field will disable the feature. NOTE: in order for the “Run Continuous” bit of the Output
Assembly to be honored, all weld controlling values must be set to zero. In order for the “Run Weld” bit of
the Output Assembly to be honored, at least “Weld Time” must be non-zero.

Table 7-3: Probe Process Limit Assembly Map


Assembly Instance: 112 (0x70) size: 52 bytes
Byte Offset Size Name Description

Bit 0 – Enable Bad Limits


0 DINT Limit Enable
Bit 1 – Enable Suspect Limits

4 DINT Lower Bad Time 0 – 65535 mS

8 DINT Lower Suspect Time 0 – 65535 mS

12 DINT Upper Suspect Time 0 – 65535 mS


16 DINT Upper Bad Time 0 – 65535 mS

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20 DINT Lower Bad Power 0 – 65535 Watts

24 DINT Lower Suspect Power 0 – 65535 Watts

28 DINT Upper Suspect Power 0 – 65535 Watts

32 DINT Upper Bad Power 0 – 65535 Watts

36 DINT Lower Bad Energy 0 – 65535 Joules

40 DINT Lower Suspect Energy 0 – 65535 Joules

44 DINT Upper Suspect Energy 0 – 65535 Joules

48 DINT Upper Bad Energy 0 – 65535 Joules

The Probe Process Limit Assembly is only to be used when the EIP/IQL converter is connected to an iQ
generator with the “iQ System Control” (weld by time and energy) options purchased, else any “set” of the
Probe Process Limit Assembly will fail resulting in error code 0x09 “Invalid Attribute Value”. Any limit can
be individually disabled by setting its value to zero.

Table 7-4: Probe Frequency Setup Assembly Map


Assembly Instance: 113 (0x71) size: 20 bytes
Byte Offset Size Name Description

Units of whole Hertz, range is system frequency


dependant, sets the initial frequency the generator
0 DINT FreeRun Frequency produces when starting the weld cycle. This value can be
changed at any time but is only relevant at the start of the
next weld cycle.

Units of whole Hertz, range is system frequency


dependant. Must be at least 25 Hz higher than FreeRun.
4 DINT Maximum Frequency Must be below or equal to the generators maximum
frequency. The generator is not permitted to drive a
frequency higher than this value.

Units of whole Hertz, range is system frequency


dependant. Must be at least 25 Hz lower than FreeRun.
8 DINT Minimum Frequency Must be above or equal to the generator’s minimum
frequency. The generator is not permitted to drive a
frequency lower than this value.

Bit 0 – Enable Lock-n-Hold


12 DINT Frequency Control Options
All other bits are “reserved”

16 DINT Phase Units of whole degrees, range -20 to 20 degrees.

Table 7-5: Probe Trigger-By-Power Assembly Map


Assembly Instance: 114 (0x72) size: 16 bytes
Offset Size Name Description

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0 – Disabled
0 DINT Trigger By Power Enable
1 – Enabled

Units of mS, range 0-65535 mS, must be non-zero if


4 DINT Trigger Timeout
enabled

Units of whole Watts, range 0-65535 W, must be non-zero


8 DINT Power Trigger Level
if enabled

12 DINT Pre-Trigger Amplitude Units of whole percentages, range 20-100%

The Probe Trigger-By-Power Assembly is only to be used when the EIP/IQL converter is connected to an
iQ generator with the “iQ System Control” (weld by time and energy) options purchased, else any “set” of
the Probe Trigger-By-Power Assembly will fail resulting in error code 0x09 “Invalid Attribute Value”. Also,
Trigger-By-Power does not work with ultrasonic weld cycles started with the “Run Continuous” bit, weld
control parameters and the “Run Weld” bit must be used.

Table 7-6: IO Control Assembly Map


Assembly Instance: 115 (0x73) size: 4 bytes
Offset Size Name Description

Bit Mask Definition:


0 DINT I/O Control Auto-In Mode 0x000000FF
FP Lockout 0x00000100

The “Auto-In Mode” bits control the functionality of the Auto_In signal present on the System Status Inputs
(J2). A value of 0x00 will disable the input, a value of 0x01 will put it in “maintained” mode (requiring
activation throughout the entire cycle), a value of 0x10 will put it in “momentary” mode (requiring activation
for 5 msec). Note that “momentary” mode will only start a cycle if there is a weld controlling parameter set
(at least weld time MUST be set).

The “FP Lockout” bit is analogous to the System Status Input available on J2 of the generator. This bit is
only significant with MB Firmware versions v2.64 and greater. Setting this bit to ‘1’ will lock out the front
panel interface, preventing any changes to any parameters from being made there.

Table 7-7: Advanced Frequency Control Assembly Map


Assembly Instance: 116 (0x74) size: 24 bytes
Offset Size Name Description

The Frequency Control Mode parameter controls the sonics-


startup method used by the generator. Different values of this
parameter will greatly affect the operation of the generator.
0 DINT Frequency Control Mode USE WITH CAUTION!
Frequency Control Modes
FREQ_CTRL_MODE_NONE 0x00
FREQ_CTRL_MODE_PROFILED 0x01
FREQ_CTRL_MODE_SWEEP 0x02

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FREQ_CTRL_MODE_FIXED_SWEEP 0x03
FREQ_CTRL_MODE_FORCED_FREQ 0x04
FREQ_CTRL_MODE_PRESCAN 0x05
FREQ_CTRL_MODE_FREQ_TRACK 0x06
The Frequency Sweep Amplitude parameter is in units of whole
percentages and only significant in
FREQ_CTRL_MODE_SWEEP,
FREQ_CTRL_MODE_FIXED_SWEEP, and
FREQ_CTRL_MODE_PRESCAN Frequency control modes. At
sonics-start, the generator will ramp amplitude to this
parameter value. This amplitude will be held for the duration of
the sweep. The fixed sweep and prescan modes will interpret
this parameter value as a percentage of maximum pulse width,
delivering a fixed pulse width throughout the sweep duration.
4 DINT Sweep Amplitude
The standard sweep mode will interpret this parameter value as
a percentage of maximum amplitude, causing the generator to
modulate pulse width to obtain regulated amplitude throughout
the sweep duration.
The Frequency Sweep Amplitude parameter value must be
between 1 and 20%. Using an unreasonably high sweep
amplitude may damage the ultrasonic stack.
The rate of amplitude ramp is dictated by
PARAM_AMPLITUDE_SETPOINT divided by
PARAM_RAMP_UP_TIME.

The Frequency Sweep Start Frequency parameter is only


significant in FREQ_CTRL_MODE_SWEEP,
FREQ_CTRL_MODE_FIXED_SWEEP, and
FREQ_CTRL_MODE_PRESCAN Frequency control modes. This
parameter determines the starting/base frequency of the
Sweep Starting sweep. Its value must be greater than
8 DINT
Frequency PARAM_FREQ_LOW_LIMIT and less than
(PARAM_FREQ_HIGH_LIMIT -
PARAM_FREQ_SWEEP_WINDOW). Where
PARAM_FREQ_LOW_LIMIT and PARAM_FREQ_HIGH_LIMIT
are the values from Assembly 113 Probe Frequency Setup
Assembly.

The Frequency Sweep Stop Frequency parameter is only


significant in FREQ_CTRL_MODE_SWEEP,
FREQ_CTRL_MODE_FIXED_SWEEP, and
FREQ_CTRL_MODE_PRESCAN Frequency control modes. This
parameter determines the ending/final frequency of the sweep.
Sweep Stopping
12 DINT Its value must be less than PARAM_FREQ_HIGH_LIMIT and
Frequency
greater than (PARAM_FREQ_LOW_LIMIT +
PARAM_FREQ_SWEEP_WINDOW). Where
PARAM_FREQ_LOW_LIMIT and PARAM_FREQ_HIGH_LIMIT
are the values from Assembly 113 Probe Frequency Setup
Assembly.

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The Frequency Sweep Time parameter is only significant in


FREQ_CTRL_MODE_SWEEP,
FREQ_CTRL_MODE_FIXED_SWEEP, and
16 DINT Sweep Time
FREQ_CTRL_MODE_PRESCAN Frequency control modes. It
dictates the maximum amount of time the sweep will take. The
value of this parameter must be 1 to 32767.

The Frequency Sweep Window parameter is only significant in


FREQ_CTRL_MODE_SWEEP and
FREQ_CTRL_MODE_FIXED_SWEEP Frequency control modes.
The sweep window parameter defines the width of the “search
area” that the NCO is bounded by at any given time of the
sweep. The lower bound of the window starts at
Sweep Frequency PARAM_FREQ_SWEEP_START and ends at
20 DINT
Window (PARAM_FREQ_SWEEP_START -
PARAM_FREQ_SWEEP_WINDOW) in
PARAM_FREQ_SWEEP_TIME milliseconds. Similarly, the upper
bound of the window starts at (PARAM_FREQ_SWEEP_START +
PARAM_FREQ_SWEEP_WINDOW) and ends at
PARAM_FREQ_SWEEP_END. The value of this parameter must
be between 50 and 700 Hz.

The Advanced Frequency Control parameters should be considered “expert settings” and used with
extreme caution. Incorrect values may damage or destroy the welding equipment.

Table 7-8: Setup Save Assembly


Assembly Instance: 117 (0x75) size: 4 bytes
Offset Size Name Description

A value of 1 will save the values to the setup slot currently


0 DINT Setup Number selected by the Output Assembly’s “Setup Number” field. No
action is taken and error results on any other value than 1.
Available only in v1.05 and greater EIP/IQL converter firmware and v3.11.05 MB firmware. This is a
WRITE ONLY assembly, reads will result in error. No action is taken and an error results if the Implicit
connection has not selected the “output with MPC” assembly 107 and “input with MPC” assembly 108.

Table 7-9: Setup Copy Assembly


Assembly Instance: 118 (0x76) size: 8 bytes
Offset Size Name Description

Setup number to copy from. Values of 0 to 16 are permitted,


0 DINT Source Setup Number all others will result in an error. A source setup number of zero
is used to erase/restore the default value to the destination
setup.

Destination Setup Setup number to copy to. Values of 1 to 16 are permitted, all
1 DINT
Number others will result in an error.

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Available only in v1.05 and greater EIP/IQL converter firmware and v3.11.05 MB firmware. This is a
WRITE ONLY assembly, reads will result in error.

Table 7-10: Test Scan Result Assembly


Assembly Instance: 119 (0x77) size: 4 bytes
Offset Size Name Description

This will be non-zero after a successful Test Scan. The value


will represent the ideal value for Free Run Frequency
parameter. This value is cleared with a rising edge of the “Run
0 DINT Test Scan Result Test Scan” bit in the output assembly, and is populated with a
non-zero value only if the Test Scan is successful, else the
value remains zero. After initiating a test scan, one should
monitor the “Generator State” field of the input assembly and
issue a “get” for this assembly once it returns to “IDLE”
Available only in v1.05 and greater EIP/IQL converter firmware and v3.11.05 MB firmware. This is a
READ ONLY assembly, writes will result in error.

7.2 Configuring Allen Bradley PLCs for Explicit Messaging


Explicit Messaging is done by calling the “MSG” instruction in your program logic. The PLC logic should
always use the “Done” and “Error” outputs of the MSG blocks to determine status. The IQL_Ready bit of
the Output Assembly Status Inputs field will transition from a zero to one when the EIP/IQL Converter has
established communications with the iQ Generator. No explicit message requests should be issued until
this bit is set.

The below screenshots demonstrate the setup for the “Probe Regulation” assembly MSG instructions.
Note that the “Class” and “Attribute” fields will remain the same for every different Assembly definition.
Also note that the “Instance” fields will vary for every different assembly definition. Please see the above
tables for each Assembly definition, each containing the Instance number, total size, and byte mapping.

Note that the “Path” setting on the “Communication” tab of the MSG setup needs to reference the proper
Implicit Message Connection. So it makes sense to set that up (follow Section 5) before configuring any
MSG commands or tags.

In the case of the “iQ_PROBE_MPC_AOI” AOI usage, a preconfigured MSG instruction tag needs to be
instantiated for both the ‘get’ and ‘set’ case. These tags MUST be a controller scope, and each
“iQ_PROBE_UDT” MUST reference individual pairs of distinct tags. Only the “Service Code”, “Class”,
“Attribute”, and “Destination/Source Element” settings are significant when initially configuring these tags.
The “Instance” and “Length” are filled out programmatically by the AOI depending upon what request it is
making. For ‘get’, the “Destination Element” MUST point to the “get_buf[0]” element of the associated
“iQ_PROBE_UDT”. For ‘set’, the “Source Element” MUST point to the “set_buf[0]” element of the
associated “iQ_PROBE_UDT”. The “Path” setting MUST point to the proper Implicit Message
Connection.

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NOTE: BE sure to check the “Path” of each MSG instruction/tag is properly associated with the correct
Implicit Message Connection. This is especially important in the case of controlling multiple generators
simultaneously by the same logic program,

See the demo application for examples of Explicit Messaging used in PLC logic.

7.3 Configuring Omron PLCs for Explicit Messaging


The IQL_Ready bit of the Output Assembly Status Inputs field will transition from a zero to one when the
EIP/IQL Converter has established communications with the iQ Generator. No explicit message requests
should be issued until this bit is set.

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8. EIP/IQL Converter Firmware Update


There exists a small “boot-loader” program on the EIP/IQL converter microcontroller that is responsible for
launching and updating the device application firmware. The application firmware is responsible for
everything previously outlined in this document. In the event that the application firmware must be
updated, you must use the boot-loader to program the rest of the chip. Please read these instructions to
completion before attempting a firmware update.

The boot-loader always runs as soon as power is applied. It is accessed using a terminal interface just
like the module configuration procedure over a serial connection to the “Config” port. The boot-loader
serial port setup is fixed at 115200 bps, 8 data bits, no parity bit, and 1 stop bit with no hardware or
software flow control.

To access the boot-loader, connect the serial cable to the “Config” port of the EIP/IQL converter with the
power off. Press and hold the “ESC” key from you terminal emulator program (TeraTerm or
HyperTerminal), apply power to the EIP/IQL converter. You should see a screen similar to the following
and the “FAULT” LED should be blinking slowly (once per second). Release the “ESC” key. If the boot-
loader does not detect 5 consecutive “ESC” characters at 115200 bps within the first second of power up
it will run the application code, this is the boot sequence that happens during normal operation. The baud
rates used on the config port by the boot-loader (baud rate: 115200) and application (baud rate: 57600)
are intentionally different to reduce the chance of accidentally entering the boot-loader during normal
operation/use of app TUI.

Figure 8-1: Tera Term VT

The user interface to the boot-loader is identical to the EIP/IQL configuration procedure. Commands are
issued by typing the name of the command into the terminal emulator program and hitting the “Enter” key.
For example, to display a list of available commands, you would type “help” (without the quotes), hit the
enter key. All commands are case sensitive and in lower case (“Help”, “HELP”, “HeLp” are not the same
as “help”). The up and down arrow keys will cycle through your command history. The left and right

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arrow keys will move the edit position of your cursor. The “Backspace” key will remove characters (the
“Delete” key is not supported!). The “Enter” key submits the command to be processed.

The firmware update procedure starts by erasing all saved settings and the entire EIP/IQL application
code. Then a “HEX” file containing the application binary file (IQL_EIP_APP) is sent to the module using
the “XMODEM” protocol.

8.1 Firmware Update Procedure:


Ensure the file you want to program is easily located. From the boot-loader’s “EIPboot> “ command
prompt type “xdl” (without quotes) and hit the “Enter Key”. You will be presented with confirmation step to
ensure the command was not accidentally entered. A capital ‘Y’ is the only positive confirmation, any
other key will cancel the update. Once ‘Y’ sent, all program and setting information will be erased, THIS
CANNOT BE UNDONE! You will now be presented with a screen similar to the following.

Figure 8-2: Tera Term VT

Once the “Waiting for HEX file download via XMODEM...” line is displayed, the boot-loader is waiting for
your terminal emulator program to initiate the XMODEM download. In TeraTerm this is accomplished
through the “File->Transfer->XMODEM->Send…” menu sequence, browse to the HEX file and hit the “OK”
button to start the transfer. In HyperTerminal, an XMODEM transfer is accomplished through the
Transfer->Send File… menu sequence and selecting “Xmodem” from the “Protocol” drop down list, browse
to the HEX file and hit the “Send” button. The “FAULT” LED on the EIP/IQL converter should blink rapidly
during the XMODEM transfer.

Once the transfer has completed successfully, the firmware has been updated. Remove and reapply
power to the EIP/IQL converter, change your baud rate setting to 57600 bps and ensure you can reach
the command prompt of the newly updated application.

If the XMODEM transfer fails or stalls, or the “FAULT” LED stops blinking rapidly, you will need to restart
the procedure.

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9. Getting Help

Dukane Sales Engineers are readily available to help with common issues customers face when first
starting an EIP enabled project. For the quickest assistance, please provide the outputs for the “env”,
“iql”, and “eip” TUI commands (see Section 3) in your initial communications, either by copy/pasting
text from your terminal emulator, or taking screen shots. These three commands usually provide
enough information to overcome any issues.

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DOCUMENT INFO:

DATE: 3/7/2011
ECN: 8204
DRAWN: MJD
CHECKED: MJD
APPROVED: MJD
ENGINEER: MJD

REVISION INFO:

ISS DESCRIPTION APPD DATE


01 Updates to features for MJD 20120906
v1.01 firmware release
ECN 8732

02 updates for features in MJD 20130416


v1.02 firmware release
ECN XXXX

03 updates for features in v1.05 MJD 20131219


EIP/IQL firmware release and
iQ Auto Plus and iQ LE/LS-E versions.
ECN 9140

04 Replace references to “PLL”. MJD 20140815


Updated description of “Done”
Generator State. Added note about
exiting IQL mode on ATP RS232
ECN 9359

05 Add “Cycle Start Rejected” bit for MJD 20150507


Auto Plus v4r01r00 and greater
ECN 9566

06 Add some clarification about the AB MJD 20150914


Demo AOI/UDT usage. Add specifics
about LS/LSE/ATP implementations
ECN 9651

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