Circuits Syst Signal Process (2012) 31:1257–1277

DOI 10.1007/s00034-011-9379-5

1.2 V BiCMOS Sinh-Domain Filters

Chrisostomos Kasimis · Costas Psychalinos

Received: 9 August 2011 / Revised: 28 November 2011 / Published online: 21 December 2011
© Springer Science+Business Media, LLC 2011

Abstract Novel BiCMOS sinh-domain filter topologies, derived according to opera-

tional emulation and component substitution techniques of the corresponding passive
prototype filters, are introduced in this paper. This has been achieved by utilizing
BiCMOS nonlinear transconductor cells and an appropriate set of complementary
operators for transposing the corresponding equations into the sinh domain. An at-
tractive benefit of the proposed filter topologies is their capability for operating in
a low-voltage environment. The performance of a leapfrog sinh-domain filter has
been compared, using the Analog Design Environment of the Cadence software, with
those of the corresponding log-domain and operational transconductance amplifier
(OTA)-C filters.

Keywords Continuous-time filters · Analog filters · Companding filters ·

Sinh-domain filters

1 Introduction

Companding systems are externally linear, internally nonlinear processors. They offer
the advantage of employing the large-signal I -V characteristics of bipolar or MOS
transistors for realizing the required transfer functions. As a result, more complicated
structures than those of conventional linear filters are required. This is the price paid
for the absence of any extra linearization technique for realizing the employed active
cells. The concept of companding signal processing has been successfully applied in
logarithmic-domain (log-domain) and hyperbolic sine-domain (sinh-domain) filters.

C. Kasimis · C. Psychalinos ()

Physics Department, Electronics Laboratory, University of Patras, 26504, Rio Patras, Greece
e-mail: cpsychal@physics.upatras.gr
C. Kasimis
e-mail: chrkasim@upatras.gr
1258 Circuits Syst Signal Process (2012) 31:1257–1277

The realization of high-performance class-AB companding filters is very impor-

tant due to the increased dynamic range compared with that achieved by the corre-
sponding class-A realizations. For this purpose, log-domain active blocks were ini-
tially employed. The input stage was a rectifier of the input current, establishing two
positive components which feed two identical signal paths constructed from class-A
configurations. In order to realize the total output current, a subtraction of the inter-
mediate output currents was performed [1–3, 14, 15, 21, 22].
Sinh-domain filtering is a very attractive technique for realizing continuous-time
class-AB current-mode analog filters. According to this approach, the input current is
initially converted into a compressed voltage through an inverse hyperbolic sine ex-
pression. As a result, a better compression is achieved for both positive and negative
values of the input current than that achieved by the inverse exponential function in
log-domain filters. In addition, a split of the input current into two positive compo-
nents is simultaneously performed, enabling the capability for operating in class-AB
mode. In other words, class-AB operation is intrinsic in sinh-domain filters, while
this is not the case in log-domain filters. The compressed voltage is then processed
by the sinh-domain core, and the resulting output voltage is expanded and simultane-
ously converted into a linear current. In order to maintain the linear operation of the
whole filter, both compression and expansion operations should be complementary
to each other.
The sinh-domain filter topologies that have already been introduced in the liter-
ature [4–6, 8–10, 13, 16, 20] are constructed from nonlinear transconductor cells
realized by employing translinear loops, including both types (i.e., NPN and PNP) of
bipolar transistors operated in forward active regions or MOS transistors in weak in-
version regions. Due to the fact that in a typical BiCMOS process PNP transistors are
realized as parasitic transistors, the derived integrated structures suffer from various
imperfections, including low beta factor, limited bandwidth, and inaccurate match-
ing. The last two imperfections take place in the case of pure CMOS transconductor
realizations, realized using MOS transistors in weak inversion.
In order to overcome the aforementioned drawbacks, novel BiCMOS nonlinear
transconductor cells for performing signal processing in the sinh domain are pre-
sented in this paper. The embedded translinear loops are constructed only from NPN
transistors and, consequently, the limitations observed by the employment of PNP
transistors or MOS transistors in weak inversion have been overcome. Another at-
tractive characteristic of the proposed cells is their capability of operation in a low-
voltage environment. Using the proposed cells, sinh-domain filter structures derived
according to the operational (leapfrog) and topological emulation methods have been
designed.
The paper is organized as follows. The proposed cells are presented in Sect. 2. In
Sect. 3, integrator and summation blocks are presented for achieving the operational
emulation of passive prototypes. Their topological emulation is achieved using the
sinh-domain equivalents presented in Sect. 4. Both the operational and topological
emulation methods are systematically presented in Sect. 5. Two design examples are
given in Sect. 6; also, the performances of the filter topologies derived using the sinh-
domain, log-domain, and OTA-C filtering techniques are compared in this section.
Circuits Syst Signal Process (2012) 31:1257–1277 1259

Fig. 1 Nonlinear positive

transconductor cell (a) topology
and (b) associated symbol

2 Proposed Low-Voltage Sinh-Domain Cells

2.1 Low-Voltage Nonlinear Transconductors

A positive nonlinear transconductor cell (denoted E+ cell) that has already been used
for realizing low-voltage log-domain filters is depicted in Fig. 1a [14, 15], while its
associated symbol is given in Fig. 1b. The expression of the output current is given
by (1) as
υ̂ IN1 −υ̂ IN2
iOUT = I0 · e VT , (1)
where I0 is a dc current, and VT is the well-known thermal voltage. Note that vari-
ables with a circumflex in (1) represent compressed voltages, and this notation will
also be followed in the next section. The corresponding negative nonlinear transcon-
ductor cell (E− cell) could be easily derived by adding a current mirror at the output
of the cell in Fig. 1a.
Combining these cells, as is shown in Fig. 2a, where both components i1 and i2
are given by (1), the following input–output relationship is realized:
 
υ̂ IN1 − υ̂ IN2
iOUT = 2I0 · sinh . (2)
VT
1260 Circuits Syst Signal Process (2012) 31:1257–1277

Fig. 2 Realization of sinh-domain transconductors: (a) S cell, and (b) C cell

Fig. 3 Transistor level implementation of S/C cell

That is, according to (2) the realization of a nonlinear transconductor in the sinh
domain, which will be denoted in the next section as the S cell, is obtained. In a
similar way, the derivation of a cell which realizes the hyperbolic cosine expression
in (3)
 
υ̂ IN1 − υ̂ IN2
iOUT = 2I0 · cosh (3)
VT
is demonstrated in Fig. 2b, and this will be denoted as the C cell.
The transistor level realization of a sinh-domain nonlinear transconductor which
realizes a hyperbolic sine/cosine function is given in Fig. 3. The minimum power
Circuits Syst Signal Process (2012) 31:1257–1277 1261

Fig. 4 Realization of sinh-domain signal processing blocks. (a) Two-quadrant divider: FBD and as-
sociated symbol. (b) SINH−1 and SINH operators. (c) Sinh-domain two-input lossless integrator.
(d) Current-mode two-input lossless integrator. (e) Two-input lossy integrator. (f) Summation topology

supply voltage requirement is equal to |VTHP | + VCE,sat + VDS,sat , where VTHP is the
threshold voltage of a PMOS transistor, and VDS,sat and VCE,sat are the corresponding
saturation voltages of MOS and bipolar transistors.

2.2 Low-Voltage Two-Quadrant Divider

The derivation of a class-AB divider will be performed by following a similar concept

to that introduced in [19]. The proposed topology and the corresponding symbol are
1262 Circuits Syst Signal Process (2012) 31:1257–1277

Fig. 4 (Continued)
Circuits Syst Signal Process (2012) 31:1257–1277 1263

given in Fig. 4a, where the label 2Q depicts the two-quadrant operation capability of
the cell. This originates from the fact that both currents Ibias and i2 are dc bias currents
and, consequently, they must be strictly positive. In addition, due to the employment
of the proposed S cell, the benefit for low-voltage operation capability is preserved.
According to (2) and the fact that the cell S1 is biased at a current i2 , the interme-
diate voltage (υ̂) is given by (4) as
 
i1
υ̂ = VDC + VT · sinh−1 , (4)
2i2
where VDC is a dc voltage.
The configuration of the cell S2 establishes that its output current could be written,
using (2) and (4), as in (5),
i1
iOUT = Ibias · , (5)
i2

3 Sinh-Domain Integrators

According to conventional linear filter theory, one way to design high-order filters is
the operational emulation of the corresponding passive prototype filters. For this pur-
pose, the main building blocks are lossy and lossless integrators. In order to facilitate
the derivation of these blocks, a set of complementary operators, denoted as SINH−1
and SINH, is introduced at this point. Their definitions are slightly modified in com-
parison with those introduced in [7], and they are given by (6) and (7), respectively,
as
 
−1 −1 i
υ̂ = SINH (i) ≡ VDC + VT · sinh , (6)
2I0
 
υ̂ − VDC
i = SINH(υ̂) ≡ 2I0 · sinh . (7)
VT
This set of operators could be realized by appropriately configured S cells, as demon-
strated on the left and right sides of Fig. 4b, respectively.
A conventional current-mode two-input lossless integrator is described by the ex-
pression in (8),
d
τ · iout = iin1 − iin2 , (8)
dt
where τ is the integrator’s time constant. Using (7)–(8), the expression that corre-
sponds to an integrator realized by following the concept of sinh-domain filtering is
given by (9),
d 
τ· SINH(υ̂OUT ) = SINH(υ̂IN1 ) − SINH(υ̂IN2 ). (9)
dt
Substituting (7) into (9) and considering that the time constant is given by the formula
τ = (ĈVT /2I0 ), it is obtained after some algebraic manipulation that the current that
flows through the integration capacitor Ĉ is expressed as
sinh( υ̂IN1V−V DC
) − sinh( υ̂IN2V−V DC
)
iC = 2I0 · T T
. (10)
cosh( υ̂OUTV−V
T
DC
)
1264 Circuits Syst Signal Process (2012) 31:1257–1277

A sinh-domain topology that realizes (10) is demonstrated in Fig. 4c. It should be

noted at this point that, in order to realize the whole circuit of a current-mode in-
tegrator, the cells in Fig. 4b must be added at the input and output of the topology
in Fig. 4c, respectively [7]. The derived circuit could be further simplified through
the following steps: (a) by substituting (6) in the right side of (10) the nominator
takes the form of the difference iI N 1 − iI N 2 , and (b) employing an S/C cell instead of
a C cell the derived hyperbolic sine output is actually the required expansion of the
compressed output voltage according to (7). Thus, the modified form of (10) is
iIN1 − iIN2
iC = (11)
cosh( υ̂OUTV−V
T
DC
)
The expression in (11) is realized by the topology in Fig. 4d, which could be con-
sidered as a standalone current-mode two-input lossless integrator realized using the
concept of sinh-domain filtering.
The expression for the current that flows through the integration capacitor in the
case of a sinh-domain two-input lossy integrator is given by (12) as
sinh( υ̂IN1V−V DC
) − sinh( υ̂IN2V−V DC
) − sinh( υ̂OUTV−V DC
)
iC = 2I0 · T T T
. (12)
cosh( υ̂OUTV−V
T
DC
)
The corresponding topology of the sinh-domain lossy integrator is demonstrated in
Fig. 4e. Inspecting the topologies in Figs. 4c and 4e, it is concluded that the required
damping is realized by enhancing the topology of the C cell connected to the output
of the lossless integrator in such a way that an S cell is also embedded into its struc-
ture. In other words, starting from the topology of a lossy integrator the derivation
of a lossless integrator could be achieved by omitting the output of the S/C cell that
provides the hyperbolic sine current.
Another useful building block for deriving leapfrog filters with finite transmission
zeros is the sinh-domain summation block. This is given in Fig. 4f, and the corre-
sponding input–output relationship is described by the formula in (13),
SINH(υ̂OUT ) = K1 · SINH(υ̂IN1 ) + K2 · SINH(υ̂IN2 ). (13)

4 Sinh-Domain Equivalents of Passive Elements

High-order filters could be designed by following the topological emulation of the

corresponding passive prototype filters. According to this approach, each element of
the passive prototype is substituted by its active equivalent. This concept has been
successfully applied in the cases of log-domain filters [12]. The derivation of equiv-
alents has been achieved by employing the following rules: (a) the current that flows
into the terminals of passive elements in the linear domain must be equal to that which
flows into the corresponding terminals of its active equivalent in the sinh domain, and
(b) the voltage at each terminal of the passive element in the linear domain must be
equal to the expanded voltage at the corresponding terminal of its equivalent in the
sinh domain. Alternatively stated, the linearity of currents is preserved during the
transposition between the linear domain and the sinh domain, while the voltages are
Circuits Syst Signal Process (2012) 31:1257–1277 1265

mapped through a nonlinear function. In order to fulfill the aforementioned rules, the
operators in (6)–(7) must be slightly modified. Thus, a suitable set of complementary
operators is given in (14) and (15),
 
−1 −1 υ
υ̂ = SINH (υ) ≡ VDC + VT · sinh , (14)
VT
 
υ̂ − VDC
υ = SINH(υ̂) ≡ VT · sinh . (15)
VT
In the case of a grounded resistor the well-known current voltage relationship
i = υ/R is expressed, using (15), as
 
VT υ̂ − VDC
i= · sinh . (16)
R VT
According to (2) and (16) it is concluded that a grounded resistor with value R =
VT /2I0 can be realized by an appropriately configured S cell biased at current I0 =
VT /2R, and this is demonstrated in the first row of Table 1.
For a grounded inductor the current–voltage relationship in the linear domain is
given by

1
i = · υ · dt. (17)
L
Using (14) the expression in (17) is transposed into the sinh domain as

1  
i= · SINH(υ̂) · dt, (18)
L
which can be realized by a topology that simultaneously offers integration and con-
version of the resulting intermediate compressed voltage into a linear current. These
operations can be performed by the topology given in the second row of Table 1.
The operation of integration is performed by the S2 and C cells, and the resulting
capacitor voltage is given by (19) as
d 
τ· SINH(υ̂C ) = SINH(υ̂), (19)
dt
where τ = (ĈVT /2I0 ) is the integrator’s time constant. The S1 cell transforms this
compressed voltage into a linear current, in order to preserve the linearity of currents
between the linear domain and the sinh domain. Its output current can be written
using (15) and (19) as

4I 2  
i= 0 · SINH(υ̂) · dt. (20)
ĈVT 2

Comparing (18) and (20), it is readily demonstrated that the topology emulates a
grounded inductor with a value given by the formula: L = ĈVT2 /4I02 . The sinh-
domain equivalent of a floating inductor is given in the third row of Table 1.
A grounded capacitor is described in the linear domain by the following expres-
sion:
dυ
i=C· . (21)
dt
1266 Circuits Syst Signal Process (2012) 31:1257–1277

Table 1 Component substitution scheme using the concept of sinh-domain filtering

Passive element Sinh-domain equivalent Value

1 Grounded resistor R = VT /2I0

2 Grounded inductor L = ĈVT2 /4I02

3 Floating inductor L = ĈVT2 /4I02

Consequently, the transposed expression that corresponds to (21) is given by (22),

d 
i=C· SINH(υ̂) . (22)
dt
The proposed emulator of the grounded capacitor is depicted in the fourth row of
Table 1. Writing KCL at the node where the voltage (υ̂A ) is indicated, it is obtained
that SINH(υ̂c ) = SINH(υ̂). S4 and C cells form a single-input sinh-domain lossless
integrator, where the voltage υ̂A , and consequently the voltage υ̂, is integrated. This
operation is still described by (19), while the S1 cell converts the produced voltage
Circuits Syst Signal Process (2012) 31:1257–1277 1267

Table 1 (Continued)

Passive element Sinh-domain equivalent Value

4 Grounded capacitor C = Ĉ

5 Floating capacitor C = Ĉ

into a current; the expression for that current derived after some algebraic manipula-
tion is
d
i = Ĉ · SINH(υ̂). (23)
dt
1268 Circuits Syst Signal Process (2012) 31:1257–1277

Comparing (21) and (23), it is derived that an emulation of a grounded capacitor with
a value C = Ĉ is performed. In a similar way, the sinh-domain equivalent of a floating
capacitor is given by the fifth row of Table 1.

5 Low-Voltage Sinh-Domain Filters

5.1 Sinh-Domain Leapfrog Technique

Let us consider, for example, the third-order passive prototype given in Fig. 5, where
the circumflex in brackets will be used for the representation of the corresponding
nonlinear passive elements and voltages in the sinh-domain component substitution
method.
Following the systematic method introduced in log-domain filters [17], the result-
ing functional block diagram (FBD) in the sinh domain, assuming equal terminations,
is demonstrated in Fig. 6. The values of capacitors C1,eq and C2,eq could be calcu-
lated as C1,eq = C1 + C2 and C3,eq = C2 + C3 [17]. The realization of the FBD in
Fig. 6 will be achieved by employing lossless integration and weighted summation
blocks.

Fig. 5 A third-order passive

prototype filter with finite
transmission zeros

Fig. 6 FBD for the passive filter in Fig. 5

Circuits Syst Signal Process (2012) 31:1257–1277 1269

5.2 Sinh-Domain Component Substitution Technique

The equivalent of the passive filter in Fig. 5, derived according to the component sub-
stitution concept, is easily obtained by employing the sinh-domain equivalents given
in Table 1 for the passive elements denoted with a circumflex in Fig. 5. Inspecting
the topology in Fig. 5, it is easily concluded that the currents in both linear-domain
and sinh-domain filters are the same, while a one-to-one correspondence between the
linear and compressed voltages in Fig. 5 will be established. This mapping is per-
formed through the formula given by (14). In addition, the conversion of the input
current into a compressed voltage is achieved by a nonlinear resistor at the input of
the filter, while the inverse procedure is realized by a nonlinear resistor at the output
of the filter.

6 Simulation and Comparison Results

6.1 Sinh-Domain Filter Design Examples

The validity of the proposed methods will be verified through simulation results. For
this purpose, MOS and bipolar transistor models provided by the AMS 0.35 µm S35
BiCMOS process will be employed in simulations. The sinh-domain filter topology
that emulates the operation of the prototype filter in Fig. 5 is demonstrated in Fig. 7.
The corresponding sinh-domain filter that emulates the topology of the filter in Fig. 5
could be easily constructed by employing the equivalents given in Table 1. It should
be mentioned at this point that both realizations have been performed by employing
only S and C cells and, consequently, they are attractive from the modularity point of
view.
In order to achieve a frequency response with 0.5 MHz cutoff frequency and
0.5 dB passband ripple, the values of passive elements of the prototype filter will be
R ≡ RS = RL = 5.136 k, C1 = C3 = 72.88 pF, C2 = 46.30 pF, and L2 = 267.4 µH.
Taking into account that the value of an emulated resistor is related with the bias cur-
rent according to the formula R = VT /2I0 , and considering that VT = 25.68 mV
at 27°C, the calculated value of the bias current of nonlinear transconductors is
I0 = 2.5 µA. The dc power supply voltage VDD and the reference voltage VDC have
been chosen as 1.2 V and 1 V, respectively. The dc power dissipation of the leapfrog
filter in Fig. 13 was 603 µW; for the filter obtained through the topological emulation
method it was 885 µW.
The aspect ratio of NMOS transistors used in the nonlinear transconductor cells
was 4.5 µm/1 µm, while for PMOS transistors it was 80 µm/1.3 µm. The bias
scheme was realized by employing NMOS and PMOS transistors with aspect ratio
1.3 µm/1 µm and 80 µm/1.3 µm, respectively.
The values of the capacitors of the filter in Fig. 4d have been calculated by equating
the expressions of the time constants of the integrators in Fig. 4c with the general ex-
pression of the time constant of an integrator in the sinh domain, i.e.: τ = (ĈVT /2I0 ).
Thus, the derived values were Ĉ1 = Ĉ3 = 119.18 pF, Ĉ2 = 40.55 pF, while the
weight factors K13 and K31 have a value of 0.388. The values of the capacitors of
1270 Circuits Syst Signal Process (2012) 31:1257–1277

Fig. 7 Sinh-domain third-order elliptic leapfrog filter

the component substitution filter, calculated according to the formulas C = Ĉ and

L = ĈVT2 /4I02 , were ĈC1 = ĈC3 = 72.88 pF, ĈC2 = 46.30 pF, and ĈL2 = 40.55 pF.
Circuits Syst Signal Process (2012) 31:1257–1277 1271

Fig. 8 Frequency responses of sinh-domain filters

Fig. 9 Demonstration of the electronic tuning capability of sinh-domain filters

Thus the total capacitor area was 278.9 pF for the leapfrog filter and 232.6 pF for the
component substitution filter.
Employing the Analog Design Environment of the Cadence software, the derived
frequency responses of the sinh-domain filters have been simultaneously depicted in
Fig. 8. The cutoff frequencies were 459 kHz for the leapfrog filter and about 458 kHz
for the component substitution filter. The observed deviations are mainly caused by
the transistors’ imperfections and could be compensated through an appropriate ad-
justment of the dc bias current I0 .
The capability for electronically tuning the cutoff frequency of both filters has
been verified by varying the dc current I0 within the range from 70 nA to 5 µA.
The corresponding plots are given in Fig. 9; the cutoff frequencies were 14.1 kHz
and 0.9 MHz for the leapfrog filter, 14.3 kHz and 0.88 MHz for the topologically
emulated filter.
The linear performance of both filters has been simulated by employing the well-
known Periodic State Space (PSS) analysis offered by the Cadence software. For
this purpose, a 1 kHz tone with variable amplitude has been applied at the inputs
1272 Circuits Syst Signal Process (2012) 31:1257–1277

Fig. 10 Linear performance of the leapfrog and component substitution filters

of both filters. The simulated total harmonic distortion (THD) plots as a function
of the amplitude of the input signal are simultaneously given in Fig. 10. A THD
level 2% is observed for an input signal of 14.7 µA [i.e., modulation index (M.I.)
factor = iampl /I0 ∼= 5.9] in the filter in Fig. 7, while for the component substitution
filter the level was 8 µA (M.I. = 3.2). The noise was integrated over the passband
of the filter, and the simulated rms values of the input referred noise were 16.8 nA
and 18.6 nA, for the leapfrog and component substitution filters, respectively. Thus,
the predicted values of the dynamic range were 55.8 dB and 49.7 dB, respectively.
It should be mentioned at this point that the dynamic range could be maximized by
employing the concept introduced in [11].
The sensitivity behavior of the proposed filters has been evaluated through sta-
tistical analysis results by utilizing the well known Monte Carlo analysis, offered by
the Analog Design Environment. The derived values of standard deviation of the low-
frequency gain and cutoff frequency were 0.3% and 41 kHz for the leapfrog filter. The
corresponding values for the component substitution filter were 0.8% and 30 kHz.
From the results it is obvious that the sinh-domain leapfrog filter has superior
performance in terms of power dissipation, linearity, noise, and dynamic range, com-
pared with the component substitution filter. On the other hand, the component sub-
stitution filter offers reduced total capacitor area and the benefit of synthesizing any
sinh-domain filter of arbitrary type and order through a one-step procedure, due to
the availability of the substitution scheme given in Table 1.

6.2 Class-AB Log-Domain Filters

An FBD of a class-AB log-domain filter is depicted in Fig. 11 [1, 14, 15]. The class-
AB operation is established by splitting the input current (iin ) into two strictly positive
components denoted as iIN1 and iIN2 , respectively, that feed the corresponding inputs
of the two class-A paths. A low-voltage current splitter is depicted in Fig. 12. The
translinear loop formed by transistors Q1 –Q4 establishes the relationship iIN1· iIN2 =
I02 ; also considering that iin = iIN1 − iIN2 , the derived expressions for iIN1 and iIN2
are given by (24) and (25), respectively, as
Circuits Syst Signal Process (2012) 31:1257–1277 1273

Fig. 11 FBD of a class-AB log-domain filter

Fig. 12 Low-voltage current splitter


iin + 2 + 4I 2
iin 0
iIN1 = (24)
2

−iin + 2 + 4I 2
iin 0
iIN2 = . (25)
2
Each of these components will be converted into a compressed voltage by the corre-
sponding block that realizes the LOG operator defined by (26) as [18]
 
 I0 + iIN(i)
υ IN(i) = LOG(iIN(i) ) = VDC + VT · ln , i = 1, 2. (26)
I0
The produced voltages will be processed by the corresponding class-A log-domain
core constructed from the cell in Fig. 1a and its inverting version. The resulting output
 
voltages υ OUT1 and υ OUT2 will be converted into linear currents according to the
EXP operator described by (27) as
υ̂OUT(i) −VDC

iOUT(i) = EXP( υ OUT(i) ) = I0 · e VT − I0 , i = 1, 2. (27)
1274 Circuits Syst Signal Process (2012) 31:1257–1277

Fig. 13 Realization of the (a) LOG and (b) EXP operators

The realization of the operators in (26)–(27) could be performed by the cells in

Figs. 13a,b, respectively, where a current mirror should be added at the output of
one of them in order to realize the required subtraction operation.
Taking into account that the equivalent resistor in a log-domain leapfrog filter is
given by the expression R = VT /I0 (instead of VT /2I0 for sinh-domain filters) the
bias current of a log-domain leapfrog filter must be equal to 5 µA, in order to achieve
the same impedance level as that of the sinh-domain leapfrog filter. The bias voltage
has been chosen equal to 1.2 V; also, the aspect ratios of both the NMOS and PMOS
transistors were the same as those of the corresponding transistors in the cells of the
sinh-domain leapfrog filter.

6.3 Class-AB OTA-C Filters

A conventional linear-domain class-AB OTA-C leapfrog filter could be easily derived

through the following concept. Considering the expression of the output current of an
S cell given by (2), it is concluded that under small-signal operation [i.e., (υ̂ IN1 −
υ̂ IN2 )  VT ] it could be simplified to (28)
2I0
iOUT = · (υ̂ IN1 − υ̂ IN2 ). (28)
VT
That is, in a small-signal environment, an S cell behaves like a differential input linear
Operational Transconductance Amplifier (OTA), with a transconductance given by
the formula gm = 2I0 /VT . In other words, a conventional OTA could be considered
as a special case of the S cell. In order to achieve fair comparison results, the bias
current of the OTA-C filter has been set equal to 2.5 µA as in the case of the sinh-
domain filter. In addition, the bias voltage and the aspect ratios of both the NMOS
and PMOS transistors were the same as those of the other filters under comparison.
Circuits Syst Signal Process (2012) 31:1257–1277 1275

Fig. 14 Conventional OTA-C (a) lossless and (b) lossy integrators

The derivation of the corresponding lossless and lossy linear integrators could be
performed through (10) and (12) and the well-known approximations sinh(x) ∼ =x
and cosh(x) ∼= 1 for x → 0. The resulting topologies are given in Figs. 14a and 14b,
respectively. Upon inspection, one easily sees that they are the well-known linear
domain OTA-C lossless and lossy integrators. In addition, the achieved simplification
is obvious, in comparison with Figs. 4c and 4e, where companding signal processing
has been employed. The required summation for realizing the transmission zeros in
the linear domain is also performed by the topology in Fig. 4f, which acts a summer
in both large- and small-signal operations.

6.4 Comparison Results

The derived performance results concerning the class-AB sinh-domain, log-domain,

and OTA-C filters are summarized in Table 2.
Comparing the companding realizations, it is derived that the sinh-domain
leapfrog filter offers a significant reduction of the dc power dissipation compared
with its corresponding log-domain counterpart. This happens because, under the
same impedance level, the dc bias current of a sinh-domain filter is half that of a
log-domain filter. In addition, due to the requirement for constructing two identical
signal paths for the realization of class-AB log-domain filters, the total capacitor area
is doubled in this case.
Comparing the performances of sinh-domain and OTA-C filters, it is concluded
that the sinh-domain filter has superior performance in terms of linearity and dynamic
range. This is achieved at the expense of increased power dissipation and circuit
complexity.
An alternative aspect for evaluating the performance of the filters is the figure of
merit (FOM) given in (29),
FOM = P
n·f0 ·(DR) , (29)
where P is the power dissipation of the filter, n is the number of poles, f0 is the cutoff
frequency, and DR is the dynamic range.
1276 Circuits Syst Signal Process (2012) 31:1257–1277

Table 2 Performance results for class-AB sinh-domain, log-domain, and OTA-C filters

Performance factor Sinh-domain Log-domain OTA-C

Power supply voltage 1.2 V 1.2 V 1.2 V

Bias current 2.5 µA 5 µA 2.5 µA
Power dissipation 603 µW 874 µW 281 µW
Total capacitance 278.9 pF 557.8 pF 278.9 pF
Modulation index factor at 2% THD level 5.9 3.4 1.5
Input referred noise 16.8 nA 20 nA 11.5 nA
Dynamic range 55.8 dB 55.5 dB 47.2 dB
Standard deviation of the low-frequency gain 0.3% 2.6% 0.2%
Standard deviation of the cutoff frequency 40 kHz 42 kHz 33 kHz

The calculated values for leapfrog sinh-domain, log-domain, and OTA-C filters
were 0.65 pJ, 0.98 pJ, and 0.81 pJ, respectively. Thus, it is easily concluded that
the sinh-domain leapfrog filter offers more power-efficient realization than the corre-
sponding log-domain and OTA-C filters.

7 Conclusion

Two systematic ways of designing sinh-domain filters have been introduced in this
paper. The derivation of the filter topologies is achieved by employing novel nonlinear
transconductors with capability for operation under a single 1.2 V dc power supply.
The derived comparison results show that the sinh-domain technique offers the most
power-efficient realization in comparison with log-domain and OTA-C filters. Thus,
the proposed blocks have potential for employment in modern high-performance,
low-voltage analog processing systems.

Acknowledgements This research has been co-financed by the European Union (European Social
Fund—ESF) and Greek national funds through the Operational Program “Education and Lifelong Learn-
ing” of the National Strategic Reference Framework (NSRF)—Research Funding Program: Heracleitus II.
Investing in knowledge society through the European Social Fund.

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