SWE-212 CO&A Assignment 1

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SWE-212T Computer Organization and Architecture Assignment 01

SIR SYED UNIVERSITY OF ENGINEERING & TECHNOLOGY


SOFTWARE ENGINEERING DEPARTMENT
Fall 2022
Computer Organization and Architecture (SWE-212)
Assignment 1
Semester: III Batch: 2021F
Due Date: 18-11-2022 Max Marks: 10

Instructions:
 This assignment contains 04 questions. You have to attempt all.
 Assignment Solution must be neat and clean on A4-size paper in your own hand writing.

Question 1 Differentiate Computer Organization and Computer Architecture using a proper example.
[01 mark]
Question 2 What are the basic reasons of switching from one generation of computer to another
generation. List out the key characteristics of IAS computer. [03 marks]

Question 3 Given following 16-bit hypothetical machine working on hexadecimal numbers has
following Instructions set: [03 Marks]

0001 = Load AC from memory


0010 = Store AC to memory
0011 = Load AC from I/O
0100 = Store AC to I/O
0101 = Add to AC from memory or I/O

In this case, the 12-bit address of Instruction format identifies a particular Memory address
or I/O device. Show the program execution for the following Program:
1. Load AC from memory location 800.
2. Add contents of memory location 801.
3. Store AC to device 02.

Assume that the machine is attached total of 05 devices. The next value retrieved from
memory location 800 is 0006H and the location 901 contains a value of 0004H.

Memory CPU Registers


00 PC
01 AC
02 IR

800
801
I/O Devices
Device 1
Device 2

Device 05

16-bit Hexadecimal Hypothetical Machine

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SWE-212T Computer Organization and Architecture Assignment 01

Question 4 Consider a hypothetical 64-bit microprocessor having 64-bit instruction format composed of
two fields: the two bytes contains the opcode and the remainder the immediate operand or an
operand address.
[03 Marks]
a. What is the maximum directly addressable memory capacity (in bytes)?
b. Discuss the impact on the system speed if the microprocessor bus has:
1. 32-bit local address bus and a 32-bit local data bus, or
2. 64-bit local address bus and a 16-bit local data bus.
c. How many bits are needed for the program counter and the instruction register?

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