Non linear Waveshaping

Clipping Circuit

It is in fact a wave shaping circuit, which can control the shape of the output
waveform by eliminating or clipping a part of applied wave. This is done without
distorting the other (remaining) part of waveform.

The clipping circuit does not have energy storage elements (capacitors) but it
includes both linear (Resistors) and nonlinear elements (transistors or junction
diodes). This circuit is normally used for the selection in the transmission purpose.
In transmission, a portion of a signal wave form occupied below or above a
particular reference voltage level is selected. Other than the name – Clipping
circuits; Slicers, Clippers, Limiters or Amplitude selectors are also often used.
Classification of Clipping Circuit
•According to non linear devices used –
• Diode Clippers.
• Transistor Clippers.
•According to biasing –
• Unbiased Clippers.
• Biased Clippers.
•According to configuration used –
• Series diode clippers.
• Shunt or Parallel diode clippers.
• A series combination of reference supply, resistor and diode.
• Multi-diode clippers comprises of a number of diodes, resistors and reference
voltage.
• Two emitter-coupled transistors functioning as an over driven difference
amplifier.
•According to level of clipping –
• Positive clippers.
• Biased clippers.
• Negative clippers.
• Combination clippers.
Positive clippers:
It actually removes the positive half cycles of the input voltage. Here in positive series clipper, when the input is
positive then the diode is in reverse biased condition (output is zero) and when the input is negative, then the diode
is in forward biased condition (figure 2).
The clippers discussed above are considered as the circuits with ideal diode. But if the barrier potential (V0) is
considered (Si = 0.7 V and Ge = 0.3 V), the output voltage of positive and negative clippers are shown below.
Combination Clipper
For removing a portion of both positive and negative half cycle of input signal, we use this combination clipper
(figure below).
Clipping below reference level
If this clipping circuit of Figure 2.2(b), is modified by reversing the diode as shown in Figure 2.3(a), the
corresponding piece-wise linear transfer characteristic and the output for a sinusoidal input will be as
shown in Figure 2.3(b). In this circuit, the portion of the waveform more positive than VR is transmitted
without any attenuation but the portion of the waveform less positive than VR is totally suppressed. For Vj
< VR, the diode conducts and acts as a short circuit and the equivalent circuit shown in Figure 2.3(c)
results and the output is fixed at VR. For v, > VR, the diode is reverse biased and acts as an open circuit and
the equivalent circuit shown in Figure 2.3(d) results and the output is the same as the input.
these equations we can deduce that R = J RrxR^ , i.e. the external resistance R is to be
selected as the geometric mean of Rf and /?,. The ratio RrIRf serves as a figure of merit
for the diodes used in these applications. A zener diode may also be used in
combination with a p-n junction diode to obtain single-ended clipping, i.e. one-level
clipping.
Series Clippers
Clipping above the reference voltage Vn
Figure 2.4(a) shows a series clipper circuit using a p-n junction diode. VR is the reference
voltage source. The diode is assumed to be ideal (/?/ = 0, Rr = °°, Vy= 0) so that it acts as
a short circuit when it is ON and as a open circuit when it is OFF. Since the diode is in the
series path connecting the input and the output it is called a series clipper. The v0 versus
v, characteristic called the transfer characteristic is shown in Figure 2.4(b). The output
for a sinusoidal input is shown in Figure 2.4(c).
The circuit works as follows:
For v, < VR, the diode Dj is forward biased because its anode is at a higher potential than
its cathode. It conducts and acts as a short circuit and the equivalent circuit shown in
Figure
2.4(d) results. The difference voltage between the input v,- and the reference voltage VR i.
e. (VR
Clipping below the reference voltage VB
Figure 2.5(a) shows a series clipper circuit using a p-n junction diode and a reference voltage source
VR. The diode is assumed to be ideal (Rf = 0, Rr = °°, Vy = 0) so that it acts as a short circuit when it is
ON and as a open circuit when it is OFF. Since the diode is in the series path connecting the input and
the output it is called a series clipper. The transfer characteristic is shown in Figure 2.5(b). The output
for a sinusoidal input is shown in Figure 2.5(c).
Figure 2.5 (a) Diode series clipper circuit diagram, (b). transfer characteristics, (c) output for a
sinusoidal input, (d) equivalent circuit for vi- < VR, and (e) equivalent circuit for vi- > VR.
The circuit works as follows:
For vi < VR, D is reversed biased because its anode is at a lower potential than its cathode. The
diode does not conduct and acts as an open circuit and the equivalent circuit shown in Figure
2.5(d) results. No current flows through R and hence no voltage drop across R and
hence vo = VR- So the slope of the transfer characteristic is zero for v, < VR. Since the input is
clipped off for v, < VR, this region is called the clipping region.
For v, > VR, the diode is forward biased because its anode is at a higher potential than
its cathode. The diode conducts and acts as a short circuit and the equivalent circuit
shown in Figure 2.5(e) results. Current flows through /? and the difference voltage
between the input and the output voltages v, - VR drops across /? and the output v0 =
vi. The slope of the transfer characteristic for v, > VR is unity. Since the input is
transmitted to the output for v; > VR, this region is called the transmission region. The
equations are called the transfer characteristic equations.

Some single-ended diode clipping circuits, their transfer characteristics and the
output waveforms for sinusoidal inputs are shown below (Figure 2.6).
Some single-ended clipping circuits
Clipping at Two Independent Levels
A parallel, a series, or a series-parallel arrangement may be used in double-ended limiting at two independent
levels. A parallel arrangement is shown in Figure 2.7. Figure 2.8 shows the transfer characteristic and the output
for a sinusoidal input. The input-output characteristic has two breakpoints, one at v0 = v, = VR1 and the second at v0
= v, = -VR2 and has the following characteristics.
The two level diode clipper shown in Figure 2.8 works as follows. For v, > VR1, DI is ON and D2 is OFF
and the equivalent circuit shown in Figure 2.9(a) results. So the output v0 = VR1 and the slope of the
transfer characteristic is zero.

For v, < - VR2, DI is OFF and D2 is ON and the equivalent circuit shown in Figure 2.9(b) results. So the
output v0 = - VR2 and the slope of the transfer characteristic is zero. For-VR2 < v, < VRI, D! is OFF and
D2 is OFF and the equivalent circuit shown in Figure 2.10 results. So the output v0 = v/ and the slope
of the transfer characteristic is one.
The circuit of Figure 2.7 is called a slicer because the output contains a slice of the input between two
reference levels VR! and VR2. Looking at the input and output waveforms, we observe that this circuit
may be used to convert a sine wave into a square wave, if VDI = Vm. and if the amplitude of the input
signal is very large compared with the difference in the reference levels, the output will be a
symmetrical square wave. Two zener diodes in series opposing may also be used to form a double-
ended clipper.
Some double-
ended clipping
circuits
For vi > v1 D1 On , D2 OFF therefore vo = vi - v1

Fig (f) double ended series biased clipper

Transistor Clippers
A nonlinear device is required for clipping purposes. A diode exhibits a nonlinearity, which occurs
when it goes from OFF to ON. On the other hand, the transistor has two pronounced nonlinearities,
which may be used for clipping purposes. One occurs when the transistor crosses from the cut-in
region into the active region and the second occurs when the transistor crosses from the active
region into the saturation region. Therefore, if the peak-to-peak value of the input waveform is such
that it can carry the transistor across the boundary between the cut-in and active regions, or across
the boundary between the active and saturation regions, a portion of the input waveform will be
clipped. Normally, it is required that the portion of the input waveform, which keeps the transistor in
the active region shall appear at the output without distortion. In that case, it is required that the input
current rather than the input voltage be the waveform of the signal of interest. The reason for this
requirement is that over a large signal excursion in the active region, the transistor output current
responds nominally linearly to the input current but is related in a quite nonlinear manner to the input
voltage. So, in transistor clippers a current drive needs to be used. A transistor clipper is shown in
Figure 2.19. The resistor R which represents either the signal source impedance or a resistor
deliberately introduced must be large compared with the input resistance of the transistor in the
active region. Under these circumstances, the input base current will very nearly have the waveform
of the input voltage, because the base current is
given by

where Vr is the base-to-emitter cut-in voltage. Vy » 0.1 V for Ge and Vy ~ 0.5 V for Si.
The waveforms which result when a sinusoidal voltage v, carries the transistor from cut-off to saturation are
shown in Figure 2.21. The base circuit is biased so that cut-in occurs when VBE reaches the voltage V.
Figure 2.21 Waveforms for the transistor clipper of figure 2.19: (a) in put voltage and the base –to-
emitter voltage (b) the base current (c) the collector current (d) the out put voltage

Emitter-Coupled Clipper
An emitter-coupled clipper is shown in Figure 2.22. It is a two-level clipper using transistors. The base
of Q2 is fixed at a voltage VBE2, and the input is applied to B1. If initially the input is negative, Q1 is
OFF and only Q2 carries the current. Assume that VBE2 has been adjusted so that Q2 operates in its
active region. Let us assume that the current / in the emitter resistance is constant. This is valid if
IVBE2I is small compared to VBE2 + VEE When Vi is below the cut-off point of Q1, all the current
flows through Q2. As vi increases, Q1 will eventually come out of cut-off, both the transistors will be
carrying currents but the current in Q2 decreases while the current in Q1 increases, the sum of the
currents in the two transistors remaining constant and equal to 7. The input signal appears at the
output, amplified but not inverted. As v1 continues to increase, the common emitter will follow the
base of Q1. Since the base of Q2 is fixed, a point will be reached when the rising emitter voltage cuts
off Q2. Thus, the input signal is amplified but twice limited, once by the cutoff of Q1 and once by the
onset of cut-off in Q2. The total range Av0, over which the output can follow the input is VE and is
constant and therefore adjustable through an adjustment of 7. The absolute voltage of the portion of
the input waveform selected for transmission may be selected through an adjustment of a biasing
voltage on which v, is superimposed or through an adjustment of VBB2- The total range of input
voltage Av, between the clipping limits is Av0/A, where A is the gain of the amplifier stage. Figure
2.23 shows the transfer characteristic of an emitter-coupled clipper.
Op-amp as Clipper: Positive Clipper:
A circuit that removes positive parts of the input signal can be formed by using an op-amp with a
rectifier diode. The clipping level is determined by the reference voltage Vref, which should less than
the i/p range of the op-amp (Vref < Vin). The Output voltage has the portions of the positive half
cycles above Vref clipped off.
The circuit works as follows:
During the positive half cycle of the input, the diode D1 conducts only until Vin = Vref. This happens
because when Vin <Vref, the output volts V0 of the op-amp becomes negative to device D1 into
conduction when D1 conducts it closes feedback loop and op-amp operates as a voltage follower. (i.e.
) Output V0 follows input until Vin = Vref.

When Vin > Vref => the V0 becomes +ve to derive D1 into off. It opens the feedback loop and op- amp
operates open loop. When Vin drops below Vref (Vin<Vref) the o/p of the op-amp V0 again becomes –ve
to device D1 into conduction. It closes the feedback path. (o/p follows the i/p).

Thus diode D1 is on for vin<Vref (o/p follows the i/p) and D1 is off for Vin>Vref.

The op-amp alternates between open loop (off) and closed loop operation as the D  is turned off and
Ex: for high speed op-amp HA 2500, LM310, μA 318. In addition the difference input voltage (Vid=high) is high
during the time when the feedback loop is open (D1 is off) hence an op-amp with a high difference input voltage
is necessary to prevent input breakdown. If Rp (pot) is connected to –VEE instead of +Vcc, the ref voltage Vref
will be negative (Vref = -ve). This will cause the entire o/p waveform above –Vref to be clipped off.
Negative Clipper:
The positive clipper is converted into a –ve clipper by simply reversing diode
D1 and changing the polarity of Vref voltage. The negative clipper clips off the –
ve parts of the input signal below the reference voltage. Diode D1 conducts ->
when Vin > -Vref and therefore during this period o/p volt V0 follows the i/p volt
Vin. The –Ve portion of the output volt below –Vref is clipped off because (D1 is
off) Vin<-Vref. If –Vref is changed to –Vref by connecting the potentiometer Rp to
the +Vcc, the V0 below +Vref will be clipped off. The diode D1 must be on for Vin >
Vref and off for Vin.
COMPARATORS:
A comparator circuit is one which may be used to mark the instant when an Arbitrary
waveform attains some reference level. Consider the simple clipping circuit for comparison
operation.
For the sake of explanation let the input signal be a ramp as shown below.
This input crosses the voltage level vi = VR at time t = t1.
The output remains quiescent at vo = VR until t = t1 after which it rises with the input Signal
There is a sudden change in the slope of the output at the instant the input reaches VR. But due
to ageing and due to temperature variations the diode, may not switch from OFF to ON at
exactly t = t1 .
It may switch state at any instant after t1 and before t2. Hence, the break point (point at
which device D changes state) may not exactly be at t1 but instead, there is a
break region (t1 to t2).. Hence, there is a region of uncertainty which also, after
the break point, the output follows the input i.e. has the same slope of the input.
If this region of uncertainty is to be reduced, the response after the break point
should be sharp. To achieve this amplifier may be placed before or after the
comparator.

Consider the comparator circuit the response .To the left of the break point, the
diode is OFF then the reverse incremental resistance of the diode, Rr is very
much larger when compared to R. To the right of the break point the forward
incremental resistance of the diode, Rf is very much smaller than R. If the break
point is located at a point where r = R.
comparator will respond at a current such that r = RA

Without an amplifier the transmission gain) was 1/2 . and with an amplifier
connected,

is 1. Which says that there is no marked improvement in the response of

the

comparator arrangement.
Some applications of comparators:
(i) Measurement of time delays:
In the comparator shown before, if VR1 is the reference level in the first comparator
(double differentiator) then a pulse is generated with a peak at t = t1. If VR2 is the
reference level set in a second comparator then the pulse is generated with peak at
t = t2. Then the time difference between the two pulses is simply t2 – t1 = (VR2- VR1)/α

(ii) Timing markers generated from sine wave:

If a sine wave is applied as input, when the input reaches VR output of the
comparator is high till again the input reaches VR. Differentiate and clip negative
spikes. We have positive spikes which can be implemented as timing markers.
Fig.The output pulses are differentiated and the time difference between the outputs spikes is proportional to the
phase difference.
(iv) Square waves from sine waves: In regenerative comparator (Schmitt trigger) if the reference voltage is + Vref,
the output goes to +V or –V
Diode Clamping Circuit
A clamping circuit is used to place either the positive or negative peak of a signal at a desired level.
The dc component is simply added or subtracted to/from the input signal. The clamper is also
referred to as an DC restorer and ac signal level shifter.
In some cases, like a TV receiver, when the signal passes through the capacitive coupling network, it
loses its dc component. This is when the clamper circuit is used so as to re-establish the dc
component into the signal input. Though the dc component that is lost in transmission is not the
same as that introduced through a clamping circuit, the necessity to establish the extremity of the
positive or negative signal excursion at some reference level is important.
Types of clamping circuits
A clamp circuit adds the positive or negative dc component to the input signal so as to push it either
on the positive side, as illustrated in figure (a) or on the negative side, as illustrated in figure (b).
The circuit will be called a positive clamper, when the signal is pushed upward by the circuit. When
the signal moves upward, as shown in figure (a), the negative peak of the signal coincides with the
zero level.
Negative Clamper
The circuit will be called a negative clamper, when the signal is pushed downward by the circuit. When
the signal is pushed on the negative side, as shown in figure (b), the positive peak of the input signal
coincides with the zero level.
Working of a diode clamping circuit
For a clamping circuit at least three components — a diode, a capacitor and a resistor are required.
Sometimes an independent dc supply is also required to cause an additional shift. The important
points regarding clamping circuits are:
(i) The shape of the waveform will be the same, but its level is shifted either upward or downward,
(ii) There will be no change in the peak-to-peak or rms value of the waveform due to the clamping
circuit. Thus, the input waveform and output waveform will have the same peak-to-peak value that
is, 2Vmax. This is shown in the figure above. It must also be noted that same reading will be obtained
in the ac voltmeter for the input voltage and the clamped output voltage.
(iii) There will be a change in the peak and average values of the waveform. In the
figure shown above, the input waveform has a peak value of Vmax and average value
over a complete cycle is zero. The clamped output varies from 2 Vmax and 0 (or 0
and -2Vmax). Thus thus peak value of the clamped output is 2Vmax and average value
is Vmax.
(iv) The values of the resistor R and capacitor C affect the waveform.
(v) The values for the resistor R and capacitor C should be determined from the
time constant equation of the circuit, t = RC. The values must be large enough to
make sure that the voltage across the capacitor C does not change significantly
It is advantageous to first consider the condition under which the diode becomes forward biased.

Clamping circuits are often used in television receivers as dc restorers. The signal that is sent to
the TV receiver may lose the dc components after being passed through capacitively coupled
amplifiers. Thus the signal loses its black and white reference levels and the blanking level. Before
passing these signals to the picture tube, these reference levels have to be restored. This is done
by using clamper circuits. They also find applications in storage counters, analog frequency meter,
capacitance meter, divider and stair-case waveform generator.

Consider a negative clamping circuit, a circuit that shifts the original signal in a vertically
downward direction, as shown in the figure below. The diode D will be forward biased and the
capacitor C is charged with the polarity shown, when an input signal is applied. During the positive
half cycle of input, the output voltage will be equal to the barrier potential of the diode, V0 and the
capacitor is charged to (V – VQ). During the negative half cycle, the diode becomes reverse-biased
and acts as an open-circuit. Thus, there will be no effect on the capacitor voltage. The resistance R,
being of very high value, cannot discharge C a lot during the negative portion of the input
waveform. Thus during negative input, the output voltage will be the sum of the input voltage and
the capacitor voltage and is equal to – V – (V — V0) or – (2 V – V0). The value of the peak-to-peak
output will be the difference of the negative and positive peak voltage levels is equal to V0-[-(2V-
V0)]   or   2 V.
The figure shown below can be modified into a positive clamping circuit by reconnecting the diode

with reversed polarity. The positive clamping circuit moves the original signal in a vertically upward

direction. A positive clamping circuit is shown in the figure below. It contains a diode D and a capacitor

C as are contained in a negative clamper. The only difference in the circuit is that the polarity of the

diode is reversed. The remaining explanation regarding the working of the circuit is the same as it is

explained for the negative clamper.

To remember which way the dc level of a signal moves, look at the figure shown below. Notice that the

diode arrows point downward, the same direction as the dc shift.

Similarly, in the figure shown below, the diode arrow points upward, again the same direction as
the dc shifts. It means that when the diode points upward. We have a positive dc clamper and
when the diode points downward, the circuit is a negative dc clamper.

A number of clamping circuits with their effect on the input signal are shown in the figure given below. All the
figures shown below have the input and output signals in square waves, the same procedure can be used for
sinusoidal inputs. In fact, one approach to the analysis of clamping networks with sinusoidal inputs is to
replace the sinusoidal wave signal by a square wave of the same peak values. The resulting output will then
form an envelope for the sinusoidal response, as illustrated in figure (g) for a network appearing in figure (f).
 The diodes have been assumed to be ideal and 5 RC » T/2 in drawing the output waveforms.
A Clamper circuit can be defined as the circuit that consists of a diode, a resistor and a capacitor that shifts the waveform to a desired DC level without changing the actual appea
In order to maintain the time period of the wave form, the tau must be greater than, half the time period dischargingtimeofthecapacitorshouldbeslow.dischargingtimeofthe
τ=Rc

Applications of clamping circuits

•They find some applications in sonar and radar testing
•Used as voltage doublers
•They are used to remove distortions in a circuit
•Used in video processing equipment like TV
A Clamper Circuit is a circuit that adds a DC level to an AC signal. Actually, the
positive and negative peaks of the signals can be placed at desired levels using the
clamping circuits. As the DC level gets shifted, a clamper circuit is called as a Level
Shifter.
Clamper circuits consist of energy storage elements like capacitors. A simple
clamper circuit comprises of a capacitor, a diode, a resistor and a dc battery if
required.
Clamper Circuit
A Clamper circuit can be defined as the circuit that consists of a diode, a resistor and
a capacitor that shifts the waveform to a desired DC level without changing the
actual appearance of the applied signal.
In order to maintain the time period of the wave form, the tau must be greater than,
half the time period discharging timeofthecapacitorshouldbeslow.
dischargingtimeofthecapacitorshouldbeslow.
Ƭ=RC
Where
•R is the resistance of the resistor employed
•C is the capacitance of the capacitor used
The time constant of charge and discharge of the capacitor determines the output of
a clamper circuit.
•In a clamper circuit, a vertical shift of upward or downward takes place in the output
waveform with respect to the input signal.
•The load resistor and the capacitor affect the waveform. So, the discharging time of
the capacitor should be large enough.
The DC component present in the input is rejected when a capacitor coupled network
is used asacapacitorblocksdc. Hence when dc needs to be restored, clamping circuit
is used.
Types of Clampers
There are few types of clamper circuits, such as
•Positive Clamper
•Positive clamper with positive Vr
•Positive clamper with negative Vr
•Negative Clamper
•Negative clamper with positive Vr
•Negative clamper with negative Vr
Positive Clamper Circuit
A Clamping circuit restores the DC level. When a negative peak of the signal is raised above to the
zero level, then the signal is said to be positively clamped.
A Positive Clamper circuit is one that consists of a diode, a resistor and a capacitor and that shifts
the output signal to the positive portion of the input signal. The figure below explains the
construction of a positive clamper circuit.
Initially when the input is given, the capacitor is not yet charged and the
diode is reverse biased. The output is not considered at this point of time.
During the negative half cycle, at the peak value, the capacitor gets charged
with negative on one plate and positive on the other. The capacitor is now
charged to its peak value Vm. The diode is forward biased and conducts
heavily.
During the next positive half cycle, the capacitor is charged to positive Vm
while the diode gets reverse biased and gets open circuited. The output of
the circuit at this moment will be
V0 = Vi+Vm
Hence the signal is positively clamped as shown in the above figure. The
output signal changes according to the changes in the input, but shifts the
level according to the charge on the capacitor, as it adds the input voltage.
Positive Clamper with Positive Vr
A Positive clamper circuit if biased with some positive reference voltage, that voltage will be added to
the output to raise the clamped level. Using this, the circuit of the positive clamper with positive
reference voltage is constructed as below.

During the positive half cycle, the reference voltage is applied through the diode at the output and as
the input voltage increases, the cathode voltage of the diode increase with respect to the anode
voltage and hence it stops conducting. During the negative half cycle, the diode gets forward biased
and starts conducting. The voltage across the capacitor and the reference voltage together maintain
the output voltage level.
Positive Clamper with Negative Vr
A Positive clamper circuit if biased with some negative reference voltage, that
voltage will be added to the output to raise the clamped level. Using this, the
circuit of the positive clamper with positive reference voltage is constructed as
below.

During the positive half cycle, the voltage across the capacitor and the reference
voltage together maintain the output voltage level. During the negative half-cycle,
the diode conducts when the cathode voltage gets less than the anode voltage.
These changes make the output voltage as shown in the above figure.
Negative Clamper
A Negative Clamper circuit is one that consists of a diode, a resistor and a capacitor and that shifts the output signal
to the negative portion of the input signal. The figure below explains the construction of a negative clamper circuit.

During the positive half cycle, the capacitor gets charged to its peak value vm. The diode is forward biased and
conducts. During the negative half cycle, the diode gets reverse biased and gets open circuited. The output of the
circuit at this moment will be
V0=Vi+Vm

Hence the signal is negatively clamped as shown in the above figure. The output signal changes according to the
changes in the input, but shifts the level according to the charge on the capacitor, as it adds the input voltage.
Negative clamper with positive Vr
A Negative clamper circuit if biased with some positive reference voltage, that voltage will be
added to the output to raise the clamped level. Using this, the circuit of the negative clamper with
positive reference voltage is constructed as below.

Though the output voltage is negatively clamped, a portion of the output waveform is raised to the
positive level, as the applied reference voltage is positive. During the positive half-cycle, the diode
conducts, but the output equals the positive reference voltage applied. During the negative half
cycle, the diode acts as open circuited and the voltage across the capacitor forms the output.
Negative Clamper with Negative Vr
A Negative clamper circuit if biased with some negative reference voltage, that voltage will be added
to the output to raise the clamped level. Using this, the circuit of the negative clamper with negative
reference voltage is constructed as below.

The cathode of the diode is connected with a negative reference voltage, which is less than that of
zero and the anode voltage. Hence the diode starts conducting during positive half cycle, before the
zero voltage level. During the negative half cycle, the voltage across the capacitor appears at the
output. Thus the waveform is clamped towards the negative portion.
Applications
•Used as direct current restorers
•Used to remove distortions
•Used as voltage multipliers
•Used for the protection of
amplifiers
•Used as test equipment
•Used as base-line stabilizer
Clamping Circuit Theorem
Under steady-state conditions, for any input waveform, the shape of the output waveform of a
clamping circuit is fixed and also the area in the forward direction (when the diode conducts) and
the area in the reverse direction (when the diode does not conduct) are related.
The clamping circuit theorem states that, for any input waveform under steady-state conditions, the
ratio of the area Af under the output voltage curve in the forward direction to that in the reverse
direction Ar is equal to the ratio Rf / R

Fig2.79

This theorem applies quite generally independent of the input waveform and the magnitude of the
source resistance. The proof is as follows:
Consider the clamping circuit of Figure 2.79, the equivalent circuits in Figures 2.80(a) and 2.80(b),
and the input and output waveforms of Figures 2.82(a) and 2.82(b) respectively.
In the interval 0 < t < T, the input is at its upper level, the diode is ON, and the equivalent circuit of
Figure 2.80(a) results. If vf(t) is the output waveform in the forward direction, then the capacitor
charging current is
Figure 2.80 (a) Equivalent circuit when the diode is conducting and (b) the equivalent circuit when the
diode is not conducting.
Therefore, -the charge gained by the capacitor during the forward interval is

In the interval T1 < t < T1 + T2, the input is at its lower level, the diode is OFF, and the equivalent circuit of Figure
2.80(b) results. If Vr(t) is the output voltage in the reverse direction,
then the current which discharges the capacitor is

Therefore, the charge lost by the capacitor during the reverse interval is
Under steady-state conditions, the net charge acquired by the capacitor over one
cycle must be equal to zero. Therefore, the charge gained in the interval 0 < t < T1,
will be equal to the charge lost in the interval T1 < t < T1 + T2, i.e. Qg = Ql